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path: root/target-ppc/cpu.h
AgeCommit message (Expand)AuthorFilesLines
2008-07-01Move interrupt_request and user_mode_only to common cpu state.pbrook1-2/+0
2008-06-30Move CPU save/load registration to common code.pbrook1-0/+2
2008-06-29Add instruction counter.pbrook1-0/+3
2008-05-30Fix typo.pbrook1-1/+1
2008-05-30Move clone() register setup to target specific code. Handle fork-like clone.pbrook1-0/+11
2008-05-29Push common interrupt variables to cpu-defs.h (Glauber Costa)bellard1-2/+0
2008-05-28moved halted field to CPU_COMMONbellard1-2/+0
2008-05-06PPC: fix definition of msr_speaurel321-1/+1
2007-12-10Cleanup: remove useless TARGET_GPR_BITS definition.j_mayer1-3/+0
2007-12-10Fix PowerPC 74xx definitions.j_mayer1-2/+3
2007-11-24Fix incorrect debug prints (reported by Paul Brook).j_mayer1-3/+19
2007-11-23Revert foolish patch.j_mayer1-4/+3
2007-11-23Fix ppc32 register dumps on 64-bit hosts.pbrook1-3/+4
2007-11-21Fix PowerPC 7xx definitions.j_mayer1-1/+18
2007-11-19Remove shared macro used to define PowerPC implementations instructions sets:j_mayer1-2/+9
2007-11-19PowerPC 620 MMU do not have the same exact behavior as standardj_mayer1-12/+15
2007-11-19New PowerPC CPU flag to define the decrementer and time-base source clock.j_mayer1-12/+16
2007-11-17Improve PowerPC instructions set dump.j_mayer1-1/+0
2007-11-17Add definitions for Freescale PowerPC implementations,j_mayer1-387/+440
2007-11-17Define Freescale cores specific MMU model, exceptions and input bus.j_mayer1-12/+38
2007-11-17PowerPC hypervisor mode is not fundamentally available only for PowerPC 64.j_mayer1-3/+21
2007-11-17Make the PowerPC MMU model, exception model and input bus modelj_mayer1-7/+9
2007-11-17Add missing definition for number of input pins for the PowerPC 970 bus.j_mayer1-0/+1
2007-11-17Always make all PowerPC exception definitions visible.j_mayer1-8/+0
2007-11-16Always make PowerPC hypervisor mode memory accesses and instructionsj_mayer1-8/+0
2007-11-14Fix PowerPC targets compilation on 32 bits hosts:j_mayer1-3/+3
2007-11-12PowerPC SPE extension fix: must always preserve GPR high bits whenj_mayer1-1/+1
2007-11-12Allow use of SPE extension by all PowerPC targets,j_mayer1-26/+31
2007-11-10Allow selection of PowerPC CPU giving a PVR.j_mayer1-1/+0
2007-11-10added cpu_model parameter to cpu_init()bellard1-6/+5
2007-11-04PowerPC 601 need specific callbacks for its BATs setup.j_mayer1-1/+4
2007-11-03PowerPC MMU and exception fixes:j_mayer1-0/+2
2007-10-27Fix PowerPC FPSCR update and floating-point exception generationj_mayer1-4/+74
2007-10-25Add PowerPC power-management state check callback.j_mayer1-0/+1
2007-10-25Gprof prooved the PowerPC emulation spent too much time in MSR load and storej_mayer1-43/+39
2007-10-14Properly implement non-execute bit on PowerPC segments and PTEs.j_mayer1-0/+1
2007-10-14Merge PowerPC 620 input bus definitions with standard PowerPC 6xx.j_mayer1-26/+19
2007-10-14There is no need of a specific MMU model for PowerPC 601.j_mayer1-2/+0
2007-10-14Replace is_user variable with mmu_idx in softmmu core,j_mayer1-0/+19
2007-10-12Unify '-cpu ?' option.j_mayer1-0/+1
2007-10-08Remove synonymous in PowerPC MSR bits definitions.j_mayer1-23/+12
2007-10-07Implement PowerPC Altivec load & stores, used by Apple firmware for memcpy.j_mayer1-4/+7
2007-10-07PowerPC target coding style fixes.j_mayer1-1/+0
2007-10-07Reorganize the CPUPPCState structure to group features.j_mayer1-16/+21
2007-10-07Add MSR bits signification per PowerPC implementation flags (to be continued).j_mayer1-23/+44
2007-10-05Full implementation of PowerPC 64 MMU, just missing support for 1 TBj_mayer1-5/+9
2007-10-05Rename PowerPC MMUCSR0 and MMUCFG SPRs: those are not BookE specific.j_mayer1-2/+2
2007-10-04Make PowerPC cache line size implementation dependant.j_mayer1-6/+5
2007-10-03We never have to export ppc_set_irq.j_mayer1-4/+10
2007-10-01Fix reproductible crash: call cpu_loop_exit from micro-op, not from helper.cj_mayer1-2/+2
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