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Osmocom QEMU branch with Smartcard Chip emulation
Harald Welte
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target-mips
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exec.h
Age
Commit message (
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Author
Files
Lines
2007-04-01
Actually enable 64bit configuration.
ths
1
-4
/
+4
2007-03-31
Malta CBUS UART support.
ths
1
-1
/
+1
2007-03-23
Fix enough FPU/R2 support to get 24Kf going.
ths
1
-0
/
+1
2007-03-19
SPARC host fixes, by Ben Taylor.
ths
1
-10
/
+0
2007-02-28
MIPS FPU dynamic activation, part 1, by Herve Poussineau.
ths
1
-2
/
+0
2007-02-02
Sparc arm/mips/sparc register patch, by Martin Bochnig.
ths
1
-0
/
+10
2007-01-24
Reworking MIPS interrupt handling, by Aurelien Jarno.
ths
1
-0
/
+1
2007-01-03
moved invalidate_tlb() to helper.c as a work around for gcc 3.2.2 bug - suppr...
bellard
1
-0
/
+1
2006-12-23
Use memory barriers in FORCE_RET / RETURN.
ths
1
-2
/
+2
2006-12-21
Preliminiary MIPS64 support, disabled by default due to performance impact.
ths
1
-1
/
+47
2006-12-06
Add MIPS32R2 instructions, and generally straighten out the instruction
ths
1
-0
/
+1
2006-12-06
Dynamically translate MIPS mtc0 instructions.
ths
1
-1
/
+2
2006-12-06
Dynamically translate MIPS mfc0 instructions.
ths
1
-1
/
+2
2006-12-06
MIPS TLB performance improvements, by Daniel Jacobowitz.
ths
1
-0
/
+1
2006-06-14
MIPS FPU support (Marius Goeger)
bellard
1
-6
/
+20
2006-03-11
Add missing function prototype.
pbrook
1
-0
/
+2
2005-12-17
disable debug mode
bellard
1
-1
/
+1
2005-12-05
MIPS fixes (Daniel Jacobowitz)
bellard
1
-12
/
+13
2005-10-30
moved common softmmu code to common header (Paul Brook)
bellard
1
-65
/
+1
2005-07-07
compilation fix
bellard
1
-5
/
+0
2005-07-04
correct split between helper.c and op_helper.c - cosmetics
bellard
1
-12
/
+0
2005-07-02
MIPS target (Jocelyn Mayer)
bellard
1
-0
/
+183
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