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| author | ths <ths@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-01-24 01:47:51 +0000 |
|---|---|---|
| committer | ths <ths@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-01-24 01:47:51 +0000 |
| commit | 4de9b249d37c1b382cc3e5a21fad1b4a11cec2fa (patch) | |
| tree | 3991d58b09108b5c18a4388b2c2a8b6cb8f57142 /target-mips/exec.h | |
| parent | 30c4bbace19e802979009cc5c16fb4e14dc6bda6 (diff) | |
Reworking MIPS interrupt handling, by Aurelien Jarno.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2350 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-mips/exec.h')
| -rw-r--r-- | target-mips/exec.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/target-mips/exec.h b/target-mips/exec.h index 3d6bb7d60..15397b692 100644 --- a/target-mips/exec.h +++ b/target-mips/exec.h @@ -164,6 +164,7 @@ uint32_t cpu_mips_get_random (CPUState *env); uint32_t cpu_mips_get_count (CPUState *env); void cpu_mips_store_count (CPUState *env, uint32_t value); void cpu_mips_store_compare (CPUState *env, uint32_t value); +void cpu_mips_update_irq(CPUState *env); void cpu_mips_clock_init (CPUState *env); void cpu_mips_tlb_flush (CPUState *env, int flush_global); |