Add MIPS32R2 instructions, and generally straighten out the instruction

decoding. This is also the first percent towards MIPS64 support.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2224 c046a42c-6fe2-441c-8c8c-71466251a162

1 files changed, 1 insertions, 0 deletions

diff --git a/target-mips/exec.h b/target-mips/exec.h
index e39f70f87..817ef0346 100644
--- a/target-mips/exec.h
+++ b/target-mips/exec.h
@@ -68,6 +68,7 @@ void do_msubu (void);
 #endif
 void do_mfc0_random(void);
 void do_mfc0_count(void);
+void do_mtc0_entryhi(uint32_t in);
 void do_mtc0_status_debug(uint32_t old, uint32_t val);
 void do_mtc0_status_irqraise_debug(void);
 void do_tlbwi (void);