index
:
osmocom-bb
fixeria/burst_ind
fixeria/burst_ind_gprs
fixeria/csd
fixeria/csd_demo
fixeria/gprs
fixeria/grgsm_hack
fixeria/l1ctl_nego
fixeria/l1ctl_sap
fixeria/l1gprs
fixeria/l1gprs_hack
fixeria/mncc
fixeria/multi-imsi
fixeria/research
fixeria/trx
jolly/asci
jolly/emi
jolly/handover
jolly/menu
jolly/testing
jolly/ui
jolly/useruser
laforge/baudrate
laforge/burst_ind
laforge/burst_ind_rebase
laforge/csd_decode
laforge/early-cm
laforge/jolly_handover_rebased
laforge/lib-update
laforge/mobile_event
laforge/neigh_sb
laforge/ournode-vty
laforge/remove-libosmocore
laforge/virt-voice
laforge/virtphy-gprs
luca/catcher
luca/gsmmap
luca/libosmosim
master
mawais/ho
neels/voice
nion/sap
osmith/virt-voice
osmith/wip
pespin/dtr-rst
pespin/master
pespin/no-exit
pespin/packet-access-procedure
pespin/test-attach
pespin/test-tun
prom/dietlibc
prom/simaccess
steve-m/burst_mcsi
steve-m/mtk_hack
steve-m/trx_rebased
sylvain/burst_ind
sylvain/ms-sdr
sylvain/testing
zecke/rxqual-full
zecke/work-with-nitb
OsmocomBB MS-side GSM Protocol stack (L1, L2, L3) including firmware
Harald Welte
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osmocom
Age
Commit message (
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Author
Files
Lines
2023-07-12
trxcon/l1sched: fix handling of UL FACCH on TCH/A[FH]S
Vadim Yanitskiy
1
-0
/
+1
2023-06-11
trxcon: get rid of the timer driven clock module
Vadim Yanitskiy
4
-21
/
+3
2023-05-08
trxcon/l1sched: allocate primitives of fixed size (64 + 64)
Vadim Yanitskiy
1
-2
/
+1
2023-04-21
trxcon/l1sched: rework the primitive API
Vadim Yanitskiy
3
-106
/
+139
2023-04-14
trxcon/l1sched: add l1sched_find_lchan_by_chan_nr()
Vadim Yanitskiy
1
-0
/
+2
2023-04-14
trxcon/l1sched: cosmetic: rename l1sched_find_lchan()
Vadim Yanitskiy
1
-2
/
+2
2023-04-14
trxcon/l1sched: rename l1sched[_lchan]_prim_drop()
Vadim Yanitskiy
1
-1
/
+1
2023-04-14
trxcon: l1sched: fix copy-paste in LOGP_SCHEDD macro
Vadim Yanitskiy
1
-1
/
+1
2023-03-25
trxcon: l1sched_prim_dequeue(): check TDMA Fn in PDCH prims
Vadim Yanitskiy
1
-0
/
+2
2023-03-17
{trxcon,virt_phy}: shared GPRS L1 (MAC) implementation
Vadim Yanitskiy
5
-0
/
+11
2023-03-08
trxcon: move l1ctl_proto.h to 'include/osmocom/bb/'
Vadim Yanitskiy
4
-2
/
+5
2023-03-08
trxcon: use 3GPP TS 45.002 definitions from libosmogsm
Vadim Yanitskiy
1
-8
/
+2
2023-02-14
trxcon: move AMR mode setting to l1sched_lchan_set_amr_cfg()
Vadim Yanitskiy
1
-0
/
+2
2022-12-20
trxcon: allow extending FBSB timeout (quirks for slow PHYs)
Vadim Yanitskiy
1
-0
/
+6
2022-12-20
trxcon: move FBSB timeout calculation to the trxcon_fsm
Vadim Yanitskiy
1
-1
/
+1
2022-12-13
trxcon: fix distcheck: add missing trxcon_fsm.h to noinst_HEADERS
Vadim Yanitskiy
1
-0
/
+1
2022-12-11
trxcon: fix l1ctl_tx_dt_conf(): accept const *cnf
Vadim Yanitskiy
1
-1
/
+1
2022-12-03
trxcon: trxcon_fsm: shorten DCH related event names
Vadim Yanitskiy
1
-4
/
+4
2022-11-29
trxcon: implement Ready-to-Receive PHYIF API
Vadim Yanitskiy
2
-0
/
+28
2022-11-29
trxcon: implement Ready-to-Send PHYIF API
Vadim Yanitskiy
1
-1
/
+8
2022-11-23
trxcon: make burst pointer in trxcon_phyif_burst_ind const
Vadim Yanitskiy
1
-1
/
+1
2022-11-23
trxcon: group Rx burst params into struct l1sched_burst_ind
Vadim Yanitskiy
1
-6
/
+22
2022-11-22
trxcon: rework l1sched_trigger(), split l1sched_pull_burst()
Vadim Yanitskiy
1
-1
/
+3
2022-11-20
trxcon: separate l1sched_clck_handle() from BURST.ind handling
Vadim Yanitskiy
1
-1
/
+3
2022-11-18
trxcon: use 'trxcon_phyif_' prefix for the PHYIF API
Vadim Yanitskiy
2
-40
/
+40
2022-11-18
trxcon: move l1sched/phyif shim API to libtrxcon.la
Vadim Yanitskiy
2
-2
/
+5
2022-11-18
trxcon: reorganize the core logic into libtrxcon.la
Vadim Yanitskiy
1
-0
/
+10
2022-11-12
trxcon: abstract L1CTL codec from the l1ctl_server API
Vadim Yanitskiy
2
-15
/
+18
2022-11-12
trxcon: move trxcon_inst_{alloc,free}() to a separate file
Vadim Yanitskiy
1
-1
/
+1
2022-11-12
trxcon: move l1sched_logging_init() from l1sched.h to logging.h
Vadim Yanitskiy
2
-1
/
+2
2022-11-11
trxcon: cosmetic: s/trx_log_init()/trxcon_logging_init()/
Vadim Yanitskiy
1
-1
/
+1
2022-11-11
trxcon: maintain full power scan state in the trxcon_fsm
Vadim Yanitskiy
4
-8
/
+4
2022-11-08
trxcon: move the trxcon_fsm related stuff into its own header
Vadim Yanitskiy
2
-162
/
+166
2022-11-08
trxcon: add missing imports to trxcon.h
Vadim Yanitskiy
1
-0
/
+5
2022-11-07
trxcon: abstract out trx_if.c from struct trxcon_inst
Vadim Yanitskiy
1
-8
/
+15
2022-11-07
trxcon: deliver measurement results via the PHYIF primitives
Vadim Yanitskiy
1
-1
/
+16
2022-11-07
trxcon: l1ctl.h: remove unneeded import of l1ctl_proto.h
Vadim Yanitskiy
1
-1
/
+0
2022-11-07
trxcon: handle RACH.cnf via TRXCON_EV_TX_ACCESS_BURST_CNF
Vadim Yanitskiy
2
-1
/
+8
2022-11-07
trxcon: handle DATA.cnf/TRAFFIC.cnf via TRXCON_EV_TX_DATA_CNF
Vadim Yanitskiy
2
-1
/
+11
2022-11-07
trxcon: merge TRXCON_EV_TX_TRAFFIC_* with TRXCON_EV_TX_DATA_*
Vadim Yanitskiy
2
-8
/
+8
2022-11-07
trxcon: compose struct l1ctl_info_dl in l1ctl_tx_dt_ind()
Vadim Yanitskiy
2
-4
/
+3
2022-11-02
trxcon: drop sched->clock_cb(), expose l1sched_trigger()
Vadim Yanitskiy
1
-2
/
+2
2022-10-31
trxcon: implement an abstract PHYIF API
Vadim Yanitskiy
3
-22
/
+87
2022-10-31
trxcon: use lookup tables for checking AMR CMI/CMR on Uplink
Vadim Yanitskiy
2
-63
/
+0
2022-10-24
trxcon: add new trxcon_fsm state - TRXCON_ST_PACKET_DATA
Vadim Yanitskiy
1
-0
/
+1
2022-09-07
trxcon: Initial support for forwarding AMR
Pau Espin Pedrol
5
-1
/
+71
2022-09-03
trxcon: handle l1sched_config_req via TRXCON_EV_SET_PHY_CONFIG_REQ
Vadim Yanitskiy
1
-2
/
+14
2022-08-09
trxcon: allow populating global SACCH cache via L1CTL
Vadim Yanitskiy
2
-0
/
+3
2022-08-08
trxcon: cosmetic: rename TRXCON_EV_{L1IF->PHYIF}_FAILURE
Vadim Yanitskiy
1
-1
/
+1
2022-08-08
trxcon: cosmetic: rename TRXCON_EV_SET_{PHY_}CONFIG_REQ
Vadim Yanitskiy
1
-3
/
+3
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