diff options
-rw-r--r-- | src/target/firmware/include/layer1/mframe_sched.h | 19 | ||||
-rw-r--r-- | src/target/firmware/include/layer1/sync.h | 7 | ||||
-rw-r--r-- | src/target/firmware/layer1/async.c | 15 | ||||
-rw-r--r-- | src/target/firmware/layer1/l23_api.c | 2 | ||||
-rw-r--r-- | src/target/firmware/layer1/mframe_sched.c | 29 | ||||
-rw-r--r-- | src/target/firmware/layer1/prim_fbsb.c | 4 | ||||
-rw-r--r-- | src/target/firmware/layer1/sync.c | 4 |
7 files changed, 65 insertions, 15 deletions
diff --git a/src/target/firmware/include/layer1/mframe_sched.h b/src/target/firmware/include/layer1/mframe_sched.h index 87f31a9e..5c892816 100644 --- a/src/target/firmware/include/layer1/mframe_sched.h +++ b/src/target/firmware/include/layer1/mframe_sched.h @@ -31,9 +31,26 @@ enum mf_sched_item_flag { MF_F_SACCH = (1 << 0), }; +/* The scheduler itself */ +struct mframe_scheduler { + uint32_t tasks; +}; + uint8_t mframe_task2chan_nr(enum mframe_task mft, uint8_t ts); +/* Enable a specific task */ +void mframe_enable(enum mframe_task task_id); + +/* Disable a specific task */ +void mframe_disable(enum mframe_task task_id); + +/* Replace the current active set by the new one */ +void mframe_set(uint32_t tasks); + /* Schedule mframe_sched_items according to current MF TASK list */ -void mframe_schedule(uint32_t task_bitmask); +void mframe_schedule(void); + +/* reset the scheduler, disabling all tasks */ +void mframe_reset(void); #endif /* _MFRAME_SCHED_H */ diff --git a/src/target/firmware/include/layer1/sync.h b/src/target/firmware/include/layer1/sync.h index 9e194849..d053c93f 100644 --- a/src/target/firmware/include/layer1/sync.h +++ b/src/target/firmware/include/layer1/sync.h @@ -4,6 +4,7 @@ #include <osmocore/linuxlist.h> #include <osmocore/gsm_utils.h> #include <layer1/tdma_sched.h> +#include <layer1/mframe_sched.h> #include <l1a_l23_interface.h> /* structure representing L1 sync information about a cell */ @@ -42,15 +43,15 @@ struct l1s_state { /* TDMA scheduler */ struct tdma_scheduler tdma_sched; + /* Multiframe scheduler */ + struct mframe_scheduler mframe_sched; + /* The current TPU offset register */ uint32_t tpu_offset; /* Transmit queues of pending packets for main DCCH and ACCH */ struct llist_head tx_queue[_NUM_L1S_CHAN]; - /* bit-mask of multi-frame tasks that are currently active */ - uint32_t mf_tasks; - /* Structures below are for L1-task specific parameters, used * to communicate between l1-sync and l1-async (l23_api) */ struct { diff --git a/src/target/firmware/layer1/async.c b/src/target/firmware/layer1/async.c index 913e1837..3db07e11 100644 --- a/src/target/firmware/layer1/async.c +++ b/src/target/firmware/layer1/async.c @@ -46,15 +46,22 @@ void l1a_txq_msgb_enq(struct llist_head *queue, struct msgb *msg) /* Enable a repeating multiframe task */ void l1a_mftask_enable(enum mframe_task task) { - /* we don't need locking here as L1S only reads mf_tasks */ - l1s.mf_tasks |= (1 << task); + /* we don't need locking here as L1S only reads mframe.tasks */ + mframe_enable(task); } /* Disable a repeating multiframe task */ void l1a_mftask_disable(enum mframe_task task) { - /* we don't need locking here as L1S only reads mf_tasks */ - l1s.mf_tasks &= ~(1 << task); + /* we don't need locking here as L1S only reads mframe.tasks */ + mframe_disable(task); +} + +/* Set the mask for repeating multiframe tasks */ +void l1a_mftask_set(uint32_t tasks) +{ + /* we don't need locking here as L1S only reads mframe.tasks */ + mframe_set(tasks); } /* Initialize asynchronous part of Layer1 */ diff --git a/src/target/firmware/layer1/l23_api.c b/src/target/firmware/layer1/l23_api.c index e54d72bd..fec6183e 100644 --- a/src/target/firmware/layer1/l23_api.c +++ b/src/target/firmware/layer1/l23_api.c @@ -204,7 +204,7 @@ static void l1a_l23_rx_cb(uint8_t dlci, struct msgb *msg) } /* FIXME: set TSC of ded chan according to est_req.h0.tsc */ /* figure out which MF tasks to enable */ - l1s.mf_tasks = (1 << chan_nr2mf_task(ul->chan_nr)); + l1a_mftask_set(1 << chan_nr2mf_task(ul->chan_nr)); break; case L1CTL_RACH_REQ: rach_req = (struct l1ctl_rach_req *) ul->payload; diff --git a/src/target/firmware/layer1/mframe_sched.c b/src/target/firmware/layer1/mframe_sched.c index 92e95ed1..c63637a9 100644 --- a/src/target/firmware/layer1/mframe_sched.c +++ b/src/target/firmware/layer1/mframe_sched.c @@ -308,13 +308,38 @@ static void mframe_schedule_set(enum mframe_task task_id) } } +/* Enable a specific task */ +void mframe_enable(enum mframe_task task_id) +{ + l1s.mframe_sched.tasks |= (1 << task_id); +} + +/* Disable a specific task */ +void mframe_disable(enum mframe_task task_id) +{ + l1s.mframe_sched.tasks &= ~(1 << task_id); +} + +/* Replace the current active set by the new one */ +void mframe_set(uint32_t tasks) +{ + l1s.mframe_sched.tasks = tasks; +} + /* Schedule mframe_sched_items according to current MF TASK list */ -void mframe_schedule(uint32_t tasks_enabled) +void mframe_schedule(void) { unsigned int i; for (i = 0; i < 32; i++) { - if (tasks_enabled & (1 << i)) + if (l1s.mframe_sched.tasks & (1 << i)) mframe_schedule_set(i); } } + +/* reset the scheduler, disabling all tasks */ +void mframe_reset(void) +{ + l1s.mframe_sched.tasks = 0; +} + diff --git a/src/target/firmware/layer1/prim_fbsb.c b/src/target/firmware/layer1/prim_fbsb.c index 98a88486..3cd14c4d 100644 --- a/src/target/firmware/layer1/prim_fbsb.c +++ b/src/target/firmware/layer1/prim_fbsb.c @@ -416,8 +416,8 @@ static int l1s_sbdet_resp(__unused uint8_t p1, uint8_t attempt, if (l1s.sb.count > 10 && sb_time.t3 == 41) { l1s_reset_hw(); /* enable the MF Task for BCCH reading */ - l1s.mf_tasks |= (1 << MF_TASK_BCCH_NORM); - l1s.mf_tasks |= (1 << MF_TASK_CCCH_COMB); + mframe_enable(MF_TASK_BCCH_NORM); + mframe_enable(MF_TASK_CCCH_COMB); } else { /* We have just seen a SCH burst, we know the next one * is not in less than 7 TDMA frames from now */ diff --git a/src/target/firmware/layer1/sync.c b/src/target/firmware/layer1/sync.c index bf027a82..f5629cfc 100644 --- a/src/target/firmware/layer1/sync.c +++ b/src/target/firmware/layer1/sync.c @@ -257,7 +257,7 @@ static void l1_sync(void) //dsp_end_scenario(); /* schedule new / upcoming TDMA items */ - mframe_schedule(l1s.mf_tasks); + mframe_schedule(); /* schedule new / upcoming one-shot events */ sched_gsmtime_execute(l1s.current_time.fn); @@ -335,7 +335,7 @@ void l1s_reset(void) l1s.sb.count = 0; /* reset scheduler and hardware */ - l1s.mf_tasks = 0; + mframe_reset(); tdma_sched_reset(); l1s_dsp_abort(); } |