diff options
author | Harald Welte <laforge@gnumonks.org> | 2010-02-23 01:16:50 +0100 |
---|---|---|
committer | Harald Welte <laforge@gnumonks.org> | 2010-02-23 01:43:52 +0100 |
commit | 2dff711bc777bbf14e3d562d7ad0a6486190eb19 (patch) | |
tree | 2c81295a63918e4c0861fdcd4e1a562251724f0f /src/target/firmware/abb | |
parent | 7b2f013566809e8b1f8b12f47a26e20b480e5ee0 (diff) |
TWL3025: Ensure we don't perform downlink calibration too early
If we perform the downlink calibration too early, the TRF6151 might
not yet provide a stable signal and we'll not be able to receive
anything.
From the desired "BDLENA" time, we subtract all the delays and
latencies to determine the point in time at which the calibration
process should start.
Diffstat (limited to 'src/target/firmware/abb')
-rw-r--r-- | src/target/firmware/abb/twl3025.c | 11 |
1 files changed, 10 insertions, 1 deletions
diff --git a/src/target/firmware/abb/twl3025.c b/src/target/firmware/abb/twl3025.c index bce6cc6d..2e88a3fd 100644 --- a/src/target/firmware/abb/twl3025.c +++ b/src/target/firmware/abb/twl3025.c @@ -189,6 +189,9 @@ void twl3025_clk13m(int enable) #define BDLON_TO_BDLENA 7 #define BULON_TO_BULENA 16 +/* bdl_ena - TSP_DELAY - BDLCAL_DURATION - TSP_DELAY - BDLON_TO_BDLCAL - TSP_DELAY */ +#define DOWNLINK_DELAY (3 * TSP_DELAY + BDLCAL_DURATION + BDLON_TO_BDLCAL) + /* Enqueue a series of TSP commands in the TPU to (de)activate the downlink path */ void twl3025_downlink(int on, int16_t at) { @@ -197,11 +200,17 @@ void twl3025_downlink(int on, int16_t at) if (on) { if (bdl_ena < 0) printf("BDLENA time negative (%d)\n", bdl_ena); - /* FIXME: calibration should be done just before BDLENA */ + /* calibration should be done just before BDLENA */ + tpu_enq_at(bdl_ena - DOWNLINK_DELAY); + /* bdl_ena - TSP_DELAY - BDLCAL_DURATION - TSP_DELAY - BDLON_TO_BDLCAL - TSP_DELAY */ twl3025_tsp_write(BDLON); + /* bdl_ena - TSP_DELAY - BDLCAL_DURATION - TSP_DELAY - BDLON_TO_BDLCAL */ tpu_enq_wait(BDLON_TO_BDLCAL - TSP_DELAY); + /* bdl_ena - TSP_DELAY - BDLCAL_DURATION - TSP_DELAY */ twl3025_tsp_write(BDLON | BDLCAL); + /* bdl_ena - TSP_DELAY - BDLCAL_DURATION */ tpu_enq_wait(BDLCAL_DURATION - TSP_DELAY); + /* bdl_ena - TSP_DELAY */ twl3025_tsp_write(BDLON); //tpu_enq_wait(BDLCAL_TO_BDLENA) this is only 3.7us == 4 qbits, i.e. less than the TSP_DELAY tpu_enq_at(bdl_ena); |