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path: root/clock-generator/clock-generator.brd
AgeCommit message (Expand)AuthorFilesLines
2020-03-01clock-generator: Fix VDD connection of TC2050 SWD connectorHarald Welte1-3/+6
2020-02-07clock-gen: increase I2C PU's to 4k7Martin Schramm1-12/+12
2020-01-31clock-gen: update ATSAMD21's BOM attributes (solves OS#4387)Martin Schramm1-8/+8
2020-01-30clock-generator: exchange mini-USB foorprint (solves OS#4386)Martin Schramm1-49/+19
2020-01-28clock-generator: exchange silk screen position of R14 vs. C19Martin Schramm1-2/+2
2019-06-19clock-generator: Move GND via to avoid overlap with N$15Harald Welte1-6/+6
2019-06-19<osmo-clock-gen: add more TVS for exposed signals, clean up and finishMartin Schramm1-319/+566
2019-06-19osmo-clock-gen: capacitive coupling for XA input needed - added 100nMartin Schramm1-13/+27
2019-06-19clock-generator: compacting + place MTA100 header (solves OSM#4050)Martin Schramm1-487/+444
2019-06-19clock-generator: changes adressing OSM#4050Martin Schramm1-1655/+1887
2019-06-19clock-generator: insert changes discussed so far for v2Martin Schramm1-1552/+2217
2019-06-19clock-generator: add tracking LDO, make PCB four layerMartin Schramm1-399/+529
2019-06-19WIP: click-generator: Replace U3 (so far SAMD11) with SAMD21Harald Welte1-152/+88
2019-01-28clock-gen: Add BOM information + PDF exports of schematicsHarald Welte1-73/+903
2019-01-27clock-gen: Minor changes; final version as orderedHarald Welte1-39/+51
2019-01-27clock-gen: Cosmetic changesHarald Welte1-152/+225
2019-01-27clock-gen: finish routing of PCB layoutHarald Welte1-265/+825
2019-01-26clock-gen: Connect EEPROM WP to GND to disable write-protectHarald Welte1-0/+2
2019-01-26clock-gen: Add SPI; UEXT header; mounting holes; do layout/routingHarald Welte1-139/+370
2019-01-23clock-generator: Most of the layoutHarald Welte1-516/+861
2019-01-23clock-generator: More schematics work; initial placement/groupingHarald Welte1-0/+1857