index
:
osmo-ccid-firmware
hoernchen/atr_parity_old
hoernchen/ccidsplit
hoernchen/fsm3
hoernchen/kevin
hoernchen/stringdesc
hoernchen/sync_debugx
hoernchen/wip
hoernchen/wip_atr
hoernchen/wip_bufpool
laforge/dfurt
laforge/str-desc-wip
laforge/tx_complete_delay
master
USB CCID firmware project for (currently only) sysmoOCTSIM
Harald Welte
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path:
root
/
sysmoOCTSIM
/
atmel_start_config.atstart
Age
Commit message (
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)
Author
Files
Lines
2019-02-27
minor: rename MUX_SSTAT to MUX_STAT
Kévin Redon
1
-2
/
+2
2019-02-27
Switch SERCOM7 (Debug UART) to sync mode + add STDIO
Harald Welte
1
-2
/
+10
2019-02-24
Update from AtmelStart: Define all used GPIO pins
Harald Welte
1
-0
/
+102
2019-02-24
update from Atmel Start (just loading + re-exporting the project)
Harald Welte
1
-4
/
+40
2019-02-07
add ISO7816 peripherals
Kévin Redon
1
-0
/
+343
2019-02-07
name pin according to schematic
Kévin Redon
1
-2
/
+42
2019-02-07
add 20 MHz clock output
Kévin Redon
1
-5
/
+5
2019-02-07
switch from dev board to prototype
Kévin Redon
1
-67
/
+52
2019-02-07
add system LED definition
Kévin Redon
1
-0
/
+7
2019-02-07
add SERCOM HAL Async library
Kévin Redon
1
-2
/
+2
2019-02-07
add SERCOM peripheral for UART debug
Kévin Redon
1
-0
/
+57
2019-02-07
set DPLL1 to 100 MHz
Kévin Redon
1
-11
/
+11
2019-02-07
switch CPU clock to 120 MHz
Kévin Redon
1
-12
/
+12
2019-02-07
use external 32.768 kHz oscillator for RTC
Kévin Redon
1
-2
/
+2
2019-02-07
change USB description to sysmoOCTSIM
Kévin Redon
1
-7
/
+7
2019-02-07
rename project to sysmoOCTSIM
Kévin Redon
1
-1
/
+1
2019-02-07
start with USB CDC echo example
Kévin Redon
1
-0
/
+1014