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-rw-r--r--src/tuner_r82xx.c86
1 files changed, 13 insertions, 73 deletions
diff --git a/src/tuner_r82xx.c b/src/tuner_r82xx.c
index f620238..fe52bd9 100644
--- a/src/tuner_r82xx.c
+++ b/src/tuner_r82xx.c
@@ -770,78 +770,18 @@ static int r82xx_set_tv_standard(struct r82xx_priv *priv,
uint8_t lt_att, flt_ext_widest, polyfil_cur;
int need_calibration;
- if (delsys == SYS_ISDBT) {
- if_khz = 4063;
- filt_cal_lo = 59000;
- filt_gain = 0x10; /* +3db, 6mhz on */
- img_r = 0x00; /* image negative */
- filt_q = 0x10; /* r10[4]:low q(1'b1) */
- hp_cor = 0x6a; /* 1.7m disable, +2cap, 1.25mhz */
- ext_enable = 0x40; /* r30[6], ext enable; r30[5]:0 ext at lna max */
- loop_through = 0x00; /* r5[7], lt on */
- lt_att = 0x00; /* r31[7], lt att enable */
- flt_ext_widest = 0x00; /* r15[7]: flt_ext_wide off */
- polyfil_cur = 0x60; /* r25[6:5]:min */
- } else {
- if (bw <= 6) {
- if_khz = 3570;
- filt_cal_lo = 56000; /* 52000->56000 */
- filt_gain = 0x10; /* +3db, 6mhz on */
- img_r = 0x00; /* image negative */
- filt_q = 0x10; /* r10[4]:low q(1'b1) */
- hp_cor = 0x6b; /* 1.7m disable, +2cap, 1.0mhz */
- ext_enable = 0x60; /* r30[6]=1 ext enable; r30[5]:1 ext at lna max-1 */
- loop_through = 0x00; /* r5[7], lt on */
- lt_att = 0x00; /* r31[7], lt att enable */
- flt_ext_widest = 0x00; /* r15[7]: flt_ext_wide off */
- polyfil_cur = 0x60; /* r25[6:5]:min */
- } else if (bw == 7) {
-#if 0
- /*
- * There are two 7 MHz tables defined on the original
- * driver, but just the second one seems to be visible
- * by rtl2832. Keep this one here commented, as it
- * might be needed in the future
- */
-
- if_khz = 4070;
- filt_cal_lo = 60000;
- filt_gain = 0x10; /* +3db, 6mhz on */
- img_r = 0x00; /* image negative */
- filt_q = 0x10; /* r10[4]:low q(1'b1) */
- hp_cor = 0x2b; /* 1.7m disable, +1cap, 1.0mhz */
- ext_enable = 0x60; /* r30[6]=1 ext enable; r30[5]:1 ext at lna max-1 */
- loop_through = 0x00; /* r5[7], lt on */
- lt_att = 0x00; /* r31[7], lt att enable */
- flt_ext_widest = 0x00; /* r15[7]: flt_ext_wide off */
- polyfil_cur = 0x60; /* r25[6:5]:min */
-#endif
- /* 7 MHz, second table */
- if_khz = 4570;
- filt_cal_lo = 63000;
- filt_gain = 0x10; /* +3db, 6mhz on */
- img_r = 0x00; /* image negative */
- filt_q = 0x10; /* r10[4]:low q(1'b1) */
- hp_cor = 0x2a; /* 1.7m disable, +1cap, 1.25mhz */
- ext_enable = 0x60; /* r30[6]=1 ext enable; r30[5]:1 ext at lna max-1 */
- loop_through = 0x00; /* r5[7], lt on */
- lt_att = 0x00; /* r31[7], lt att enable */
- flt_ext_widest = 0x00; /* r15[7]: flt_ext_wide off */
- polyfil_cur = 0x60; /* r25[6:5]:min */
- } else {
- if_khz = 4570;
- filt_cal_lo = 68500;
- filt_gain = 0x10; /* +3db, 6mhz on */
- img_r = 0x00; /* image negative */
- filt_q = 0x10; /* r10[4]:low q(1'b1) */
- hp_cor = 0x0b; /* 1.7m disable, +0cap, 1.0mhz */
- ext_enable = 0x60; /* r30[6]=1 ext enable; r30[5]:1 ext at lna max-1 */
- loop_through = 0x00; /* r5[7], lt on */
- lt_att = 0x00; /* r31[7], lt att enable */
- flt_ext_widest = 0x00; /* r15[7]: flt_ext_wide off */
- polyfil_cur = 0x60; /* r25[6:5]:min */
- }
- }
+ /* BW < 6 MHz */
+ if_khz = 3570;
+ filt_cal_lo = 56000; /* 52000->56000 */
+ filt_gain = 0x10; /* +3db, 6mhz on */
+ img_r = 0x00; /* image negative */
+ filt_q = 0x10; /* r10[4]:low q(1'b1) */
+ hp_cor = 0x6b; /* 1.7m disable, +2cap, 1.0mhz */
+ ext_enable = 0x60; /* r30[6]=1 ext enable; r30[5]:1 ext at lna max-1 */
+ loop_through = 0x01; /* r5[7], lt off */
+ lt_att = 0x00; /* r31[7], lt att enable */
+ flt_ext_widest = 0x00; /* r15[7]: flt_ext_wide off */
+ polyfil_cur = 0x60; /* r25[6:5]:min */
/* Initialize the shadow registers */
memcpy(priv->regs, r82xx_init_array, sizeof(r82xx_init_array));
@@ -1196,7 +1136,7 @@ int r82xx_standby(struct r82xx_priv *priv)
rc = r82xx_write_reg(priv, 0x06, 0xb1);
if (rc < 0)
return rc;
- rc = r82xx_write_reg(priv, 0x05, 0x03);
+ rc = r82xx_write_reg(priv, 0x05, 0xa0);
if (rc < 0)
return rc;
rc = r82xx_write_reg(priv, 0x07, 0x3a);