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path: root/target-ppc/translate_init.c
AgeCommit message (Expand)AuthorFilesLines
2009-08-16Replace local ADDRX/PADDRX macros with TARGET_FMT_lx/plxBlue Swirl1-2/+2
2009-07-27rename WORDS_BIGENDIAN to HOST_WORDS_BIGENDIANJuan Quintela1-2/+2
2009-07-16Update to a hopefully more future proof FSF addressBlue Swirl1-2/+1
2009-07-13target-ppc: enable PPC_MFTB for 44xBaojun Wang1-6/+6
2009-06-23target-ppc: permit linux-user to read PVRNathan Froyd1-1/+7
2009-06-17Replace ELF section hack with normal tableBlue Swirl1-9/+2
2009-05-16target-ppc: expose cpu capability flagsNathan Froyd1-0/+1
2009-04-28Fix powerpc 604 reset vectorTristan Gingold1-2/+2
2009-04-28Fix PPC resetBlue Swirl1-20/+23
2009-03-10target-ppc: fix commit r6789aurel321-2/+2
2009-03-09target-ppc: free a tcg temp variableaurel321-0/+1
2009-03-09target-ppc: add support for reading/writing spefscraurel321-8/+23
2009-03-07Fix off-by-one errors for Altivec and SPE registersaurel321-8/+8
2009-03-07Keep SLB in-CPUblueswir11-1/+1
2009-03-07Nop some SPRs on 970fxblueswir11-0/+12
2009-03-03target-ppc: improve mfcr/mtcrfaurel321-1/+0
2009-03-02kvm/powerpc: Add irq support for E500 coreaurel321-2/+3
2009-02-28Implement HIORblueswir11-8/+21
2009-02-09target-ppc: Model e500v{1,2} CPUs more accuratelyaurel321-102/+125
2009-02-09target-ppc: Model SPE floating-point instructions more accuratelyaurel321-9/+9
2009-02-05targets: remove error handling from qemu_malloc() callers (Avi Kivity)aliguori1-2/+0
2009-02-03Add calls to initialize VSCR on appropriate machinesaurel321-0/+22
2009-01-24target-ppc: Add SPE register read/write using XMLaurel321-0/+50
2009-01-24target-ppc: Add Altivec register read/write using XMLaurel321-0/+50
2009-01-24target-ppc: Add float register read/write using XMLaurel321-0/+32
2009-01-24target-ppc: Include gdbstub.haurel321-0/+1
2009-01-04Update FSF address in GPL/LGPL boilerplateaurel321-1/+1
2008-12-22Use the ARRAY_SIZE() macro where appropriate.malc1-3/+3
2008-12-11target-ppc: rework exception codeaurel321-3/+3
2008-12-07target-ppc: convert SPR accesses to TCGaurel321-132/+177
2008-11-16Attached patch fixes a series of this warningblueswir11-1/+1
2008-10-21target-ppc: Convert XER accesses to TCGaurel321-2/+2
2008-09-20Suppress gcc 4.x -Wpointer-sign (included in -Wall) warningsblueswir11-9/+9
2008-09-14ppc: Convert ctr, lr moves to TCGaurel321-4/+4
2008-08-30Fix some warnings that would be generated by gcc -Wredundant-declsblueswir11-2/+0
2007-12-10Fix PowerPC 74xx definitions.j_mayer1-47/+225
2007-11-21Fix PowerPC 7xx definitions.j_mayer1-132/+612
2007-11-19Remove shared macro used to define PowerPC implementations instructions sets:j_mayer1-172/+480
2007-11-19PowerPC 620 MMU do not have the same exact behavior as standardj_mayer1-3/+6
2007-11-19New PowerPC CPU flag to define the decrementer and time-base source clock.j_mayer1-39/+67
2007-11-17Improve PowerPC instructions set dump.j_mayer1-6/+44
2007-11-17Add definitions for Freescale PowerPC implementations,j_mayer1-1259/+2850
2007-11-17Define Freescale cores specific MMU model, exceptions and input bus.j_mayer1-4/+13
2007-11-17A little more granularity in PowerPC instructions definition is neededj_mayer1-21/+25
2007-11-17Make the PowerPC MMU model, exception model and input bus modelj_mayer1-4/+3
2007-11-17Always make all PowerPC exception definitions visible.j_mayer1-2/+0
2007-11-14Reorganize PowerPC instructions categories, add icbi separate case.j_mayer1-4/+6
2007-11-12Add PVR and SPR definition for most embedded PowerPC from Freescale.j_mayer1-59/+309
2007-11-10Allow selection of PowerPC CPU giving a PVR.j_mayer1-371/+420
2007-11-10added cpu_model parameter to cpu_init()bellard1-21/+11
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