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2012-02-15qom: Unify type registrationAndreas Färber1-2/+2
Replace device_init() with generalized type_init(). While at it, unify naming convention: type_init([$prefix_]register_types) Also, type_init() is a function, so add preceding blank line where necessary and don't put a semicolon after the closing brace. Signed-off-by: Andreas Färber <afaerber@suse.de> Cc: Anthony Liguori <anthony@codemonkey.ws> Cc: malc <av1474@comtv.ru> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-02-03qdev: register all types natively through QEMU Object ModelAnthony Liguori1-10/+12
This was done in a mostly automated fashion. I did it in three steps and then rebased it into a single step which avoids repeatedly touching every file in the tree. The first step was a sed-based addition of the parent type to the subclass registration functions. The second step was another sed-based removal of subclass registration functions while also adding virtual functions from the base class into a class_init function as appropriate. Finally, a python script was used to convert the DeviceInfo structures and qdev_register_subclass functions to TypeInfo structures, class_init functions, and type_register_static calls. We are almost fully converted to QOM after this commit. Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-01-27sysbus: apic: ioapic: convert to QEMU Object ModelAnthony Liguori1-2/+14
This converts three devices because apic and ioapic are subclasses of sysbus. Converting subclasses independently of their base class is prohibitively hard. Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-01-27pci: convert to QEMU Object ModelAnthony Liguori1-8/+15
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2011-10-05gt64xxx.c: remove reference to non-existing ISD_handle fieldAntony Pavlov1-2/+3
The commit fc2bf44972349b078d8310466c3866615500e67f removed ISD_handle field from struct GT64120State, so remove the field from DPRINTF too. Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
2011-10-05gt64xxx.c: fix length modifier in DPRINTF format stringAntony Pavlov1-4/+4
The commit fc2bf44972349b078d8310466c3866615500e67f changed the type of val argument of the function gt64120_writel() from uint32_t to uint64_t, so we need to change the corresponding length modifier from "%x" to "%" PRIx64. Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
2011-08-24gt64xxx: fix crash in gt64120_pci_mapping()Avi Kivity1-1/+5
The map/unmap code was assymetric - unmap used the local MemoryRegion while map used isa_mmio_init(), which cannot handle dynamic mappings. Fix by using isa_mmio_setup() and the local MemoryRegion. Signed-off-by: Avi Kivity <avi@redhat.com> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2011-08-22gt64xxx.c: convert to memory APIAvi Kivity1-21/+15
Signed-off-by: Avi Kivity <avi@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2011-08-08pci: pass I/O address space to new PCI busAvi Kivity1-1/+3
This lets us register BARs in the I/O address space. Reviewed-by: Richard Henderson <rth@twiddle.net> Reviewed-by: Anthony Liguori <aliguori@us.ibm.com> Signed-off-by: Avi Kivity <avi@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2011-07-29pci: pass address space to pci bus when createdAvi Kivity1-1/+3
This is now done sloppily, via get_system_memory(). Eventually callers will be converted to stop using that. Reviewed-by: Anthony Liguori <aliguori@us.ibm.com> Signed-off-by: Avi Kivity <avi@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2011-06-12hw/gt64xxx.c: convert to PCIDeviceInfo to initialize idsIsaku Yamahata1-4/+4
use PCIDeviceInfo to initialize ids. Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2011-03-06gt64xxx: remove savevm supportJuan Quintela1-21/+0
Signed-off-by: Juan Quintela <quintela@redhat.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-20gt64xxx: set isa_mem_base during registrationAurelien Jarno1-0/+5
isa_mem_base is computed from registers during reset, but due to QEMU limitations some devices (e.g. VGA card) need to know it earlier when they are registered. Workaround this by setting the value during registration instead of reset. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-20gt64xxx: qdev conversionAurelien Jarno1-48/+67
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-12-11isa_mmio: Always use little endianAlexander Graf1-5/+1
This patch converts the ISA MMIO bridge code to always use little endian mmio. All bswap code that existed was only there to convert from native cpu endianness to little endian ISA devices. Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-12-11Add endianness as io mem parameterAlexander Graf1-1/+2
As stated before, devices can be little, big or native endian. The target endianness is not of their concern, so we need to push things down a level. This patch adds a parameter to cpu_register_io_memory that allows a device to choose its endianness. For now, all devices simply choose native endian, because that's the same behavior as before. Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-07-11pci: use PCI_DEVFN() where appropriate.Isaku Yamahata1-1/+1
Use PCI_DEVFN() and PCI_FUNC_MAX where appropriate. This patch make it clear that func = 0. test: The following object files with/without this patch are stripped and compared. They remains same. arm-softmmu/versatile_pci.o libhw32/ppce500_pci.o libhw32/unin_pci.o libhw64/ppce500_pci.o libhw64/unin_pci.o mips-softmmu/gt64xxx.o mips64-softmmu/gt64xxx.o mips64el-softmmu/gt64xxx.o mipsel-softmmu/gt64xxx.o Cc: Aurelien Jarno <aurelien@aurel32.net> Cc: Yu Liu <yu.liu@freescale.com> Cc: Paul Brook <paul@codesourcery.com> Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-07-06savevm: Add DeviceState paramAlex Williamson1-1/+2
When available, we'd like to be able to access the DeviceState when registering a savevm. For buses with a get_dev_path() function, this will allow us to create more unique savevm id strings. Signed-off-by: Alex Williamson <alex.williamson@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2010-05-28Fix hw/gt64xxx.c compilation with DEBUG definedRiccardo Magliocchetti1-1/+1
Use TARGET_FMT_plx as format placeholder for target_phys_addr_t Signed-off-by: Riccardo Magliocchetti <riccardo.magliocchetti@gmail.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-03-21Compile isa_mmio only onceBlue Swirl1-1/+5
Push TARGET_WORDS_BIGENDIAN dependency to board level. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-02-07Do not use dprintfmalc1-18/+18
dprintf is already claimed by POSIX[1], and on at least one system is implemented as a macro [1] http://www.opengroup.org/onlinepubs/9699919799/functions/dprintf.html Signed-off-by: malc <av1474@comtv.ru>
2009-12-23gt64xxx: remove gt64120_{read, write}_config().Isaku Yamahata1-12/+1
They call only pci_default_{read, write}_config(). So they aren't necessary. Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2009-11-09pci_host.h: move functions in pci_host.h into .c file.Isaku Yamahata1-10/+1
split static functions in pci_host.h into pci_host.c and pci_host_template.h. Later a structures declared in pci_host.h, PCIHostState, will be used. However pci_host.h doesn't allow to include itself easily. This patches addresses it. pci_host.h includes functions which are instantiated in .c by including pci_host.h with typedefing pci_addr_t. pci_addr_t is per pci host bridge and is typedef'ed to uint32_t for ioio or target_phys_addr_t for mmio in .c file. That prevents from including pci_host.h to use PCIHostState because of requiring type, pci_addr_t. Its purpose to include is to instantiate io function for mmio or ioio depending on which pci host bridge requires ioio or mmio. To avoid including code, we always instantiate both version. Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-10-01Revert "Get rid of _t suffix"Anthony Liguori1-11/+11
In the very least, a change like this requires discussion on the list. The naming convention is goofy and it causes a massive merge problem. Something like this _must_ be presented on the list first so people can provide input and cope with it. This reverts commit 99a0949b720a0936da2052cb9a46db04ffc6db29. Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-10-01Get rid of _t suffixmalc1-11/+11
Some not so obvious bits, slirp and Xen were left alone for the time being. Signed-off-by: malc <av1474@comtv.ru>
2009-09-04We want the argument pass to set_irq to be opaqueJuan Quintela1-1/+2
piix_pci want to pass more things that the pic Signed-off-by: Juan Quintela <quintela@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-08-25Make CPURead/WriteFunc structure 'const'Blue Swirl1-2/+2
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-06-16Remove io_index argument from cpu_register_io_memory()Avi Kivity1-1/+1
The parameter is always zero except when registering the three internal io regions (ROM, unassigned, notdirty). Remove the parameter to reduce the API's power, thus facilitating future change. Signed-off-by: Avi Kivity <avi@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-05-23Add common BusStatePaul Brook1-1/+2
Implement and use a common device bus state. The main side-effect is that creating a bus and attaching it to a parent device are no longer separate operations. For legacy code we allow a NULL parent, but that should go away eventually. Also tweak creation code to veriry theat a device in on the right bus. Signed-off-by: Paul Brook <paul@codesourcery.com>
2009-03-13Add and use remaining #defines for PCI device IDs (Stuart Brady)aliguori1-1/+1
This patch adds and uses #defines for the remaining hardcoded PCI device IDs. It also moves definitions taken from linux/pci_ids.h into a separate header (hw/pci_ids.h), removes the 'RTL' from PCI_DEVICE_ID_REALTEK_RTL8029, and renames PCI_DEVICE_ID_FSL_E500 to PCI_DEVICE_ID_MPC8533E to match Linux's definition. Changes in v2: * Don't use C99-style comments * Move definitions from linux/pci_ids.h into a separate header * Rename PCI_DEVICE_ID_FSL_E500 to PCI_DEVICE_ID_MPC8533E Signed-off-by: Stuart Brady <stuart.brady@gmail.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6841 c046a42c-6fe2-441c-8c8c-71466251a162
2009-02-01Add and use #defines for PCI device classesblueswir11-2/+1
This patch adds and uses #defines for PCI device classes and subclases, using a new pci_config_set_class() function, similar to the recently added pci_config_set_vendor_id() and pci_config_set_device_id(). Change since v1: fixed compilation of hw/sun4u.c Signed-off-by: Stuart Brady <stuart.brady@gmail.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6491 c046a42c-6fe2-441c-8c8c-71466251a162
2009-01-26Define PCI vendor and device IDs in pci.h (Stuart Brady)aliguori1-4/+2
This patch defines PCI vendor and device IDs in pci.h (matching those from Linux's pci_ids.h), and uses those definitions where appropriate. Change from v1: Introduces pci_config_set_vendor_id() / pci_config_set_device_id() accessors as suggested by Anthony Liguori. Signed-off-by: Stuart Brady <stuart.brady@gmail.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6442 c046a42c-6fe2-441c-8c8c-71466251a162
2008-10-26Fix undeclared symbol warnings from sparseblueswir11-1/+0
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5539 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-10GT64XXX: fix endianness issues:aurel321-5/+14
- Byte swapping for internal GT64XXX registers is controlled by the bit 12 of the Configuration Register and not by the PCI Internal Command register. - The bit 0 of the PCI Internal Command register controls byte swapping for PCI access *except for the internal PCI device*, that is when both bus and device numbers are 0. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4035 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-18Add statics and missing #includes for prototypes.pbrook1-1/+1
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3683 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-17Break up vl.h.pbrook1-1/+4
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3674 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-11removed warningbellard1-0/+5
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3616 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-20Check the Galilleo config register instead of hardcoding the endianness.ths1-22/+8
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3417 c046a42c-6fe2-441c-8c8c-71466251a162
2007-09-17find -type f | xargs sed -i 's/[\t ]*$//g' # Yes, again. Note the star in ↵ths1-2/+2
the regex. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3177 c046a42c-6fe2-441c-8c8c-71466251a162
2007-09-16find -type f | xargs sed -i 's/[\t ]$//g' # on most filesths1-7/+7
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3173 c046a42c-6fe2-441c-8c8c-71466251a162
2007-07-11Remove superfluous gt64xxx_pci_mapping calls.ths1-7/+3
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3064 c046a42c-6fe2-441c-8c8c-71466251a162
2007-07-11Impement Galilleo ISD register.ths1-11/+63
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3061 c046a42c-6fe2-441c-8c8c-71466251a162
2007-06-12Revert the Gallileo PCI mapping patch, it conflicts with the supposedlyths1-312/+32
"generic" PC-style implementation. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2981 c046a42c-6fe2-441c-8c8c-71466251a162
2007-06-10More PCI mapping/remapping for Gallileo.ths1-32/+312
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2972 c046a42c-6fe2-441c-8c8c-71466251a162
2007-06-07Unbreak PCI config register, noticed by Stefan Weil.ths1-1/+1
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2957 c046a42c-6fe2-441c-8c8c-71466251a162
2007-06-07Initialize more GT64xxx registers on reset.ths1-11/+113
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2956 c046a42c-6fe2-441c-8c8c-71466251a162
2007-06-07Fix some Malta PCI config bits.ths1-9/+13
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2955 c046a42c-6fe2-441c-8c8c-71466251a162
2007-06-07PCI device saving for GT64xxx.ths1-0/+21
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2954 c046a42c-6fe2-441c-8c8c-71466251a162
2007-06-07Implement some more Gallileo registers.ths1-17/+336
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2953 c046a42c-6fe2-441c-8c8c-71466251a162
2007-06-07Fix PCI irq mapping on Malta.ths1-2/+2
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2951 c046a42c-6fe2-441c-8c8c-71466251a162
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