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authorAvi Kivity <avi@redhat.com>2011-08-08 16:09:04 +0300
committerAnthony Liguori <aliguori@us.ibm.com>2011-08-08 10:15:53 -0500
commitaee97b840fd0362594c954af750491fafad66a3d (patch)
tree38d92eebc7f845fece1358ef1aeecf6f9741d138 /hw/gt64xxx.c
parent309cb471c80e5909710d1ee3c3b50d481496d189 (diff)
pci: pass I/O address space to new PCI bus
This lets us register BARs in the I/O address space. Reviewed-by: Richard Henderson <rth@twiddle.net> Reviewed-by: Anthony Liguori <aliguori@us.ibm.com> Signed-off-by: Avi Kivity <avi@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Diffstat (limited to 'hw/gt64xxx.c')
-rw-r--r--hw/gt64xxx.c4
1 files changed, 3 insertions, 1 deletions
diff --git a/hw/gt64xxx.c b/hw/gt64xxx.c
index 65e63ddab..d5415580e 100644
--- a/hw/gt64xxx.c
+++ b/hw/gt64xxx.c
@@ -1093,7 +1093,9 @@ PCIBus *gt64120_register(qemu_irq *pic)
d = FROM_SYSBUS(GT64120State, s);
d->pci.bus = pci_register_bus(&d->busdev.qdev, "pci",
gt64120_pci_set_irq, gt64120_pci_map_irq,
- pic, get_system_memory(),
+ pic,
+ get_system_memory(),
+ get_system_io(),
PCI_DEVFN(18, 0), 4);
d->ISD_handle = cpu_register_io_memory(gt64120_read, gt64120_write, d,
DEVICE_NATIVE_ENDIAN);