diff options
Diffstat (limited to 'hw/unin_pci.c')
| -rw-r--r-- | hw/unin_pci.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/hw/unin_pci.c b/hw/unin_pci.c index 9fc073ab5..b75191679 100644 --- a/hw/unin_pci.c +++ b/hw/unin_pci.c @@ -192,7 +192,7 @@ PCIBus *pci_pmac_init(qemu_irq *pic) pci_config_set_class(d->config, PCI_CLASS_BRIDGE_HOST); d->config[0x0C] = 0x08; // cache_line_size d->config[0x0D] = 0x10; // latency_timer - d->config[0x0E] = 0x00; // header_type + d->config[PCI_HEADER_TYPE] = PCI_HEADER_TYPE_NORMAL; // header_type d->config[0x34] = 0x00; // capabilities_pointer #if 0 // XXX: not activated as PPC BIOS doesn't handle multiple buses properly @@ -205,7 +205,7 @@ PCIBus *pci_pmac_init(qemu_irq *pic) pci_config_set_class(d->config, PCI_CLASS_BRIDGE_PCI); d->config[0x0C] = 0x08; // cache_line_size d->config[0x0D] = 0x20; // latency_timer - d->config[0x0E] = 0x01; // header_type + d->config[PCI_HEADER_TYPE] = PCI_HEADER_TYPE_BRIDGE; // header_type d->config[0x18] = 0x01; // primary_bus d->config[0x19] = 0x02; // secondary_bus @@ -240,7 +240,7 @@ PCIBus *pci_pmac_init(qemu_irq *pic) pci_config_set_class(d->config, PCI_CLASS_BRIDGE_HOST); d->config[0x0C] = 0x08; // cache_line_size d->config[0x0D] = 0x10; // latency_timer - d->config[0x0E] = 0x00; // header_type + d->config[PCI_HEADER_TYPE] = PCI_HEADER_TYPE_NORMAL; // header_type // d->config[0x34] = 0x80; // capabilities_pointer #if 0 // XXX: not needed for now @@ -261,7 +261,7 @@ PCIBus *pci_pmac_init(qemu_irq *pic) pci_config_set_class(d->config, PCI_CLASS_BRIDGE_HOST); d->config[0x0C] = 0x08; // cache_line_size d->config[0x0D] = 0x10; // latency_timer - d->config[0x0E] = 0x00; // header_type + d->config[PCI_HEADER_TYPE] = PCI_HEADER_TYPE_NORMAL; // header_type d->config[0x34] = 0x00; // capabilities_pointer #endif register_savevm("uninorth", 0, 1, pci_unin_save, pci_unin_load, d); |