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-rw-r--r--hw/sun4m.c77
1 files changed, 30 insertions, 47 deletions
diff --git a/hw/sun4m.c b/hw/sun4m.c
index 05dbd56a5..80305e09c 100644
--- a/hw/sun4m.c
+++ b/hw/sun4m.c
@@ -28,12 +28,26 @@
#define MMU_CONTEXT_TBL 0x00003000
#define MMU_L1PTP (MMU_CONTEXT_TBL + 0x0400)
#define MMU_L2PTP (MMU_CONTEXT_TBL + 0x0800)
-#define ROMVEC_DATA (MMU_CONTEXT_TBL + 0x1800)
#define PROM_ADDR 0xffd04000
-#define PROM_FILENAME "proll.bin"
+#define PROM_FILENAMEB "proll.bin"
+#define PROM_FILENAMEE "proll.elf"
+#define PROLL_MAGIC_ADDR 0x20000000
#define PHYS_JJ_EEPROM 0x71200000 /* [2000] MK48T08 */
#define PHYS_JJ_IDPROM_OFF 0x1FD8
#define PHYS_JJ_EEPROM_SIZE 0x2000
+#define PHYS_JJ_IOMMU 0x10000000 /* First page of sun4m IOMMU */
+#define PHYS_JJ_TCX_FB 0x50800000 /* Start address, frame buffer body */
+#define PHYS_JJ_TCX_0E 0x5E000000 /* Top address, one byte used. */
+#define PHYS_JJ_IOMMU 0x10000000 /* First page of sun4m IOMMU */
+#define PHYS_JJ_LEDMA 0x78400010 /* ledma, off by 10 from unused SCSI */
+#define PHYS_JJ_LE 0x78C00000 /* LANCE, typical sun4m */
+#define PHYS_JJ_LE_IRQ 6
+#define PHYS_JJ_CLOCK 0x71D00000
+#define PHYS_JJ_CLOCK_IRQ 10
+#define PHYS_JJ_CLOCK1 0x71D10000
+#define PHYS_JJ_CLOCK1_IRQ 14
+#define PHYS_JJ_INTR0 0x71E00000 /* CPU0 interrupt control registers */
+#define PHYS_JJ_INTR_G 0x71E10000 /* Master interrupt control registers */
/* TSC handling */
@@ -44,8 +58,6 @@ uint64_t cpu_get_tsc()
void DMA_run() {}
void SB16_run() {}
-void vga_invalidate_display() {}
-void vga_screen_dump(const char *filename) {}
int serial_can_receive(SerialState *s) { return 0; }
void serial_receive_byte(SerialState *s, int ch) {}
void serial_receive_break(SerialState *s) {}
@@ -59,7 +71,7 @@ void sun4m_init(int ram_size, int vga_ram_size, int boot_device,
const char *initrd_filename)
{
char buf[1024];
- int ret, linux_boot, bios_size;
+ int ret, linux_boot;
unsigned long bios_offset;
linux_boot = (kernel_filename != NULL);
@@ -68,32 +80,21 @@ void sun4m_init(int ram_size, int vga_ram_size, int boot_device,
cpu_register_physical_memory(0, ram_size, 0);
bios_offset = ram_size;
- iommu_init();
- sched_init();
- tcx_init(ds);
- lance_init(&nd_table[0], 6);
- nvram = m48t08_init(PHYS_JJ_EEPROM, PHYS_JJ_EEPROM_SIZE);
-
- magic_init(kernel_filename, phys_ram_base + KERNEL_LOAD_ADDR);
-
-#if 0
- snprintf(buf, sizeof(buf), "%s/%s", bios_dir, PROM_FILENAME);
- bios_size = get_image_size(buf);
- ret = load_image(buf, phys_ram_base + bios_offset);
- if (ret != bios_size) {
- fprintf(stderr, "qemu: could not load prom '%s'\n", buf);
- exit(1);
- }
- cpu_register_physical_memory(PROM_ADDR,
- bios_size, bios_offset | IO_MEM_ROM);
-#endif
+ iommu_init(PHYS_JJ_IOMMU);
+ sched_init(PHYS_JJ_INTR0, PHYS_JJ_INTR_G);
+ tcx_init(ds, PHYS_JJ_TCX_FB);
+ lance_init(&nd_table[0], PHYS_JJ_LE_IRQ, PHYS_JJ_LE, PHYS_JJ_LEDMA);
+ nvram = m48t08_init(PHYS_JJ_EEPROM, PHYS_JJ_EEPROM_SIZE, &nd_table[0].macaddr);
+ timer_init(PHYS_JJ_CLOCK, PHYS_JJ_CLOCK_IRQ);
+ timer_init(PHYS_JJ_CLOCK1, PHYS_JJ_CLOCK1_IRQ);
+ magic_init(kernel_filename, phys_ram_base + KERNEL_LOAD_ADDR, PROLL_MAGIC_ADDR);
/* We load Proll as the kernel and start it. It will issue a magic
IO to load the real kernel */
if (linux_boot) {
- snprintf(buf, sizeof(buf), "%s/%s", bios_dir, PROM_FILENAME);
+ snprintf(buf, sizeof(buf), "%s/%s", bios_dir, PROM_FILENAMEB);
ret = load_kernel(buf,
- phys_ram_base + KERNEL_LOAD_ADDR);
+ phys_ram_base + KERNEL_LOAD_ADDR);
if (ret < 0) {
fprintf(stderr, "qemu: could not load kernel '%s'\n",
buf);
@@ -103,28 +104,10 @@ void sun4m_init(int ram_size, int vga_ram_size, int boot_device,
/* Setup a MMU entry for entire address space */
stl_raw(phys_ram_base + MMU_CONTEXT_TBL, (MMU_L1PTP >> 4) | 1);
stl_raw(phys_ram_base + MMU_L1PTP, (MMU_L2PTP >> 4) | 1);
-#if 0
- stl_raw(phys_ram_base + MMU_L1PTP + (0x50 << 2), (MMU_L2PTP >> 4) | 1); // frame buffer at 50..
-#endif
+ stl_raw(phys_ram_base + MMU_L1PTP + (0x01 << 2), (MMU_L2PTP >> 4) | 1); // 01.. == 00..
stl_raw(phys_ram_base + MMU_L1PTP + (0xff << 2), (MMU_L2PTP >> 4) | 1); // ff.. == 00..
+ stl_raw(phys_ram_base + MMU_L1PTP + (0xf0 << 2), (MMU_L2PTP >> 4) | 1); // f0.. == 00..
/* 3 = U:RWX S:RWX */
stl_raw(phys_ram_base + MMU_L2PTP, (3 << PTE_ACCESS_SHIFT) | 2);
-#if 0
- stl_raw(phys_ram_base + MMU_L2PTP + 0x84, (PHYS_JJ_TCX_FB >> 4) \
- | (3 << PTE_ACCESS_SHIFT) | 2); // frame buf
- stl_raw(phys_ram_base + MMU_L2PTP + 0x88, (PHYS_JJ_TCX_FB >> 4) \
- | (3 << PTE_ACCESS_SHIFT) | 2); // frame buf
- stl_raw(phys_ram_base + MMU_L2PTP + 0x140, (PHYS_JJ_TCX_FB >> 4) \
- | (3 << PTE_ACCESS_SHIFT) | 2); // frame buf
- // "Empirical constant"
- stl_raw(phys_ram_base + ROMVEC_DATA, 0x10010407);
-
- // Version: V3 prom
- stl_raw(phys_ram_base + ROMVEC_DATA + 4, 3);
-
- stl_raw(phys_ram_base + ROMVEC_DATA + 0x1c, ROMVEC_DATA+0x400);
- stl_raw(phys_ram_base + ROMVEC_DATA + 0x400, ROMVEC_DATA+0x404);
- stl_raw(phys_ram_base + ROMVEC_DATA + 0x404, 0x81c3e008); // retl
- stl_raw(phys_ram_base + ROMVEC_DATA + 0x408, 0x01000000); // nop
-#endif
+ stl_raw(phys_ram_base + MMU_L2PTP, ((0x01 << PTE_PPN_SHIFT) >> 4 ) | (3 << PTE_ACCESS_SHIFT) | 2);
}