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-rw-r--r--cpu-all.h8
-rw-r--r--cpu-exec.c2
-rw-r--r--dis-asm.h1
-rw-r--r--exec-all.h22
-rw-r--r--softmmu_header.h24
-rw-r--r--sysemu.h4
6 files changed, 30 insertions, 31 deletions
diff --git a/cpu-all.h b/cpu-all.h
index 5ba79e21c..387030e54 100644
--- a/cpu-all.h
+++ b/cpu-all.h
@@ -452,7 +452,7 @@ static inline uint64_t ldq_be_p(void *ptr)
{
uint32_t a,b;
a = ldl_be_p(ptr);
- b = ldl_be_p(ptr+4);
+ b = ldl_be_p((uint8_t *)ptr + 4);
return (((uint64_t)a<<32)|b);
}
@@ -489,7 +489,7 @@ static inline void stl_be_p(void *ptr, int v)
static inline void stq_be_p(void *ptr, uint64_t v)
{
stl_be_p(ptr, v >> 32);
- stl_be_p(ptr + 4, v);
+ stl_be_p((uint8_t *)ptr + 4, v);
}
/* float access */
@@ -518,7 +518,7 @@ static inline float64 ldfq_be_p(void *ptr)
{
CPU_DoubleU u;
u.l.upper = ldl_be_p(ptr);
- u.l.lower = ldl_be_p(ptr + 4);
+ u.l.lower = ldl_be_p((uint8_t *)ptr + 4);
return u.d;
}
@@ -527,7 +527,7 @@ static inline void stfq_be_p(void *ptr, float64 v)
CPU_DoubleU u;
u.d = v;
stl_be_p(ptr, u.l.upper);
- stl_be_p(ptr + 4, u.l.lower);
+ stl_be_p((uint8_t *)ptr + 4, u.l.lower);
}
#else
diff --git a/cpu-exec.c b/cpu-exec.c
index 5c6485658..d003ddb5c 100644
--- a/cpu-exec.c
+++ b/cpu-exec.c
@@ -640,7 +640,7 @@ int cpu_exec(CPUState *env1)
jump. */
{
if (next_tb != 0 &&
-#if USE_KQEMU
+#ifdef USE_KQEMU
(env->kqemu_enabled != 2) &&
#endif
tb->page_addr[1] == -1) {
diff --git a/dis-asm.h b/dis-asm.h
index de6e9f87e..9f2e9a684 100644
--- a/dis-asm.h
+++ b/dis-asm.h
@@ -396,7 +396,6 @@ extern int print_insn_d10v PARAMS ((bfd_vma, disassemble_info*));
extern int print_insn_v850 PARAMS ((bfd_vma, disassemble_info*));
extern int print_insn_tic30 PARAMS ((bfd_vma, disassemble_info*));
extern int print_insn_ppc PARAMS ((bfd_vma, disassemble_info*));
-extern int print_insn_alpha PARAMS ((bfd_vma, disassemble_info*));
extern int print_insn_s390 PARAMS ((bfd_vma, disassemble_info*));
extern int print_insn_crisv32 PARAMS ((bfd_vma, disassemble_info*));
diff --git a/exec-all.h b/exec-all.h
index eb2c5f4d3..ba05af22b 100644
--- a/exec-all.h
+++ b/exec-all.h
@@ -93,13 +93,13 @@ void tlb_flush(CPUState *env, int flush_global);
int tlb_set_page_exec(CPUState *env, target_ulong vaddr,
target_phys_addr_t paddr, int prot,
int mmu_idx, int is_softmmu);
-static inline int tlb_set_page(CPUState *env, target_ulong vaddr,
+static inline int tlb_set_page(CPUState *env1, target_ulong vaddr,
target_phys_addr_t paddr, int prot,
int mmu_idx, int is_softmmu)
{
if (prot & PAGE_READ)
prot |= PAGE_EXEC;
- return tlb_set_page_exec(env, vaddr, paddr, prot, mmu_idx, is_softmmu);
+ return tlb_set_page_exec(env1, vaddr, paddr, prot, mmu_idx, is_softmmu);
}
#define CODE_GEN_ALIGN 16 /* must be >= of the size of a icache line */
@@ -550,7 +550,7 @@ void tlb_fill(target_ulong addr, int is_write, int mmu_idx,
#endif
#if defined(CONFIG_USER_ONLY)
-static inline target_ulong get_phys_addr_code(CPUState *env, target_ulong addr)
+static inline target_ulong get_phys_addr_code(CPUState *env1, target_ulong addr)
{
return addr;
}
@@ -558,25 +558,25 @@ static inline target_ulong get_phys_addr_code(CPUState *env, target_ulong addr)
/* NOTE: this function can trigger an exception */
/* NOTE2: the returned address is not exactly the physical address: it
is the offset relative to phys_ram_base */
-static inline target_ulong get_phys_addr_code(CPUState *env, target_ulong addr)
+static inline target_ulong get_phys_addr_code(CPUState *env1, target_ulong addr)
{
- int mmu_idx, index, pd;
+ int mmu_idx, page_index, pd;
- index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
- mmu_idx = cpu_mmu_index(env);
- if (__builtin_expect(env->tlb_table[mmu_idx][index].addr_code !=
+ page_index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
+ mmu_idx = cpu_mmu_index(env1);
+ if (__builtin_expect(env1->tlb_table[mmu_idx][page_index].addr_code !=
(addr & TARGET_PAGE_MASK), 0)) {
ldub_code(addr);
}
- pd = env->tlb_table[mmu_idx][index].addr_code & ~TARGET_PAGE_MASK;
+ pd = env1->tlb_table[mmu_idx][page_index].addr_code & ~TARGET_PAGE_MASK;
if (pd > IO_MEM_ROM && !(pd & IO_MEM_ROMD)) {
#if defined(TARGET_SPARC) || defined(TARGET_MIPS)
do_unassigned_access(addr, 0, 1, 0);
#else
- cpu_abort(env, "Trying to execute code outside RAM or ROM at 0x" TARGET_FMT_lx "\n", addr);
+ cpu_abort(env1, "Trying to execute code outside RAM or ROM at 0x" TARGET_FMT_lx "\n", addr);
#endif
}
- return addr + env->tlb_table[mmu_idx][index].addend - (unsigned long)phys_ram_base;
+ return addr + env1->tlb_table[mmu_idx][page_index].addend - (unsigned long)phys_ram_base;
}
#endif
diff --git a/softmmu_header.h b/softmmu_header.h
index 51bd22d96..481051e68 100644
--- a/softmmu_header.h
+++ b/softmmu_header.h
@@ -222,20 +222,20 @@ static inline void glue(glue(st, SUFFIX), MEMSUFFIX)(target_ulong ptr, RES_TYPE
static inline RES_TYPE glue(glue(ld, USUFFIX), MEMSUFFIX)(target_ulong ptr)
{
- int index;
+ int page_index;
RES_TYPE res;
target_ulong addr;
unsigned long physaddr;
int mmu_idx;
addr = ptr;
- index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
+ page_index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
mmu_idx = CPU_MMU_INDEX;
- if (__builtin_expect(env->tlb_table[mmu_idx][index].ADDR_READ !=
+ if (__builtin_expect(env->tlb_table[mmu_idx][page_index].ADDR_READ !=
(addr & (TARGET_PAGE_MASK | (DATA_SIZE - 1))), 0)) {
res = glue(glue(__ld, SUFFIX), MMUSUFFIX)(addr, mmu_idx);
} else {
- physaddr = addr + env->tlb_table[mmu_idx][index].addend;
+ physaddr = addr + env->tlb_table[mmu_idx][page_index].addend;
res = glue(glue(ld, USUFFIX), _raw)((uint8_t *)physaddr);
}
return res;
@@ -244,19 +244,19 @@ static inline RES_TYPE glue(glue(ld, USUFFIX), MEMSUFFIX)(target_ulong ptr)
#if DATA_SIZE <= 2
static inline int glue(glue(lds, SUFFIX), MEMSUFFIX)(target_ulong ptr)
{
- int res, index;
+ int res, page_index;
target_ulong addr;
unsigned long physaddr;
int mmu_idx;
addr = ptr;
- index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
+ page_index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
mmu_idx = CPU_MMU_INDEX;
- if (__builtin_expect(env->tlb_table[mmu_idx][index].ADDR_READ !=
+ if (__builtin_expect(env->tlb_table[mmu_idx][page_index].ADDR_READ !=
(addr & (TARGET_PAGE_MASK | (DATA_SIZE - 1))), 0)) {
res = (DATA_STYPE)glue(glue(__ld, SUFFIX), MMUSUFFIX)(addr, mmu_idx);
} else {
- physaddr = addr + env->tlb_table[mmu_idx][index].addend;
+ physaddr = addr + env->tlb_table[mmu_idx][page_index].addend;
res = glue(glue(lds, SUFFIX), _raw)((uint8_t *)physaddr);
}
return res;
@@ -269,19 +269,19 @@ static inline int glue(glue(lds, SUFFIX), MEMSUFFIX)(target_ulong ptr)
static inline void glue(glue(st, SUFFIX), MEMSUFFIX)(target_ulong ptr, RES_TYPE v)
{
- int index;
+ int page_index;
target_ulong addr;
unsigned long physaddr;
int mmu_idx;
addr = ptr;
- index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
+ page_index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
mmu_idx = CPU_MMU_INDEX;
- if (__builtin_expect(env->tlb_table[mmu_idx][index].addr_write !=
+ if (__builtin_expect(env->tlb_table[mmu_idx][page_index].addr_write !=
(addr & (TARGET_PAGE_MASK | (DATA_SIZE - 1))), 0)) {
glue(glue(__st, SUFFIX), MMUSUFFIX)(addr, v, mmu_idx);
} else {
- physaddr = addr + env->tlb_table[mmu_idx][index].addend;
+ physaddr = addr + env->tlb_table[mmu_idx][page_index].addend;
glue(glue(st, SUFFIX), _raw)((uint8_t *)physaddr, v);
}
}
diff --git a/sysemu.h b/sysemu.h
index 9b4480ffe..a8fd29902 100644
--- a/sysemu.h
+++ b/sysemu.h
@@ -130,8 +130,8 @@ typedef struct DriveInfo {
#define MAX_SCSI_DEVS 7
#define MAX_DRIVES 32
-int nb_drives;
-DriveInfo drives_table[MAX_DRIVES+1];
+extern int nb_drives;
+extern DriveInfo drives_table[MAX_DRIVES+1];
extern int drive_get_index(BlockInterfaceType type, int bus, int unit);
extern int drive_get_max_bus(BlockInterfaceType type);
generated by cgit v1.2.3 (git 2.25.1) at 2024-04-28 15:00:45 +0000