diff options
| author | Aurelien Jarno <aurelien@aurel32.net> | 2011-03-22 07:41:29 +0100 |
|---|---|---|
| committer | Alexander Graf <agraf@suse.de> | 2011-04-01 18:34:37 +0200 |
| commit | 17d9b3af5b7f93e43d7fbdcb6f14cad54de9f1ae (patch) | |
| tree | 47506452e1f4d2e90f802ca578777d99888be361 /target-ppc/translate.c | |
| parent | a5086f95421e43c7b9e1b28a111aae0be4848117 (diff) | |
target-ppc: ext32u instead of andi with constant
Cc: Alexander Graf <agraf@suse.de>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Alexander Graf <agraf@suse.de>
Diffstat (limited to 'target-ppc/translate.c')
| -rw-r--r-- | target-ppc/translate.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/target-ppc/translate.c b/target-ppc/translate.c index 3d265e3b1..49eab284a 100644 --- a/target-ppc/translate.c +++ b/target-ppc/translate.c @@ -6975,7 +6975,7 @@ static inline void gen_evmergelo(DisasContext *ctx) #if defined(TARGET_PPC64) TCGv t0 = tcg_temp_new(); TCGv t1 = tcg_temp_new(); - tcg_gen_andi_tl(t0, cpu_gpr[rB(ctx->opcode)], 0x00000000FFFFFFFFLL); + tcg_gen_ext32u_tl(t0, cpu_gpr[rB(ctx->opcode)]); tcg_gen_shli_tl(t1, cpu_gpr[rA(ctx->opcode)], 32); tcg_gen_or_tl(cpu_gpr[rD(ctx->opcode)], t0, t1); tcg_temp_free(t0); @@ -6994,7 +6994,7 @@ static inline void gen_evmergehilo(DisasContext *ctx) #if defined(TARGET_PPC64) TCGv t0 = tcg_temp_new(); TCGv t1 = tcg_temp_new(); - tcg_gen_andi_tl(t0, cpu_gpr[rB(ctx->opcode)], 0x00000000FFFFFFFFLL); + tcg_gen_ext32u_tl(t0, cpu_gpr[rB(ctx->opcode)]); tcg_gen_andi_tl(t1, cpu_gpr[rA(ctx->opcode)], 0xFFFFFFFF0000000ULL); tcg_gen_or_tl(cpu_gpr[rD(ctx->opcode)], t0, t1); tcg_temp_free(t0); @@ -7083,14 +7083,14 @@ static inline void gen_evsel(DisasContext *ctx) tcg_gen_andi_i32(t0, cpu_crf[ctx->opcode & 0x07], 1 << 2); tcg_gen_brcondi_i32(TCG_COND_EQ, t0, 0, l3); #if defined(TARGET_PPC64) - tcg_gen_andi_tl(t2, cpu_gpr[rA(ctx->opcode)], 0x00000000FFFFFFFFULL); + tcg_gen_ext32u_tl(t2, cpu_gpr[rA(ctx->opcode)]); #else tcg_gen_mov_tl(cpu_gpr[rD(ctx->opcode)], cpu_gpr[rA(ctx->opcode)]); #endif tcg_gen_br(l4); gen_set_label(l3); #if defined(TARGET_PPC64) - tcg_gen_andi_tl(t2, cpu_gpr[rB(ctx->opcode)], 0x00000000FFFFFFFFULL); + tcg_gen_ext32u_tl(t2, cpu_gpr[rB(ctx->opcode)]); #else tcg_gen_mov_tl(cpu_gpr[rD(ctx->opcode)], cpu_gpr[rB(ctx->opcode)]); #endif |