diff options
| author | Juha Riihimäki <juha.riihimaki@nokia.com> | 2010-12-08 13:15:18 +0200 |
|---|---|---|
| committer | Aurelien Jarno <aurelien@aurel32.net> | 2010-12-27 21:21:17 +0100 |
| commit | 16440c5fa0a3ba87c7ea92218466673ede7c08f0 (patch) | |
| tree | b5037b27cd937f10aa254e608de015ac570f8fb7 /target-arm | |
| parent | 9c486ad6e4e4afcd582460b4c70b1e2be856dbfd (diff) | |
target-arm: correct cp15 c1_sys reset value for arm1136 and cortex-a9
Signed-off-by: Juha Riihimäki <juha.riihimaki@nokia.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Diffstat (limited to 'target-arm')
| -rw-r--r-- | target-arm/helper.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/target-arm/helper.c b/target-arm/helper.c index e54fb27a8..50c1017c8 100644 --- a/target-arm/helper.c +++ b/target-arm/helper.c @@ -76,6 +76,7 @@ static void cpu_reset_model_id(CPUARMState *env, uint32_t id) memcpy(env->cp15.c0_c1, arm1136_cp15_c0_c1, 8 * sizeof(uint32_t)); memcpy(env->cp15.c0_c2, arm1136_cp15_c0_c2, 8 * sizeof(uint32_t)); env->cp15.c0_cachetype = 0x1dd20d2; + env->cp15.c1_sys = 0x00050078; break; case ARM_CPUID_ARM11MPCORE: set_feature(env, ARM_FEATURE_V6); @@ -131,6 +132,7 @@ static void cpu_reset_model_id(CPUARMState *env, uint32_t id) env->cp15.c0_clid = (1 << 27) | (1 << 24) | 3; env->cp15.c0_ccsid[0] = 0xe00fe015; /* 16k L1 dcache. */ env->cp15.c0_ccsid[1] = 0x200fe015; /* 16k L1 icache. */ + env->cp15.c1_sys = 0x00c50078; break; case ARM_CPUID_CORTEXM3: set_feature(env, ARM_FEATURE_V6); |