aboutsummaryrefslogtreecommitdiffstats
path: root/hw
diff options
context:
space:
mode:
authorLiu Yu-B13201 <Yu.Liu@freescale.com>2011-09-29 17:52:49 +0000
committerAlexander Graf <agraf@suse.de>2011-10-30 17:11:53 +0100
commit6875dc8ea4f9e14f33c217c3596af51c60cfd1b5 (patch)
treeffeaf4a2ef38d572d472c71bff02e1256bf6b60d /hw
parent375847a6c0330e3de0fd1589eeb5a364692b791e (diff)
ppc/e500_pci: Fix code style
Put trailing statements on next line. Signed-off-by: Liu Yu <yu.liu@freescale.com> Reviewed-by: Andreas Färber <andreas.faerber@web.de> Signed-off-by: Alexander Graf <agraf@suse.de>
Diffstat (limited to 'hw')
-rw-r--r--hw/ppce500_pci.c76
1 files changed, 56 insertions, 20 deletions
diff --git a/hw/ppce500_pci.c b/hw/ppce500_pci.c
index 2db365d0b..0ece42244 100644
--- a/hw/ppce500_pci.c
+++ b/hw/ppce500_pci.c
@@ -98,11 +98,20 @@ static uint32_t pci_reg_read4(void *opaque, target_phys_addr_t addr)
case PPCE500_PCI_OW3:
case PPCE500_PCI_OW4:
switch (addr & 0xC) {
- case PCI_POTAR: value = pci->pob[(addr >> 5) & 0x7].potar; break;
- case PCI_POTEAR: value = pci->pob[(addr >> 5) & 0x7].potear; break;
- case PCI_POWBAR: value = pci->pob[(addr >> 5) & 0x7].powbar; break;
- case PCI_POWAR: value = pci->pob[(addr >> 5) & 0x7].powar; break;
- default: break;
+ case PCI_POTAR:
+ value = pci->pob[(addr >> 5) & 0x7].potar;
+ break;
+ case PCI_POTEAR:
+ value = pci->pob[(addr >> 5) & 0x7].potear;
+ break;
+ case PCI_POWBAR:
+ value = pci->pob[(addr >> 5) & 0x7].powbar;
+ break;
+ case PCI_POWAR:
+ value = pci->pob[(addr >> 5) & 0x7].powar;
+ break;
+ default:
+ break;
}
break;
@@ -110,11 +119,20 @@ static uint32_t pci_reg_read4(void *opaque, target_phys_addr_t addr)
case PPCE500_PCI_IW2:
case PPCE500_PCI_IW1:
switch (addr & 0xC) {
- case PCI_PITAR: value = pci->pib[(addr >> 5) & 0x3].pitar; break;
- case PCI_PIWBAR: value = pci->pib[(addr >> 5) & 0x3].piwbar; break;
- case PCI_PIWBEAR: value = pci->pib[(addr >> 5) & 0x3].piwbear; break;
- case PCI_PIWAR: value = pci->pib[(addr >> 5) & 0x3].piwar; break;
- default: break;
+ case PCI_PITAR:
+ value = pci->pib[(addr >> 5) & 0x3].pitar;
+ break;
+ case PCI_PIWBAR:
+ value = pci->pib[(addr >> 5) & 0x3].piwbar;
+ break;
+ case PCI_PIWBEAR:
+ value = pci->pib[(addr >> 5) & 0x3].piwbear;
+ break;
+ case PCI_PIWAR:
+ value = pci->pib[(addr >> 5) & 0x3].piwar;
+ break;
+ default:
+ break;
};
break;
@@ -154,11 +172,20 @@ static void pci_reg_write4(void *opaque, target_phys_addr_t addr,
case PPCE500_PCI_OW3:
case PPCE500_PCI_OW4:
switch (addr & 0xC) {
- case PCI_POTAR: pci->pob[(addr >> 5) & 0x7].potar = value; break;
- case PCI_POTEAR: pci->pob[(addr >> 5) & 0x7].potear = value; break;
- case PCI_POWBAR: pci->pob[(addr >> 5) & 0x7].powbar = value; break;
- case PCI_POWAR: pci->pob[(addr >> 5) & 0x7].powar = value; break;
- default: break;
+ case PCI_POTAR:
+ pci->pob[(addr >> 5) & 0x7].potar = value;
+ break;
+ case PCI_POTEAR:
+ pci->pob[(addr >> 5) & 0x7].potear = value;
+ break;
+ case PCI_POWBAR:
+ pci->pob[(addr >> 5) & 0x7].powbar = value;
+ break;
+ case PCI_POWAR:
+ pci->pob[(addr >> 5) & 0x7].powar = value;
+ break;
+ default:
+ break;
};
break;
@@ -166,11 +193,20 @@ static void pci_reg_write4(void *opaque, target_phys_addr_t addr,
case PPCE500_PCI_IW2:
case PPCE500_PCI_IW1:
switch (addr & 0xC) {
- case PCI_PITAR: pci->pib[(addr >> 5) & 0x3].pitar = value; break;
- case PCI_PIWBAR: pci->pib[(addr >> 5) & 0x3].piwbar = value; break;
- case PCI_PIWBEAR: pci->pib[(addr >> 5) & 0x3].piwbear = value; break;
- case PCI_PIWAR: pci->pib[(addr >> 5) & 0x3].piwar = value; break;
- default: break;
+ case PCI_PITAR:
+ pci->pib[(addr >> 5) & 0x3].pitar = value;
+ break;
+ case PCI_PIWBAR:
+ pci->pib[(addr >> 5) & 0x3].piwbar = value;
+ break;
+ case PCI_PIWBEAR:
+ pci->pib[(addr >> 5) & 0x3].piwbear = value;
+ break;
+ case PCI_PIWAR:
+ pci->pib[(addr >> 5) & 0x3].piwar = value;
+ break;
+ default:
+ break;
};
break;