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authoraurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162>2009-01-14 14:47:56 +0000
committeraurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162>2009-01-14 14:47:56 +0000
commitaeeb69c73e0c239be10ac411c41e986f3c23acf2 (patch)
treeb23e0a4beecea2e880fc92acaefd77cf73774561 /hw/escc.c
parent13d7ec0f81b5bd3e3b862f635da5a380703230e7 (diff)
escc: allow one IRQ per serial channel
The Z85C30 on the PowerMAC machines have one interrupt per serial channel, while the Sparc machines have only one for both. Allow the emulated device to use one IRQ per channel. Patch by Laurent Vivier. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6295 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'hw/escc.c')
-rw-r--r--hw/escc.c8
1 files changed, 5 insertions, 3 deletions
diff --git a/hw/escc.c b/hw/escc.c
index d68f90b54..372ad5acf 100644
--- a/hw/escc.c
+++ b/hw/escc.c
@@ -719,8 +719,9 @@ static int escc_load(QEMUFile *f, void *opaque, int version_id)
}
-int escc_init(target_phys_addr_t base, qemu_irq irq, CharDriverState *chrA,
- CharDriverState *chrB, int clock, int it_shift)
+int escc_init(target_phys_addr_t base, qemu_irq irqA, qemu_irq irqB,
+ CharDriverState *chrA, CharDriverState *chrB,
+ int clock, int it_shift)
{
int escc_io_memory, i;
SerialState *s;
@@ -741,9 +742,10 @@ int escc_init(target_phys_addr_t base, qemu_irq irq, CharDriverState *chrA,
s->chn[1].chr = chrA;
s->chn[0].disabled = 0;
s->chn[1].disabled = 0;
+ s->chn[0].irq = irqB;
+ s->chn[1].irq = irqA;
for (i = 0; i < 2; i++) {
- s->chn[i].irq = irq;
s->chn[i].chn = 1 - i;
s->chn[i].type = ser;
s->chn[i].clock = clock / 2;