diff options
| author | aurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162> | 2009-01-04 22:10:28 +0000 |
|---|---|---|
| committer | aurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162> | 2009-01-04 22:10:28 +0000 |
| commit | 21d215831e66c01bafd92a7020c0c1f6a7d49c26 (patch) | |
| tree | 071181548c8206961350fc3b4ca6a684d7aa3654 | |
| parent | cd633b10fd99faeb01c94ba35ec35f48f4e86a68 (diff) | |
Add GEN_VXFORM_SIMM macro for subsequent instructions.
Signed-off-by: Nathan Froyd <froydnj@codesourcery.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6172 c046a42c-6fe2-441c-8c8c-71466251a162
| -rw-r--r-- | target-ppc/translate.c | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/target-ppc/translate.c b/target-ppc/translate.c index 745da780d..6416ede98 100644 --- a/target-ppc/translate.c +++ b/target-ppc/translate.c @@ -370,6 +370,8 @@ EXTRACT_HELPER(IMM, 12, 8); EXTRACT_SHELPER(SIMM, 0, 16); /* 16 bits unsigned immediate value */ EXTRACT_HELPER(UIMM, 0, 16); +/* 5 bits signed immediate value */ +EXTRACT_HELPER(SIMM5, 16, 5); /* Bit count */ EXTRACT_HELPER(NB, 11, 5); /* Shift count */ @@ -6270,6 +6272,22 @@ GEN_VXFORM(vrlb, 2, 0); GEN_VXFORM(vrlh, 2, 1); GEN_VXFORM(vrlw, 2, 2); +#define GEN_VXFORM_SIMM(name, opc2, opc3) \ + GEN_HANDLER(name, 0x04, opc2, opc3, 0x00000000, PPC_ALTIVEC) \ + { \ + TCGv_ptr rd; \ + TCGv_i32 simm; \ + if (unlikely(!ctx->altivec_enabled)) { \ + gen_exception(ctx, POWERPC_EXCP_VPU); \ + return; \ + } \ + simm = tcg_const_i32(SIMM5(ctx->opcode)); \ + rd = gen_avr_ptr(rD(ctx->opcode)); \ + gen_helper_##name (rd, simm); \ + tcg_temp_free_i32(simm); \ + tcg_temp_free_ptr(rd); \ + } + GEN_HANDLER(vsldoi, 0x04, 0x16, 0xFF, 0x00000400, PPC_ALTIVEC) { TCGv_ptr ra, rb, rd; |