diff options
Diffstat (limited to 'src/target/firmware')
20 files changed, 28 insertions, 28 deletions
diff --git a/src/target/firmware/apps/rssi/main.c b/src/target/firmware/apps/rssi/main.c index 50204869..e1378064 100644 --- a/src/target/firmware/apps/rssi/main.c +++ b/src/target/firmware/apps/rssi/main.c @@ -1260,7 +1260,7 @@ static void handle_assign(void) /* Main Program */ const char *hr = "======================================================================\n"; -/* match request reference agains request history */ +/* match request reference against request history */ static int gsm48_match_ra(struct gsm48_req_ref *ref) { uint8_t ia_t1, ia_t2, ia_t3; diff --git a/src/target/firmware/board/compal/highram.lds b/src/target/firmware/board/compal/highram.lds index 9309d83f..f2e04a36 100644 --- a/src/target/firmware/board/compal/highram.lds +++ b/src/target/firmware/board/compal/highram.lds @@ -16,7 +16,7 @@ MEMORY XRAM (rw) : ORIGIN = 0x00800000, LENGTH = 0x00020000 /* highram binary single big zone with all rest of internal SRAM */ /* -> our text, initialized data */ - /* -> our unitialized data, stacks, heap */ + /* -> our uninitialized data, stacks, heap */ RAM (rw) : ORIGIN = 0x00820000, LENGTH = 0x00030000 } SECTIONS diff --git a/src/target/firmware/board/compal/ram.lds b/src/target/firmware/board/compal/ram.lds index 4f08a835..ed7bb625 100644 --- a/src/target/firmware/board/compal/ram.lds +++ b/src/target/firmware/board/compal/ram.lds @@ -12,7 +12,7 @@ MEMORY /* compal-loaded binary: our text, initialized data */ /* (only this zone can contain loaded data since loader is 64k limit) */ LRAM (rw) : ORIGIN = 0x00800000, LENGTH = 0x00010000 - /* compal-loaded binary: our unitialized data, stacks, heap */ + /* compal-loaded binary: our uninitialized data, stacks, heap */ IRAM (rw) : ORIGIN = 0x00810000, LENGTH = 0x00030000 } SECTIONS diff --git a/src/target/firmware/board/mediatek/ram.lds b/src/target/firmware/board/mediatek/ram.lds index 7083c273..84568cf3 100644 --- a/src/target/firmware/board/mediatek/ram.lds +++ b/src/target/firmware/board/mediatek/ram.lds @@ -12,7 +12,7 @@ MEMORY { /* mtk-loaded binary: our text, initialized data */ LRAM (rw) : ORIGIN = 0x40000000, LENGTH = 0x00006000 - /* mtk-loaded binary: our unitialized data, stacks, heap */ + /* mtk-loaded binary: our uninitialized data, stacks, heap */ IRAM (rw) : ORIGIN = 0x40006000, LENGTH = 0x00006000 } SECTIONS diff --git a/src/target/firmware/calypso/sim.c b/src/target/firmware/calypso/sim.c index 752628fd..dc5885c4 100644 --- a/src/target/firmware/calypso/sim.c +++ b/src/target/firmware/calypso/sim.c @@ -58,7 +58,7 @@ enum { #define L3_MSG_HEAD 4 static uint8_t sim_data[256]; /* buffer for SIM command */ -static volatile uint16_t sim_len = 0; /* lenght of data in sim_data[] */ +static volatile uint16_t sim_len = 0; /* length of data in sim_data[] */ static volatile uint8_t sim_state = SIM_STATE_IDLE; /* current state of SIM process */ static volatile uint8_t sim_ignore_waiting_char = 0; diff --git a/src/target/firmware/comm/sercomm.c b/src/target/firmware/comm/sercomm.c index 490e2254..cebd37dc 100644 --- a/src/target/firmware/comm/sercomm.c +++ b/src/target/firmware/comm/sercomm.c @@ -182,7 +182,7 @@ int sercomm_drv_pull(uint8_t *ch) sercomm_unlock(&flags); return 1; } else { - /* no more data avilable */ + /* no more data available */ sercomm_unlock(&flags); return 0; } diff --git a/src/target/firmware/fb/fb_rgb332.c b/src/target/firmware/fb/fb_rgb332.c index 08d64e13..569ccc7d 100644 --- a/src/target/firmware/fb/fb_rgb332.c +++ b/src/target/firmware/fb/fb_rgb332.c @@ -144,7 +144,7 @@ void fb_rgb332_lineto(uint16_t x2,uint16_t y2){ int t,tmax; /* counter for steps */ int err_inc,err_accu=0; /* error delta and accumulator for */ - /* Brensenham's algorhithm */ + /* Brensenham's algorithm */ fb_limit_fb_range(&x1,&y1); fb_limit_fb_range(&x2,&y2); diff --git a/src/target/firmware/fb/fb_s6b33b1x.c b/src/target/firmware/fb/fb_s6b33b1x.c index 788ada7b..e36c5471 100644 --- a/src/target/firmware/fb/fb_s6b33b1x.c +++ b/src/target/firmware/fb/fb_s6b33b1x.c @@ -72,7 +72,7 @@ s6b33b1x_initdata[] = { { DATA, 0x0a }, /* DATA: fPCK = fOSC/6 */ { CMD, 0x2a }, /* CMD Contrast Control */ { DATA, 0x2d }, /* DATA: default contrast */ - { CMD, 0x30 }, /* CMD Adressing mode set */ + { CMD, 0x30 }, /* CMD Addressing mode set */ { DATA, 0x0b }, /* DATA: 65536 color mode */ { CMD, 0x10 }, /* CMD Driver output mode set */ { DATA, 0x03 }, /* DATA: Display duty: 1/132 */ diff --git a/src/target/firmware/include/abb/twl3025.h b/src/target/firmware/include/abb/twl3025.h index 938a4252..727bde03 100755 --- a/src/target/firmware/include/abb/twl3025.h +++ b/src/target/firmware/include/abb/twl3025.h @@ -122,7 +122,7 @@ enum vrpcsts_reg_bits { enum togbr2_bits { TOGBR2_KEEPR = (1 << 0), /* Clear KEEPON bit */ TOGBR2_KEEPS = (1 << 1), /* Set KEEPON bit */ - TOGBR2_ACTR = (1 << 2), /* Dectivate MCLK */ + TOGBR2_ACTR = (1 << 2), /* Deactivate MCLK */ TOGBR2_ACTS = (1 << 3), /* Activate MCLK */ TOGBR2_IBUFPTR1 = (1 << 4), /* Initialize pointer of burst buffer 1 */ TOGBR2_IBUFPTR2 = (1 << 5), /* Initialize pointer of burst buffer 2 */ diff --git a/src/target/firmware/include/calypso/dsp_api.h b/src/target/firmware/include/calypso/dsp_api.h index f9751f37..234964f5 100644 --- a/src/target/firmware/include/calypso/dsp_api.h +++ b/src/target/firmware/include/calypso/dsp_api.h @@ -45,7 +45,7 @@ typedef struct API d_task_ra; // (7) RA task command. API d_fn; // (8) FN, in Rep. period and FN%104, used for TRAFFIC/TCH only. // bit [0..7] -> b_fn_report, FN in the normalized reporting period. - // bit [8..15] -> b_fn_sid, FN % 104, used for SID positionning. + // bit [8..15] -> b_fn_sid, FN % 104, used for SID positioning. API d_ctrl_tch; // (9) Tch channel description. // bit [0..3] -> b_chan_mode, channel mode. // bit [4..5] -> b_chan_type, channel type. @@ -72,7 +72,7 @@ typedef struct // word 1, bit [0..11] -> T1. API d_power_ctl; // (14) Power level control. API d_afc; // (15) AFC value (enabled by "b_afc" in "d_ctrl_TCM4400 or in d_ctrl_abb"). - API d_ctrl_system; // (16) Controle Register for RESET/RESUME. + API d_ctrl_system; // (16) Control Register for RESET/RESUME. // bit [0..2] -> b_tsq, training sequence. // bit [3] -> b_bcch_freq_ind, BCCH frequency indication. // bit [15] -> b_task_abort, DSP task abort command. @@ -264,7 +264,7 @@ T_DB_DSP_TO_MCU; // Speech Recognition module API d_sr_status; // status of the DSP speech reco task - API d_sr_param; // paramters for the DSP speech reco task: OOV threshold. + API d_sr_param; // parameters for the DSP speech reco task: OOV threshold. API d_sr_bit_exact_test; // bit exact test API d_sr_nb_words; // number of words used in the speech recognition task API d_sr_db_level; // estimate voice level in dB @@ -608,7 +608,7 @@ T_DB_DSP_TO_MCU; // Speech Recognition module API d_sr_status; // status of the DSP speech reco task - API d_sr_param; // paramters for the DSP speech reco task: OOV threshold. + API d_sr_param; // parameters for the DSP speech reco task: OOV threshold. API d_sr_bit_exact_test; // bit exact test API d_sr_nb_words; // number of words used in the speech recognition task API d_sr_db_level; // estimate voice level in dB @@ -766,7 +766,7 @@ T_DB_DSP_TO_MCU; // The size of this buffer is 15 word but some speech reco words // are overlayer with this buffer. This is the reason why the size is 3 instead of 15. API d_sr_status; // status of the DSP speech reco task - API d_sr_param; // paramters for the DSP speech reco task: OOV threshold. + API d_sr_param; // parameters for the DSP speech reco task: OOV threshold. API sr_hole1; // hole API d_sr_bit_exact_test; // bit exact test API d_sr_nb_words; // number of words used in the speech recognition task @@ -989,7 +989,7 @@ typedef struct // The size of this buffer is 15 word but some speech reco words // are overlayer with this buffer. This is the reason why the size is 3 instead of 15. API d_sr_status; // status of the DSP speech reco task - API d_sr_param; // paramters for the DSP speech reco task: OOV threshold. + API d_sr_param; // parameters for the DSP speech reco task: OOV threshold. API sr_hole1; // hole API d_sr_bit_exact_test; // bit exact test API d_sr_nb_words; // number of words used in the speech recognition task diff --git a/src/target/firmware/include/calypso/l1_environment.h b/src/target/firmware/include/calypso/l1_environment.h index d4d442cc..d49866e2 100644 --- a/src/target/firmware/include/calypso/l1_environment.h +++ b/src/target/firmware/include/calypso/l1_environment.h @@ -90,9 +90,9 @@ typedef signed short API_SIGNED; // bits in d_gsm_bgd_mgt - background task management #define B_DSPBGD_RECO 1 // start of reco in dsp background -#define B_DSPBGD_UPD 2 // start of alignement update in dsp background +#define B_DSPBGD_UPD 2 // start of alignment update in dsp background #define B_DSPBGD_STOP_RECO 256 // stop of reco in dsp background -#define B_DSPBGD_STOP_UPD 512 // stop of alignement update in dsp background +#define B_DSPBGD_STOP_UPD 512 // stop of alignment update in dsp background // bit in d_pll_config #define B_32KHZ_CALIB (1 << 14) // force DSP in Idle1 during 32 khz calibration diff --git a/src/target/firmware/include/calypso/sim.h b/src/target/firmware/include/calypso/sim.h index 5e33bdbd..8f627b18 100755 --- a/src/target/firmware/include/calypso/sim.h +++ b/src/target/firmware/include/calypso/sim.h @@ -160,7 +160,7 @@ void calypso_sim_powerdown(void); /* Powerdown simcard */ /* APDU transmission modes */ #define SIM_APDU_PUT 0 /* Transmit a data body to the card */ -#define SIM_APDU_GET 1 /* Fetch data from the card eg. GET RESOPNSE */ +#define SIM_APDU_GET 1 /* Fetch data from the card eg. GET RESPONSE */ void calypso_sim_init(void); /* Initialize simcard interface */ diff --git a/src/target/firmware/include/fb/fb_bw8.h b/src/target/firmware/include/fb/fb_bw8.h index c77fa71f..d84f91a7 100644 --- a/src/target/firmware/include/fb/fb_bw8.h +++ b/src/target/firmware/include/fb/fb_bw8.h @@ -3,7 +3,7 @@ /* 8bit monochrome framebuffer, organized with 8 stacked pixels per byte, backed by local memory. fb_bw8.c lists functions that - are common to simmilar organized displays. */ + are common to similar organized displays. */ /* Sketch of Memory Layout diff --git a/src/target/firmware/include/layer1/sync.h b/src/target/firmware/include/layer1/sync.h index 3565ee20..daf998b0 100644 --- a/src/target/firmware/include/layer1/sync.h +++ b/src/target/firmware/include/layer1/sync.h @@ -15,7 +15,7 @@ struct l1_cell_info { uint8_t bsic; /* Combined or non-combined CCCH */ uint8_t ccch_mode; /* enum ccch_mode */ - /* whats the delta of the cells current GSM frame number + /* what's the delta of the cells current GSM frame number * compared to our current local frame number */ int32_t fn_offset; /* how much does the TPU need adjustment (delta) to synchronize diff --git a/src/target/firmware/layer1/l23_api.c b/src/target/firmware/layer1/l23_api.c index e78020de..f55e6706 100644 --- a/src/target/firmware/layer1/l23_api.c +++ b/src/target/firmware/layer1/l23_api.c @@ -570,7 +570,7 @@ static void l1ctl_rx_traffic_req(struct msgb *msg) struct l1ctl_traffic_req *tr = (struct l1ctl_traffic_req *) ul->payload; int num = 0; - /* printd("L1CTL_TRAFFIC_REQ\n"); */ /* Very verbose, can overwelm serial */ + /* printd("L1CTL_TRAFFIC_REQ\n"); */ /* Very verbose, can overwhelm serial */ msg->l2h = tr->data; diff --git a/src/target/firmware/layer1/prim_fbsb.c b/src/target/firmware/layer1/prim_fbsb.c index 50acefcc..8eaeb5af 100644 --- a/src/target/firmware/layer1/prim_fbsb.c +++ b/src/target/firmware/layer1/prim_fbsb.c @@ -234,7 +234,7 @@ static int l1s_sbdet_resp(__unused uint8_t p1, uint8_t attempt, synchronize_tdma(&l1s.serving_cell); - /* if we have recived a SYNC burst, update our local GSM time */ + /* if we have received a SYNC burst, update our local GSM time */ gsm_fn2gsmtime(&l1s.current_time, fbs.mon.time.fn + SB2_LATENCY); /* compute next time from new current time */ l1s.next_time = l1s.current_time; @@ -532,7 +532,7 @@ static void l1a_fb_compl(__unused enum l1_compl c) return; } - /* FIME: use l1s.neigh_cell[fbs.cinfo_idx] */ + /* FIXME: use l1s.neigh_cell[fbs.cinfo_idx] */ fbinfo2cellinfo(&l1s.serving_cell, last_fb); /* send FBSB_CONF success message via L1CTL */ diff --git a/src/target/firmware/layer1/prim_tch.c b/src/target/firmware/layer1/prim_tch.c index a8036d2f..02546544 100644 --- a/src/target/firmware/layer1/prim_tch.c +++ b/src/target/firmware/layer1/prim_tch.c @@ -607,7 +607,7 @@ const struct tdma_sched_item tch_d_sched_set[] = { * ------------------------------------------------------------------------- */ /* - * SACCH data are spread over 4 bursts, however they are so far appart that + * SACCH data are spread over 4 bursts, however they are so far apart that * we can't use the normal scheduler to schedule all them at once in a single * set. * Therefore, the task code itself decides in which burst it is, if it's the diff --git a/src/target/firmware/layer1/sync.c b/src/target/firmware/layer1/sync.c index 36f42975..b1eedd0f 100644 --- a/src/target/firmware/layer1/sync.c +++ b/src/target/firmware/layer1/sync.c @@ -168,7 +168,7 @@ void l1s_reset_hw(void) dsp_api.ndb->d_dsp_page = 0; /* we have to really reset the TPU, otherwise FB detection - * somtimes returns wrong TOA values. */ + * sometimes returns wrong TOA values. */ tpu_reset(1); tpu_reset(0); tpu_rewind(); diff --git a/src/target/firmware/lib/vsprintf.c b/src/target/firmware/lib/vsprintf.c index 80e8c1ad..8e92e2a2 100644 --- a/src/target/firmware/lib/vsprintf.c +++ b/src/target/firmware/lib/vsprintf.c @@ -615,7 +615,7 @@ int vsscanf(const char * buf, const char * fmt, va_list args) while(*fmt && *str) { /* skip any white space in format */ - /* white space in format matchs any amount of + /* white space in format matches any amount of * white space, including none, in the input. */ if (isspace(*fmt)) { diff --git a/src/target/firmware/rf/trf6151.c b/src/target/firmware/rf/trf6151.c index 9de2cc8e..ec139282 100644 --- a/src/target/firmware/rf/trf6151.c +++ b/src/target/firmware/rf/trf6151.c @@ -300,8 +300,8 @@ static void trf6151_pll_tx(uint32_t freq_khz, /* Low band. We have 3 possible PLL modes that output on * the right port: GSM900, GSM850_HIGH, GSM850_LOW. * - * The transistion points have been chosen looking at the VCO - * and IF frequencies for various frequencies for theses modes + * The transition points have been chosen looking at the VCO + * and IF frequencies for various frequencies for these modes */ if (freq_khz < 837100) { /* GSM850_LOW */ |