diff options
Diffstat (limited to 'doc/calypso-signals.txt')
| -rw-r--r-- | doc/calypso-signals.txt | 184 |
1 files changed, 184 insertions, 0 deletions
diff --git a/doc/calypso-signals.txt b/doc/calypso-signals.txt new file mode 100644 index 00000000..be49cf03 --- /dev/null +++ b/doc/calypso-signals.txt @@ -0,0 +1,184 @@ +CALYPSO PAD AND NAME I/O CONNECTS TO TO BFIN? +======================================================================================================== +C12 CLK32K_OUT O TWL3025:CLK32K (32kHz clock input) M +F12 CLK13M_OUT_START_BIT O TWL3025:CLK13M (master clock input) M +D12 nRESPWON I TWL3025:RESPWONz (dbb power-on reset @ batt insert) O +P1 EXT-FIQ I TWL3025:INT1 O +M3 EXT-IRQ I TWL3025:INT2 M +A12 TCXOEN O TRF6151:XSEL,XEN (enable 26MHz oscillator) M +F10 ON_OFF I TWL3025:ON_nOFF (dbb reset @ each switch on) O +B14 IT_WAKEUP O TWL3025:ITWAKEUP (real-time wake-up irq) O +B11 NEMU0 NC +E10 NEMU1 NC +D11 NBSCAN NC +D10 TDI I +C10 TDO O +B10 TCK I +E9 TMS I +L11 BFSR I TWL3025:BFSX (bb-serial tx frame sync) M +K10 BDR I TWL3025:BDX (bb-serial tx data) M +P12 BFSX O TWL3025:BFSR (bb-serial rx frame sync) M +M11 BDX O TWL3025:BDR (bb-serial rx data) M +N11 BCLKX-IO6 NC +P11 BCLKR-ARMCLK GND +P14 VDX O TWL3025:VDR (vb-serial rx data) +N13 VDR I TWL3025:VDX (vb-serial tx data) +M13 VFSRX I TWL3025:VFS (vb-serial frame sync) +N12 VCLKRX I TWL3025:VCK (vb-serial clock) +N7 MCUDI I TWL3025:UDX (spi output) M +M7 MCUDO O TWL3025:UDR (spi input) M +M8 MCUEN0 O TWL3025:UEN (spi enable) M +P8 MCUEN1-IO9 NC +L8 MCUEN2-IO13 NC +G13 SIM_IO IO TWL3025:DBBSIO (sim card shifter data) L +F13 SIM_CLK O TWL3025:DBBSCK (sim card shifter clock) L +G10 SIM_RST O TWL3025:DBBSRST (sim card shifter reset inp) L +G11 SIM_CD-MAS0 V_IO +F14 SIM_PWRCTRL-IO5 O TWL3025:DBBSIO (via 10k) L +B13 OSC32K_OUT O XTAL +C13 OSC32K_IN I XTAL +A14 VSSO GND +E13 CLKTCXO I TRF6151C:RFCLK (TCXO clock output) M +M2 IDDQ GND +N1 NI BOOT GND (via 100k) +N2 nRESET_OUT O NC +M4 IO3-SIM_RNW NC +L4 IO2-IRQ4 NC +P3 IO1-TPU_IDLE O S3C2410 +N3 IO0-TPU_WAIT NC +L7 LT-PWL NC +K7 BU-PWT NC +L6 KBR4-XDIO7 NC +N6 KBR3-XDIO6 NC +P6 KBR2-XDIO5 NC +M6 KBR1-XDIO4 NC +K6 KBR0-XDIO3 NC +M5 KBC4-XDIO2 NC +P5 KBC3-XDIO1 NC +L5 KBC2-XDIO0 NC +K5 KBC1-nIRQ NC +N4 KBC0-nFIQ NC +K9 MCSI_FSYNCH-IO12 NC +N10 MCSI_CLI-IO11 NC +M10 MCSI_RXD-IO10 NC +L10 MCSI_TXD-IO9 NC +C9 CTS_MODEM-X_F S3C24xx +D9 DSR_MODEM-LPG S3c24xx +E8 RTS_MODEM-TOUT S3c24xx +A9 RX_MODEM I S3c24xx +B9 TX_MODEM O S3c24xx +B8 SD_IRDA-CLKOUT_DSP NC +A8 RXIR_IRDA-X_A1 NC +C7 TXIR_IRDA-X_A4 NC +D8 RX_IRDA I socket +C8 TX_IRDA O socket +N9 NSCS(1)-X_A32 NC +L9 NSCS0-SCL NC +M9 SDI-SDA I V-IO +K8 SDO-nINT10 I NC +P9 SCLK-nINT1 I INT0 +I14 TSPCLKX O TRF6151:CLK (serial clock) M +H11 TSPDO O TWL3025:TDR,TRF6151:DATA (serial data) M +H10 DSPDI-IO4 I NC +H13 TSPEN0 O TWL3025:TEN (TSP enable) M +H12 TSPEN1 NC +H14 TSPEN2 TRF6151:STROBE (serial strobe) M +G12 TSPEN3-nSCS2 NC +M12 TSPACT0 O TRF6151:RESETz (serial interface reset) M +M14 TSPACT1 O ASM4532:VC2 M +L12 TSPACT2 O ASM4532:VC1 M +L13 TSPACT3 O RF3166:BAND_SELECT M +I10 TSPACT4-nRDYMEM O ASM4532:VC3 M +K11 TSPACT5-DPLLCLK NC +K13 TSPACT6-nCS6 NC +K12 TSPACT7-CLKX_SPI NC +K14 TSPACT8-nMREQ NC +I11 TSPACT9-MAS1 RF3166:TX_ENABLE (PA TX) M +I12 TSPACT10-nWAIT NC +I13 TSPACT11-MCLK NC +B7 DATA0 RAM/FLASH +D7 DATA1 RAM/FLASH +E7 DATA2 RAM/FLASH +D6 DATA3 RAM/FLASH +A6 DATA4 RAM/FLASH +C6 DATA5 RAM/FLASH +E6 DATA6 RAM/FLASH +C6 DATA7 RAM/FLASH +B5 DATA8 RAM/FLASH +D5 DATA9 RAM/FLASH +E5 DATA10 RAM/FLASH +B4 DATA11 RAM/FLASH +C4 DATA12 RAM/FLASH +D4 DATA13 RAM/FLASH +A3 DATA14 RAM/FLASH +B3 DATA15 RAM/FLASH +F3 ADD0 RAM/FLASH +F2 ADD1 RAM/FLASH +G5 ADD2 RAM/FLASH +G4 ADD3 RAM/FLASH +G2 ADD4 RAM/FLASH +G3 ADD5 RAM/FLASH +H1 ADD6 RAM/FLASH +H3 ADD7 RAM/FLASH +H2 ADD8 RAM/FLASH +H4 ADD9 RAM/FLASH +H5 ADD10 RAM/FLASH +I1 ADD11 RAM/FLASH +I2 ADD12 RAM/FLASH +I3 ADD13 RAM/FLASH +K3 ADD15 RAM/FLASH +K2 ADD16 RAM/FLASH +K4 ADD17 RAM/FLASH +I5 ADD18 RAM/FLASH +L1 ADD19 RAM/FLASH +L2 ADD20 RAM/FLASH +L3 ADD21-CLK16X_IRDA RAM/FLASH +B2 RNW RAM/FLASH +E3 nFEW-X_A0 NC +E2 nFOE-X_A3 RAM/FLASH +F4 FDP-nIACK RAM/FLASH +E4 nBLE-IO15 RAM/FLASH +F5 nBHE-IO14 RAM/FLASH +C2 nCS0 +C3 nCS1 RAM/FLASH +C1 nCS2 NC +D3 nCS3-nINT4 NC +D2 CS4-ADD22 RAM/FLASH +C11 nCS4-CO35 RAM/FLASH +A4 VDDS-MF1 V-FLASH +B6 VDDS-MF2 V-FLASH +G1 VDDS-MF3 V-FLASH +D1 VDDS-MF4 V-FLASH +A11 VDDS_2 V-IO +L14 VDDS_1 V-IO +N5 VDDS_1 V-IO +A5 VDD1 V-DBB +B12 VDD2 V-DBB +N14 VDD3 V-DBB +P7 VDD4 V-DBB +M1 VDD5 V-DBB +E1 VDD6 V-DBB +F1 VSS1 GND +N8 VSS2 GND +K1 VSS3 GND +P2 VSS4 GND +P4 VSS5 GND +P10 VSS6 GND +P13 VSS7 GND +G14 BSS8 GND +A10 VSS9 GND +A7 VSS10 GND +A2 VSS11 GND +B1 VSS12 GND +D13 VDDS_RTC V-RTC +D14 VDD_RTC V-RTC +C14 VSS_RTC GND +E11 VDD_ANG V-IO +E12 VSS_ANG GND +F11 VDD_PLL V-DBB +E14 VSS_PLL GND + +Other signals + +MODEM_ON +MODEM_RST |