diff options
author | Vadim Yanitskiy <axilirator@gmail.com> | 2020-03-09 15:42:33 +0700 |
---|---|---|
committer | laforge <laforge@osmocom.org> | 2020-04-01 10:18:54 +0000 |
commit | 67c49ba664f7d7d7f07986a20e6d6363a27e3fc4 (patch) | |
tree | 44dec5cef6cf114b6f0c264b38bf3fe1e58a4653 /src/target/firmware/layer1/mframe_sched.c | |
parent | 930d7240bf1ead9a7759bc98713c2ef75a1d3ef3 (diff) |
firmware/layer1: introduce experimental PDCH support
This change implements basic (receive only) support of the PDCH
channels that are used in GPRS. Several coding schemes are
defined by 3GPP TS 45.003, however we can only do CS-1
for now, since it's basically an equivalent of xCCH.
In order to support the other schemes (CS2-4), we would need to
know how to configure the DSP (look at Freecalypso code?).
Change-Id: I44531bbe8743c188cc5d4a6ca2a63000e41d6189
Diffstat (limited to 'src/target/firmware/layer1/mframe_sched.c')
-rw-r--r-- | src/target/firmware/layer1/mframe_sched.c | 53 |
1 files changed, 53 insertions, 0 deletions
diff --git a/src/target/firmware/layer1/mframe_sched.c b/src/target/firmware/layer1/mframe_sched.c index 9c2954c3..fac84b43 100644 --- a/src/target/firmware/layer1/mframe_sched.c +++ b/src/target/firmware/layer1/mframe_sched.c @@ -311,6 +311,52 @@ static const struct mframe_sched_item mf_neigh_pm26_odd[] = { { .sched_set = NULL } }; +/* See 3GPP TS 45.002, table 6 */ +static const struct mframe_sched_item mf_gprs_pdtch[] = { + { .sched_set = NB_QUAD_DL, .modulo = 13, .frame_nr = 0 }, + { .sched_set = NB_QUAD_DL, .modulo = 13, .frame_nr = 4 }, + { .sched_set = NB_QUAD_DL, .modulo = 13, .frame_nr = 8 }, + /* NOTE: receive only task */ + { .sched_set = NULL } +}; + +static const struct mframe_sched_item mf_gprs_ptcch[] = { + /* TODO: implement AB_PTCCH_UL for PTCCH/U */ + /* TODO: implement NB_PTCCH_DL for PTCCH/D */ +#if 0 + /* PTCCH/D */ + { .sched_set = NB_PTCCH_DL, .modulo = 104, .frame_nr = 12, .flags = MF_F_PTCCH }, + { .sched_set = NB_PTCCH_DL, .modulo = 104, .frame_nr = 38, .flags = MF_F_PTCCH }, + { .sched_set = NB_PTCCH_DL, .modulo = 104, .frame_nr = 64, .flags = MF_F_PTCCH }, + { .sched_set = NB_PTCCH_DL, .modulo = 104, .frame_nr = 90, .flags = MF_F_PTCCH }, + + /* PTCCH/U for TAI 0 .. 3 */ + { .sched_set = AB_PTCCH_UL, .modulo = 416, .frame_nr = 12 }, + { .sched_set = AB_PTCCH_UL, .modulo = 416, .frame_nr = 38 }, + { .sched_set = AB_PTCCH_UL, .modulo = 416, .frame_nr = 64 }, + { .sched_set = AB_PTCCH_UL, .modulo = 416, .frame_nr = 90 }, + + /* PTCCH/U for TAI 4 .. 7 */ + { .sched_set = AB_PTCCH_UL, .modulo = 416, .frame_nr = 116 }, + { .sched_set = AB_PTCCH_UL, .modulo = 416, .frame_nr = 142 }, + { .sched_set = AB_PTCCH_UL, .modulo = 416, .frame_nr = 168 }, + { .sched_set = AB_PTCCH_UL, .modulo = 416, .frame_nr = 194 }, + + /* PTCCH/U for TAI 8 .. 11 */ + { .sched_set = AB_PTCCH_UL, .modulo = 416, .frame_nr = 220 }, + { .sched_set = AB_PTCCH_UL, .modulo = 416, .frame_nr = 246 }, + { .sched_set = AB_PTCCH_UL, .modulo = 416, .frame_nr = 272 }, + { .sched_set = AB_PTCCH_UL, .modulo = 416, .frame_nr = 298 }, + + /* PTCCH/U for TAI 12 .. 15 */ + { .sched_set = AB_PTCCH_UL, .modulo = 416, .frame_nr = 324 }, + { .sched_set = AB_PTCCH_UL, .modulo = 416, .frame_nr = 350 }, + { .sched_set = AB_PTCCH_UL, .modulo = 416, .frame_nr = 376 }, + { .sched_set = AB_PTCCH_UL, .modulo = 416, .frame_nr = 402 }, +#endif + { .sched_set = NULL } +}; + /* Test TX */ static const struct mframe_sched_item mf_tx_all_nb[] = { { .sched_set = NB_QUAD_FH_UL, .modulo = 4, .frame_nr = 0 }, @@ -345,6 +391,9 @@ static const struct mframe_sched_item *sched_set_for_task[32] = { [MF_TASK_TCH_H_0] = mf_tch_h_0, [MF_TASK_TCH_H_1] = mf_tch_h_1, + [MF_TASK_GPRS_PDTCH] = mf_gprs_pdtch, + [MF_TASK_GPRS_PTCCH] = mf_gprs_ptcch, + [MF_TASK_NEIGH_PM51_C0T0] = mf_neigh_pm51_c0t0, [MF_TASK_NEIGH_PM51] = mf_neigh_pm51, [MF_TASK_NEIGH_PM26E] = mf_neigh_pm26_even, @@ -415,6 +464,10 @@ uint8_t mframe_task2chan_nr(enum mframe_task mft, uint8_t ts) break; /* Osmocom specific extensions */ + case MF_TASK_GPRS_PDTCH: + case MF_TASK_GPRS_PTCCH: + cbits = 0x18; + break; case MF_TASK_SDCCH4_CBCH: cbits = 0x19; break; |