| Age | Commit message (Collapse) | Author | Files | Lines | |
|---|---|---|---|---|---|
| 2020-10-17 | siu-clock-breakout: export PDF files | Harald Welte | 2 | -0/+0 | |
| 2020-10-14 | add export DXF for production (mirrored) | Harald Welte | 1 | -0/+3410 | |
| 2020-10-14 | siu-clock-breakout-frontpanel: Fix layer association | Harald Welte | 1 | -6/+6 | |
| 2020-10-09 | siu-clock-breakout: Add actual fischer TFP 4 outline | Harald Welte | 1 | -35/+475 | |
| 2020-10-08 | siu-clock-breakout frontpanel | Joachim Steiger | 1 | -0/+3334 | |
| layout generated from eagle to dxf and measurements and datasheets no outline yet. (offset frontpanel border to pcb-border) | |||||
| 2020-07-27 | siu-clock-breakout: Add missing component values | Harald Welte | 2 | -10/+10 | |
| 2020-07-17 | add SIU clock breakout board design | Harald Welte | 2 | -0/+6002 | |
| This board contains a 10P10C connector in the same pin-out as the Ericsson SIU-02 together with some differential receivers/drivers to convert the 1PPS from/to single-ended signals. | |||||
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index : osmo-small-hardware | |
| Small Osmocom Hardware projects | Harald Welte |
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path: root/siu-clock-breakout