Age | Commit message (Expand) | Author | Files | Lines |
2019-01-27 | clock-gen: Update gpio spreadsheet with all assignments | Harald Welte | 1 | -30/+73 |
2019-01-27 | Merge branch 'laforge/clock-gen' | Harald Welte | 12 | -0/+120372 |
2019-01-27 | clock-gen: Minor changes; final version as ordered | Harald Welte | 2 | -40/+52 |
2019-01-27 | clock-gen: Cosmetic changes | Harald Welte | 2 | -1118/+1177 |
2019-01-27 | clock-gen: finish routing of PCB layout | Harald Welte | 4 | -442/+1596 |
2019-01-26 | clock-gen: Connect EEPROM WP to GND to disable write-protect | Harald Welte | 2 | -0/+6 |
2019-01-26 | clock-gen: Add SPI; UEXT header; mounting holes; do layout/routing | Harald Welte | 3 | -177/+1042 |
2019-01-23 | clock-generator: Most of the layout | Harald Welte | 2 | -2093/+2770 |
2019-01-23 | clock-generator: More schematics work; initial placement/grouping | Harald Welte | 2 | -0/+2366 |
2019-01-21 | clock-generator: More work on schematics (USB, UART, ESD) | Harald Welte | 1 | -57/+868 |
2019-01-16 | initial check-in of upcoming clock-generator board | Harald Welte | 9 | -0/+114422 |
2019-01-08 | SFP: publish experimenter and breakout schematicss as pdf | Martin Schramm | 2 | -0/+0 |
2018-10-06 | add SFP multi-source agreement to give context to the boards | Harald Welte | 1 | -0/+0 |
2018-09-05 | sfp-breakout: X1 pin 5 missing connection to VCC_3V3 | Harald Welte | 2 | -0/+6 |
2018-08-30 | sfp: add part numbers for SFP conn and cage | Martin Schramm | 4 | -10/+14 |
2018-08-23 | mvuart: align JP2 in 0.1' grid with JP3 (solves OSM#3037) | Martin Schramm | 1 | -50/+60 |
2018-08-21 | sfp-{breakout,experimenter}: Commit GERBER exportssfp-v1 | Harald Welte | 28 | -0/+77913 |
2018-08-21 | sfp: Use minimum clearance of 0.25mm as 0.15mm is needlessly tight in this board | Harald Welte | 2 | -12/+12 |
2018-08-17 | sfp: remove unneeded layer in brd + sch | Martin Schramm | 3 | -165/+0 |
2018-08-17 | sfp: add LOS, TX_FAULT LEDs + add more supply pinheader on both PCBs | Martin Schramm | 4 | -1152/+9484 |
2018-08-17 | spf: revise both SFP designs (OSM#3313/OSM#3314) | Martin Schramm | 4 | -2394/+4653 |
2018-06-19 | sfp: commit simple SFP breakout (OSM#3313) | Martin Schramm | 2 | -0/+13258 |
2018-06-19 | sfp: add license to sch | Martin Schramm | 1 | -0/+8 |
2018-06-19 | sfp: commit first proposal for PCB w/ LVDS xcvr (adresses OSM#3314) | Martin Schramm | 2 | -0/+13713 |
2018-06-08 | sfp: add Eagle libs for SN65LVDS1 and SN65LVDT2 (single line LVDS rcv/drv) | Martin Schramm | 2 | -0/+455 |
2018-06-07 | sfp: add Eagle lib for SN65LVDS180 LVDS diff line xcvr | Martin Schramm | 1 | -0/+263 |
2018-06-06 | sfp.lbr: review tnt's SFP lib, refine | Martin Schramm | 1 | -0/+483 |
2018-05-18 | mv-uart.brd: add signal names of JP2,JP3,JP5 in bottom silk screen | Martin Schramm | 1 | -102/+76 |
2017-07-22 | mv-uart: annotate individual pins in brd and generate mv-uart-pinout.pdf | Harald Welte | 2 | -0/+19 |
2017-05-24 | mpcie-breakout: add v3 pictures | Harald Welte | 5 | -0/+0 |
2017-05-07 | e1-tap: Add BOM attributes | Harald Welte | 2 | -21/+258 |
2017-05-07 | import e1-tap design files | Harald Welte | 16 | -0/+9085 |
2017-04-04 | mpcie-breakout: update schematics + placement PDF with v3 | Harald Welte | 2 | -0/+0 |
2017-04-04 | mpcie-breakout: update .mnt/.mnb files with v3 pcb | Harald Welte | 2 | -10/+13 |
2017-03-25 | mpcie-breakout: move PCB specs to pcb subdirectory where they belong | Harald Welte | 2 | -0/+0 |
2017-03-25 | import PCB and stencil specs for v3 | Harald Welte | 2 | -0/+0 |
2017-03-23 | mpcie-breakout: update BOM | Harald Welte | 1 | -33/+67 |
2017-03-23 | mpcie-breakout: Restore link for M1 (mPCIe mounting clamp) | Harald Welte | 1 | -5/+1 |
2017-03-23 | mpcie-breakout: Change to vertical SMA jacks | Harald Welte | 2 | -26/+31 |
2017-03-23 | mpcie-breakout: rounding of pads | Harald Welte | 1 | -3/+3 |
2017-03-23 | mpcie-breakout: DRC changes | Harald Welte | 1 | -3/+17 |
2017-03-23 | mpcie-breakout: disable tPlace layer | Harald Welte | 1 | -1/+1 |
2017-03-23 | mpcie-breakout: USB_VBUS second parallel via to reduce impedance | Harald Welte | 1 | -0/+4 |
2017-03-23 | mpcie-breakout: Digikey part numbers for U.FL and SMA | Harald Welte | 2 | -17/+198 |
2017-03-23 | mcie-breakout: Align bLabels, more vias, cosmetics | Harald Welte | 2 | -28/+129 |
2017-03-23 | mpcie-breakout: Add third U.FL-SMA group | Harald Welte | 2 | -24/+75 |
2017-03-23 | mpcie-breakout: Enlarge to 70x70mm, add SMA, U.FL and Mounting Holes | Harald Welte | 2 | -232/+589 |
2016-12-05 | mv-uart: Fix 'board doesn't enumerate if JP4 is closed" issue | Harald Welte | 3 | -82/+22 |
2016-11-25 | add PCBA photographs | Harald Welte | 4 | -0/+0 |
2016-10-28 | mpcie-breakoud: Add pdf renderings of schematicsmv_uart-v1mpcie_breakout-v2 | Harald Welte | 2 | -0/+0 |