diff options
| author | Harald Welte <laforge@gnumonks.org> | 2016-10-08 21:38:46 +0200 |
|---|---|---|
| committer | Harald Welte <laforge@gnumonks.org> | 2016-10-08 21:38:46 +0200 |
| commit | 11ab69768a76d3468f362f997aecb031db174bd1 (patch) | |
| tree | 8e9bbd9db63224577c97bbe792bba849dda891f4 /multivoltage-uart | |
| parent | e7150cd6e40e22e4eb3a5b62b2d5b388217a942d (diff) | |
move all mv-uart files to sub-directory
Diffstat (limited to 'multivoltage-uart')
| -rw-r--r-- | multivoltage-uart/ap2107adj-resistors.gnumeric | 289 | ||||
| -rw-r--r-- | multivoltage-uart/components/824013_tvs_array_uart.pdf | bin | 0 -> 552822 bytes | |||
| -rw-r--r-- | multivoltage-uart/components/ap2127_ldo.pdf | bin | 0 -> 714839 bytes | |||
| -rw-r--r-- | multivoltage-uart/components/cp2105_usb_uart.pdf | bin | 0 -> 206002 bytes | |||
| -rw-r--r-- | multivoltage-uart/mv-uart.brd | 1644 | ||||
| -rw-r--r-- | multivoltage-uart/mv-uart.sch | 3437 |
6 files changed, 5370 insertions, 0 deletions
diff --git a/multivoltage-uart/ap2107adj-resistors.gnumeric b/multivoltage-uart/ap2107adj-resistors.gnumeric new file mode 100644 index 0000000..840f815 --- /dev/null +++ b/multivoltage-uart/ap2107adj-resistors.gnumeric @@ -0,0 +1,289 @@ +<?xml version="1.0" encoding="UTF-8"?> +<gnm:Workbook xmlns:gnm="http://www.gnumeric.org/v10.dtd" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.gnumeric.org/v9.xsd"> + <gnm:Version Epoch="1" Major="12" Minor="32" Full="1.12.32"/> + <gnm:Attributes> + <gnm:Attribute> + <gnm:name>WorkbookView::show_horizontal_scrollbar</gnm:name> + <gnm:value>TRUE</gnm:value> + </gnm:Attribute> + <gnm:Attribute> + <gnm:name>WorkbookView::show_vertical_scrollbar</gnm:name> + <gnm:value>TRUE</gnm:value> + </gnm:Attribute> + <gnm:Attribute> + <gnm:name>WorkbookView::show_notebook_tabs</gnm:name> + <gnm:value>TRUE</gnm:value> + </gnm:Attribute> + <gnm:Attribute> + <gnm:name>WorkbookView::do_auto_completion</gnm:name> + <gnm:value>TRUE</gnm:value> + </gnm:Attribute> + <gnm:Attribute> + <gnm:name>WorkbookView::is_protected</gnm:name> + <gnm:value>FALSE</gnm:value> + </gnm:Attribute> + </gnm:Attributes> + <office:document-meta xmlns:office="urn:oasis:names:tc:opendocument:xmlns:office:1.0" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:meta="urn:oasis:names:tc:opendocument:xmlns:meta:1.0" xmlns:ooo="http://openoffice.org/2004/office" office:version="1.2"> + <office:meta> + <dc:date>2016-10-07T11:34:09Z</dc:date> + <meta:creation-date>2016-10-07T11:26:38Z</meta:creation-date> + </office:meta> + </office:document-meta> + <gnm:Calculation ManualRecalc="0" EnableIteration="1" MaxIterations="100" IterationTolerance="0.001" FloatRadix="2" FloatDigits="53"/> + <gnm:SheetNameIndex> + <gnm:SheetName gnm:Cols="256" gnm:Rows="65536">Sheet1</gnm:SheetName> + <gnm:SheetName gnm:Cols="256" gnm:Rows="65536">Sheet2</gnm:SheetName> + <gnm:SheetName gnm:Cols="256" gnm:Rows="65536">Sheet3</gnm:SheetName> + </gnm:SheetNameIndex> + <gnm:Geometry Width="939" Height="379"/> + <gnm:Sheets> + <gnm:Sheet DisplayFormulas="0" HideZero="0" HideGrid="0" HideColHeader="0" HideRowHeader="0" DisplayOutlines="1" OutlineSymbolsBelow="1" OutlineSymbolsRight="1" Visibility="GNM_SHEET_VISIBILITY_VISIBLE" GridColor="0:0:0"> + <gnm:Name>Sheet1</gnm:Name> + <gnm:MaxCol>3</gnm:MaxCol> + <gnm:MaxRow>11</gnm:MaxRow> + <gnm:Zoom>1</gnm:Zoom> + <gnm:Names> + <gnm:Name> + <gnm:name>Print_Area</gnm:name> + <gnm:value>#REF!</gnm:value> + <gnm:position>A1</gnm:position> + </gnm:Name> + <gnm:Name> + <gnm:name>Sheet_Title</gnm:name> + <gnm:value>"Sheet1"</gnm:value> + <gnm:position>A1</gnm:position> + </gnm:Name> + </gnm:Names> + <gnm:PrintInformation> + <gnm:Margins> + <gnm:top Points="120" PrefUnit="mm"/> + <gnm:bottom Points="120" PrefUnit="mm"/> + <gnm:left Points="72" PrefUnit="mm"/> + <gnm:right Points="72" PrefUnit="mm"/> + <gnm:header Points="72" PrefUnit="mm"/> + <gnm:footer Points="72" PrefUnit="mm"/> + </gnm:Margins> + <gnm:Scale type="size_fit" cols="1" rows="1"/> + <gnm:vcenter value="0"/> + <gnm:hcenter value="0"/> + <gnm:grid value="0"/> + <gnm:even_if_only_styles value="0"/> + <gnm:monochrome value="0"/> + <gnm:draft value="0"/> + <gnm:titles value="0"/> + <gnm:do_not_print value="0"/> + <gnm:print_range value="GNM_PRINT_ACTIVE_SHEET"/> + <gnm:order>d_then_r</gnm:order> + <gnm:orientation>portrait</gnm:orientation> + <gnm:Header Left="" Middle="" Right=""/> + <gnm:Footer Left="" Middle="" Right=""/> + <gnm:paper>iso_a4</gnm:paper> + <gnm:comments placement="GNM_PRINT_COMMENTS_IN_PLACE"/> + <gnm:errors PrintErrorsAs="GNM_PRINT_ERRORS_AS_DISPLAYED"/> + </gnm:PrintInformation> + <gnm:Styles> + <gnm:StyleRegion startCol="0" startRow="0" endCol="0" endRow="65535"> + <gnm:Style HAlign="GNM_HALIGN_GENERAL" VAlign="GNM_VALIGN_BOTTOM" WrapText="0" ShrinkToFit="0" Rotation="0" Shade="0" Indent="0" Locked="1" Hidden="0" Fore="0:0:0" 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endCol="3" endRow="11"> + <gnm:Style HAlign="GNM_HALIGN_GENERAL" VAlign="GNM_VALIGN_BOTTOM" WrapText="0" ShrinkToFit="0" Rotation="0" Shade="0" Indent="0" Locked="1" Hidden="0" Fore="0:0:0" Back="FFFF:FFFF:FFFF" PatternColor="0:0:0" Format="##0.000ESI-00"> + <gnm:Font Unit="10" Bold="0" Italic="0" Underline="0" StrikeThrough="0" Script="0">Sans</gnm:Font> + </gnm:Style> + </gnm:StyleRegion> + <gnm:StyleRegion startCol="4" startRow="6" endCol="255" endRow="11"> + <gnm:Style HAlign="GNM_HALIGN_GENERAL" VAlign="GNM_VALIGN_BOTTOM" WrapText="0" ShrinkToFit="0" Rotation="0" Shade="0" Indent="0" Locked="1" Hidden="0" Fore="0:0:0" Back="FFFF:FFFF:FFFF" PatternColor="0:0:0" Format="General"> + <gnm:Font Unit="10" Bold="0" Italic="0" Underline="0" StrikeThrough="0" Script="0">Sans</gnm:Font> + </gnm:Style> + </gnm:StyleRegion> + </gnm:Styles> + <gnm:Cols DefaultSizePts="48"> + <gnm:ColInfo No="1" Unit="59.25" HardSize="1"/> + <gnm:ColInfo No="3" Unit="55.5"/> + </gnm:Cols> + <gnm:Rows DefaultSizePts="12.75"/> + <gnm:Selections CursorCol="3" CursorRow="7"> + <gnm:Selection startCol="3" startRow="7" endCol="3" endRow="7"/> + </gnm:Selections> + <gnm:Cells> + <gnm:Cell Row="0" Col="1" ValueType="60">AP2127 Resistor calculation</gnm:Cell> + <gnm:Cell Row="2" Col="0" ValueType="60">Vref</gnm:Cell> + <gnm:Cell Row="2" Col="1" ValueType="40">0.80000000000000004</gnm:Cell> + <gnm:Cell Row="3" Col="0" ValueType="60">R2</gnm:Cell> + <gnm:Cell Row="3" Col="1" ValueType="40">18000</gnm:Cell> + <gnm:Cell Row="5" Col="0" ValueType="60">Vout</gnm:Cell> + <gnm:Cell Row="5" Col="1" ValueType="60">R1_comp</gnm:Cell> + <gnm:Cell Row="5" Col="2" ValueType="60">R1_act</gnm:Cell> + <gnm:Cell Row="5" Col="3" ValueType="60">Vout_act</gnm:Cell> + <gnm:Cell Row="6" Col="0" ValueType="40">1.8</gnm:Cell> + <gnm:Cell Row="6" Col="1">=B4*((A7/B3)-1)</gnm:Cell> + <gnm:Cell Row="6" Col="2" ValueType="40">22600</gnm:Cell> + <gnm:Cell Row="6" Col="3" ExprID="1">=B3*(1+(C7/B4))</gnm:Cell> + <gnm:Cell Row="7" Col="0" ValueType="40">2.2999999999999998</gnm:Cell> + <gnm:Cell Row="7" Col="1">=B4*((A8/B3)-1)</gnm:Cell> + <gnm:Cell Row="7" Col="2" ValueType="40">34000</gnm:Cell> + <gnm:Cell Row="7" Col="3" ExprID="2">=B3*(1+(C8/B4))</gnm:Cell> + <gnm:Cell Row="8" Col="0" ValueType="40">2.5</gnm:Cell> + <gnm:Cell Row="8" Col="1">=B4*((A9/B3)-1)</gnm:Cell> + <gnm:Cell Row="8" Col="2" ValueType="40">38300</gnm:Cell> + <gnm:Cell Row="8" Col="3" ExprID="3">=B3*(1+(C9/B4))</gnm:Cell> + <gnm:Cell Row="9" Col="0" ValueType="40">2.7999999999999998</gnm:Cell> + <gnm:Cell Row="9" Col="1">=B4*((A10/B3)-1)</gnm:Cell> + <gnm:Cell Row="9" Col="2" ValueType="40">45300</gnm:Cell> + <gnm:Cell Row="9" Col="3" ExprID="4">=B3*(1+(C10/B4))</gnm:Cell> + <gnm:Cell Row="10" Col="0" ValueType="40">3</gnm:Cell> + <gnm:Cell Row="10" Col="1">=B4*((A11/B3)-1)</gnm:Cell> + <gnm:Cell Row="10" Col="2" ValueType="40">49900</gnm:Cell> + <gnm:Cell Row="10" Col="3" ExprID="5">=B3*(1+(C11/B4))</gnm:Cell> + <gnm:Cell Row="11" Col="0" ValueType="40">3.2999999999999998</gnm:Cell> + <gnm:Cell Row="11" Col="1">=B4*((A12/B3)-1)</gnm:Cell> + <gnm:Cell Row="11" Col="2" ValueType="40">56200</gnm:Cell> + <gnm:Cell Row="11" Col="3" ExprID="6">=B3*(1+(C12/B4))</gnm:Cell> + </gnm:Cells> + <gnm:SheetLayout TopLeft="A1"/> + <gnm:Solver ModelType="0" ProblemType="0" MaxTime="60" MaxIter="1000" NonNeg="1" Discr="0" AutoScale="0" ProgramR="0" SensitivityR="0"/> + </gnm:Sheet> + <gnm:Sheet DisplayFormulas="0" HideZero="0" HideGrid="0" HideColHeader="0" HideRowHeader="0" DisplayOutlines="1" OutlineSymbolsBelow="1" OutlineSymbolsRight="1" Visibility="GNM_SHEET_VISIBILITY_VISIBLE" GridColor="0:0:0"> + <gnm:Name>Sheet2</gnm:Name> + <gnm:MaxCol>-1</gnm:MaxCol> + <gnm:MaxRow>-1</gnm:MaxRow> + <gnm:Zoom>1</gnm:Zoom> + <gnm:Names> + <gnm:Name> + <gnm:name>Print_Area</gnm:name> + <gnm:value>#REF!</gnm:value> + <gnm:position>A1</gnm:position> + </gnm:Name> + <gnm:Name> + <gnm:name>Sheet_Title</gnm:name> + <gnm:value>"Sheet2"</gnm:value> + <gnm:position>A1</gnm:position> + </gnm:Name> + </gnm:Names> + <gnm:PrintInformation> + <gnm:Margins> + <gnm:top Points="120" PrefUnit="mm"/> + <gnm:bottom Points="120" PrefUnit="mm"/> + <gnm:left Points="72" PrefUnit="mm"/> + <gnm:right Points="72" PrefUnit="mm"/> + <gnm:header Points="72" PrefUnit="mm"/> + <gnm:footer Points="72" PrefUnit="mm"/> + </gnm:Margins> + <gnm:Scale type="size_fit" cols="1" rows="1"/> + <gnm:vcenter value="0"/> + <gnm:hcenter value="0"/> + <gnm:grid value="0"/> + <gnm:even_if_only_styles value="0"/> + <gnm:monochrome value="0"/> + <gnm:draft value="0"/> + <gnm:titles value="0"/> + <gnm:do_not_print value="0"/> + <gnm:print_range value="GNM_PRINT_ACTIVE_SHEET"/> + <gnm:order>d_then_r</gnm:order> + <gnm:orientation>portrait</gnm:orientation> + <gnm:Header Left="" Middle="" Right=""/> + <gnm:Footer Left="" Middle="" Right=""/> + <gnm:paper>iso_a4</gnm:paper> + <gnm:comments placement="GNM_PRINT_COMMENTS_IN_PLACE"/> + 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b/multivoltage-uart/components/ap2127_ldo.pdf diff --git a/multivoltage-uart/components/cp2105_usb_uart.pdf b/multivoltage-uart/components/cp2105_usb_uart.pdf Binary files differnew file mode 100644 index 0000000..4a19bb8 --- /dev/null +++ b/multivoltage-uart/components/cp2105_usb_uart.pdf diff --git a/multivoltage-uart/mv-uart.brd b/multivoltage-uart/mv-uart.brd new file mode 100644 index 0000000..3fe4e90 --- /dev/null +++ b/multivoltage-uart/mv-uart.brd @@ -0,0 +1,1644 @@ +<?xml version="1.0" encoding="utf-8"?> +<!DOCTYPE eagle SYSTEM "eagle.dtd"> +<eagle version="7.6.0"> +<drawing> +<settings> +<setting alwaysvectorfont="no"/> +<setting verticaltext="up"/> +</settings> +<grid distance="0.15875" unitdist="mm" unit="mm" style="lines" multiple="1" display="no" altdistance="0.3175" altunitdist="mm" altunit="mm"/> +<layers> +<layer number="1" name="Top" color="4" fill="1" visible="yes" active="yes"/> +<layer number="2" name="Route2" color="1" fill="3" visible="no" active="yes"/> +<layer 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layer="51"/> +<rectangle x1="1.3034" y1="-0.9606" x2="2.6072" y2="-0.6242" layer="51"/> +<rectangle x1="1.3034" y1="-1.7596" x2="2.6072" y2="-1.4232" layer="51"/> +<rectangle x1="-6.4" y1="-3.85" x2="-4.425" y2="3.85" layer="41"/> +<rectangle x1="-2.175" y1="-3.85" x2="-0.45" y2="3.85" layer="41"/> +<rectangle x1="-4.425" y1="-2.925" x2="-2.175" y2="2.925" layer="41"/> +<rectangle x1="0.45" y1="-1.85" x2="1.225" y2="1.85" layer="41"/> +<rectangle x1="-0.45" y1="-1.3" x2="0.45" y2="1.3" layer="41"/> +<hole x="0" y="-1.75" drill="0.9"/> +<hole x="0" y="1.75" drill="0.9"/> +</package> +</packages> +</library> +<library name="Wuerth_Elektronik_eiSos_V6_20140807"> +<description><BR>Würth Elektronik -- EMC & Inductive Solutions<br><Hr> + +Version 7.0, March 6-th 2014 +<hr> +<BR><BR> +<TABLE BORDER=0 CELLSPACING=0 CELLPADDING=0> +<TR> +<TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3><BR><br> + &nbsp;&nbsp;&nbsp;&nbsp; &nbsp;<BR> + <BR> + <BR> + <BR><BR></FONT> + </TD> +<TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3><br> + -----<BR> + -----<BR> + -----<BR> + -----<BR> + -----<BR><BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER> <FONT FACE=ARIAL SIZE=3><br> + ---------------------------<BR> +<B><I><span style='font-size:26pt; + color:#FF6600;'>WE </span></i></b> +<BR> + ---------------------------<BR><b>Würth Elektronik</b></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3><br> + ---------O---<BR> + ----O--------<BR> + ---------O---<BR> + ----O--------<BR> + ---------O---<BR><BR></FONT> + </TD> + +<TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3><BR> + &nbsp;&nbsp;&nbsp;&nbsp; &nbsp;<BR> + <BR> + <BR> + <BR> + <BR><BR></FONT> + </TD> + </TR> + + <TR> + <TD COLSPAN=7>&nbsp; + </TD> + </TR> + +</TABLE> +<B>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;More than you expect<BR><BR><BR></B> + +<HR><BR> +<b>Würth Elektronik eiSos GmbH & Co. KG</b><br> +EMC & Inductive Solutions<br> + +Max-Eyth-Str.1<br> +D-74638 Waldenburg<br> +<br> +Tel: +49 (0)7942-945-0<br> +Fax:+49 (0)7942-945-5000<br> +<br> +<a href="http://www.we-online.com">http://www.we-online.com</a><br> +<a href="mailto:pm.hotline@we-online.de">pm.hotline@we-online.de</a> <BR><BR> +<br><HR><BR> +Neither CadSoft nor WE-eiSos does warrant that this library is error-free or <br> +that it meets your specific requirements.<br><BR> +Please contact us for more information.<br><BR><br> + +<HR> +Copyright: Würth Elektronik</description> +<packages> +<package name="WE-TVS_SOT23-6L"> +<description>TVS Diode Array WE-TVS</description> +<wire x1="-1.45" y1="-0.8" x2="1.45" y2="-0.8" width="0.127" layer="51"/> +<wire x1="1.45" y1="-0.8" x2="1.45" y2="0.8" width="0.127" layer="21"/> +<wire x1="1.45" y1="0.8" x2="-1.45" y2="0.8" width="0.127" layer="51"/> +<wire x1="-1.45" y1="0.8" x2="-1.45" y2="-0.8" width="0.127" layer="21"/> +<circle x="-1.21" y="-0.57" radius="0.02" width="0.127" layer="21"/> +<smd name="6" x="-0.95" y="1.25" dx="0.6" dy="1.1" layer="1"/> +<smd name="5" x="0" y="1.25" dx="0.6" dy="1.1" layer="1"/> +<smd name="4" x="0.95" y="1.25" dx="0.6" dy="1.1" layer="1"/> +<smd name="3" x="0.95" y="-1.25" dx="0.6" dy="1.1" layer="1"/> +<smd name="1" x="-0.95" y="-1.25" dx="0.6" dy="1.1" layer="1"/> +<smd name="2" x="0" y="-1.25" dx="0.6" dy="1.1" layer="1"/> +<text x="-2.032" y="-3.175" size="1.27" layer="25" rot="R90">>NAME</text> +<text x="3.302" y="-3.175" size="1.27" layer="27" rot="R90">>VALUE</text> +<rectangle x1="-1.2" y1="0.85" x2="-0.7" y2="1.5" layer="51"/> +<rectangle x1="0.705" y1="0.85" x2="1.205" y2="1.5" layer="51"/> +<rectangle x1="-0.2602" y1="0.8373" x2="0.2398" y2="1.4873" layer="51"/> +<rectangle x1="-0.2475" y1="-1.4868" x2="0.2525" y2="-0.8368" layer="51"/> +<rectangle x1="0.705" y1="-1.4741" x2="1.205" y2="-0.8241" layer="51"/> +<rectangle x1="-1.2" y1="-1.4868" x2="-0.7" y2="-0.8368" layer="51"/> +<rectangle x1="0.705" y1="-1.4868" x2="1.205" y2="-0.8368" layer="51"/> +<wire x1="-1.75" y1="2.25" x2="1.75" y2="2.25" width="0.127" layer="39"/> +<wire x1="1.75" y1="2.25" x2="1.75" y2="-2.25" width="0.127" layer="39"/> +<wire x1="1.75" y1="-2.25" x2="-1.75" y2="-2.25" width="0.127" layer="39"/> +<wire x1="-1.75" y1="-2.25" x2="-1.75" y2="2.25" width="0.127" layer="39"/> +</package> +</packages> +</library> +</libraries> +<attributes> +</attributes> +<variantdefs> +</variantdefs> +<classes> +<class number="0" name="default" width="0" drill="0"> +</class> +</classes> +<designrules name="sysmocom-basista-4layer-prototype *"> +<description language="de"><b>EAGLE Design Rules</b> +<p> +Die Standard-Design-Rules sind so gewählt, dass sie für +die meisten Anwendungen passen. Sollte ihre Platine +besondere Anforderungen haben, treffen Sie die erforderlichen +Einstellungen hier und speichern die Design Rules unter +einem neuen Namen ab.</description> +<description language="en"><b>sysmocom Design rules for Basista 4-layer prototype</b> +<p> +Please note that the minimum drill distance is "two times diameter plus 10-20% between the +center of the two drills". This cannot be expressed in EAGLE DRU, but has been computed +for the minimum (VIA) drill of 0.3mm as 0.36mm.</description> +<param name="layerSetup" value="(1*16)"/> +<param name="mtCopper" value="0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm"/> +<param name="mtIsolate" value="1.55mm 0.55mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.46mm"/> +<param name="mdWireWire" value="0.15mm"/> +<param name="mdWirePad" value="0.15mm"/> +<param name="mdWireVia" value="0.15mm"/> +<param name="mdPadPad" value="0.15mm"/> +<param name="mdPadVia" value="0.15mm"/> +<param name="mdViaVia" value="0.15mm"/> +<param name="mdSmdPad" value="0.15mm"/> +<param name="mdSmdVia" value="0.15mm"/> +<param name="mdSmdSmd" value="0.15mm"/> +<param name="mdViaViaSameLayer" value="8mil"/> +<param name="mnLayersViaInSmd" value="2"/> +<param name="mdCopperDimension" value="0.5mm"/> +<param name="mdDrill" value="0.36mm"/> +<param name="mdSmdStop" value="0mil"/> +<param name="msWidth" value="0.15mm"/> +<param name="msDrill" value="0.3mm"/> +<param name="msMicroVia" value="9.99mm"/> +<param name="msBlindViaRatio" value="0.5"/> +<param name="rvPadTop" value="0.25"/> +<param name="rvPadInner" value="0.25"/> +<param name="rvPadBottom" value="0.25"/> +<param name="rvViaOuter" value="0.25"/> +<param name="rvViaInner" value="0.25"/> +<param name="rvMicroViaOuter" value="0.25"/> +<param name="rvMicroViaInner" value="0.25"/> +<param name="rlMinPadTop" value="0.15mm"/> +<param name="rlMaxPadTop" value="20mil"/> +<param name="rlMinPadInner" value="0.15mm"/> +<param name="rlMaxPadInner" value="20mil"/> +<param name="rlMinPadBottom" value="0.15mm"/> +<param name="rlMaxPadBottom" value="20mil"/> +<param name="rlMinViaOuter" value="0.15mm"/> +<param name="rlMaxViaOuter" value="20mil"/> +<param name="rlMinViaInner" value="0.15mm"/> +<param name="rlMaxViaInner" value="20mil"/> +<param name="rlMinMicroViaOuter" value="4mil"/> +<param name="rlMaxMicroViaOuter" value="20mil"/> +<param name="rlMinMicroViaInner" value="4mil"/> +<param name="rlMaxMicroViaInner" value="20mil"/> +<param name="psTop" value="-1"/> +<param name="psBottom" value="-1"/> +<param name="psFirst" value="-1"/> +<param name="psElongationLong" value="100"/> +<param name="psElongationOffset" value="100"/> +<param name="mvStopFrame" value="1"/> +<param name="mvCreamFrame" value="0"/> +<param name="mlMinStopFrame" value="0.15mm"/> +<param name="mlMaxStopFrame" value="0.15mm"/> +<param name="mlMinCreamFrame" value="0mil"/> +<param name="mlMaxCreamFrame" value="0mil"/> +<param name="mlViaStopLimit" value="0mil"/> +<param name="srRoundness" value="0"/> +<param name="srMinRoundness" value="0mil"/> +<param name="srMaxRoundness" value="0mil"/> +<param name="slThermalIsolate" value="10mil"/> +<param name="slThermalsForVias" value="0"/> +<param name="dpMaxLengthDifference" value="10mm"/> +<param name="dpGapFactor" value="2.5"/> +<param name="checkGrid" value="0"/> +<param name="checkAngle" value="0"/> +<param name="checkFont" value="1"/> +<param name="checkRestrict" value="1"/> +<param name="useDiameter" value="13"/> +<param name="maxErrors" value="50"/> +</designrules> +<autorouter> +<pass name="Default"> +<param name="RoutingGrid" value="50mil"/> +<param name="AutoGrid" value="1"/> +<param name="Efforts" value="0"/> +<param name="TopRouterVariant" value="1"/> +<param name="tpViaShape" value="round"/> +<param name="PrefDir.1" value="a"/> +<param name="PrefDir.2" value="0"/> +<param name="PrefDir.3" value="0"/> +<param name="PrefDir.4" value="0"/> +<param name="PrefDir.5" value="0"/> +<param name="PrefDir.6" value="0"/> +<param name="PrefDir.7" value="0"/> +<param name="PrefDir.8" value="0"/> +<param name="PrefDir.9" value="0"/> +<param name="PrefDir.10" value="0"/> +<param name="PrefDir.11" value="0"/> +<param name="PrefDir.12" value="0"/> +<param name="PrefDir.13" value="0"/> +<param name="PrefDir.14" value="0"/> +<param name="PrefDir.15" value="0"/> +<param name="PrefDir.16" value="a"/> +<param name="cfVia" value="8"/> +<param name="cfNonPref" value="5"/> +<param name="cfChangeDir" value="2"/> +<param name="cfOrthStep" value="2"/> +<param name="cfDiagStep" value="3"/> +<param name="cfExtdStep" value="0"/> +<param name="cfBonusStep" value="1"/> +<param name="cfMalusStep" value="1"/> +<param name="cfPadImpact" value="4"/> +<param name="cfSmdImpact" value="4"/> +<param name="cfBusImpact" value="0"/> +<param name="cfHugging" value="3"/> +<param name="cfAvoid" value="4"/> +<param name="cfPolygon" value="10"/> +<param name="cfBase.1" value="0"/> +<param name="cfBase.2" value="1"/> +<param name="cfBase.3" value="1"/> +<param name="cfBase.4" value="1"/> +<param name="cfBase.5" value="1"/> +<param name="cfBase.6" value="1"/> +<param name="cfBase.7" value="1"/> +<param name="cfBase.8" value="1"/> +<param name="cfBase.9" value="1"/> +<param name="cfBase.10" value="1"/> +<param name="cfBase.11" value="1"/> +<param name="cfBase.12" value="1"/> +<param name="cfBase.13" value="1"/> +<param name="cfBase.14" value="1"/> +<param name="cfBase.15" value="1"/> +<param name="cfBase.16" value="0"/> +<param name="mnVias" value="20"/> +<param name="mnSegments" value="9999"/> +<param name="mnExtdSteps" value="9999"/> +<param name="mnRipupLevel" value="10"/> +<param name="mnRipupSteps" value="100"/> +<param name="mnRipupTotal" value="100"/> +</pass> +<pass name="Follow-me" refer="Default" active="yes"> +</pass> +<pass name="Busses" refer="Default" active="yes"> +<param name="cfNonPref" value="4"/> +<param name="cfBusImpact" value="4"/> +<param name="cfHugging" value="0"/> +<param name="mnVias" value="0"/> +</pass> +<pass name="Route" refer="Default" active="yes"> +</pass> +<pass name="Optimize1" refer="Default" active="yes"> +<param name="cfVia" value="99"/> +<param name="cfExtdStep" value="10"/> +<param name="cfHugging" value="1"/> +<param name="mnExtdSteps" value="1"/> +<param name="mnRipupLevel" value="0"/> +</pass> +<pass name="Optimize2" refer="Optimize1" active="yes"> +<param name="cfNonPref" value="0"/> +<param name="cfChangeDir" value="6"/> +<param name="cfExtdStep" value="0"/> +<param name="cfBonusStep" value="2"/> +<param name="cfMalusStep" value="2"/> +<param name="cfPadImpact" value="2"/> +<param name="cfSmdImpact" value="2"/> +<param name="cfHugging" value="0"/> +</pass> +<pass name="Optimize3" refer="Optimize2" active="yes"> +<param name="cfChangeDir" value="8"/> +<param name="cfPadImpact" value="0"/> +<param name="cfSmdImpact" value="0"/> +</pass> +<pass name="Optimize4" refer="Optimize3" active="yes"> +<param name="cfChangeDir" value="25"/> +</pass> +</autorouter> +<elements> +<element name="C1" library="rc-sysmocom" package="_0603" value="100n" x="19.05" y="21.59" rot="R180"/> +<element name="C2" library="rc-sysmocom" package="_0603" value="100n" x="16.51" y="24.765" rot="R90"/> +<element name="C3" library="rc-sysmocom" package="_0603" value="2.2u" x="17.78" y="24.765" rot="R90"/> +<element name="C4" library="rc-sysmocom" package="_0603" value="1u" x="15.24" y="24.765" rot="R90"/> +<element name="C5" library="rc-sysmocom" package="_0603" value="100n" x="34.29" y="14.605" rot="R90"/> +<element name="C6" library="rc-sysmocom" package="_0603" value="1u" x="30.48" y="2.8575" rot="R180"/> +<element name="C7" library="rc-sysmocom" package="_0603" value="1u" x="28.2575" y="8.5725" rot="R270"/> +<element name="C8" library="rc-sysmocom" package="_0603" value="1n" x="30.48" y="8.89" rot="R180"/> +<element name="C9" library="rc-sysmocom" package="_0603" value="4.7u" x="10.16" y="19.05" rot="R90"/> +<element name="JP1" library="pinhead" package="1X04" value="" x="24.13" y="16.51"/> +<element name="JP2" library="pinhead" package="1X06/90" value="" x="0" y="25.4" rot="R90"/> +<element name="JP3" library="pinhead" package="1X06/90" value="" x="0" y="8.89" rot="R90"/> +<element name="JP4" library="jumper" package="JP1" value="" x="24.13" y="12.7" rot="R270"/> +<element name="R1" library="rc-sysmocom" package="_0603" value="18k" x="30.48" y="10.4775"/> +<element name="R10" library="rc-sysmocom" package="_0603" value="10k" x="27.94" y="12.3825" rot="R90"/> +<element name="R2" library="rc-sysmocom" package="_0603" value="1M" x="33.02" y="14.605" rot="R90"/> +<element name="R3" library="rc-sysmocom" package="_0603" value="22.6k" x="24.765" y="6.35"/> +<element name="R4" library="rc-sysmocom" package="_0603" value="34k" x="24.765" y="7.62"/> +<element name="R5" library="rc-sysmocom" package="_0603" value="38.3k" x="24.765" y="8.89"/> +<element name="R6" library="rc-sysmocom" package="_0603" value="45.3k" x="24.765" y="5.08"/> +<element name="R7" library="rc-sysmocom" package="_0603" value="49.9k" x="24.765" y="3.81"/> +<element name="R8" library="rc-sysmocom" package="_0603" value="56.2k" x="24.765" y="2.54"/> +<element name="R9" library="rc-sysmocom" package="_0603" value="4.7k" x="15.24" y="28.2575" rot="R90"/> +<element name="SW1" library="laforge" package="DIP_SP6T" value="DIP_SP6T" x="15.875" y="6.35"/> +<element name="U1" library="laforge" package="TSOP-6" value="IP4234CZ6" x="26.67" y="20.32" rot="R180"> +<attribute name="OC_DIGIKEY" value="568-5869-1-ND" x="26.67" y="20.32" size="1.778" layer="27" rot="R180" display="off"/> +</element> +<element name="U2" library="usb-uart" package="QFN24_4X4" value="CP2105-GM" x="13.97" y="20.32" rot="R180"> +<attribute name="OC_DIGIKEY" value="336-2009-5-ND" x="13.97" y="20.32" size="1.778" layer="27" rot="R180" display="off"/> +</element> +<element name="U3" library="ldo" package="SOT23L" value="LDO_SHD_ADJ-AP2127K-ADJ" x="30.48" y="6.35"/> +<element name="X1" library="con-hirose" package="UX60-MB-5ST" value="MINI-USB-SHIELD-UX60-MB-5ST" x="33.02" y="20.32" rot="R180"> +<attribute name="OC_NEWARK" value="unknown" x="33.02" y="20.32" size="1.778" layer="27" rot="R180" display="off"/> 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+<wire x1="-7.62" y1="0" x2="1.27" y2="0" width="0.254" layer="94" style="shortdash"/> +<wire x1="1.27" y1="0" x2="2.54" y2="1.27" width="0.254" layer="94" style="shortdash" curve="90"/> +<wire x1="2.54" y1="1.27" x2="2.54" y2="19.05" width="0.254" layer="94" style="shortdash"/> +<wire x1="-7.62" y1="20.32" x2="1.27" y2="20.32" width="0.254" layer="94" style="shortdash"/> +<wire x1="1.27" y1="20.32" x2="2.54" y2="19.05" width="0.254" layer="94" style="shortdash" curve="-90"/> +<text x="3.81" y="-2.54" size="1.778" layer="95">>NAME</text> +<pin name="S1" x="-7.62" y="-2.54" visible="off" length="short" direction="pas" rot="R90"/> +<pin name="S2" x="-5.08" y="-2.54" visible="off" length="short" direction="pas" rot="R90"/> +<pin name="S3" x="-2.54" y="-2.54" visible="off" length="short" direction="pas" rot="R90"/> +<pin name="S4" x="0" y="-2.54" visible="off" length="short" direction="pas" rot="R90"/> +</symbol> +</symbols> +<devicesets> +<deviceset name="MINI-USB-SHIELD-" prefix="X"> +<description><b>MINI USB Connector</b><p> +Source: http://www.hirose.co.jp/cataloge_hp/e24000019.pdf</description> +<gates> +<gate name="G$1" symbol="MINI-USB" x="0" y="0"/> +<gate name="S" symbol="USB-SHIELD" x="5.08" y="-10.16" addlevel="request"/> +</gates> +<devices> +<device name="UX60A-MB-5ST" package="UX60A-MB-5ST"> +<connects> +<connect gate="G$1" pin="1" pad="1"/> +<connect gate="G$1" pin="2" pad="2"/> +<connect gate="G$1" pin="3" pad="3"/> +<connect gate="G$1" pin="4" pad="4"/> +<connect gate="G$1" pin="5" pad="5"/> +<connect gate="S" pin="S1" pad="M1"/> +<connect gate="S" pin="S2" pad="M2"/> +<connect gate="S" pin="S3" pad="M3"/> +<connect gate="S" pin="S4" pad="M4"/> +</connects> +<technologies> +<technology name=""> +<attribute name="MF" value="" constant="no"/> +<attribute name="MPN" value="" constant="no"/> +<attribute name="OC_FARNELL" value="unknown" constant="no"/> +<attribute name="OC_NEWARK" value="unknown" constant="no"/> +</technology> +</technologies> +</device> +<device name="UX60-MB-5ST" package="UX60-MB-5ST"> +<connects> +<connect gate="G$1" pin="1" pad="1"/> +<connect gate="G$1" pin="2" pad="2"/> +<connect gate="G$1" pin="3" pad="3"/> +<connect gate="G$1" pin="4" pad="4"/> +<connect gate="G$1" pin="5" pad="5"/> +<connect gate="S" pin="S1" pad="M1"/> +<connect gate="S" pin="S2" pad="M2"/> +<connect gate="S" pin="S3" pad="M3"/> +<connect gate="S" pin="S4" pad="M4"/> +</connects> +<technologies> +<technology name=""> +<attribute name="MF" value="" constant="no"/> +<attribute name="MPN" value="" constant="no"/> +<attribute name="OC_FARNELL" value="unknown" constant="no"/> +<attribute name="OC_NEWARK" value="unknown" constant="no"/> +</technology> +</technologies> +</device> +<device name="UX60-MB-5S8" package="UX60-MB-5S8"> +<connects> +<connect gate="G$1" pin="1" pad="1"/> +<connect gate="G$1" pin="2" pad="2"/> +<connect gate="G$1" pin="3" pad="3"/> +<connect gate="G$1" pin="4" pad="4"/> +<connect gate="G$1" pin="5" pad="5"/> +<connect gate="S" pin="S1" pad="M1"/> +<connect gate="S" pin="S2" pad="M2"/> +<connect gate="S" pin="S3" pad="M3"/> +<connect gate="S" pin="S4" pad="M4"/> +</connects> +<technologies> +<technology name=""> +<attribute name="MF" value="" constant="no"/> +<attribute name="MPN" value="" constant="no"/> +<attribute name="OC_FARNELL" value="unknown" constant="no"/> +<attribute name="OC_NEWARK" value="unknown" constant="no"/> +</technology> +</technologies> +</device> +</devices> +</deviceset> +</devicesets> +</library> +<library name="laforge"> +<description><b>PCB Matrix Packages</b><p></description> +<packages> +<package name="TSOP-6"> +<description>TSOP-6 CAS E318G-02 ISSUE V (ON Semiconductor)</description> +<wire x1="-1.5" y1="0.8" x2="1.5" y2="0.8" width="0.1016" layer="51"/> +<wire x1="1.5" y1="0.8" x2="1.5" y2="-0.8" width="0.1016" layer="21"/> +<wire x1="1.5" y1="-0.8" x2="-1.5" y2="-0.8" width="0.1016" layer="51"/> +<wire x1="-1.5" y1="-0.8" x2="-1.5" y2="0.8" width="0.1016" layer="21"/> +<circle x="-1.71" y="-0.5" radius="0.2136" width="0" layer="51"/> +<smd name="1" x="-0.95" y="-1.175" dx="0.6" dy="1.05" layer="1" roundness="50"/> +<smd name="2" x="0" y="-1.125" dx="0.6" dy="0.95" layer="1" roundness="50"/> +<smd name="3" x="0.95" y="-1.125" dx="0.6" dy="0.95" layer="1" roundness="50"/> +<smd name="4" x="0.95" y="1.125" dx="0.6" dy="0.95" layer="1" roundness="50" rot="R180"/> +<smd name="6" x="-0.95" y="1.125" dx="0.6" dy="0.95" layer="1" roundness="50" rot="R180"/> +<text x="-2.54" y="2.54" size="1.778" layer="25">>NAME</text> +<text x="-2.54" y="-3.81" size="1.778" layer="27">>VALUE</text> +<rectangle x1="-1.2" y1="0.825" x2="-0.7" y2="1.5" layer="51"/> +<rectangle x1="0.7" y1="0.825" x2="1.2" y2="1.5" layer="51"/> +<rectangle x1="0.7" y1="-1.5" x2="1.2" y2="-0.825" layer="51"/> +<rectangle x1="-0.25" y1="-1.5" x2="0.25" y2="-0.825" layer="51"/> +<rectangle x1="-1.2" y1="-1.5" x2="-0.7" y2="-0.825" layer="51"/> +<smd name="5" x="0" y="1.125" dx="0.6" dy="0.95" layer="1" roundness="50" rot="R180"/> +<rectangle x1="-0.25" y1="0.825" x2="0.25" y2="1.5" layer="51"/> +</package> +<package name="DIP_SP6T"> +<pad name="C" x="-1.27" y="3.81" drill="0.8"/> +<pad name="5" x="-1.27" y="-3.81" drill="0.8"/> +<pad name="4" x="-3.81" y="-3.81" drill="0.8"/> +<pad name="1" x="-3.81" y="3.81" drill="0.8" shape="square"/> +<pad name="2" x="1.27" y="3.81" drill="0.8"/> +<pad name="3" x="3.81" y="3.81" drill="0.8"/> +<pad name="6" x="3.81" y="-3.81" drill="0.8"/> +<pad name="C2" x="1.27" y="-3.81" drill="0.8"/> +<text x="-5.08" y="-3.81" size="1.27" layer="25" rot="R90">>NAME</text> +<text x="6.35" y="-3.81" size="1.27" layer="27" rot="R90">>VALUE</text> +</package> +</packages> +<symbols> +<symbol name="USB_TVS"> +<wire x1="-1.016" y1="0" x2="1.27" y2="-1.27" width="0.254" layer="94"/> +<wire x1="-1.651" y1="-1.27" x2="-1.016" y2="-1.27" width="0.254" layer="94"/> +<wire x1="-1.016" y1="-1.27" x2="-1.016" y2="0" width="0.254" layer="94"/> +<wire x1="1.27" y1="-1.27" x2="1.27" y2="1.27" width="0.254" layer="94"/> +<wire x1="-1.016" y1="0" x2="-1.016" y2="1.27" width="0.254" layer="94"/> +<wire x1="-1.651" y1="-1.27" x2="-1.651" y2="-1.016" width="0.254" layer="94"/> +<wire x1="-1.016" y1="1.27" x2="-0.381" y2="1.27" width="0.254" layer="94"/> +<wire x1="-0.381" y1="1.016" x2="-0.381" y2="1.27" width="0.254" layer="94"/> +<wire x1="1.27" y1="1.27" x2="-1.016" y2="0" width="0.254" layer="94"/> +<text x="-2.54" y="10.16" size="1.778" layer="95" rot="R180">>NAME</text> +<wire x1="-7.62" y1="7.62" x2="7.62" y2="7.62" width="0.254" layer="94"/> +<wire x1="7.62" y1="7.62" x2="7.62" y2="-7.62" width="0.254" layer="94"/> +<wire x1="7.62" y1="-7.62" x2="-7.62" y2="-7.62" width="0.254" layer="94"/> +<wire x1="-7.62" y1="-7.62" x2="-7.62" y2="7.62" width="0.254" layer="94"/> +<pin name="1A" x="-10.16" y="-2.54" length="short" direction="pas"/> +<pin name="2A" x="-10.16" y="2.54" length="short" direction="pas"/> +<pin name="2B" x="10.16" y="2.54" length="short" direction="pas" rot="R180"/> +<pin name="1B" x="10.16" y="-2.54" length="short" direction="pas" rot="R180"/> +<pin name="VCC" x="0" y="10.16" length="short" direction="pas" rot="R270"/> +<pin name="GND" x="0" y="-10.16" length="short" direction="pas" rot="R90"/> +</symbol> +<symbol name="SP6T"> +<pin name="3" x="5.08" y="0" visible="pin" length="middle" rot="R180"/> +<pin name="4" x="5.08" y="-2.54" length="middle" rot="R180"/> +<pin name="5" x="5.08" y="-5.08" visible="pin" length="middle" rot="R180"/> +<pin name="2" x="5.08" y="2.54" visible="pin" length="middle" rot="R180"/> +<pin name="1" x="5.08" y="5.08" visible="pin" length="middle" rot="R180"/> +<pin name="6" x="5.08" y="-7.62" visible="pin" length="middle" rot="R180"/> +<pin name="C" x="-15.24" y="0" visible="pin" length="middle"/> +<wire x1="-10.16" y1="0" x2="-2.54" y2="5.08" width="0.254" layer="94"/> +<text x="-12.7" y="7.62" size="1.778" layer="95">>NAME</text> +<text x="-15.24" y="-10.16" size="1.778" layer="96">>VALUE</text> +</symbol> +</symbols> +<devicesets> +<deviceset name="IP4234CZ6" prefix="U"> +<description>NXP IP4234CZ6 - Single USB 2.0 ESD protection to IEC 61000-4-2 level 4</description> +<gates> +<gate name="G$1" symbol="USB_TVS" x="0" y="0"/> +</gates> +<devices> +<device name="" package="TSOP-6"> +<connects> +<connect gate="G$1" pin="1A" pad="1"/> +<connect gate="G$1" pin="1B" pad="3"/> +<connect gate="G$1" pin="2A" pad="6"/> +<connect gate="G$1" pin="2B" pad="4"/> +<connect gate="G$1" pin="GND" pad="2"/> +<connect gate="G$1" pin="VCC" pad="5"/> +</connects> +<technologies> +<technology name=""> +<attribute name="OC_DIGIKEY" value="568-5869-1-ND" constant="no"/> +</technology> +</technologies> +</device> +</devices> +</deviceset> +<deviceset name="DIP_SP6T"> +<description>DIP SP6T switch COPAL SS-10-16</description> +<gates> +<gate name="G$1" symbol="SP6T" x="2.54" y="0"/> +</gates> +<devices> +<device name="" package="DIP_SP6T"> +<connects> +<connect gate="G$1" pin="1" pad="1"/> +<connect gate="G$1" pin="2" pad="2"/> +<connect gate="G$1" pin="3" pad="3"/> +<connect gate="G$1" pin="4" pad="4"/> +<connect gate="G$1" pin="5" pad="5"/> +<connect gate="G$1" pin="6" pad="6"/> +<connect gate="G$1" pin="C" pad="C"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +</devices> +</deviceset> +</devicesets> +</library> +<library name="supply1"> +<description><b>Supply Symbols</b><p> + GND, VCC, 0V, +5V, -5V, etc.<p> + Please keep in mind, that these devices are necessary for the + automatic wiring of the supply signals.<p> + The pin name defined in the symbol is identical to the net which is to be wired automatically.<p> + In this library the device names are the same as the pin names of the symbols, therefore the correct signal names appear next to the supply symbols in the schematic.<p> + <author>Created by librarian@cadsoft.de</author></description> +<packages> +</packages> +<symbols> +<symbol name="GND"> +<wire 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490-1281-2-ND]</li> +<li>22pF 50V 5% [Digikey: 490-1283-2-ND]</li> +<li>68pF 50V 5% [Digikey: 490-1289-2-ND]</li> +<li>0.1uF 10V 10% [Digikey: 490-1318-2-ND]</li> +<li>1.0uF 6.3V 10% [Digikey: 490-1320-2-ND]</li> +</ul> +<b>0603</b> - 0603 Surface Mount Capacitors +<ul> +<li>16 pF 50V 5% [Digikey: 445-5051-2-ND]</li> +<li>22 pF 50V [Digikey: PCC220ACVTR-ND]</li> +<li>33 pF 50V 5% [Digikey: 490-1415-1-ND]</li> +<li>56pF 50V 5% [Digikey: 490-1421-1-ND]</li> +<li>220pF 50V 5% [Digikey: 445-1285-1-ND]</li> +<li>680 pF 50V </li> +<li>2200 pF 50V 5% C0G [Digikey: 445-1297-1-ND]</li> +<li>5600 pF 100V 5% X7R [Digikey: 478-3711-1-ND]</li> +<li>0.1 µF 25V 10% [Digikey: PCC2277TR-ND]</li> +<li>0.22 µF 16V 10% X7R [Digikey: 445-1318-1-ND]</li> +<li>1.0 µF 25V 10% [Digikey: 445-5146-2-ND]</li> +</ul> +<b>0603</b> - RF Specific +<ul> +<li>3pF 250V +/-0.1pF RF [Digikey: 712-1347-1-ND]</li> +<li>18 pF 250V 5% [Digikey: 478-3505-1-ND or 712-1322-1-ND]</li> +<li>56 pF 250V 5% C0G RF [Digikey: 490-4867-1-ND]</li> +<li>68 pF 250V RF [Digikey: 490-4868-1-ND]</li> +</ul> +<b>0805</b> - 0805 Surface Mount Capacitors +<ul> +<li>220 pF 250V 2% <strong>RF</strong> Ceramic Capacitor [Digikey: 712-1398-1-ND]</li> +<li>1000 pF 50V 2% NP0 Ceramic Capacitor [Digikey: 478-3760-1-ND]</li> +<li>0.1 µF 25V 10% Ceramic Capacitor [Digikey: PCC1828TR-ND]</li> +<li>1.0 µF 16V 10% Ceramic Capacitor[Digikey: 490-1691-2-ND]</li> +<li>10.0 µF 10V 10% Ceramic Capacitor[Digikey: 709-1228-1-ND]</li> +<li>10.0 uF 16V 10% Ceramic Capacitor [Digikey: 478-5165-2-ND]</li> +<li>47 uF 6.3V 20% Ceramic Capacitor [Digikey: 587-1779-1-ND or 399-5506-1-ND]</li> +</ul> +</ul><b>1206</b> - 1206 Surface Mount Capacitors +<ul> +<li>47uF 10V 20% Ceramic Capacitor [Digikey: 490-5528-1-ND or 399-5508-1-ND or 445-6010-1-ND]</li> +<li>100uF 6.3V -20%, +80% Y5V Ceramic Capacitor (Digikey: 490-4512-1-ND, Mouser: 81-GRM31CF50J107ZE1L)</li> +</ul> +<b>1810</b> - 1810 Surface Mount Capacitors<br> +High volt MLC; no solder stop between for higher isolation</description> +<gates> +<gate name="G$1" symbol="CAPACITOR" x="0" y="-2.54"/> +</gates> +<devices> +<device name="0805" package="0805"> +<connects> +<connect gate="G$1" pin="1" pad="1"/> +<connect gate="G$1" pin="2" pad="2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="1206" package="1206"> +<connects> +<connect gate="G$1" pin="1" pad="1"/> +<connect gate="G$1" pin="2" pad="2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="0603" package="0603"> +<connects> +<connect gate="G$1" pin="1" pad="1"/> +<connect gate="G$1" pin="2" pad="2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="0402" package="0402"> +<connects> +<connect gate="G$1" pin="1" pad="1"/> +<connect gate="G$1" pin="2" pad="2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="_0402" package="_0402"> +<connects> +<connect gate="G$1" pin="1" pad="1"/> +<connect gate="G$1" pin="2" pad="2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="_0402MP" package="_0402MP"> +<connects> +<connect gate="G$1" pin="1" pad="1"/> +<connect gate="G$1" pin="2" pad="2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="_0603" package="_0603"> +<connects> +<connect gate="G$1" pin="1" pad="1"/> +<connect gate="G$1" pin="2" pad="2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="_0603MP" package="_0603MP"> +<connects> +<connect gate="G$1" pin="1" pad="1"/> +<connect gate="G$1" pin="2" pad="2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="_0805" package="_0805"> +<connects> +<connect gate="G$1" pin="1" pad="1"/> +<connect gate="G$1" pin="2" pad="2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="_0805MP" package="_0805MP"> +<connects> +<connect gate="G$1" pin="1" pad="1"/> +<connect gate="G$1" pin="2" pad="2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="CAP_HV_1808" package="C1808"> +<connects> +<connect gate="G$1" pin="1" pad="1"/> +<connect gate="G$1" pin="2" pad="2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="1210" package="C1210"> +<connects> +<connect gate="G$1" pin="1" pad="1"/> +<connect gate="G$1" pin="2" pad="2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="-C1812" package="C1812K"> +<connects> +<connect gate="G$1" pin="1" pad="1"/> +<connect gate="G$1" pin="2" pad="2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +</devices> +</deviceset> +</devicesets> +</library> +<library name="ldo"> +<description><b>PCB Matrix Packages</b><p></description> +<packages> +<package name="SOT223-6"> +<description>SOT223-6 ass found in TPS736xx data sheet</description> +<wire x1="-3.25" y1="1.75" x2="3.25" y2="1.75" width="0.127" layer="21"/> +<wire x1="-3.25" y1="-1.75" x2="3.25" y2="-1.75" width="0.127" layer="21"/> +<wire x1="-3.25" y1="1.75" x2="-3.25" y2="-1.75" width="0.127" layer="21"/> +<wire x1="3.25" y1="1.75" x2="3.25" y2="-1.75" width="0.127" layer="21"/> +<wire x1="-2.54" y1="-1.8" x2="-2.54" y2="-2.5" width="0.4064" layer="21"/> +<wire x1="-1.27" y1="-1.8" x2="-1.27" y2="-2.5" width="0.4064" layer="21"/> +<wire x1="0" y1="-1.8" x2="0" y2="-2.5" width="0.4064" layer="21"/> +<wire x1="1.27" y1="-1.8" x2="1.27" y2="-2.5" width="0.4064" layer="21"/> +<wire x1="2.54" y1="-1.8" x2="2.54" y2="-2.5" width="0.4064" layer="21"/> +<smd name="3" x="0" y="-2.7" dx="2.15" dy="0.55" layer="1" roundness="30" rot="R90"/> +<smd name="2" x="-1.27" y="-2.7" dx="2.15" dy="0.55" layer="1" roundness="30" rot="R90"/> +<smd name="1" x="-2.54" y="-2.7" dx="2.15" dy="0.55" layer="1" roundness="30" rot="R90"/> +<smd name="4" x="1.27" y="-2.7" dx="2.15" dy="0.55" layer="1" roundness="30" rot="R90"/> +<smd name="5" x="2.54" y="-2.7" dx="2.15" dy="0.55" layer="1" roundness="30" rot="R90"/> +<smd name="6" x="0" y="3" dx="3.6" dy="2.2" layer="1" roundness="30"/> +<text x="-3.8608" y="-2.27" size="1.27" layer="25" ratio="17" rot="R90">>NAME</text> +<text x="5.1308" y="-2.27" size="1.27" layer="27" ratio="17" rot="R90">>VALUE</text> +<rectangle x1="-1.6002" y1="1.8034" x2="1.6002" y2="3.6576" layer="51"/> +</package> +<package name="SOT23L"> +<wire x1="1.422" y1="0.81" x2="1.422" y2="-0.81" width="0.1524" layer="21"/> +<wire x1="1.422" y1="-0.81" x2="-1.422" y2="-0.81" width="0.1524" layer="51"/> +<wire x1="-1.422" y1="-0.81" x2="-1.422" y2="0.81" width="0.1524" layer="21"/> +<wire x1="-1.422" y1="0.81" x2="1.422" y2="0.81" width="0.1524" layer="51"/> +<wire x1="-0.522" y1="0.81" x2="0.522" y2="0.81" width="0.1524" layer="21"/> +<wire x1="-0.428" y1="-0.81" x2="-0.522" y2="-0.81" width="0.1524" layer="21"/> +<wire x1="0.522" y1="-0.81" x2="0.428" y2="-0.81" width="0.1524" layer="21"/> +<wire x1="-1.328" y1="-0.81" x2="-1.422" y2="-0.81" width="0.1524" layer="21"/> +<wire x1="1.422" y1="-0.81" x2="1.328" y2="-0.81" width="0.1524" layer="21"/> +<wire x1="1.328" y1="0.81" x2="1.422" y2="0.81" width="0.1524" layer="21"/> +<wire x1="-1.422" y1="0.81" x2="-1.328" y2="0.81" width="0.1524" layer="21"/> +<smd name="1" x="-0.95" y="-1.3" dx="0.55" dy="1.2" layer="1" roundness="30"/> +<smd name="2" x="0" y="-1.3" dx="0.55" dy="1.2" layer="1" roundness="30"/> +<smd name="3" x="0.95" y="-1.3" dx="0.55" dy="1.2" layer="1" roundness="30"/> +<smd name="4" x="0.95" y="1.3" dx="0.55" dy="1.2" layer="1" roundness="30"/> +<smd name="5" x="-0.95" y="1.3" dx="0.55" dy="1.2" layer="1" roundness="30"/> +<text x="-1.905" y="-1.905" size="1.27" layer="25" ratio="17" rot="R90">>NAME</text> +<text x="3.429" y="-1.905" size="1.27" layer="27" ratio="17" rot="R90">>VALUE</text> +<rectangle x1="-1.2" y1="-1.5" x2="-0.7" y2="-0.85" layer="51"/> +<rectangle x1="-0.25" y1="-1.5" x2="0.25" y2="-0.85" layer="51"/> +<rectangle x1="0.7" y1="-1.5" x2="1.2" y2="-0.85" layer="51"/> +<rectangle x1="0.7" y1="0.85" x2="1.2" y2="1.5" layer="51"/> +<rectangle x1="-1.2" y1="0.85" x2="-0.7" y2="1.5" layer="51"/> +</package> +</packages> +<symbols> +<symbol name="LDO_SHDN_ADJ"> +<wire x1="-10.16" y1="7.62" x2="10.16" y2="7.62" width="0.254" layer="94"/> +<wire x1="10.16" y1="7.62" x2="10.16" y2="-5.08" width="0.254" layer="94"/> +<wire x1="10.16" y1="-5.08" x2="-10.16" y2="-5.08" width="0.254" layer="94"/> +<wire x1="-10.16" y1="-5.08" x2="-10.16" y2="7.62" width="0.254" layer="94"/> +<text x="-3.302" y="-4.064" size="1.524" layer="95">GND</text> +<text x="-10.16" y="8.89" size="1.778" layer="95">>NAME</text> +<text x="0" y="8.89" size="1.778" layer="96">>VALUE</text> +<pin name="IN" x="-12.7" y="5.08" length="short" direction="in"/> +<pin name="OUT" x="12.7" y="5.08" length="short" direction="pas" rot="R180"/> +<pin name="!SHDN" x="-12.7" y="0" length="short" direction="in"/> +<pin name="ADJ" x="12.7" y="0" length="short" direction="pas" rot="R180"/> +<pin name="GND" x="0" y="-7.62" visible="pad" length="short" direction="pwr" rot="R90"/> +</symbol> +</symbols> +<devicesets> +<deviceset name="LDO_SHD_ADJ" prefix="U"> +<description>1000mA LDO</description> +<gates> +<gate name="G$1" symbol="LDO_SHDN_ADJ" x="0" y="-2.54"/> +</gates> +<devices> +<device name="-MCP1826-ADJE/DC" package="SOT223-6"> +<connects> +<connect gate="G$1" pin="!SHDN" pad="1"/> +<connect gate="G$1" pin="ADJ" pad="5"/> +<connect gate="G$1" pin="GND" pad="3 6"/> +<connect gate="G$1" pin="IN" pad="2"/> +<connect gate="G$1" pin="OUT" pad="4"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="-AP2127K-ADJ" package="SOT23L"> +<connects> +<connect gate="G$1" pin="!SHDN" pad="3"/> +<connect gate="G$1" pin="ADJ" pad="4"/> +<connect gate="G$1" pin="GND" pad="2"/> +<connect gate="G$1" pin="IN" pad="1"/> +<connect gate="G$1" pin="OUT" pad="5"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +</devices> +</deviceset> +</devicesets> +</library> +<library name="jumper"> +<description><b>Jumpers</b><p> +<author>Created by librarian@cadsoft.de</author></description> +<packages> +<package name="JP1"> +<description><b>JUMPER</b></description> +<wire x1="-1.016" y1="0" x2="-1.27" y2="0.254" width="0.1524" layer="21"/> +<wire x1="-1.016" y1="0" x2="-1.27" y2="-0.254" width="0.1524" layer="21"/> +<wire x1="1.016" y1="0" x2="1.27" y2="0.254" width="0.1524" layer="21"/> +<wire x1="1.016" y1="0" x2="1.27" y2="-0.254" width="0.1524" layer="21"/> +<wire x1="1.27" y1="-0.254" x2="1.27" y2="-2.286" width="0.1524" layer="21"/> +<wire x1="1.016" y1="-2.54" x2="1.27" y2="-2.286" width="0.1524" layer="21"/> +<wire x1="1.27" y1="2.286" x2="1.016" y2="2.54" width="0.1524" layer="21"/> +<wire x1="1.27" y1="2.286" x2="1.27" y2="0.254" width="0.1524" layer="21"/> +<wire x1="1.016" y1="2.54" x2="-1.016" y2="2.54" width="0.1524" layer="21"/> +<wire x1="-1.27" y1="2.286" x2="-1.016" y2="2.54" width="0.1524" layer="21"/> +<wire x1="-1.27" y1="2.286" x2="-1.27" y2="0.254" width="0.1524" layer="21"/> +<wire x1="-1.27" y1="-0.254" x2="-1.27" y2="-2.286" width="0.1524" layer="21"/> +<wire x1="-1.016" y1="-2.54" x2="-1.27" y2="-2.286" width="0.1524" layer="21"/> +<wire x1="-1.016" y1="-2.54" x2="1.016" y2="-2.54" width="0.1524" layer="21"/> +<pad name="1" x="0" y="-1.27" drill="0.9144" shape="long"/> +<pad name="2" x="0" y="1.27" drill="0.9144" shape="long"/> +<text x="-1.651" y="-2.54" size="1.27" layer="25" ratio="10" rot="R90">>NAME</text> +<text x="2.921" y="-2.54" size="1.27" layer="27" ratio="10" rot="R90">>VALUE</text> +<rectangle x1="-0.3048" y1="0.9652" x2="0.3048" y2="1.5748" layer="51"/> +<rectangle x1="-0.3048" y1="-1.5748" x2="0.3048" y2="-0.9652" layer="51"/> +</package> +</packages> +<symbols> +<symbol name="JP2E"> +<wire x1="0" y1="0" x2="0" y2="1.27" width="0.1524" layer="94"/> +<wire x1="0" y1="2.54" x2="0" y2="1.27" width="0.4064" layer="94"/> +<wire x1="2.54" y1="0" x2="2.54" y2="1.27" width="0.1524" layer="94"/> +<wire x1="2.54" y1="2.54" x2="2.54" y2="1.27" width="0.4064" layer="94"/> +<wire x1="-0.635" y1="0" x2="3.175" y2="0" width="0.4064" layer="94"/> +<wire x1="3.175" y1="0" x2="3.175" y2="0.635" width="0.4064" layer="94"/> +<wire x1="3.175" y1="0.635" x2="-0.635" y2="0.635" width="0.4064" layer="94"/> +<wire x1="-0.635" y1="0.635" x2="-0.635" y2="0" width="0.4064" layer="94"/> +<text x="-1.27" y="0" size="1.778" layer="95" rot="R90">>NAME</text> +<text x="5.715" y="0" size="1.778" layer="96" rot="R90">>VALUE</text> +<pin name="1" x="0" y="-2.54" visible="pad" length="short" direction="pas" rot="R90"/> +<pin name="2" x="2.54" y="-2.54" visible="pad" length="short" direction="pas" rot="R90"/> +</symbol> +</symbols> +<devicesets> +<deviceset name="JP1E" prefix="JP" uservalue="yes"> +<description><b>JUMPER</b></description> +<gates> +<gate name="A" symbol="JP2E" x="2.54" y="0"/> +</gates> +<devices> +<device name="" package="JP1"> +<connects> +<connect gate="A" pin="1" pad="1"/> +<connect gate="A" pin="2" pad="2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +</devices> +</deviceset> +</devicesets> +</library> +<library name="frames"> +<description><b>Frames for Sheet and Layout</b></description> +<packages> +</packages> +<symbols> +<symbol name="DINA3_L"> +<frame x1="0" y1="0" x2="388.62" y2="264.16" columns="4" rows="4" layer="94" border-left="no" border-top="no" border-right="no" border-bottom="no"/> +</symbol> +<symbol name="DOCFIELD"> +<wire x1="0" y1="0" x2="71.12" y2="0" width="0.1016" layer="94"/> +<wire x1="101.6" y1="15.24" x2="87.63" y2="15.24" width="0.1016" layer="94"/> +<wire x1="0" y1="0" x2="0" y2="5.08" width="0.1016" layer="94"/> +<wire x1="0" y1="5.08" x2="71.12" y2="5.08" width="0.1016" layer="94"/> +<wire x1="0" y1="5.08" x2="0" y2="15.24" width="0.1016" layer="94"/> +<wire x1="101.6" y1="15.24" x2="101.6" y2="5.08" width="0.1016" layer="94"/> +<wire x1="71.12" y1="5.08" x2="71.12" y2="0" width="0.1016" layer="94"/> +<wire x1="71.12" y1="5.08" x2="87.63" y2="5.08" width="0.1016" layer="94"/> +<wire x1="71.12" y1="0" x2="101.6" y2="0" width="0.1016" layer="94"/> +<wire x1="87.63" y1="15.24" x2="87.63" y2="5.08" width="0.1016" layer="94"/> +<wire x1="87.63" y1="15.24" x2="0" y2="15.24" width="0.1016" layer="94"/> +<wire x1="87.63" y1="5.08" x2="101.6" y2="5.08" width="0.1016" layer="94"/> +<wire x1="101.6" y1="5.08" x2="101.6" y2="0" width="0.1016" layer="94"/> +<wire x1="0" y1="15.24" x2="0" y2="22.86" width="0.1016" layer="94"/> +<wire x1="101.6" y1="35.56" x2="0" y2="35.56" width="0.1016" layer="94"/> +<wire x1="101.6" y1="35.56" x2="101.6" y2="22.86" width="0.1016" layer="94"/> +<wire x1="0" y1="22.86" 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+</device> +</devices> +</deviceset> +<deviceset name="PINHD-1X4" prefix="JP" uservalue="yes"> +<description><b>PIN HEADER</b></description> +<gates> +<gate name="A" symbol="PINHD4" x="0" y="0"/> +</gates> +<devices> +<device name="" package="1X04"> +<connects> +<connect gate="A" pin="1" pad="1"/> +<connect gate="A" pin="2" pad="2"/> +<connect gate="A" pin="3" pad="3"/> +<connect gate="A" pin="4" pad="4"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="/90" package="1X04/90"> +<connects> +<connect gate="A" pin="1" pad="1"/> +<connect gate="A" pin="2" pad="2"/> +<connect gate="A" pin="3" pad="3"/> +<connect gate="A" pin="4" pad="4"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +</devices> +</deviceset> +<deviceset name="PINHD-1X7" prefix="JP" uservalue="yes"> +<description><b>PIN HEADER</b></description> +<gates> +<gate name="A" symbol="PINHD7" x="0" y="0"/> +</gates> +<devices> +<device name="" package="1X07"> +<connects> +<connect gate="A" pin="1" pad="1"/> +<connect gate="A" pin="2" pad="2"/> +<connect gate="A" pin="3" pad="3"/> +<connect gate="A" pin="4" pad="4"/> +<connect gate="A" pin="5" pad="5"/> +<connect gate="A" pin="6" pad="6"/> +<connect gate="A" pin="7" pad="7"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="/90" package="1X07/90"> +<connects> +<connect gate="A" pin="1" pad="1"/> +<connect gate="A" pin="2" pad="2"/> +<connect gate="A" pin="3" pad="3"/> +<connect gate="A" pin="4" pad="4"/> +<connect gate="A" pin="5" pad="5"/> +<connect gate="A" pin="6" pad="6"/> +<connect gate="A" pin="7" pad="7"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +</devices> +</deviceset> +</devicesets> +</library> +<library name="Wuerth_Elektronik_eiSos_V6_20140807"> +<description><BR>Würth Elektronik -- EMC & Inductive Solutions<br><Hr> + +Version 7.0, March 6-th 2014 +<hr> +<BR><BR> +<TABLE BORDER=0 CELLSPACING=0 CELLPADDING=0> +<TR> +<TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3><BR><br> + &nbsp;&nbsp;&nbsp;&nbsp; &nbsp;<BR> + <BR> + <BR> + <BR><BR></FONT> + </TD> +<TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3><br> + -----<BR> + -----<BR> + -----<BR> + -----<BR> + -----<BR><BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER> <FONT FACE=ARIAL SIZE=3><br> + ---------------------------<BR> +<B><I><span style='font-size:26pt; + color:#FF6600;'>WE </span></i></b> +<BR> + ---------------------------<BR><b>Würth Elektronik</b></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3><br> + ---------O---<BR> + ----O--------<BR> + ---------O---<BR> + ----O--------<BR> + ---------O---<BR><BR></FONT> + </TD> + +<TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3><BR> + &nbsp;&nbsp;&nbsp;&nbsp; &nbsp;<BR> + <BR> + <BR> + <BR> + <BR><BR></FONT> + </TD> + </TR> + + <TR> + <TD COLSPAN=7>&nbsp; + </TD> + </TR> + +</TABLE> +<B>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;More than you expect<BR><BR><BR></B> + +<HR><BR> +<b>Würth Elektronik eiSos GmbH & Co. KG</b><br> +EMC & Inductive Solutions<br> + +Max-Eyth-Str.1<br> +D-74638 Waldenburg<br> +<br> +Tel: +49 (0)7942-945-0<br> +Fax:+49 (0)7942-945-5000<br> +<br> +<a href="http://www.we-online.com">http://www.we-online.com</a><br> +<a href="mailto:pm.hotline@we-online.de">pm.hotline@we-online.de</a> <BR><BR> +<br><HR><BR> +Neither CadSoft nor WE-eiSos does warrant that this library is error-free or <br> +that it meets your specific requirements.<br><BR> +Please contact us for more information.<br><BR><br> + +<HR> +Copyright: Würth Elektronik</description> +<packages> +<package name="WE-TVS_SOT23-6L"> +<description>TVS Diode Array WE-TVS</description> +<wire x1="-1.45" y1="-0.8" x2="1.45" y2="-0.8" width="0.127" layer="51"/> +<wire x1="1.45" y1="-0.8" x2="1.45" y2="0.8" width="0.127" layer="21"/> +<wire x1="1.45" y1="0.8" x2="-1.45" y2="0.8" width="0.127" layer="51"/> +<wire x1="-1.45" y1="0.8" x2="-1.45" y2="-0.8" width="0.127" layer="21"/> +<circle x="-1.21" y="-0.57" radius="0.02" width="0.127" layer="21"/> +<smd name="6" x="-0.95" y="1.25" dx="0.6" dy="1.1" layer="1"/> +<smd name="5" x="0" y="1.25" dx="0.6" dy="1.1" layer="1"/> +<smd name="4" x="0.95" y="1.25" dx="0.6" dy="1.1" layer="1"/> +<smd name="3" x="0.95" y="-1.25" dx="0.6" dy="1.1" layer="1"/> +<smd name="1" x="-0.95" y="-1.25" dx="0.6" dy="1.1" layer="1"/> +<smd name="2" x="0" y="-1.25" dx="0.6" dy="1.1" layer="1"/> +<text x="-2.032" y="-3.175" size="1.27" layer="25" rot="R90">>NAME</text> +<text x="3.302" y="-3.175" size="1.27" layer="27" rot="R90">>VALUE</text> +<rectangle x1="-1.2" y1="0.85" x2="-0.7" y2="1.5" layer="51"/> +<rectangle x1="0.705" y1="0.85" x2="1.205" y2="1.5" layer="51"/> +<rectangle x1="-0.2602" y1="0.8373" x2="0.2398" y2="1.4873" layer="51"/> +<rectangle x1="-0.2475" y1="-1.4868" x2="0.2525" y2="-0.8368" layer="51"/> +<rectangle x1="0.705" y1="-1.4741" x2="1.205" y2="-0.8241" layer="51"/> +<rectangle x1="-1.2" y1="-1.4868" x2="-0.7" y2="-0.8368" layer="51"/> +<rectangle x1="0.705" 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+<polygon width="0.254" layer="94"> +<vertex x="1.905" y="1.905"/> +<vertex x="2.54" y="3.175"/> +<vertex x="3.175" y="1.905"/> +</polygon> +<polygon width="0.254" layer="94"> +<vertex x="6.985" y="1.905"/> +<vertex x="7.62" y="3.175"/> +<vertex x="8.255" y="1.905"/> +</polygon> +<polygon width="0.254" layer="94"> +<vertex x="6.985" y="-3.175"/> +<vertex x="7.62" y="-1.905"/> +<vertex x="8.255" y="-3.175"/> +</polygon> +<polygon width="0.254" layer="94"> +<vertex x="1.905" y="-3.175"/> +<vertex x="2.54" y="-1.905"/> +<vertex x="3.175" y="-3.175"/> +</polygon> +<polygon width="0.254" layer="94"> +<vertex x="-3.175" y="-3.175"/> +<vertex x="-2.54" y="-1.905"/> +<vertex x="-1.905" y="-3.175"/> +</polygon> +<polygon width="0.254" layer="94"> +<vertex x="-8.255" y="-3.175"/> +<vertex x="-7.62" y="-1.905"/> +<vertex x="-6.985" y="-3.175"/> +</polygon> +</symbol> +</symbols> +<devicesets> +<deviceset name="WE-TVS_824013" prefix="D"> +<description><b>TVS Diode Array WE-TVS, High Speed Series</b><br><br> + +- Low capazity<br> +- No leakage current<br> +- Low clamping voltage<br> +- high ESD voltage protection<br><br> + +-- 3.3 VDC Application<br> + + +<br><a href="http://katalog.we-online.de/media/images/eisos/VarTVS_highspeed_pf2.jpg.jpg" title="Enlarge picture"> +<img src="http://katalog.we-online.de/media/images/eisos/VarTVS_highspeed_pf2.jpg" width="320"></a><p> +Details see: <a href="http://katalog.we-online.de/en/pbs/WE-TVS_High_Speed?">http://katalog.we-online.de/en/pbs/WE-TVS_High_Speed?</a><p> + +</b>Updated by Dan Xu 2014-07-11<br> +</b>2014 (C) Würth Elektronik</description> +<gates> +<gate name="G$1" symbol="WE-TVS_6RTR4" x="0" y="0"/> +</gates> +<devices> +<device name="" package="WE-TVS_SOT23-6L"> +<connects> +<connect gate="G$1" pin="1" pad="1"/> +<connect gate="G$1" pin="2" pad="3"/> +<connect gate="G$1" pin="3" pad="4"/> +<connect gate="G$1" pin="4" pad="6"/> +<connect gate="G$1" pin="GND" pad="2"/> +<connect gate="G$1" pin="VDD" pad="5"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +</devices> +</deviceset> +</devicesets> +</library> +</libraries> +<attributes> +</attributes> +<variantdefs> +</variantdefs> +<classes> +<class number="0" name="default" width="0" drill="0"> +</class> +</classes> +<parts> +<part name="U2" library="usb-uart" deviceset="CP2105-GM" device=""/> +<part name="X1" library="con-hirose" deviceset="MINI-USB-SHIELD-" device="UX60-MB-5ST"/> +<part name="U1" library="laforge" deviceset="IP4234CZ6" device=""/> +<part name="GND1" library="supply1" deviceset="GND" device=""/> +<part name="R1" library="rc-sysmocom" deviceset="RESISTOR" device="_0603" value="18k"/> +<part name="C1" library="rc-sysmocom" deviceset="CAP_CERAMIC" device="_0603" value="100n"/> +<part name="GND2" library="supply1" deviceset="GND" device=""/> +<part name="C2" library="rc-sysmocom" deviceset="CAP_CERAMIC" device="_0603" value="100n"/> +<part name="C3" library="rc-sysmocom" deviceset="CAP_CERAMIC" device="_0603" value="2.2u"/> +<part name="GND3" library="supply1" deviceset="GND" device=""/> +<part name="C4" library="rc-sysmocom" deviceset="CAP_CERAMIC" device="_0603" value="1u"/> +<part name="GND4" library="supply1" deviceset="GND" device=""/> +<part name="C5" library="rc-sysmocom" deviceset="CAP_CERAMIC" device="_0603" value="100n"/> +<part name="R2" library="rc-sysmocom" deviceset="RESISTOR" device="_0603" value="1M"/> +<part name="SW1" library="laforge" deviceset="DIP_SP6T" device=""/> +<part name="U3" library="ldo" deviceset="LDO_SHD_ADJ" device="-AP2127K-ADJ"/> +<part name="GND5" library="supply1" deviceset="GND" device=""/> +<part name="R3" library="rc-sysmocom" deviceset="RESISTOR" device="_0603" value="22.6k"/> +<part name="R4" library="rc-sysmocom" deviceset="RESISTOR" device="_0603" value="34k"/> +<part name="R5" library="rc-sysmocom" deviceset="RESISTOR" device="_0603" value="38.3k"/> +<part name="R6" library="rc-sysmocom" deviceset="RESISTOR" device="_0603" value="45.3k"/> +<part name="R7" library="rc-sysmocom" deviceset="RESISTOR" device="_0603" value="49.9k"/> +<part name="R8" library="rc-sysmocom" deviceset="RESISTOR" device="_0603" value="56.2k"/> +<part name="GND6" library="supply1" deviceset="GND" device=""/> +<part name="C6" library="rc-sysmocom" deviceset="CAP_CERAMIC" device="_0603" value="1u"/> +<part name="C7" library="rc-sysmocom" deviceset="CAP_CERAMIC" device="_0603" value="1u"/> +<part name="GND7" library="supply1" deviceset="GND" device=""/> +<part name="GND8" library="supply1" deviceset="GND" device=""/> +<part name="C8" library="rc-sysmocom" deviceset="CAP_CERAMIC" device="_0603" value="1n"/> +<part name="R9" library="rc-sysmocom" deviceset="RESISTOR" device="_0603" value="4.7k"/> +<part name="C9" library="rc-sysmocom" deviceset="CAP_CERAMIC" device="_0603" value="4.7u"/> +<part name="GND9" library="supply1" deviceset="GND" device=""/> +<part name="R10" library="rc-sysmocom" deviceset="RESISTOR" device="_0603" value="10k"/> +<part name="GND10" library="supply1" deviceset="GND" device=""/> +<part name="FRAME1" library="frames" deviceset="DINA3_L" device=""/> +<part name="JP2" library="pinhead" deviceset="PINHD-1X6" device="/90"/> +<part name="JP3" library="pinhead" deviceset="PINHD-1X6" device="/90"/> +<part name="GND11" library="supply1" deviceset="GND" device=""/> +<part name="GND12" library="supply1" deviceset="GND" device=""/> +<part name="JP4" library="jumper" deviceset="JP1E" device=""/> +<part name="JP1" library="pinhead" deviceset="PINHD-1X4" device=""/> +<part name="GND13" library="supply1" deviceset="GND" device=""/> +<part name="R11" library="rc-sysmocom" deviceset="RESISTOR" device="_0603" value="47"/> +<part name="R12" library="rc-sysmocom" deviceset="RESISTOR" device="_0603" value="47"/> +<part name="R13" library="rc-sysmocom" deviceset="RESISTOR" device="_0603" value="47"/> +<part name="R14" library="rc-sysmocom" deviceset="RESISTOR" device="_0603" value="47"/> +<part name="R15" library="rc-sysmocom" deviceset="RESISTOR" device="_0603" value="47"/> +<part name="R16" library="rc-sysmocom" deviceset="RESISTOR" device="_0603" value="47"/> +<part name="R17" library="rc-sysmocom" deviceset="RESISTOR" device="_0603" value="47"/> +<part name="R18" library="rc-sysmocom" deviceset="RESISTOR" device="_0603" value="47"/> +<part name="D1" library="Wuerth_Elektronik_eiSos_V6_20140807" deviceset="WE-TVS_824013" device=""/> +<part name="D2" library="Wuerth_Elektronik_eiSos_V6_20140807" deviceset="WE-TVS_824013" device=""/> +<part name="GND14" library="supply1" deviceset="GND" device=""/> +<part name="GND15" library="supply1" deviceset="GND" device=""/> +<part name="JP5" library="pinhead" deviceset="PINHD-1X7" device=""/> +<part name="GND16" library="supply1" deviceset="GND" device=""/> +<part name="GND17" library="supply1" deviceset="GND" device=""/> +</parts> +<sheets> +<sheet> +<plain> +</plain> +<instances> +<instance part="U2" gate="A" x="261.62" y="83.82" rot="R180"/> +<instance part="X1" gate="G$1" x="353.06" y="96.52"/> +<instance part="X1" gate="S" x="358.14" y="86.36"/> +<instance part="U1" gate="G$1" x="332.74" y="96.52" rot="MR0"/> +<instance part="GND1" gate="1" x="355.6" y="63.5"/> +<instance part="R1" gate="G$1" x="228.6" y="180.34"/> +<instance part="C1" gate="G$1" x="292.1" y="55.88" rot="R90"/> +<instance part="GND2" gate="1" x="292.1" y="48.26"/> +<instance part="C2" gate="G$1" x="297.18" y="73.66" rot="R90"/> +<instance part="C3" gate="G$1" x="304.8" y="73.66" rot="R90"/> +<instance part="GND3" gate="1" x="307.34" y="81.28" rot="R90"/> +<instance part="C4" gate="G$1" x="289.56" y="78.74" rot="R90"/> +<instance part="GND4" gate="1" x="292.1" y="86.36" rot="R90"/> +<instance part="C5" gate="G$1" x="358.14" y="73.66" rot="R90"/> +<instance part="R2" gate="G$1" x="350.52" y="73.66" rot="R90"/> +<instance part="SW1" gate="G$1" x="254" y="180.34"/> +<instance part="U3" gate="G$1" x="251.46" y="210.82"/> +<instance part="GND5" gate="1" x="251.46" y="200.66"/> +<instance part="R3" gate="G$1" x="269.24" y="190.5"/> +<instance part="R4" gate="G$1" x="279.4" y="185.42"/> +<instance part="R5" gate="G$1" x="269.24" y="180.34"/> +<instance part="R6" gate="G$1" x="279.4" y="175.26"/> +<instance part="R7" gate="G$1" x="269.24" y="170.18"/> +<instance part="R8" gate="G$1" x="279.4" y="165.1"/> +<instance part="GND6" gate="1" x="218.44" y="180.34" rot="R270"/> +<instance part="C6" gate="G$1" x="220.98" y="208.28" rot="R90"/> +<instance part="C7" gate="G$1" x="292.1" y="208.28" rot="R90"/> +<instance part="GND7" gate="1" x="220.98" y="200.66"/> +<instance part="GND8" gate="1" x="292.1" y="203.2"/> +<instance part="C8" gate="G$1" x="274.32" y="208.28" rot="R90"/> +<instance part="R9" gate="G$1" x="294.64" y="111.76" rot="R90"/> +<instance part="C9" gate="G$1" x="220.98" y="58.42" rot="R90"/> +<instance part="GND9" gate="1" x="220.98" y="50.8"/> +<instance part="R10" gate="G$1" x="231.14" y="208.28" rot="R90"/> +<instance part="GND10" gate="1" x="231.14" y="200.66"/> +<instance part="FRAME1" gate="G$1" x="0" y="0"/> +<instance part="FRAME1" gate="G$2" x="287.02" y="0"/> +<instance part="JP2" gate="A" x="180.34" y="152.4" rot="R180"/> +<instance part="JP3" gate="A" x="180.34" y="121.92" rot="R180"/> +<instance part="GND11" gate="1" x="190.5" y="137.16"/> +<instance part="GND12" gate="1" x="190.5" y="106.68"/> +<instance part="JP4" gate="A" x="307.34" y="208.28" rot="R180"/> +<instance part="JP1" gate="A" x="236.22" y="144.78" rot="R180"/> +<instance part="GND13" gate="1" x="243.84" y="132.08"/> +<instance part="R11" gate="G$1" x="213.36" y="93.98"/> +<instance part="R12" gate="G$1" x="203.2" y="91.44"/> +<instance part="R13" gate="G$1" x="213.36" y="88.9"/> +<instance part="R14" gate="G$1" x="203.2" y="86.36"/> +<instance part="R15" gate="G$1" x="213.36" y="83.82"/> +<instance part="R16" gate="G$1" x="203.2" y="81.28"/> +<instance part="R17" gate="G$1" x="213.36" y="78.74"/> +<instance part="R18" gate="G$1" x="203.2" y="76.2"/> +<instance part="D1" gate="G$1" x="154.94" y="152.4" rot="R90"/> +<instance part="D2" gate="G$1" x="154.94" y="121.92" rot="R90"/> +<instance part="GND14" gate="1" x="165.1" y="152.4" rot="R90"/> +<instance part="GND15" gate="1" x="165.1" y="121.92" rot="R90"/> +<instance part="JP5" gate="A" x="261.62" y="139.7" rot="R180"/> +<instance part="GND16" gate="1" x="269.24" y="124.46"/> +<instance part="GND17" gate="1" x="289.56" y="109.22" rot="R180"/> +</instances> +<busses> +</busses> +<nets> +<net name="_USB_DN" class="0"> +<segment> +<pinref part="U1" gate="G$1" pin="2A"/> +<pinref part="X1" gate="G$1" pin="2"/> +<wire x1="342.9" y1="99.06" x2="347.98" y2="99.06" width="0.1524" layer="91"/> +</segment> +</net> +<net name="_USB_DP" class="0"> +<segment> +<pinref part="U1" gate="G$1" pin="1A"/> +<wire x1="342.9" y1="93.98" x2="345.44" y2="93.98" width="0.1524" layer="91"/> +<wire x1="345.44" y1="93.98" x2="345.44" y2="96.52" width="0.1524" layer="91"/> +<pinref part="X1" gate="G$1" pin="3"/> +<wire x1="345.44" y1="96.52" x2="347.98" y2="96.52" width="0.1524" layer="91"/> +</segment> +</net> +<net name="N$5" class="0"> +<segment> +<pinref part="X1" gate="S" pin="S1"/> +<wire x1="350.52" y1="83.82" x2="350.52" y2="81.28" width="0.1524" layer="91"/> +<wire x1="350.52" y1="81.28" x2="353.06" y2="81.28" width="0.1524" layer="91"/> +<pinref part="X1" gate="S" pin="S4"/> +<wire x1="353.06" y1="81.28" x2="355.6" y2="81.28" width="0.1524" layer="91"/> +<wire x1="355.6" y1="81.28" x2="358.14" y2="81.28" width="0.1524" layer="91"/> +<wire x1="358.14" y1="81.28" x2="358.14" y2="83.82" width="0.1524" layer="91"/> +<pinref part="X1" gate="S" pin="S3"/> +<wire x1="355.6" y1="83.82" x2="355.6" y2="81.28" width="0.1524" layer="91"/> +<pinref part="X1" gate="S" pin="S2"/> +<wire x1="353.06" y1="83.82" x2="353.06" y2="81.28" width="0.1524" layer="91"/> +<junction x="353.06" y="81.28"/> +<junction x="355.6" y="81.28"/> +<junction x="358.14" y="81.28"/> +<junction x="350.52" y="81.28"/> +<pinref part="R2" gate="G$1" pin="2"/> +<wire x1="350.52" y1="81.28" x2="350.52" y2="78.74" width="0.1524" layer="91"/> +<pinref part="C5" gate="G$1" pin="2"/> +<wire x1="358.14" y1="81.28" x2="358.14" y2="78.74" width="0.1524" layer="91"/> +</segment> +</net> +<net name="USB_VBUS" class="0"> +<segment> +<pinref part="U1" gate="G$1" pin="VCC"/> +<wire x1="332.74" y1="106.68" x2="332.74" y2="109.22" width="0.1524" layer="91"/> +<wire x1="332.74" y1="109.22" x2="345.44" y2="109.22" width="0.1524" layer="91"/> +<wire x1="345.44" y1="109.22" x2="345.44" y2="101.6" width="0.1524" layer="91"/> +<pinref part="X1" gate="G$1" pin="1"/> +<wire x1="345.44" y1="101.6" x2="347.98" y2="101.6" width="0.1524" layer="91"/> +<junction x="332.74" y="109.22"/> +<wire x1="332.74" y1="109.22" x2="314.96" y2="109.22" width="0.1524" layer="91"/> +<wire x1="314.96" y1="109.22" x2="314.96" y2="91.44" width="0.1524" layer="91"/> +<pinref part="U2" gate="A" pin="REGIN"/> +<pinref part="C4" gate="G$1" pin="1"/> +<wire x1="287.02" y1="76.2" x2="289.56" y2="76.2" width="0.1524" layer="91"/> +<wire x1="289.56" y1="76.2" x2="294.64" y2="76.2" width="0.1524" layer="91"/> +<wire x1="294.64" y1="76.2" x2="294.64" y2="91.44" width="0.1524" layer="91"/> +<junction x="289.56" y="76.2"/> +<junction x="294.64" y="91.44"/> +<pinref part="U2" gate="A" pin="VBUS"/> +<wire x1="287.02" y1="91.44" x2="294.64" y2="91.44" width="0.1524" layer="91"/> +<wire x1="314.96" y1="91.44" x2="294.64" y2="91.44" width="0.1524" layer="91"/> +<label x="302.26" y="91.44" size="1.27" layer="95"/> +</segment> +<segment> +<pinref part="U3" gate="G$1" pin="IN"/> +<wire x1="238.76" y1="215.9" x2="238.76" y2="220.98" width="0.1524" layer="91"/> +<wire x1="238.76" y1="220.98" x2="220.98" y2="220.98" width="0.1524" layer="91"/> +<pinref part="C6" gate="G$1" pin="2"/> +<wire x1="220.98" y1="220.98" x2="218.44" y2="220.98" width="0.1524" layer="91"/> +<wire x1="220.98" y1="213.36" x2="220.98" y2="220.98" width="0.1524" layer="91"/> +<junction x="220.98" y="220.98"/> +<label x="218.44" y="220.98" size="1.27" layer="95" rot="R180" xref="yes"/> +</segment> +<segment> +<pinref part="JP1" gate="A" pin="4"/> +<wire x1="238.76" y1="147.32" x2="243.84" y2="147.32" width="0.1524" layer="91"/> +<label x="243.84" y="147.32" size="1.27" layer="95" xref="yes"/> +</segment> +</net> +<net name="USB_DN" class="0"> +<segment> +<pinref part="U1" gate="G$1" pin="2B"/> +<wire x1="322.58" y1="99.06" x2="317.5" y2="99.06" width="0.1524" layer="91"/> +<wire x1="317.5" y1="99.06" x2="317.5" y2="96.52" width="0.1524" layer="91"/> +<pinref part="U2" gate="A" pin="D_MINUS"/> +<wire x1="317.5" y1="96.52" x2="287.02" y2="96.52" width="0.1524" layer="91"/> +<label x="302.26" y="96.52" size="1.27" layer="95"/> +</segment> +</net> +<net name="USB_DP" class="0"> +<segment> +<pinref part="U1" gate="G$1" pin="1B"/> +<pinref part="U2" gate="A" pin="D_PLUS"/> +<wire x1="287.02" y1="93.98" x2="322.58" y2="93.98" width="0.1524" layer="91"/> +<label x="302.26" y="93.98" size="1.27" layer="95"/> +</segment> +</net> +<net name="GND" class="0"> +<segment> +<pinref part="X1" gate="G$1" pin="5"/> +<wire x1="347.98" y1="91.44" x2="342.9" y2="91.44" width="0.1524" layer="91"/> +<wire x1="342.9" y1="91.44" x2="342.9" y2="66.04" width="0.1524" layer="91"/> +<pinref part="U1" gate="G$1" pin="GND"/> +<wire x1="332.74" y1="86.36" x2="332.74" y2="66.04" width="0.1524" layer="91"/> +<wire x1="332.74" y1="66.04" x2="342.9" y2="66.04" width="0.1524" layer="91"/> +<wire x1="342.9" y1="66.04" x2="350.52" y2="66.04" width="0.1524" layer="91"/> +<junction x="342.9" y="66.04"/> +<pinref part="GND1" gate="1" pin="GND"/> +<wire x1="350.52" y1="66.04" x2="355.6" y2="66.04" width="0.1524" layer="91"/> +<wire x1="355.6" y1="66.04" x2="358.14" y2="66.04" width="0.1524" layer="91"/> +<junction x="355.6" y="66.04"/> +<pinref part="R2" gate="G$1" pin="1"/> +<wire x1="350.52" y1="68.58" x2="350.52" y2="66.04" width="0.1524" layer="91"/> +<pinref part="C5" gate="G$1" pin="1"/> +<wire x1="358.14" y1="71.12" x2="358.14" y2="66.04" width="0.1524" layer="91"/> +<junction x="350.52" y="66.04"/> +</segment> +<segment> +<pinref part="C1" gate="G$1" pin="1"/> +<wire x1="292.1" y1="53.34" x2="292.1" y2="50.8" width="0.1524" layer="91"/> +<pinref part="GND2" gate="1" pin="GND"/> +</segment> +<segment> +<pinref part="C2" gate="G$1" pin="2"/> +<wire x1="297.18" y1="78.74" x2="297.18" y2="81.28" width="0.1524" layer="91"/> +<pinref part="C3" gate="G$1" pin="2"/> +<wire x1="297.18" y1="81.28" x2="304.8" y2="81.28" width="0.1524" layer="91"/> +<wire x1="304.8" y1="81.28" x2="304.8" y2="78.74" width="0.1524" layer="91"/> +<pinref part="GND3" gate="1" pin="GND"/> +<junction x="304.8" y="81.28"/> +</segment> +<segment> +<pinref part="C4" gate="G$1" pin="2"/> +<pinref part="U2" gate="A" pin="GND"/> +<wire x1="289.56" y1="86.36" x2="287.02" y2="86.36" width="0.1524" layer="91"/> +<wire x1="289.56" y1="86.36" x2="289.56" y2="83.82" width="0.1524" layer="91"/> +<junction x="289.56" y="86.36"/> +<pinref part="GND4" gate="1" pin="GND"/> +</segment> +<segment> +<pinref part="U3" gate="G$1" pin="GND"/> +<pinref part="GND5" gate="1" pin="GND"/> +</segment> +<segment> +<pinref part="R1" gate="G$1" pin="1"/> +<pinref part="GND6" gate="1" pin="GND"/> +<wire x1="220.98" y1="180.34" x2="223.52" y2="180.34" width="0.1524" layer="91"/> +</segment> +<segment> +<pinref part="C6" gate="G$1" pin="1"/> +<pinref part="GND7" gate="1" pin="GND"/> +<wire x1="220.98" y1="205.74" x2="220.98" y2="203.2" width="0.1524" layer="91"/> +</segment> +<segment> +<pinref part="C7" gate="G$1" pin="1"/> +<pinref part="GND8" gate="1" pin="GND"/> +</segment> +<segment> +<pinref part="C9" gate="G$1" pin="1"/> +<pinref part="GND9" gate="1" pin="GND"/> +<wire x1="220.98" y1="55.88" x2="220.98" y2="53.34" width="0.1524" layer="91"/> +</segment> +<segment> +<pinref part="R10" gate="G$1" pin="1"/> +<pinref part="GND10" gate="1" pin="GND"/> +</segment> +<segment> +<pinref part="JP2" gate="A" pin="1"/> +<wire x1="182.88" y1="144.78" x2="190.5" y2="144.78" width="0.1524" layer="91"/> +<wire x1="190.5" y1="144.78" x2="190.5" y2="139.7" width="0.1524" layer="91"/> +<pinref part="GND11" gate="1" pin="GND"/> +</segment> +<segment> +<pinref part="JP3" gate="A" pin="1"/> +<wire x1="182.88" y1="114.3" x2="190.5" y2="114.3" width="0.1524" layer="91"/> +<wire x1="190.5" y1="114.3" x2="190.5" y2="109.22" width="0.1524" layer="91"/> +<pinref part="GND12" gate="1" pin="GND"/> +</segment> +<segment> +<pinref part="JP1" gate="A" pin="1"/> +<wire x1="238.76" y1="139.7" x2="243.84" y2="139.7" width="0.1524" layer="91"/> +<wire x1="243.84" y1="139.7" x2="243.84" y2="134.62" width="0.1524" layer="91"/> +<pinref part="GND13" gate="1" pin="GND"/> +</segment> +<segment> +<pinref part="D1" gate="G$1" pin="GND"/> +<pinref part="GND14" gate="1" pin="GND"/> +</segment> +<segment> +<pinref part="D2" gate="G$1" pin="GND"/> +<pinref part="GND15" gate="1" pin="GND"/> +</segment> +<segment> +<pinref part="JP5" gate="A" pin="1"/> +<wire x1="264.16" y1="132.08" x2="269.24" y2="132.08" width="0.1524" layer="91"/> +<wire x1="269.24" y1="132.08" x2="269.24" y2="127" width="0.1524" layer="91"/> +<pinref part="GND16" gate="1" pin="GND"/> +</segment> +<segment> +<pinref part="U2" gate="A" pin="HEAT_TAB"/> +<pinref part="GND17" gate="1" pin="GND"/> +<wire x1="287.02" y1="104.14" x2="289.56" y2="104.14" width="0.1524" layer="91"/> +<wire x1="289.56" y1="104.14" x2="289.56" y2="106.68" width="0.1524" layer="91"/> +</segment> +</net> +<net name="VIO" class="0"> +<segment> +<pinref part="U2" gate="A" pin="VIO"/> +<wire x1="287.02" y1="63.5" x2="292.1" y2="63.5" width="0.1524" layer="91"/> +<pinref part="C1" gate="G$1" pin="2"/> +<wire x1="292.1" y1="63.5" x2="294.64" y2="63.5" width="0.1524" layer="91"/> +<wire x1="292.1" y1="60.96" x2="292.1" y2="63.5" width="0.1524" layer="91"/> +<junction x="292.1" y="63.5"/> +<label x="294.64" y="63.5" size="1.27" layer="95" xref="yes"/> +</segment> +<segment> +<pinref part="R9" gate="G$1" pin="2"/> +<wire x1="294.64" y1="116.84" x2="294.64" y2="119.38" width="0.1524" layer="91"/> +<label x="294.64" y="119.38" size="1.27" layer="95" xref="yes"/> +</segment> +<segment> +<pinref part="JP2" gate="A" pin="6"/> +<wire x1="182.88" y1="157.48" x2="190.5" y2="157.48" width="0.1524" layer="91"/> +<label x="190.5" y="157.48" size="1.27" layer="95" xref="yes"/> +</segment> +<segment> +<pinref part="JP3" gate="A" pin="6"/> +<wire x1="182.88" y1="127" x2="190.5" y2="127" width="0.1524" layer="91"/> +<label x="190.5" y="127" size="1.27" layer="95" xref="yes"/> +</segment> +<segment> +<pinref part="JP4" gate="A" pin="1"/> +<wire x1="307.34" y1="210.82" x2="307.34" y2="215.9" width="0.1524" layer="91"/> +<wire x1="307.34" y1="215.9" x2="309.88" y2="215.9" width="0.1524" layer="91"/> +<label x="309.88" y="215.9" size="1.27" layer="95" xref="yes"/> +</segment> +<segment> +<pinref part="JP1" gate="A" pin="2"/> +<wire x1="238.76" y1="142.24" x2="243.84" y2="142.24" width="0.1524" layer="91"/> +<label x="243.84" y="142.24" size="1.27" layer="95" xref="yes"/> +</segment> +<segment> +<pinref part="D2" gate="G$1" pin="VDD"/> +<wire x1="147.32" y1="121.92" x2="144.78" y2="121.92" width="0.1524" layer="91"/> +<label x="144.78" y="121.92" size="1.27" layer="95" rot="R180" xref="yes"/> +</segment> +<segment> +<pinref part="D1" gate="G$1" pin="VDD"/> +<wire x1="147.32" y1="152.4" x2="144.78" y2="152.4" width="0.1524" layer="91"/> +<label x="144.78" y="152.4" size="1.27" layer="95" rot="R180" xref="yes"/> +</segment> +<segment> +<pinref part="JP5" gate="A" pin="7"/> +<wire x1="264.16" y1="147.32" x2="269.24" y2="147.32" width="0.1524" layer="91"/> +<label x="269.24" y="147.32" size="1.27" layer="95" xref="yes"/> +</segment> +</net> +<net name="VDD_3V45" class="0"> +<segment> +<pinref part="U2" gate="A" pin="VDD"/> +<wire x1="287.02" y1="68.58" x2="297.18" y2="68.58" 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y="180.34"/> +<pinref part="C8" gate="G$1" pin="1"/> +<wire x1="274.32" y1="205.74" x2="274.32" y2="203.2" width="0.1524" layer="91"/> +<wire x1="274.32" y1="203.2" x2="266.7" y2="203.2" width="0.1524" layer="91"/> +<junction x="266.7" y="203.2"/> +</segment> +</net> +<net name="!SUSPEND" class="0"> +<segment> +<pinref part="U3" gate="G$1" pin="!SHDN"/> +<wire x1="238.76" y1="210.82" x2="236.22" y2="210.82" width="0.1524" layer="91"/> +<wire x1="236.22" y1="210.82" x2="236.22" y2="213.36" width="0.1524" layer="91"/> +<label x="236.22" y="218.44" size="1.27" layer="95" rot="R180" xref="yes"/> +<pinref part="R10" gate="G$1" pin="2"/> +<wire x1="236.22" y1="213.36" x2="236.22" y2="218.44" width="0.1524" layer="91"/> +<wire x1="231.14" y1="213.36" x2="236.22" y2="213.36" width="0.1524" layer="91"/> +<junction x="236.22" y="213.36"/> +</segment> +<segment> +<pinref part="U2" gate="A" pin="!SUSPEND/RI_SCI"/> +<wire x1="233.68" y1="96.52" x2="231.14" y2="96.52" width="0.1524" layer="91"/> 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pin="RTS_SCI"/> +<wire x1="233.68" y1="91.44" x2="208.28" y2="91.44" width="0.1524" layer="91"/> +<pinref part="R12" gate="G$1" pin="2"/> +</segment> +</net> +<net name="N$12" class="0"> +<segment> +<pinref part="U2" gate="A" pin="TXD_SCI"/> +<wire x1="233.68" y1="88.9" x2="218.44" y2="88.9" width="0.1524" layer="91"/> +<pinref part="R13" gate="G$1" pin="2"/> +</segment> +</net> +<net name="N$13" class="0"> +<segment> +<pinref part="U2" gate="A" pin="RXD_SCI"/> +<wire x1="233.68" y1="86.36" x2="208.28" y2="86.36" width="0.1524" layer="91"/> +<pinref part="R14" gate="G$1" pin="2"/> +</segment> +</net> +<net name="N$14" class="0"> +<segment> +<pinref part="U2" gate="A" pin="TXD_ECI"/> +<wire x1="233.68" y1="81.28" x2="233.68" y2="83.82" width="0.1524" layer="91"/> +<wire x1="233.68" y1="83.82" x2="218.44" y2="83.82" width="0.1524" layer="91"/> +<pinref part="R15" gate="G$1" pin="2"/> +</segment> +</net> +<net name="N$16" class="0"> +<segment> +<pinref part="U2" gate="A" pin="RXD_ECI"/> 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layer="91"/> +<pinref part="R18" gate="G$1" pin="2"/> +</segment> +</net> +<net name="GPIO.2_SCI" class="0"> +<segment> +<pinref part="U2" gate="A" pin="GPIO.2_SCI/DSR_SCI"/> +<wire x1="233.68" y1="104.14" x2="231.14" y2="104.14" width="0.1524" layer="91"/> +<label x="231.14" y="104.14" size="1.27" layer="95" rot="R180" xref="yes"/> +</segment> +<segment> +<pinref part="JP5" gate="A" pin="6"/> +<wire x1="264.16" y1="144.78" x2="269.24" y2="144.78" width="0.1524" layer="91"/> +<label x="269.24" y="144.78" size="1.27" layer="95" xref="yes"/> +</segment> +</net> +<net name="GPIO.1_SCI" class="0"> +<segment> +<pinref part="U2" gate="A" pin="GPIO.1_SCI/DTR_SCI"/> +<wire x1="233.68" y1="101.6" x2="231.14" y2="101.6" width="0.1524" layer="91"/> +<label x="231.14" y="101.6" size="1.27" layer="95" rot="R180" xref="yes"/> +</segment> +<segment> +<pinref part="JP5" gate="A" pin="5"/> +<wire x1="264.16" y1="142.24" x2="269.24" y2="142.24" width="0.1524" layer="91"/> +<label x="269.24" y="142.24" size="1.27" layer="95" xref="yes"/> +</segment> +</net> +<net name="GPIO.0_SCI" class="0"> +<segment> +<pinref part="U2" gate="A" pin="GPIO.0_SCI/DCD_SCI"/> +<wire x1="233.68" y1="99.06" x2="231.14" y2="99.06" width="0.1524" layer="91"/> +<label x="231.14" y="99.06" size="1.27" layer="95" rot="R180" xref="yes"/> +</segment> +<segment> +<pinref part="JP5" gate="A" pin="4"/> +<wire x1="264.16" y1="139.7" x2="269.24" y2="139.7" width="0.1524" layer="91"/> +<label x="269.24" y="139.7" size="1.27" layer="95" xref="yes"/> +</segment> +</net> +<net name="GPIO.1_ECI" class="0"> +<segment> +<pinref part="U2" gate="A" pin="GPIO.1_ECI/DSR_ECI"/> +<wire x1="233.68" y1="71.12" x2="231.14" y2="71.12" width="0.1524" layer="91"/> +<label x="231.14" y="71.12" size="1.27" layer="95" rot="R180" xref="yes"/> +</segment> +<segment> +<pinref part="JP5" gate="A" pin="3"/> +<wire x1="264.16" y1="137.16" x2="269.24" y2="137.16" width="0.1524" layer="91"/> +<label x="269.24" y="137.16" size="1.27" layer="95" xref="yes"/> +</segment> +</net> +<net name="GPIO.0_ECI" class="0"> +<segment> +<pinref part="U2" gate="A" pin="GPIO.0_ECI/DTR_ECI"/> +<wire x1="233.68" y1="68.58" x2="231.14" y2="68.58" width="0.1524" layer="91"/> +<label x="231.14" y="68.58" size="1.27" layer="95" rot="R180" xref="yes"/> +</segment> +<segment> +<pinref part="JP5" gate="A" pin="2"/> +<wire x1="264.16" y1="134.62" x2="269.24" y2="134.62" width="0.1524" layer="91"/> +<label x="269.24" y="134.62" size="1.27" layer="95" xref="yes"/> +</segment> +</net> +<net name="TXD_SCI" class="0"> +<segment> +<pinref part="JP3" gate="A" pin="2"/> +<wire x1="182.88" y1="116.84" x2="190.5" y2="116.84" width="0.1524" layer="91"/> +<label x="190.5" y="116.84" size="1.27" layer="95" xref="yes"/> +</segment> +<segment> +<wire x1="208.28" y1="88.9" x2="193.04" y2="88.9" width="0.1524" layer="91"/> +<label x="193.04" y="88.9" size="1.27" layer="95" rot="R180" xref="yes"/> +<pinref part="R13" gate="G$1" pin="1"/> +</segment> +<segment> +<pinref part="D2" gate="G$1" pin="2"/> +<wire x1="162.56" y1="127" x2="165.1" y2="127" width="0.1524" layer="91"/> +<label x="165.1" y="127" size="1.27" layer="95" xref="yes"/> +</segment> +</net> +<net name="RXD_SCI" class="0"> +<segment> +<pinref part="JP3" gate="A" pin="3"/> +<wire x1="182.88" y1="119.38" x2="190.5" y2="119.38" width="0.1524" layer="91"/> +<label x="190.5" y="119.38" size="1.27" layer="95" xref="yes"/> +</segment> +<segment> +<wire x1="198.12" y1="86.36" x2="193.04" y2="86.36" width="0.1524" layer="91"/> +<label x="193.04" y="86.36" size="1.27" layer="95" rot="R180" xref="yes"/> +<pinref part="R14" gate="G$1" pin="1"/> +</segment> +<segment> +<pinref part="D2" gate="G$1" pin="3"/> +<wire x1="147.32" y1="127" x2="144.78" y2="127" width="0.1524" layer="91"/> +<label x="144.78" y="127" size="1.27" layer="95" rot="R180" xref="yes"/> +</segment> +</net> +<net name="CTS_SCI" class="0"> +<segment> +<pinref part="JP3" gate="A" pin="4"/> +<wire x1="182.88" y1="121.92" x2="190.5" y2="121.92" width="0.1524" layer="91"/> +<label x="190.5" y="121.92" size="1.27" layer="95" xref="yes"/> +</segment> +<segment> +<wire x1="208.28" y1="93.98" x2="193.04" y2="93.98" width="0.1524" layer="91"/> +<label x="193.04" y="93.98" size="1.27" layer="95" rot="R180" xref="yes"/> +<pinref part="R11" gate="G$1" pin="1"/> +</segment> +<segment> +<pinref part="D2" gate="G$1" pin="1"/> +<wire x1="162.56" y1="116.84" x2="165.1" y2="116.84" width="0.1524" layer="91"/> +<label x="165.1" y="116.84" size="1.27" layer="95" xref="yes"/> +</segment> +</net> +<net name="RTS_SCI" class="0"> +<segment> +<pinref part="JP3" gate="A" pin="5"/> +<wire x1="182.88" y1="124.46" x2="190.5" y2="124.46" width="0.1524" layer="91"/> +<label x="190.5" y="124.46" size="1.27" layer="95" xref="yes"/> +</segment> +<segment> +<wire x1="198.12" y1="91.44" x2="193.04" y2="91.44" width="0.1524" layer="91"/> +<label x="193.04" y="91.44" size="1.27" layer="95" rot="R180" xref="yes"/> +<pinref part="R12" gate="G$1" pin="1"/> +</segment> +<segment> +<pinref part="D2" gate="G$1" pin="4"/> +<wire x1="147.32" y1="116.84" x2="144.78" y2="116.84" width="0.1524" layer="91"/> +<label x="144.78" y="116.84" size="1.27" layer="95" rot="R180" xref="yes"/> +</segment> +</net> +<net name="TXD_ECI" class="0"> +<segment> +<pinref part="JP2" gate="A" pin="2"/> +<wire x1="182.88" y1="147.32" x2="190.5" y2="147.32" width="0.1524" layer="91"/> +<label x="190.5" y="147.32" size="1.27" layer="95" xref="yes"/> +</segment> +<segment> +<wire x1="208.28" y1="83.82" x2="193.04" y2="83.82" width="0.1524" layer="91"/> +<label x="193.04" y="83.82" size="1.27" layer="95" rot="R180" xref="yes"/> +<pinref part="R15" gate="G$1" pin="1"/> +</segment> +<segment> +<pinref part="D1" gate="G$1" pin="2"/> +<wire x1="162.56" y1="157.48" x2="165.1" y2="157.48" width="0.1524" layer="91"/> +<label x="165.1" y="157.48" size="1.27" layer="95" xref="yes"/> +</segment> +</net> +<net name="RXD_ECI" class="0"> +<segment> +<pinref part="JP2" gate="A" pin="3"/> +<wire x1="182.88" y1="149.86" x2="190.5" y2="149.86" width="0.1524" layer="91"/> +<label x="190.5" y="149.86" size="1.27" layer="95" xref="yes"/> +</segment> +<segment> +<wire x1="198.12" y1="81.28" x2="193.04" y2="81.28" width="0.1524" layer="91"/> +<label x="193.04" y="81.28" size="1.27" layer="95" rot="R180" xref="yes"/> +<pinref part="R16" gate="G$1" pin="1"/> +</segment> +<segment> +<pinref part="D1" gate="G$1" pin="3"/> +<wire x1="147.32" y1="157.48" x2="144.78" y2="157.48" width="0.1524" layer="91"/> +<label x="144.78" y="157.48" size="1.27" layer="95" rot="R180" xref="yes"/> +</segment> +</net> +<net name="CTS_ECI" class="0"> +<segment> +<pinref part="JP2" gate="A" pin="4"/> +<wire x1="182.88" y1="152.4" x2="190.5" y2="152.4" width="0.1524" layer="91"/> +<label x="190.5" y="152.4" size="1.27" layer="95" xref="yes"/> +</segment> +<segment> +<wire x1="208.28" y1="78.74" x2="193.04" y2="78.74" width="0.1524" layer="91"/> +<label x="193.04" y="78.74" size="1.27" layer="95" rot="R180" xref="yes"/> +<pinref part="R17" gate="G$1" pin="1"/> +</segment> +<segment> +<pinref part="D1" gate="G$1" pin="1"/> +<wire x1="162.56" y1="147.32" x2="165.1" y2="147.32" width="0.1524" layer="91"/> +<label x="165.1" y="147.32" size="1.27" layer="95" xref="yes"/> +</segment> +</net> +<net name="RTS_ECI" class="0"> +<segment> +<pinref part="JP2" gate="A" pin="5"/> +<wire x1="182.88" y1="154.94" x2="190.5" y2="154.94" width="0.1524" layer="91"/> +<label x="190.5" y="154.94" size="1.27" layer="95" xref="yes"/> +</segment> +<segment> +<wire x1="198.12" y1="76.2" x2="193.04" y2="76.2" width="0.1524" layer="91"/> +<label x="193.04" y="76.2" size="1.27" layer="95" rot="R180" xref="yes"/> +<pinref part="R18" gate="G$1" pin="1"/> +</segment> +<segment> +<pinref part="D1" gate="G$1" pin="4"/> +<wire x1="147.32" y1="147.32" x2="144.78" y2="147.32" width="0.1524" layer="91"/> +<label x="144.78" y="147.32" size="1.27" layer="95" rot="R180" xref="yes"/> +</segment> +</net> +</nets> +</sheet> +</sheets> +<errors> +<approved hash="104,1,287.02,68.58,U2,VDD,VDD_3V45,,,"/> +<approved hash="202,1,347.98,93.98,X1,4,,,,"/> +<approved hash="104,1,147.32,152.4,D1,VDD,VIO,,,"/> +<approved hash="104,1,147.32,121.92,D2,VDD,VIO,,,"/> +<approved hash="113,1,194.206,131.976,FRAME1,,,,,"/> +</errors> +</schematic> +</drawing> +</eagle> |