diff options
| author | patacongo <patacongo@7fd9a85b-ad96-42d3-883c-3090e2eb8679> | 2010-08-31 03:51:19 +0000 |
|---|---|---|
| committer | patacongo <patacongo@7fd9a85b-ad96-42d3-883c-3090e2eb8679> | 2010-08-31 03:51:19 +0000 |
| commit | 39418f86313c928da5a942e71429d392af4b0627 (patch) | |
| tree | f10d97d49a1ed45493bbb99d83749864e83867c8 /nuttx/arch/arm/src/dm320 | |
| parent | c82b18da7c44b81c96136b3048fb08db043c9f2e (diff) | |
page tables must be aligned
git-svn-id: https://nuttx.svn.sourceforge.net/svnroot/nuttx/trunk@2900 7fd9a85b-ad96-42d3-883c-3090e2eb8679
Diffstat (limited to 'nuttx/arch/arm/src/dm320')
| -rw-r--r-- | nuttx/arch/arm/src/dm320/dm320_boot.c | 4 | ||||
| -rw-r--r-- | nuttx/arch/arm/src/dm320/dm320_memorymap.h | 6 |
2 files changed, 6 insertions, 4 deletions
diff --git a/nuttx/arch/arm/src/dm320/dm320_boot.c b/nuttx/arch/arm/src/dm320/dm320_boot.c index 7757ddab15..335b7f30b6 100644 --- a/nuttx/arch/arm/src/dm320/dm320_boot.c +++ b/nuttx/arch/arm/src/dm320/dm320_boot.c @@ -173,7 +173,7 @@ static void up_vectormapping(void) while (vector_paddr < end_paddr) { - up_setlevel2coarseentry(PGTABLE_L2_BASE_VADDR, vector_paddr, vector_vaddr, + up_setlevel2coarseentry(PGTABLE_L2_COARSE_VBASE, vector_paddr, vector_vaddr, MMU_L2_VECTORFLAGS); vector_paddr += 4096; vector_vaddr += 4096; @@ -181,7 +181,7 @@ static void up_vectormapping(void) /* Now set the level 1 descriptor to refer to the level 2 coarse page table. */ - up_setlevel1entry(PGTABLE_L2_BASE_PADDR, DM320_VECTOR_VCOARSE, MMU_L1_VECTORFLAGS); + up_setlevel1entry(PGTABLE_L2_COARSE_PBASE, DM320_VECTOR_VCOARSE, MMU_L1_VECTORFLAGS); } /************************************************************************************ diff --git a/nuttx/arch/arm/src/dm320/dm320_memorymap.h b/nuttx/arch/arm/src/dm320/dm320_memorymap.h index 47679b24db..f9ee22b03c 100644 --- a/nuttx/arch/arm/src/dm320/dm320_memorymap.h +++ b/nuttx/arch/arm/src/dm320/dm320_memorymap.h @@ -197,12 +197,14 @@ #define PGTABLE_BASE_PADDR DM320_SDRAM_PADDR #define PGTABLE_SDRAM_PADDR PGTABLE_BASE_PADDR -#define PGTABLE_L2_BASE_PADDR (PGTABLE_BASE_PADDR+0x00000800) +#define PGTABLE_L2_COARSE_PBASE (PGTABLE_BASE_PADDR+0x00000800) +#define PGTABLE_L2_FINE_PBASE (PGTABLE_BASE_PADDR+0x00001000) #define PGTABLE_L2_END_PADDR (PGTABLE_BASE_PADDR+PGTABLE_SIZE) #define PGTABLE_BASE_VADDR DM320_SDRAM_VADDR #define PGTABLE_SDRAM_VADDR PGTABLE_BASE_VADDR -#define PGTABLE_L2_BASE_VADDR (PGTABLE_BASE_VADDR+0x00000800) +#define PGTABLE_L2_COARSE_VBASE (PGTABLE_BASE_VADDR+0x00000800) +#define PGTABLE_L2_FINE_VBASE (PGTABLE_BASE_VADDR+0x00001000) #define PGTABLE_L2_END_VADDR (PGTABLE_BASE_VADDR+PGTABLE_SIZE) #define PGTABLE_L2_ALLOC (PGTABLE_L2_END_VADDR-PGTABLE_L2_BASE_VADDR) |