diff options
author | Vadim Yanitskiy <axilirator@gmail.com> | 2017-12-03 23:40:21 +0700 |
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committer | Vadim Yanitskiy <axilirator@gmail.com> | 2017-12-04 00:22:39 +0700 |
commit | 63703bb1ff93d024a175983e57d1045dba997b3b (patch) | |
tree | 7287df3b5b891acb6b7d269f2c16540187d719e4 /python | |
parent | 14b8e854c254f9d6872a4fbe925fb8ab66712169 (diff) |
trx/radio_if.py: explicilty set device clock rate
The device timings are depend on the current clock rate, so let's
explicilty set 26e6 as it's value, which is usable for USRP B2X0.
Diffstat (limited to 'python')
-rw-r--r-- | python/trx/radio_if.py | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/python/trx/radio_if.py b/python/trx/radio_if.py index 9c26ec6..dbccae7 100644 --- a/python/trx/radio_if.py +++ b/python/trx/radio_if.py @@ -90,6 +90,7 @@ class radio_if(gr.top_block): uhd.stream_args(cpu_format="fc32", channels=range(1))) + self.phy_src.set_clock_rate(26e6, uhd.ALL_MBOARDS) self.phy_src.set_center_freq(self.rx_freq, 0) self.phy_src.set_antenna(phy_rx_antenna, 0) self.phy_src.set_samp_rate(phy_sample_rate) @@ -139,6 +140,7 @@ class radio_if(gr.top_block): uhd.stream_args(cpu_format="fc32", channels=range(1)), "packet_len") + self.phy_sink.set_clock_rate(26e6, uhd.ALL_MBOARDS) self.phy_sink.set_antenna(phy_tx_antenna, 0) self.phy_sink.set_samp_rate(phy_sample_rate) self.phy_sink.set_center_freq(self.tx_freq, 0) |