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path: root/src/host/trxcon/sched_trx.h
AgeCommit message (Expand)AuthorFilesLines
2019-01-15trxcon/sched_trx.c: use bool in sched_trx_reset()Vadim Yanitskiy1-1/+1
2018-10-20trxcon/scheduler: add PDTCH channel supportVadim Yanitskiy1-0/+3
2018-10-03trxcon/scheduler: add CCCH/SDCCH mframe layouts with CBCHHarald Welte1-0/+2
2018-09-28trxcon/scheduler: fix Measurement Reporting on SACCHVadim Yanitskiy1-0/+10
2018-09-28trxcon/scheduler: pass talloc ctx directly to sched_prim_init()Vadim Yanitskiy1-1/+1
2018-09-28trxcon/scheduler: pass lchan state to sched_prim_dequeue()Vadim Yanitskiy1-1/+1
2018-09-16trxcon/scheduler: add TCH/H channel supportVadim Yanitskiy1-3/+3
2018-09-16trxcon/scheduler: introduce TCH/H TDMA frame mapping helpresVadim Yanitskiy1-0/+16
2018-08-15trxcon/scheduler: get rid of useless lchan->rsl_modeVadim Yanitskiy1-2/+2
2018-08-15trxcon/scheduler: pass lchan to sched_bad_frame_ind()Vadim Yanitskiy1-1/+1
2018-08-14trxcon/sched_prim.c: properly handle both TCH/H and FACCH/H primsVadim Yanitskiy1-1/+1
2018-08-14trxcon/sched_trx.h: add missing parentheses to PRIM_IS_*Vadim Yanitskiy1-2/+2
2018-04-02trxcon: Respect the tch_mode field of DM_EST_REQHarald Welte1-1/+1
2018-03-22trxcon/scheduler: add CHAN_IS_SACCH macroVadim Yanitskiy1-0/+3
2018-03-22trxcon/scheduler: share lchan link identifiersVadim Yanitskiy1-0/+3
2018-03-11trxcon/scheduler: enforce lchan handlers to set message typeVadim Yanitskiy1-4/+4
2018-03-11trxcon/scheduler: transmit dummy frames on CBTX lchansVadim Yanitskiy1-0/+12
2018-03-11trxcon/scheduler: introduce a new CBTX lchan flagVadim Yanitskiy1-0/+2
2018-03-11trxcon/sched_trx.h: clarify lchan flags meaningVadim Yanitskiy1-1/+3
2018-03-02host/trxcon: use integer math for ToA (Timing of Arrival)Vadim Yanitskiy1-4/+5
2018-01-05trxcon/scheduler: use TCH frame length defs from libosmocodecVadim Yanitskiy1-5/+0
2018-01-05trxcon/scheduler: use linuxlist API for lchan managementVadim Yanitskiy1-1/+3
2018-01-05trxcon/scheduler: share chan / prim identification helpersVadim Yanitskiy1-0/+9
2017-12-18trxcon/scheduler: implement A5/X ciphering supportVadim Yanitskiy1-0/+2
2017-12-18trxcon/scheduler: preprocess UL bursts before sendingVadim Yanitskiy1-0/+3
2017-12-18trxcon/scheduler: move prim management outside lchan handlersVadim Yanitskiy1-1/+6
2017-12-18trxcon/scheduler: separate primitive management codeVadim Yanitskiy1-3/+5
2017-12-16host/trxcon/scheduler: inform L2&3 about decoding errorsVadim Yanitskiy1-1/+3
2017-12-16host/trxcon/scheduler: add initial TCH/F channel supportVadim Yanitskiy1-0/+6
2017-12-16host/trxcon/scheduler: clean up the trx_lchan_stateVadim Yanitskiy1-52/+40
2017-11-23host/trxcon/scheduler: process frames in advanceVadim Yanitskiy1-1/+1
2017-11-19host/trxcon/scheduler: share common declarations of lchan handlersVadim Yanitskiy1-0/+9
2017-11-19host/trxcon/l1ctl.c: share primitive management codeVadim Yanitskiy1-0/+8
2017-11-19host/trxcon/scheduler: get rid of useless nbits argumentVadim Yanitskiy1-2/+2
2017-11-19host/trxcon/scheduler: pass trx_lchan_state to lchan handlersVadim Yanitskiy1-7/+6
2017-11-19host/trxcon/scheduler: fix chan_nr parsingVadim Yanitskiy1-1/+4
2017-11-19host/trxcon/scheduler: use 'tn' instead of 'ts_num'Vadim Yanitskiy1-6/+6
2017-11-19host/trxcon/scheduler: git rid of sched_trx_find_ts()Vadim Yanitskiy1-1/+0
2017-11-19host/trxcon/scheduler: simplify timeslot managementVadim Yanitskiy1-2/+0
2017-11-19host/trxcon/scheduler: optionally reset clock counterVadim Yanitskiy1-1/+1
2017-11-19host/trxcon/scheduler: implement xCCH TX capabilityVadim Yanitskiy1-0/+2
2017-11-19host/trxcon/l1ctl.c: handle L1CTL_DM_{EST,REL}_REQVadim Yanitskiy1-0/+3
2017-11-19host/trxcon/scheduler: implement TX queue handlingVadim Yanitskiy1-0/+10
2017-11-19host/trxcon/scheduler: modify trx_lchan_tx_func definitionVadim Yanitskiy1-1/+1
2017-11-19host/trxcon/scheduler: handle bursts from TRX interfaceVadim Yanitskiy1-0/+3
2017-11-19host/trxcon/scheduler: implement management functionsVadim Yanitskiy1-0/+19
2017-11-19host/trxcon/scheduler: add basic GSM PHY definitionsVadim Yanitskiy1-0/+235
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