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authorJeff Morriss <jeff.morriss@ulticom.com>2012-05-04 21:56:32 +0000
committerJeff Morriss <jeff.morriss@ulticom.com>2012-05-04 21:56:32 +0000
commit06bb1678241c2cd4094f99f77ac3bdb85a46e59a (patch)
tree882fdb688b8145fef7789a8c85b71505f5639ff8 /epan/emem.c
parentd1566f00a29b8f4db3aae925be825c065e53e6a2 (diff)
The rest of the fix for https://bugs.wireshark.org/bugzilla/show_bug.cgi?id=7221
(emem alignment problems on SPARC) : Have emem use 8-byte alignment when we need it. Since I can't seem to write code that which reliably (across GCC versions and optimization levels) determines if 8-byte alignment is needed for doubles, "when" is defined as "if we're compiling for a CPU other than i386." Windows doesn't need a check because it's either i386 or 64-bit (x86_64 or maybe ia64--both of which get 8-byte alignment from G_MEM_ALIGN). (And, yes, all of this is ignoring the 16-byte alignment requirements of long doubles.) svn path=/trunk/; revision=42431
Diffstat (limited to 'epan/emem.c')
-rw-r--r--epan/emem.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/epan/emem.c b/epan/emem.c
index 2e9503accc..a2ad22a1c7 100644
--- a/epan/emem.c
+++ b/epan/emem.c
@@ -760,7 +760,7 @@ emem_alloc_chunk(size_t size, emem_header_t *mem)
asize += sizeof(void *);
pad = emem_canary_pad(asize);
} else
- pad = (G_MEM_ALIGN - (asize & (G_MEM_ALIGN-1))) & (G_MEM_ALIGN-1);
+ pad = (WS_MEM_ALIGN - (asize & (WS_MEM_ALIGN-1))) & (WS_MEM_ALIGN-1);
asize += pad;