diff options
| author | Pascal Quantin <pascal@wireshark.org> | 2020-10-08 10:24:28 +0200 |
|---|---|---|
| committer | Pascal Quantin <pascal@wireshark.org> | 2020-10-08 10:24:28 +0200 |
| commit | 21c3bdff06205ec5710341bee90e77bd60fde8e9 (patch) | |
| tree | 5b14a63e2a486573efd727d69b063b2c41d78ea1 /epan/dissectors/packet-nr-rrc.c | |
| parent | 39744b8edf193aab923f1c9ceb7edcc0d041958c (diff) | |
NR RRC: upgrade dissector to v16.2.0
Diffstat (limited to 'epan/dissectors/packet-nr-rrc.c')
| -rw-r--r-- | epan/dissectors/packet-nr-rrc.c | 12260 |
1 files changed, 9259 insertions, 3001 deletions
diff --git a/epan/dissectors/packet-nr-rrc.c b/epan/dissectors/packet-nr-rrc.c index eee33b31a8..75977474c0 100644 --- a/epan/dissectors/packet-nr-rrc.c +++ b/epan/dissectors/packet-nr-rrc.c @@ -9,7 +9,7 @@ /* packet-nr-rrc-template.c * NR; * Radio Resource Control (RRC) protocol specification - * (3GPP TS 38.331 V15.9.0 Release 15) packet dissection + * (3GPP TS 38.331 V16.2.0 Release 16) packet dissection * Copyright 2018-2020, Pascal Quantin * * Wireshark - Network traffic analyzer @@ -119,7 +119,7 @@ extern int proto_mac_nr; #define maxNrofSR_ConfigPerCellGroup 8 #define maxLCG_ID 7 #define maxLC_ID 32 -#define maxLC_ID_Iab_r16 65536 +#define maxLC_ID_Iab_r16 65855 #define maxLTE_CRS_Patterns_r16 3 #define maxNrofTAGs 4 #define maxNrofTAGs_1 3 @@ -289,6 +289,7 @@ extern int proto_mac_nr; #define maxCellSFTD 3 #define maxReportConfigId 64 #define maxNrofCodebooks 16 +#define maxNrofCSI_RS_ResourcesExt_r16 16 #define maxNrofCSI_RS_Resources 7 #define maxNrofCSI_RS_ResourcesAlt_r16 512 #define maxNrofCSI_RS_ResourcesAlt_1_r16 511 @@ -527,7 +528,9 @@ static int hf_nr_rrc_scellFrequenciesSN_EUTRA = -1; /* SEQUENCE_SIZE_1_maxNrofS static int hf_nr_rrc_scellFrequenciesSN_EUTRA_item = -1; /* ARFCN_ValueEUTRA */ static int hf_nr_rrc_nonCriticalExtension_05 = -1; /* CG_Config_v1610_IEs */ static int hf_nr_rrc_drx_InfoSCG2 = -1; /* DRX_Info2 */ -static int hf_nr_rrc_nonCriticalExtension_06 = -1; /* T_nonCriticalExtension_02 */ +static int hf_nr_rrc_nonCriticalExtension_06 = -1; /* CG_Config_v1620_IEs */ +static int hf_nr_rrc_ueAssistanceInformationSCG_r16_01 = -1; /* T_ueAssistanceInformationSCG_r16_01 */ +static int hf_nr_rrc_nonCriticalExtension_07 = -1; /* T_nonCriticalExtension_02 */ static int hf_nr_rrc_PH_TypeListSCG_item = -1; /* PH_InfoSCG */ static int hf_nr_rrc_servCellIndex = -1; /* ServCellIndex */ static int hf_nr_rrc_ph_Uplink = -1; /* PH_UplinkCarrierSCG */ @@ -543,6 +546,7 @@ static int hf_nr_rrc_requestedP_MaxEUTRA = -1; /* P_Max */ static int hf_nr_rrc_requestedP_MaxFR2_r16 = -1; /* P_Max */ static int hf_nr_rrc_requestedMaxInterFreqMeasIdSCG_r16 = -1; /* INTEGER_1_maxMeasIdentitiesMN */ static int hf_nr_rrc_requestedMaxIntraFreqMeasIdSCG_r16 = -1; /* INTEGER_1_maxMeasIdentitiesMN */ +static int hf_nr_rrc_requestedToffset_r16 = -1; /* T_Offset_r16 */ static int hf_nr_rrc_bandCombinationIndex = -1; /* BandCombinationIndex */ static int hf_nr_rrc_requestedFeatureSets = -1; /* FeatureSetEntryIndex */ static int hf_nr_rrc_FR_InfoList_item = -1; /* FR_Info */ @@ -566,11 +570,11 @@ static int hf_nr_rrc_sourceConfigSCG = -1; /* T_sourceConfigSCG */ static int hf_nr_rrc_scg_RB_Config_01 = -1; /* T_scg_RB_Config_01 */ static int hf_nr_rrc_mcg_RB_Config = -1; /* T_mcg_RB_Config */ static int hf_nr_rrc_mrdc_AssistanceInfo = -1; /* MRDC_AssistanceInfo */ -static int hf_nr_rrc_nonCriticalExtension_07 = -1; /* CG_ConfigInfo_v1540_IEs */ +static int hf_nr_rrc_nonCriticalExtension_08 = -1; /* CG_ConfigInfo_v1540_IEs */ static int hf_nr_rrc_ph_InfoMCG = -1; /* PH_TypeListMCG */ static int hf_nr_rrc_measResultReportCGI = -1; /* T_measResultReportCGI */ static int hf_nr_rrc_cgi_Info = -1; /* CGI_InfoNR */ -static int hf_nr_rrc_nonCriticalExtension_08 = -1; /* CG_ConfigInfo_v1560_IEs */ +static int hf_nr_rrc_nonCriticalExtension_09 = -1; /* CG_ConfigInfo_v1560_IEs */ static int hf_nr_rrc_candidateCellInfoListMN_EUTRA = -1; /* T_candidateCellInfoListMN_EUTRA */ static int hf_nr_rrc_candidateCellInfoListSN_EUTRA_02 = -1; /* T_candidateCellInfoListSN_EUTRA_01 */ static int hf_nr_rrc_sourceConfigSCG_EUTRA = -1; /* T_sourceConfigSCG_EUTRA */ @@ -582,13 +586,13 @@ static int hf_nr_rrc_measResultReportCGI_EUTRA = -1; /* T_measResultReportCGI_E static int hf_nr_rrc_cgi_InfoEUTRA = -1; /* CGI_InfoEUTRA */ static int hf_nr_rrc_measResultCellListSFTD_EUTRA = -1; /* MeasResultCellListSFTD_EUTRA */ static int hf_nr_rrc_fr_InfoListMCG = -1; /* FR_InfoList */ -static int hf_nr_rrc_nonCriticalExtension_09 = -1; /* CG_ConfigInfo_v1570_IEs */ +static int hf_nr_rrc_nonCriticalExtension_10 = -1; /* CG_ConfigInfo_v1570_IEs */ static int hf_nr_rrc_sftdFrequencyList_NR = -1; /* SFTD_FrequencyList_NR */ static int hf_nr_rrc_sftdFrequencyList_EUTRA = -1; /* SFTD_FrequencyList_EUTRA */ -static int hf_nr_rrc_nonCriticalExtension_10 = -1; /* CG_ConfigInfo_v1590_IEs */ +static int hf_nr_rrc_nonCriticalExtension_11 = -1; /* CG_ConfigInfo_v1590_IEs */ static int hf_nr_rrc_servFrequenciesMN_NR = -1; /* SEQUENCE_SIZE_1_maxNrofServingCells_1_OF_ARFCN_ValueNR */ static int hf_nr_rrc_servFrequenciesMN_NR_item = -1; /* ARFCN_ValueNR */ -static int hf_nr_rrc_nonCriticalExtension_11 = -1; /* CG_ConfigInfo_v1610_IEs */ +static int hf_nr_rrc_nonCriticalExtension_12 = -1; /* CG_ConfigInfo_v1610_IEs */ static int hf_nr_rrc_drx_InfoMCG2 = -1; /* DRX_Info2 */ static int hf_nr_rrc_alignedDRX_Indication = -1; /* T_alignedDRX_Indication */ static int hf_nr_rrc_scgFailureInfo_r16 = -1; /* T_scgFailureInfo_r16 */ @@ -599,7 +603,9 @@ static int hf_nr_rrc_failureTypeEUTRA_r16 = -1; /* T_failureTypeEUTRA_r16 */ static int hf_nr_rrc_measResultSCG_EUTRA_r16 = -1; /* T_measResultSCG_EUTRA_r16 */ static int hf_nr_rrc_sidelinkUEInformationNR_r16_01 = -1; /* T_sidelinkUEInformationNR_r16_01 */ static int hf_nr_rrc_sidelinkUEInformationEUTRA_r16_01 = -1; /* OCTET_STRING */ -static int hf_nr_rrc_nonCriticalExtension_12 = -1; /* T_nonCriticalExtension_03 */ +static int hf_nr_rrc_nonCriticalExtension_13 = -1; /* CG_ConfigInfo_v1620_IEs */ +static int hf_nr_rrc_ueAssistanceInformationSourceSCG_r16 = -1; /* T_ueAssistanceInformationSourceSCG_r16 */ +static int hf_nr_rrc_nonCriticalExtension_14 = -1; /* T_nonCriticalExtension_03 */ static int hf_nr_rrc_SFTD_FrequencyList_NR_item = -1; /* ARFCN_ValueNR */ static int hf_nr_rrc_SFTD_FrequencyList_EUTRA_item = -1; /* ARFCN_ValueEUTRA */ static int hf_nr_rrc_allowedBC_ListMRDC = -1; /* BandCombinationInfoList */ @@ -629,6 +635,7 @@ static int hf_nr_rrc_maxMeasSRS_ResourceSCG_r16 = -1; /* INTEGER_0_maxNrofCLI_S static int hf_nr_rrc_maxMeasCLI_ResourceSCG_r16 = -1; /* INTEGER_0_maxNrofCLI_RSSI_Resources_r16 */ static int hf_nr_rrc_maxNumberEHC_ContextsSN_r16 = -1; /* INTEGER_0_65536 */ static int hf_nr_rrc_allowedReducedConfigForOverheating_r16 = -1; /* OverheatingAssistance */ +static int hf_nr_rrc_maxToffset_r16 = -1; /* T_Offset_r16 */ static int hf_nr_rrc_SelectedBandEntriesMN_item = -1; /* BandEntryIndex */ static int hf_nr_rrc_PH_TypeListMCG_item = -1; /* PH_InfoMCG */ static int hf_nr_rrc_ph_Uplink_01 = -1; /* PH_UplinkCarrierMCG */ @@ -692,15 +699,15 @@ static int hf_nr_rrc_c1_04 = -1; /* T_c1_04 */ static int hf_nr_rrc_measTimingConf = -1; /* MeasurementTimingConfiguration_IEs */ static int hf_nr_rrc_criticalExtensionsFuture_04 = -1; /* T_criticalExtensionsFuture_04 */ static int hf_nr_rrc_measTiming = -1; /* MeasTimingList */ -static int hf_nr_rrc_nonCriticalExtension_13 = -1; /* MeasurementTimingConfiguration_v1550_IEs */ +static int hf_nr_rrc_nonCriticalExtension_15 = -1; /* MeasurementTimingConfiguration_v1550_IEs */ static int hf_nr_rrc_campOnFirstSSB = -1; /* BOOLEAN */ static int hf_nr_rrc_psCellOnlyOnFirstSSB = -1; /* BOOLEAN */ -static int hf_nr_rrc_nonCriticalExtension_14 = -1; /* MeasurementTimingConfiguration_v1610_IEs */ +static int hf_nr_rrc_nonCriticalExtension_16 = -1; /* MeasurementTimingConfiguration_v1610_IEs */ static int hf_nr_rrc_csi_RS_Config_r16 = -1; /* T_csi_RS_Config_r16 */ static int hf_nr_rrc_csi_RS_SubcarrierSpacing_r16 = -1; /* SubcarrierSpacing */ static int hf_nr_rrc_csi_RS_CellMobility_r16 = -1; /* CSI_RS_CellMobility */ static int hf_nr_rrc_refSSBFreq_r16 = -1; /* ARFCN_ValueNR */ -static int hf_nr_rrc_nonCriticalExtension_15 = -1; /* T_nonCriticalExtension_04 */ +static int hf_nr_rrc_nonCriticalExtension_17 = -1; /* T_nonCriticalExtension_04 */ static int hf_nr_rrc_MeasTimingList_item = -1; /* MeasTiming */ static int hf_nr_rrc_frequencyAndTiming = -1; /* T_frequencyAndTiming */ static int hf_nr_rrc_carrierFreq = -1; /* ARFCN_ValueNR */ @@ -719,13 +726,13 @@ static int hf_nr_rrc_spare4 = -1; /* NULL */ static int hf_nr_rrc_criticalExtensionsFuture_05 = -1; /* T_criticalExtensionsFuture_05 */ static int hf_nr_rrc_supportedBandListNRForPaging = -1; /* SEQUENCE_SIZE_1_maxBands_OF_FreqBandIndicatorNR */ static int hf_nr_rrc_supportedBandListNRForPaging_item = -1; /* FreqBandIndicatorNR */ -static int hf_nr_rrc_nonCriticalExtension_16 = -1; /* T_nonCriticalExtension_05 */ +static int hf_nr_rrc_nonCriticalExtension_18 = -1; /* T_nonCriticalExtension_05 */ static int hf_nr_rrc_criticalExtensions_06 = -1; /* T_criticalExtensions_06 */ static int hf_nr_rrc_c1_06 = -1; /* T_c1_06 */ static int hf_nr_rrc_ueRadioAccessCapabilityInformation = -1; /* UERadioAccessCapabilityInformation_IEs */ static int hf_nr_rrc_criticalExtensionsFuture_06 = -1; /* T_criticalExtensionsFuture_06 */ static int hf_nr_rrc_ue_RadioAccessCapabilityInfo = -1; /* T_ue_RadioAccessCapabilityInfo */ -static int hf_nr_rrc_nonCriticalExtension_17 = -1; /* T_nonCriticalExtension_06 */ +static int hf_nr_rrc_nonCriticalExtension_19 = -1; /* T_nonCriticalExtension_06 */ static int hf_nr_rrc_message = -1; /* BCCH_BCH_MessageType */ static int hf_nr_rrc_mib = -1; /* MIB */ static int hf_nr_rrc_messageClassExtension = -1; /* T_messageClassExtension */ @@ -806,7 +813,7 @@ static int hf_nr_rrc_counterCheck_01 = -1; /* CounterCheck_IEs */ static int hf_nr_rrc_criticalExtensionsFuture_07 = -1; /* T_criticalExtensionsFuture_07 */ static int hf_nr_rrc_drb_CountMSB_InfoList = -1; /* DRB_CountMSB_InfoList */ static int hf_nr_rrc_lateNonCriticalExtension = -1; /* OCTET_STRING */ -static int hf_nr_rrc_nonCriticalExtension_18 = -1; /* T_nonCriticalExtension_07 */ +static int hf_nr_rrc_nonCriticalExtension_20 = -1; /* T_nonCriticalExtension_07 */ static int hf_nr_rrc_DRB_CountMSB_InfoList_item = -1; /* DRB_CountMSB_Info */ static int hf_nr_rrc_drb_Identity = -1; /* DRB_Identity */ static int hf_nr_rrc_countMSB_Uplink = -1; /* INTEGER_0_33554431 */ @@ -815,7 +822,7 @@ static int hf_nr_rrc_criticalExtensions_08 = -1; /* T_criticalExtensions_08 */ static int hf_nr_rrc_counterCheckResponse_01 = -1; /* CounterCheckResponse_IEs */ static int hf_nr_rrc_criticalExtensionsFuture_08 = -1; /* T_criticalExtensionsFuture_08 */ static int hf_nr_rrc_drb_CountInfoList = -1; /* DRB_CountInfoList */ -static int hf_nr_rrc_nonCriticalExtension_19 = -1; /* T_nonCriticalExtension_08 */ +static int hf_nr_rrc_nonCriticalExtension_21 = -1; /* T_nonCriticalExtension_08 */ static int hf_nr_rrc_DRB_CountInfoList_item = -1; /* DRB_CountInfo */ static int hf_nr_rrc_count_Uplink = -1; /* INTEGER_0_4294967295 */ static int hf_nr_rrc_count_Downlink = -1; /* INTEGER_0_4294967295 */ @@ -827,7 +834,7 @@ static int hf_nr_rrc_requestedSIB_List_r16 = -1; /* SEQUENCE_SIZE_1_maxOnDemand static int hf_nr_rrc_requestedSIB_List_r16_item = -1; /* SIB_ReqInfo_r16 */ static int hf_nr_rrc_requestedPosSIB_List_r16 = -1; /* SEQUENCE_SIZE_1_maxOnDemandPosSIB_r16_OF_PosSIB_ReqInfo_r16 */ static int hf_nr_rrc_requestedPosSIB_List_r16_item = -1; /* PosSIB_ReqInfo_r16 */ -static int hf_nr_rrc_nonCriticalExtension_20 = -1; /* T_nonCriticalExtension_09 */ +static int hf_nr_rrc_nonCriticalExtension_22 = -1; /* T_nonCriticalExtension_09 */ static int hf_nr_rrc_gnss_id_r16 = -1; /* GNSS_ID_r16 */ static int hf_nr_rrc_sbas_id_r16 = -1; /* SBAS_ID_r16 */ static int hf_nr_rrc_posSibType_r16 = -1; /* T_posSibType_r16 */ @@ -837,47 +844,47 @@ static int hf_nr_rrc_criticalExtensionsFuture_10 = -1; /* T_criticalExtensionsF static int hf_nr_rrc_segmentNumber_r16 = -1; /* INTEGER_0_4 */ static int hf_nr_rrc_rrc_MessageSegmentContainer_r16 = -1; /* OCTET_STRING */ static int hf_nr_rrc_rrc_MessageSegmentType_r16 = -1; /* T_rrc_MessageSegmentType_r16 */ -static int hf_nr_rrc_nonCriticalExtension_21 = -1; /* T_nonCriticalExtension_10 */ +static int hf_nr_rrc_nonCriticalExtension_23 = -1; /* T_nonCriticalExtension_10 */ static int hf_nr_rrc_criticalExtensions_11 = -1; /* T_criticalExtensions_11 */ static int hf_nr_rrc_dlInformationTransfer_01 = -1; /* DLInformationTransfer_IEs */ static int hf_nr_rrc_criticalExtensionsFuture_11 = -1; /* T_criticalExtensionsFuture_11 */ static int hf_nr_rrc_dedicatedNAS_Message = -1; /* DedicatedNAS_Message */ -static int hf_nr_rrc_nonCriticalExtension_22 = -1; /* DLInformationTransfer_v1610_IEs */ +static int hf_nr_rrc_nonCriticalExtension_24 = -1; /* DLInformationTransfer_v1610_IEs */ static int hf_nr_rrc_referenceTimeInfo_r16 = -1; /* ReferenceTimeInfo_r16 */ -static int hf_nr_rrc_nonCriticalExtension_23 = -1; /* T_nonCriticalExtension_11 */ +static int hf_nr_rrc_nonCriticalExtension_25 = -1; /* T_nonCriticalExtension_11 */ static int hf_nr_rrc_criticalExtensions_12 = -1; /* T_criticalExtensions_12 */ static int hf_nr_rrc_c1_14 = -1; /* T_c1_14 */ static int hf_nr_rrc_dlInformationTransferMRDC_r16_01 = -1; /* DLInformationTransferMRDC_r16_IEs */ static int hf_nr_rrc_criticalExtensionsFuture_12 = -1; /* T_criticalExtensionsFuture_12 */ static int hf_nr_rrc_dl_DCCH_MessageNR_r16 = -1; /* T_dl_DCCH_MessageNR_r16 */ static int hf_nr_rrc_dl_DCCH_MessageEUTRA_r16 = -1; /* T_dl_DCCH_MessageEUTRA_r16 */ -static int hf_nr_rrc_nonCriticalExtension_24 = -1; /* T_nonCriticalExtension_12 */ +static int hf_nr_rrc_nonCriticalExtension_26 = -1; /* T_nonCriticalExtension_12 */ static int hf_nr_rrc_criticalExtensions_13 = -1; /* T_criticalExtensions_13 */ static int hf_nr_rrc_failureInformation_01 = -1; /* FailureInformation_IEs */ static int hf_nr_rrc_criticalExtensionsFuture_13 = -1; /* T_criticalExtensionsFuture_13 */ static int hf_nr_rrc_failureInfoRLC_Bearer = -1; /* FailureInfoRLC_Bearer */ -static int hf_nr_rrc_nonCriticalExtension_25 = -1; /* FailureInformation_v1610_IEs */ +static int hf_nr_rrc_nonCriticalExtension_27 = -1; /* FailureInformation_v1610_IEs */ static int hf_nr_rrc_cellGroupId = -1; /* CellGroupId */ static int hf_nr_rrc_logicalChannelIdentity = -1; /* LogicalChannelIdentity */ static int hf_nr_rrc_failureType_01 = -1; /* T_failureType_01 */ static int hf_nr_rrc_failureInfoDAPS_r16 = -1; /* FailureInfoDAPS_r16 */ -static int hf_nr_rrc_nonCriticalExtension_26 = -1; /* T_nonCriticalExtension_13 */ +static int hf_nr_rrc_nonCriticalExtension_28 = -1; /* T_nonCriticalExtension_13 */ static int hf_nr_rrc_failureType_r16_01 = -1; /* T_failureType_r16_01 */ static int hf_nr_rrc_criticalExtensions_14 = -1; /* T_criticalExtensions_14 */ static int hf_nr_rrc_iabOtherInformation_r16_01 = -1; /* IABOtherInformation_r16_IEs */ static int hf_nr_rrc_criticalExtensionsFuture_14 = -1; /* T_criticalExtensionsFuture_14 */ -static int hf_nr_rrc_ip_InfoType = -1; /* T_ip_InfoType */ +static int hf_nr_rrc_ip_InfoType_r16 = -1; /* T_ip_InfoType_r16 */ static int hf_nr_rrc_iab_IP_Request_r16 = -1; /* T_iab_IP_Request_r16 */ -static int hf_nr_rrc_iab_IPv4_AddressNumReq_r16 = -1; /* IAB_IPAddressNumReq_r16 */ +static int hf_nr_rrc_iab_IPv4_AddressNumReq_r16 = -1; /* IAB_IP_AddressNumReq_r16 */ static int hf_nr_rrc_iab_IPv6_AddressReq_r16 = -1; /* T_iab_IPv6_AddressReq_r16 */ -static int hf_nr_rrc_iab_IPv6_AddressNumReq_r16 = -1; /* IAB_IPAddressNumReq_r16 */ -static int hf_nr_rrc_iab_IPv6_AddressPrefixReq_r16 = -1; /* IAB_IPAddressPrefixReq_r16 */ +static int hf_nr_rrc_iab_IPv6_AddressNumReq_r16 = -1; /* IAB_IP_AddressNumReq_r16 */ +static int hf_nr_rrc_iab_IPv6_AddressPrefixReq_r16 = -1; /* IAB_IP_AddressPrefixReq_r16 */ static int hf_nr_rrc_iab_IP_Report_r16 = -1; /* T_iab_IP_Report_r16 */ static int hf_nr_rrc_iab_IPv4_AddressReport_r16 = -1; /* IAB_IP_AddressAndTraffic_r16 */ static int hf_nr_rrc_iab_IPv6_Report_r16 = -1; /* T_iab_IPv6_Report_r16 */ static int hf_nr_rrc_iab_IPv6_AddressReport_r16 = -1; /* IAB_IP_AddressAndTraffic_r16 */ static int hf_nr_rrc_iab_IPv6_PrefixReport_r16 = -1; /* IAB_IP_PrefixAndTraffic_r16 */ -static int hf_nr_rrc_nonCriticalExtension_27 = -1; /* T_nonCriticalExtension_14 */ +static int hf_nr_rrc_nonCriticalExtension_29 = -1; /* T_nonCriticalExtension_14 */ static int hf_nr_rrc_all_Traffic_NumReq_r16 = -1; /* INTEGER_1_8 */ static int hf_nr_rrc_f1_C_Traffic_NumReq_r16 = -1; /* INTEGER_1_8 */ static int hf_nr_rrc_f1_U_Traffic_NumReq_r16 = -1; /* INTEGER_1_8 */ @@ -903,7 +910,7 @@ static int hf_nr_rrc_locationMeasurementIndication_01 = -1; /* LocationMeasurem static int hf_nr_rrc_criticalExtensionsFuture_15 = -1; /* T_criticalExtensionsFuture_15 */ static int hf_nr_rrc_measurementIndication = -1; /* T_measurementIndication */ static int hf_nr_rrc_setup_01 = -1; /* LocationMeasurementInfo */ -static int hf_nr_rrc_nonCriticalExtension_28 = -1; /* T_nonCriticalExtension_15 */ +static int hf_nr_rrc_nonCriticalExtension_30 = -1; /* T_nonCriticalExtension_15 */ static int hf_nr_rrc_criticalExtensions_16 = -1; /* T_criticalExtensions_16 */ static int hf_nr_rrc_loggedMeasurementConfiguration_r16_01 = -1; /* LoggedMeasurementConfiguration_r16_IEs */ static int hf_nr_rrc_criticalExtensionsFuture_16 = -1; /* T_criticalExtensionsFuture_16 */ @@ -923,7 +930,7 @@ static int hf_nr_rrc_loggingDuration_r16 = -1; /* LoggingDuration_r16 */ static int hf_nr_rrc_reportType = -1; /* T_reportType */ static int hf_nr_rrc_periodical = -1; /* LoggedPeriodicalReportConfig_r16 */ static int hf_nr_rrc_eventTriggered = -1; /* LoggedEventTriggerConfig_r16 */ -static int hf_nr_rrc_nonCriticalExtension_29 = -1; /* T_nonCriticalExtension_16 */ +static int hf_nr_rrc_nonCriticalExtension_31 = -1; /* T_nonCriticalExtension_16 */ static int hf_nr_rrc_loggingInterval_r16 = -1; /* LoggingInterval_r16 */ static int hf_nr_rrc_eventType_r16 = -1; /* EventType_r16 */ static int hf_nr_rrc_outOfCoverage = -1; /* NULL */ @@ -935,7 +942,7 @@ static int hf_nr_rrc_criticalExtensions_17 = -1; /* T_criticalExtensions_17 */ static int hf_nr_rrc_mcgFailureInformation_r16_01 = -1; /* MCGFailureInformation_r16_IEs */ static int hf_nr_rrc_criticalExtensionsFuture_17 = -1; /* T_criticalExtensionsFuture_17 */ static int hf_nr_rrc_failureReportMCG_r16 = -1; /* FailureReportMCG_r16 */ -static int hf_nr_rrc_nonCriticalExtension_30 = -1; /* T_nonCriticalExtension_17 */ +static int hf_nr_rrc_nonCriticalExtension_32 = -1; /* T_nonCriticalExtension_17 */ static int hf_nr_rrc_failureType_r16_02 = -1; /* T_failureType_r16_02 */ static int hf_nr_rrc_measResultFreqList_r16 = -1; /* MeasResultList2NR */ static int hf_nr_rrc_measResultFreqListEUTRA_r16 = -1; /* MeasResultList2EUTRA */ @@ -950,7 +957,7 @@ static int hf_nr_rrc_criticalExtensions_18 = -1; /* T_criticalExtensions_18 */ static int hf_nr_rrc_measurementReport_01 = -1; /* MeasurementReport_IEs */ static int hf_nr_rrc_criticalExtensionsFuture_18 = -1; /* T_criticalExtensionsFuture_18 */ static int hf_nr_rrc_measResults = -1; /* MeasResults */ -static int hf_nr_rrc_nonCriticalExtension_31 = -1; /* T_nonCriticalExtension_18 */ +static int hf_nr_rrc_nonCriticalExtension_33 = -1; /* T_nonCriticalExtension_18 */ static int hf_nr_rrc_systemFrameNumber = -1; /* BIT_STRING_SIZE_6 */ static int hf_nr_rrc_subCarrierSpacingCommon = -1; /* T_subCarrierSpacingCommon */ static int hf_nr_rrc_ssb_SubcarrierOffset = -1; /* INTEGER_0_15 */ @@ -965,11 +972,11 @@ static int hf_nr_rrc_criticalExtensionsFuture_19 = -1; /* T_criticalExtensionsF static int hf_nr_rrc_targetRAT_Type = -1; /* T_targetRAT_Type */ static int hf_nr_rrc_targetRAT_MessageContainer = -1; /* T_targetRAT_MessageContainer */ static int hf_nr_rrc_nas_SecurityParamFromNR = -1; /* T_nas_SecurityParamFromNR */ -static int hf_nr_rrc_nonCriticalExtension_32 = -1; /* MobilityFromNRCommand_v1610_IEs */ +static int hf_nr_rrc_nonCriticalExtension_34 = -1; /* MobilityFromNRCommand_v1610_IEs */ static int hf_nr_rrc_voiceFallbackIndication_r16 = -1; /* T_voiceFallbackIndication_r16 */ -static int hf_nr_rrc_nonCriticalExtension_33 = -1; /* T_nonCriticalExtension_19 */ +static int hf_nr_rrc_nonCriticalExtension_35 = -1; /* T_nonCriticalExtension_19 */ static int hf_nr_rrc_pagingRecordList = -1; /* PagingRecordList */ -static int hf_nr_rrc_nonCriticalExtension_34 = -1; /* T_nonCriticalExtension_20 */ +static int hf_nr_rrc_nonCriticalExtension_36 = -1; /* T_nonCriticalExtension_20 */ static int hf_nr_rrc_PagingRecordList_item = -1; /* PagingRecord */ static int hf_nr_rrc_ue_Identity = -1; /* PagingUE_Identity */ static int hf_nr_rrc_accessType = -1; /* T_accessType */ @@ -979,13 +986,13 @@ static int hf_nr_rrc_criticalExtensions_20 = -1; /* T_criticalExtensions_20 */ static int hf_nr_rrc_rrcReestablishment_01 = -1; /* RRCReestablishment_IEs */ static int hf_nr_rrc_criticalExtensionsFuture_20 = -1; /* T_criticalExtensionsFuture_20 */ static int hf_nr_rrc_nextHopChainingCount = -1; /* NextHopChainingCount */ -static int hf_nr_rrc_nonCriticalExtension_35 = -1; /* T_nonCriticalExtension_21 */ +static int hf_nr_rrc_nonCriticalExtension_37 = -1; /* T_nonCriticalExtension_21 */ static int hf_nr_rrc_criticalExtensions_21 = -1; /* T_criticalExtensions_21 */ static int hf_nr_rrc_rrcReestablishmentComplete_01 = -1; /* RRCReestablishmentComplete_IEs */ static int hf_nr_rrc_criticalExtensionsFuture_21 = -1; /* T_criticalExtensionsFuture_21 */ -static int hf_nr_rrc_nonCriticalExtension_36 = -1; /* RRCReestablishmentComplete_v1610_IEs */ -static int hf_nr_rrc_ueMeasurementsAvailable_r16 = -1; /* UEMeasurementsAvailable_r16 */ -static int hf_nr_rrc_nonCriticalExtension_37 = -1; /* T_nonCriticalExtension_22 */ +static int hf_nr_rrc_nonCriticalExtension_38 = -1; /* RRCReestablishmentComplete_v1610_IEs */ +static int hf_nr_rrc_ue_MeasurementsAvailable_r16 = -1; /* UE_MeasurementsAvailable_r16 */ +static int hf_nr_rrc_nonCriticalExtension_39 = -1; /* T_nonCriticalExtension_22 */ static int hf_nr_rrc_rrcReestablishmentRequest_01 = -1; /* RRCReestablishmentRequest_IEs */ static int hf_nr_rrc_ue_Identity_01 = -1; /* ReestabUE_Identity */ static int hf_nr_rrc_reestablishmentCause = -1; /* ReestablishmentCause */ @@ -996,7 +1003,7 @@ static int hf_nr_rrc_criticalExtensionsFuture_22 = -1; /* T_criticalExtensionsF static int hf_nr_rrc_radioBearerConfig = -1; /* RadioBearerConfig */ static int hf_nr_rrc_secondaryCellGroup = -1; /* T_secondaryCellGroup */ static int hf_nr_rrc_measConfig = -1; /* MeasConfig */ -static int hf_nr_rrc_nonCriticalExtension_38 = -1; /* RRCReconfiguration_v1530_IEs */ +static int hf_nr_rrc_nonCriticalExtension_40 = -1; /* RRCReconfiguration_v1530_IEs */ static int hf_nr_rrc_masterCellGroup = -1; /* T_masterCellGroup */ static int hf_nr_rrc_fullConfig = -1; /* T_fullConfig */ static int hf_nr_rrc_dedicatedNAS_MessageList = -1; /* SEQUENCE_SIZE_1_maxDRB_OF_DedicatedNAS_Message */ @@ -1005,14 +1012,14 @@ static int hf_nr_rrc_masterKeyUpdate = -1; /* MasterKeyUpdate */ static int hf_nr_rrc_dedicatedSIB1_Delivery = -1; /* T_dedicatedSIB1_Delivery */ static int hf_nr_rrc_dedicatedSystemInformationDelivery = -1; /* T_dedicatedSystemInformationDelivery */ static int hf_nr_rrc_otherConfig = -1; /* OtherConfig */ -static int hf_nr_rrc_nonCriticalExtension_39 = -1; /* RRCReconfiguration_v1540_IEs */ +static int hf_nr_rrc_nonCriticalExtension_41 = -1; /* RRCReconfiguration_v1540_IEs */ static int hf_nr_rrc_otherConfig_v1540 = -1; /* OtherConfig_v1540 */ -static int hf_nr_rrc_nonCriticalExtension_40 = -1; /* RRCReconfiguration_v1560_IEs */ +static int hf_nr_rrc_nonCriticalExtension_42 = -1; /* RRCReconfiguration_v1560_IEs */ static int hf_nr_rrc_mrdc_SecondaryCellGroupConfig = -1; /* T_mrdc_SecondaryCellGroupConfig */ static int hf_nr_rrc_setup_05 = -1; /* MRDC_SecondaryCellGroupConfig */ static int hf_nr_rrc_radioBearerConfig2 = -1; /* T_radioBearerConfig2 */ static int hf_nr_rrc_sk_Counter = -1; /* SK_Counter */ -static int hf_nr_rrc_nonCriticalExtension_41 = -1; /* RRCReconfiguration_v1610_IEs */ +static int hf_nr_rrc_nonCriticalExtension_43 = -1; /* RRCReconfiguration_v1610_IEs */ static int hf_nr_rrc_otherConfig_v1610 = -1; /* OtherConfig_v1610 */ static int hf_nr_rrc_bap_Config_r16 = -1; /* T_bap_Config_r16 */ static int hf_nr_rrc_setup_06 = -1; /* BAP_Config_r16 */ @@ -1030,13 +1037,14 @@ static int hf_nr_rrc_sl_ConfigDedicatedNR_r16 = -1; /* T_sl_ConfigDedicatedNR_r static int hf_nr_rrc_setup_10 = -1; /* SL_ConfigDedicatedNR_r16 */ static int hf_nr_rrc_sl_ConfigDedicatedEUTRA_Info_r16 = -1; /* T_sl_ConfigDedicatedEUTRA_Info_r16 */ static int hf_nr_rrc_setup_11 = -1; /* SL_ConfigDedicatedEUTRA_Info_r16 */ -static int hf_nr_rrc_nonCriticalExtension_42 = -1; /* T_nonCriticalExtension_23 */ +static int hf_nr_rrc_smtc_r16 = -1; /* SSB_MTC */ +static int hf_nr_rrc_nonCriticalExtension_44 = -1; /* T_nonCriticalExtension_23 */ static int hf_nr_rrc_mrdc_ReleaseAndAdd = -1; /* T_mrdc_ReleaseAndAdd */ static int hf_nr_rrc_mrdc_SecondaryCellGroup = -1; /* T_mrdc_SecondaryCellGroup */ static int hf_nr_rrc_nr_SCG = -1; /* T_nr_SCG */ static int hf_nr_rrc_eutra_SCG = -1; /* T_eutra_SCG */ static int hf_nr_rrc_bap_Address_r16 = -1; /* BIT_STRING_SIZE_10 */ -static int hf_nr_rrc_defaultUL_BAProutingID_r16 = -1; /* BAP_Routing_ID_r16 */ +static int hf_nr_rrc_defaultUL_BAP_RoutingID_r16 = -1; /* BAP_RoutingID_r16 */ static int hf_nr_rrc_defaultUL_BH_RLC_Channel_r16 = -1; /* BH_RLC_ChannelID_r16 */ static int hf_nr_rrc_flowControlFeedbackType_r16 = -1; /* T_flowControlFeedbackType_r16 */ static int hf_nr_rrc_keySetChangeIndicator = -1; /* BOOLEAN */ @@ -1056,19 +1064,19 @@ static int hf_nr_rrc_sl_TimeOffsetEUTRA_List_r16_item = -1; /* SL_TimeOffsetEUT static int hf_nr_rrc_criticalExtensions_23 = -1; /* T_criticalExtensions_23 */ static int hf_nr_rrc_rrcReconfigurationComplete_01 = -1; /* RRCReconfigurationComplete_IEs */ static int hf_nr_rrc_criticalExtensionsFuture_23 = -1; /* T_criticalExtensionsFuture_23 */ -static int hf_nr_rrc_nonCriticalExtension_43 = -1; /* RRCReconfigurationComplete_v1530_IEs */ +static int hf_nr_rrc_nonCriticalExtension_45 = -1; /* RRCReconfigurationComplete_v1530_IEs */ static int hf_nr_rrc_uplinkTxDirectCurrentList = -1; /* UplinkTxDirectCurrentList */ -static int hf_nr_rrc_nonCriticalExtension_44 = -1; /* RRCReconfigurationComplete_v1560_IEs */ +static int hf_nr_rrc_nonCriticalExtension_46 = -1; /* RRCReconfigurationComplete_v1560_IEs */ static int hf_nr_rrc_scg_Response = -1; /* T_scg_Response */ static int hf_nr_rrc_nr_SCG_Response = -1; /* T_nr_SCG_Response */ static int hf_nr_rrc_eutra_SCG_Response = -1; /* T_eutra_SCG_Response */ -static int hf_nr_rrc_nonCriticalExtension_45 = -1; /* RRCReconfigurationComplete_v1610_IEs */ -static int hf_nr_rrc_nonCriticalExtension_46 = -1; /* T_nonCriticalExtension_24 */ +static int hf_nr_rrc_nonCriticalExtension_47 = -1; /* RRCReconfigurationComplete_v1610_IEs */ +static int hf_nr_rrc_nonCriticalExtension_48 = -1; /* T_nonCriticalExtension_24 */ static int hf_nr_rrc_criticalExtensions_24 = -1; /* T_criticalExtensions_24 */ static int hf_nr_rrc_rrcReject_01 = -1; /* RRCReject_IEs */ static int hf_nr_rrc_criticalExtensionsFuture_24 = -1; /* T_criticalExtensionsFuture_24 */ static int hf_nr_rrc_waitTime = -1; /* RejectWaitTime */ -static int hf_nr_rrc_nonCriticalExtension_47 = -1; /* T_nonCriticalExtension_25 */ +static int hf_nr_rrc_nonCriticalExtension_49 = -1; /* T_nonCriticalExtension_25 */ static int hf_nr_rrc_criticalExtensions_25 = -1; /* T_criticalExtensions_25 */ static int hf_nr_rrc_rrcRelease_01 = -1; /* RRCRelease_IEs */ static int hf_nr_rrc_criticalExtensionsFuture_25 = -1; /* T_criticalExtensionsFuture_25 */ @@ -1078,12 +1086,12 @@ static int hf_nr_rrc_suspendConfig = -1; /* SuspendConfig */ static int hf_nr_rrc_deprioritisationReq = -1; /* T_deprioritisationReq */ static int hf_nr_rrc_deprioritisationType = -1; /* T_deprioritisationType */ static int hf_nr_rrc_deprioritisationTimer = -1; /* T_deprioritisationTimer */ -static int hf_nr_rrc_nonCriticalExtension_48 = -1; /* RRCRelease_v1540_IEs */ -static int hf_nr_rrc_nonCriticalExtension_49 = -1; /* RRCRelease_v1610_IEs */ +static int hf_nr_rrc_nonCriticalExtension_50 = -1; /* RRCRelease_v1540_IEs */ +static int hf_nr_rrc_nonCriticalExtension_51 = -1; /* RRCRelease_v1610_IEs */ static int hf_nr_rrc_voiceFallbackIndication_r16_01 = -1; /* T_voiceFallbackIndication_r16_01 */ static int hf_nr_rrc_measIdleConfig_r16 = -1; /* T_measIdleConfig_r16 */ static int hf_nr_rrc_setup_12 = -1; /* MeasIdleConfigDedicated_r16 */ -static int hf_nr_rrc_nonCriticalExtension_50 = -1; /* T_nonCriticalExtension_26 */ +static int hf_nr_rrc_nonCriticalExtension_52 = -1; /* T_nonCriticalExtension_26 */ static int hf_nr_rrc_nr = -1; /* CarrierInfoNR */ static int hf_nr_rrc_eutra = -1; /* RedirectedCarrierInfo_EUTRA */ static int hf_nr_rrc_cnType = -1; /* T_cnType */ @@ -1116,9 +1124,9 @@ static int hf_nr_rrc_rrcResume_01 = -1; /* RRCResume_IEs */ static int hf_nr_rrc_criticalExtensionsFuture_26 = -1; /* T_criticalExtensionsFuture_26 */ static int hf_nr_rrc_masterCellGroup_01 = -1; /* T_masterCellGroup_01 */ static int hf_nr_rrc_fullConfig_01 = -1; /* T_fullConfig_01 */ -static int hf_nr_rrc_nonCriticalExtension_51 = -1; /* RRCResume_v1560_IEs */ +static int hf_nr_rrc_nonCriticalExtension_53 = -1; /* RRCResume_v1560_IEs */ static int hf_nr_rrc_radioBearerConfig2_01 = -1; /* T_radioBearerConfig2_01 */ -static int hf_nr_rrc_nonCriticalExtension_52 = -1; /* RRCResume_v1610_IEs */ +static int hf_nr_rrc_nonCriticalExtension_54 = -1; /* RRCResume_v1610_IEs */ static int hf_nr_rrc_idleModeMeasurementReq_r16 = -1; /* T_idleModeMeasurementReq_r16 */ static int hf_nr_rrc_restoreMCG_SCells_r16 = -1; /* T_restoreMCG_SCells_r16 */ static int hf_nr_rrc_restoreSCG_r16 = -1; /* T_restoreSCG_r16 */ @@ -1126,12 +1134,12 @@ static int hf_nr_rrc_mrdc_SecondaryCellGroup_r16 = -1; /* T_mrdc_SecondaryCellG static int hf_nr_rrc_nr_SCG_r16 = -1; /* T_nr_SCG_r16 */ static int hf_nr_rrc_eutra_SCG_r16 = -1; /* T_eutra_SCG_r16 */ static int hf_nr_rrc_needForGapsConfigNR_r16_01 = -1; /* T_needForGapsConfigNR_r16_01 */ -static int hf_nr_rrc_nonCriticalExtension_53 = -1; /* T_nonCriticalExtension_27 */ +static int hf_nr_rrc_nonCriticalExtension_55 = -1; /* T_nonCriticalExtension_27 */ static int hf_nr_rrc_criticalExtensions_27 = -1; /* T_criticalExtensions_27 */ static int hf_nr_rrc_rrcResumeComplete_01 = -1; /* RRCResumeComplete_IEs */ static int hf_nr_rrc_criticalExtensionsFuture_27 = -1; /* T_criticalExtensionsFuture_27 */ static int hf_nr_rrc_selectedPLMN_Identity = -1; /* INTEGER_1_maxPLMN */ -static int hf_nr_rrc_nonCriticalExtension_54 = -1; /* RRCResumeComplete_v1610_IEs */ +static int hf_nr_rrc_nonCriticalExtension_56 = -1; /* RRCResumeComplete_v1610_IEs */ static int hf_nr_rrc_idleMeasAvailable_r16 = -1; /* T_idleMeasAvailable_r16 */ static int hf_nr_rrc_measResultIdleEUTRA_r16 = -1; /* MeasResultIdleEUTRA_r16 */ static int hf_nr_rrc_measResultIdleNR_r16 = -1; /* MeasResultIdleNR_r16 */ @@ -1140,7 +1148,7 @@ static int hf_nr_rrc_nr_SCG_Response_01 = -1; /* T_nr_SCG_Response_01 */ static int hf_nr_rrc_eutra_SCG_Response_01 = -1; /* T_eutra_SCG_Response_01 */ static int hf_nr_rrc_mobilityHistoryAvail_r16 = -1; /* T_mobilityHistoryAvail_r16 */ static int hf_nr_rrc_mobilityState_r16 = -1; /* T_mobilityState_r16 */ -static int hf_nr_rrc_nonCriticalExtension_55 = -1; /* T_nonCriticalExtension_28 */ +static int hf_nr_rrc_nonCriticalExtension_57 = -1; /* T_nonCriticalExtension_28 */ static int hf_nr_rrc_rrcResumeRequest_01 = -1; /* RRCResumeRequest_IEs */ static int hf_nr_rrc_resumeIdentity = -1; /* ShortI_RNTI_Value */ static int hf_nr_rrc_resumeMAC_I = -1; /* BIT_STRING_SIZE_16 */ @@ -1151,7 +1159,7 @@ static int hf_nr_rrc_criticalExtensions_28 = -1; /* T_criticalExtensions_28 */ static int hf_nr_rrc_rrcSetup_01 = -1; /* RRCSetup_IEs */ static int hf_nr_rrc_criticalExtensionsFuture_28 = -1; /* T_criticalExtensionsFuture_28 */ static int hf_nr_rrc_masterCellGroup_02 = -1; /* T_masterCellGroup_02 */ -static int hf_nr_rrc_nonCriticalExtension_56 = -1; /* T_nonCriticalExtension_29 */ +static int hf_nr_rrc_nonCriticalExtension_58 = -1; /* T_nonCriticalExtension_29 */ static int hf_nr_rrc_criticalExtensions_29 = -1; /* T_criticalExtensions_29 */ static int hf_nr_rrc_rrcSetupComplete_01 = -1; /* RRCSetupComplete_IEs */ static int hf_nr_rrc_criticalExtensionsFuture_29 = -1; /* T_criticalExtensionsFuture_29 */ @@ -1161,12 +1169,12 @@ static int hf_nr_rrc_s_NSSAI_List = -1; /* SEQUENCE_SIZE_1_maxNrofS_NS static int hf_nr_rrc_s_NSSAI_List_item = -1; /* S_NSSAI */ static int hf_nr_rrc_ng_5G_S_TMSI_Value = -1; /* T_ng_5G_S_TMSI_Value */ static int hf_nr_rrc_ng_5G_S_TMSI_Part2 = -1; /* BIT_STRING_SIZE_9 */ -static int hf_nr_rrc_nonCriticalExtension_57 = -1; /* RRCSetupComplete_v1610_IEs */ +static int hf_nr_rrc_nonCriticalExtension_59 = -1; /* RRCSetupComplete_v1610_IEs */ static int hf_nr_rrc_iab_NodeIndication_r16 = -1; /* T_iab_NodeIndication_r16 */ static int hf_nr_rrc_idleMeasAvailable_r16_01 = -1; /* T_idleMeasAvailable_r16_01 */ static int hf_nr_rrc_mobilityHistoryAvail_r16_01 = -1; /* T_mobilityHistoryAvail_r16_01 */ static int hf_nr_rrc_mobilityState_r16_01 = -1; /* T_mobilityState_r16_01 */ -static int hf_nr_rrc_nonCriticalExtension_58 = -1; /* T_nonCriticalExtension_30 */ +static int hf_nr_rrc_nonCriticalExtension_60 = -1; /* T_nonCriticalExtension_30 */ static int hf_nr_rrc_amf_Identifier = -1; /* AMF_Identifier */ static int hf_nr_rrc_rrcSetupRequest_01 = -1; /* RRCSetupRequest_IEs */ static int hf_nr_rrc_ue_Identity_02 = -1; /* InitialUE_Identity */ @@ -1186,8 +1194,8 @@ static int hf_nr_rrc_criticalExtensions_31 = -1; /* T_criticalExtensions_31 */ static int hf_nr_rrc_scgFailureInformation_01 = -1; /* SCGFailureInformation_IEs */ static int hf_nr_rrc_criticalExtensionsFuture_31 = -1; /* T_criticalExtensionsFuture_31 */ static int hf_nr_rrc_failureReportSCG = -1; /* FailureReportSCG */ -static int hf_nr_rrc_nonCriticalExtension_59 = -1; /* SCGFailureInformation_v1590_IEs */ -static int hf_nr_rrc_nonCriticalExtension_60 = -1; /* T_nonCriticalExtension_31 */ +static int hf_nr_rrc_nonCriticalExtension_61 = -1; /* SCGFailureInformation_v1590_IEs */ +static int hf_nr_rrc_nonCriticalExtension_62 = -1; /* T_nonCriticalExtension_31 */ static int hf_nr_rrc_failureType_02 = -1; /* T_failureType_02 */ static int hf_nr_rrc_measResultFreqList = -1; /* MeasResultFreqList */ static int hf_nr_rrc_measResultSCG_Failure = -1; /* T_measResultSCG_Failure */ @@ -1198,8 +1206,8 @@ static int hf_nr_rrc_criticalExtensions_32 = -1; /* T_criticalExtensions_32 */ static int hf_nr_rrc_scgFailureInformationEUTRA_01 = -1; /* SCGFailureInformationEUTRA_IEs */ static int hf_nr_rrc_criticalExtensionsFuture_32 = -1; /* T_criticalExtensionsFuture_32 */ static int hf_nr_rrc_failureReportSCG_EUTRA = -1; /* FailureReportSCG_EUTRA */ -static int hf_nr_rrc_nonCriticalExtension_61 = -1; /* SCGFailureInformationEUTRA_v1590_IEs */ -static int hf_nr_rrc_nonCriticalExtension_62 = -1; /* T_nonCriticalExtension_32 */ +static int hf_nr_rrc_nonCriticalExtension_63 = -1; /* SCGFailureInformationEUTRA_v1590_IEs */ +static int hf_nr_rrc_nonCriticalExtension_64 = -1; /* T_nonCriticalExtension_32 */ static int hf_nr_rrc_failureType_03 = -1; /* T_failureType_03 */ static int hf_nr_rrc_measResultFreqListMRDC = -1; /* MeasResultFreqListFailMRDC */ static int hf_nr_rrc_measResultSCG_FailureMRDC = -1; /* T_measResultSCG_FailureMRDC */ @@ -1208,16 +1216,16 @@ static int hf_nr_rrc_criticalExtensions_33 = -1; /* T_criticalExtensions_33 */ static int hf_nr_rrc_securityModeCommand_01 = -1; /* SecurityModeCommand_IEs */ static int hf_nr_rrc_criticalExtensionsFuture_33 = -1; /* T_criticalExtensionsFuture_33 */ static int hf_nr_rrc_securityConfigSMC = -1; /* SecurityConfigSMC */ -static int hf_nr_rrc_nonCriticalExtension_63 = -1; /* T_nonCriticalExtension_33 */ +static int hf_nr_rrc_nonCriticalExtension_65 = -1; /* T_nonCriticalExtension_33 */ static int hf_nr_rrc_securityAlgorithmConfig = -1; /* SecurityAlgorithmConfig */ static int hf_nr_rrc_criticalExtensions_34 = -1; /* T_criticalExtensions_34 */ static int hf_nr_rrc_securityModeComplete_01 = -1; /* SecurityModeComplete_IEs */ static int hf_nr_rrc_criticalExtensionsFuture_34 = -1; /* T_criticalExtensionsFuture_34 */ -static int hf_nr_rrc_nonCriticalExtension_64 = -1; /* T_nonCriticalExtension_34 */ +static int hf_nr_rrc_nonCriticalExtension_66 = -1; /* T_nonCriticalExtension_34 */ static int hf_nr_rrc_criticalExtensions_35 = -1; /* T_criticalExtensions_35 */ static int hf_nr_rrc_securityModeFailure_01 = -1; /* SecurityModeFailure_IEs */ static int hf_nr_rrc_criticalExtensionsFuture_35 = -1; /* T_criticalExtensionsFuture_35 */ -static int hf_nr_rrc_nonCriticalExtension_65 = -1; /* T_nonCriticalExtension_35 */ +static int hf_nr_rrc_nonCriticalExtension_67 = -1; /* T_nonCriticalExtension_35 */ static int hf_nr_rrc_cellSelectionInfo = -1; /* T_cellSelectionInfo */ static int hf_nr_rrc_q_RxLevMin = -1; /* Q_RxLevMin */ static int hf_nr_rrc_q_RxLevMinOffset = -1; /* INTEGER_1_8 */ @@ -1240,18 +1248,18 @@ static int hf_nr_rrc_plmnCommon = -1; /* UAC_AccessCategory1_Selecti static int hf_nr_rrc_individualPLMNList = -1; /* SEQUENCE_SIZE_2_maxPLMN_OF_UAC_AccessCategory1_SelectionAssistanceInfo */ static int hf_nr_rrc_individualPLMNList_item = -1; /* UAC_AccessCategory1_SelectionAssistanceInfo */ static int hf_nr_rrc_useFullResumeID = -1; /* T_useFullResumeID */ -static int hf_nr_rrc_nonCriticalExtension_66 = -1; /* SIB1_v1610_IEs */ +static int hf_nr_rrc_nonCriticalExtension_68 = -1; /* SIB1_v1610_IEs */ static int hf_nr_rrc_idleModeMeasurementsEUTRA_r16 = -1; /* T_idleModeMeasurementsEUTRA_r16 */ static int hf_nr_rrc_idleModeMeasurementsNR_r16 = -1; /* T_idleModeMeasurementsNR_r16 */ static int hf_nr_rrc_posSI_SchedulingInfo_r16 = -1; /* PosSI_SchedulingInfo_r16 */ -static int hf_nr_rrc_nonCriticalExtension_67 = -1; /* T_nonCriticalExtension_36 */ +static int hf_nr_rrc_nonCriticalExtension_69 = -1; /* T_nonCriticalExtension_36 */ static int hf_nr_rrc_criticalExtensions_36 = -1; /* T_criticalExtensions_36 */ static int hf_nr_rrc_sidelinkUEInformationNR_r16_03 = -1; /* SidelinkUEInformationNR_r16_IEs */ static int hf_nr_rrc_criticalExtensionsFuture_36 = -1; /* T_criticalExtensionsFuture_36 */ static int hf_nr_rrc_sl_RxInterestedFreqList_r16 = -1; /* SL_InterestedFreqList_r16 */ static int hf_nr_rrc_sl_TxResourceReqList_r16 = -1; /* SL_TxResourceReqList_r16 */ static int hf_nr_rrc_sl_FailureList_r16 = -1; /* SL_FailureList_r16 */ -static int hf_nr_rrc_nonCriticalExtension_68 = -1; /* T_nonCriticalExtension_37 */ +static int hf_nr_rrc_nonCriticalExtension_70 = -1; /* T_nonCriticalExtension_37 */ static int hf_nr_rrc_SL_InterestedFreqList_r16_item = -1; /* INTEGER_1_maxNrofFreqSL_r16 */ static int hf_nr_rrc_SL_TxResourceReqList_r16_item = -1; /* SL_TxResourceReq_r16 */ static int hf_nr_rrc_sl_DestinationIdentity_r16 = -1; /* SL_DestinationIdentity_r16 */ @@ -1292,15 +1300,15 @@ static int hf_nr_rrc_sib11_v1610 = -1; /* SIB11_r16 */ static int hf_nr_rrc_sib12_v1610 = -1; /* SIB12_r16 */ static int hf_nr_rrc_sib13_v1610 = -1; /* SIB13_r16 */ static int hf_nr_rrc_sib14_v1610 = -1; /* SIB14_r16 */ -static int hf_nr_rrc_nonCriticalExtension_69 = -1; /* T_nonCriticalExtension_38 */ +static int hf_nr_rrc_nonCriticalExtension_71 = -1; /* T_nonCriticalExtension_38 */ static int hf_nr_rrc_criticalExtensions_38 = -1; /* T_criticalExtensions_38 */ static int hf_nr_rrc_ueAssistanceInformation_02 = -1; /* UEAssistanceInformation_IEs */ static int hf_nr_rrc_criticalExtensionsFuture_38 = -1; /* T_criticalExtensionsFuture_38 */ static int hf_nr_rrc_delayBudgetReport = -1; /* DelayBudgetReport */ -static int hf_nr_rrc_nonCriticalExtension_70 = -1; /* UEAssistanceInformation_v1540_IEs */ +static int hf_nr_rrc_nonCriticalExtension_72 = -1; /* UEAssistanceInformation_v1540_IEs */ static int hf_nr_rrc_type1 = -1; /* T_type1 */ static int hf_nr_rrc_overheatingAssistance = -1; /* OverheatingAssistance */ -static int hf_nr_rrc_nonCriticalExtension_71 = -1; /* UEAssistanceInformation_v1610_IEs */ +static int hf_nr_rrc_nonCriticalExtension_73 = -1; /* UEAssistanceInformation_v1610_IEs */ static int hf_nr_rrc_reducedMaxCCs = -1; /* ReducedMaxCCs_r16 */ static int hf_nr_rrc_reducedMaxBW_FR1 = -1; /* ReducedMaxBW_FRx_r16 */ static int hf_nr_rrc_reducedMaxBW_FR2 = -1; /* ReducedMaxBW_FRx_r16 */ @@ -1319,7 +1327,7 @@ static int hf_nr_rrc_minSchedulingOffsetPreference_r16 = -1; /* MinSchedulingOf static int hf_nr_rrc_releasePreference_r16 = -1; /* ReleasePreference_r16 */ static int hf_nr_rrc_sl_UE_AssistanceInformationNR_r16 = -1; /* SL_UE_AssistanceInformationNR_r16 */ static int hf_nr_rrc_referenceTimeInfoPreference_r16 = -1; /* BOOLEAN */ -static int hf_nr_rrc_nonCriticalExtension_72 = -1; /* T_nonCriticalExtension_39 */ +static int hf_nr_rrc_nonCriticalExtension_74 = -1; /* T_nonCriticalExtension_39 */ static int hf_nr_rrc_affectedCarrierFreqList_r16 = -1; /* AffectedCarrierFreqList_r16 */ static int hf_nr_rrc_affectedCarrierFreqCombList_r16 = -1; /* AffectedCarrierFreqCombList_r16 */ static int hf_nr_rrc_AffectedCarrierFreqList_r16_item = -1; /* AffectedCarrierFreq_r16 */ @@ -1374,14 +1382,14 @@ static int hf_nr_rrc_criticalExtensionsFuture_39 = -1; /* T_criticalExtensionsF static int hf_nr_rrc_ue_CapabilityRAT_RequestList = -1; /* UE_CapabilityRAT_RequestList */ static int hf_nr_rrc_ue_CapabilityEnquiryExt = -1; /* T_ue_CapabilityEnquiryExt */ static int hf_nr_rrc_capabilityRequestFilterCommon = -1; /* UE_CapabilityRequestFilterCommon */ -static int hf_nr_rrc_nonCriticalExtension_73 = -1; /* UECapabilityEnquiry_v1610_IEs */ +static int hf_nr_rrc_nonCriticalExtension_75 = -1; /* UECapabilityEnquiry_v1610_IEs */ static int hf_nr_rrc_rrc_SegAllowed_r16 = -1; /* T_rrc_SegAllowed_r16 */ -static int hf_nr_rrc_nonCriticalExtension_74 = -1; /* T_nonCriticalExtension_40 */ +static int hf_nr_rrc_nonCriticalExtension_76 = -1; /* T_nonCriticalExtension_40 */ static int hf_nr_rrc_criticalExtensions_40 = -1; /* T_criticalExtensions_40 */ static int hf_nr_rrc_ueCapabilityInformation_01 = -1; /* UECapabilityInformation_IEs */ static int hf_nr_rrc_criticalExtensionsFuture_40 = -1; /* T_criticalExtensionsFuture_40 */ static int hf_nr_rrc_ue_CapabilityRAT_ContainerList = -1; /* UE_CapabilityRAT_ContainerList */ -static int hf_nr_rrc_nonCriticalExtension_75 = -1; /* T_nonCriticalExtension_41 */ +static int hf_nr_rrc_nonCriticalExtension_77 = -1; /* T_nonCriticalExtension_41 */ static int hf_nr_rrc_criticalExtensions_41 = -1; /* T_criticalExtensions_41 */ static int hf_nr_rrc_ueInformationRequest_r16_01 = -1; /* UEInformationRequest_r16_IEs */ static int hf_nr_rrc_criticalExtensionsFuture_41 = -1; /* T_criticalExtensionsFuture_41 */ @@ -1391,7 +1399,7 @@ static int hf_nr_rrc_connEstFailReportReq_r16 = -1; /* T_connEstFailReportReq_r static int hf_nr_rrc_ra_ReportReq_r16 = -1; /* T_ra_ReportReq_r16 */ static int hf_nr_rrc_rlf_ReportReq_r16 = -1; /* T_rlf_ReportReq_r16 */ static int hf_nr_rrc_mobilityHistoryReportReq_r16 = -1; /* T_mobilityHistoryReportReq_r16 */ -static int hf_nr_rrc_nonCriticalExtension_76 = -1; /* T_nonCriticalExtension_42 */ +static int hf_nr_rrc_nonCriticalExtension_78 = -1; /* T_nonCriticalExtension_42 */ static int hf_nr_rrc_criticalExtensions_42 = -1; /* T_criticalExtensions_42 */ static int hf_nr_rrc_ueInformationResponse_r16_01 = -1; /* UEInformationResponse_r16_IEs */ static int hf_nr_rrc_criticalExtensionsFuture_42 = -1; /* T_criticalExtensionsFuture_42 */ @@ -1400,7 +1408,7 @@ static int hf_nr_rrc_connEstFailReport_r16 = -1; /* ConnEstFailReport_r16 */ static int hf_nr_rrc_ra_ReportList_r16 = -1; /* RA_ReportList_r16 */ static int hf_nr_rrc_rlf_Report_r16 = -1; /* RLF_Report_r16 */ static int hf_nr_rrc_mobilityHistoryReport_r16 = -1; /* MobilityHistoryReport_r16 */ -static int hf_nr_rrc_nonCriticalExtension_77 = -1; /* T_nonCriticalExtension_43 */ +static int hf_nr_rrc_nonCriticalExtension_79 = -1; /* T_nonCriticalExtension_43 */ static int hf_nr_rrc_absoluteTimeStamp_r16 = -1; /* AbsoluteTimeInfo_r16 */ static int hf_nr_rrc_logMeasInfoList_r16 = -1; /* LogMeasInfoList_r16 */ static int hf_nr_rrc_logMeasAvailable_r16 = -1; /* T_logMeasAvailable_r16 */ @@ -1432,7 +1440,10 @@ static int hf_nr_rrc_resultsSSB_Cell_r16 = -1; /* MeasQuantityResults */ static int hf_nr_rrc_rsIndexResults_r16 = -1; /* T_rsIndexResults_r16 */ static int hf_nr_rrc_resultsSSB_Indexes_r16 = -1; /* ResultsPerSSB_IndexList */ static int hf_nr_rrc_RA_ReportList_r16_item = -1; /* RA_Report_r16 */ -static int hf_nr_rrc_cellId_r16 = -1; /* CGI_Info_Logging_r16 */ +static int hf_nr_rrc_cellId_r16 = -1; /* T_cellId_r16 */ +static int hf_nr_rrc_cellGlobalId_r16 = -1; /* CGI_Info_Logging_r16 */ +static int hf_nr_rrc_pci_arfcn_r16 = -1; /* T_pci_arfcn_r16 */ +static int hf_nr_rrc_physCellId_r16 = -1; /* PhysCellId */ static int hf_nr_rrc_ra_InformationCommon_r16 = -1; /* RA_InformationCommon_r16 */ static int hf_nr_rrc_raPurpose_r16 = -1; /* T_raPurpose_r16 */ static int hf_nr_rrc_absoluteFrequencyPointA_r16 = -1; /* ARFCN_ValueNR */ @@ -1466,12 +1477,10 @@ static int hf_nr_rrc_nrPreviousCell_r16 = -1; /* CGI_Info_Logging_r16 */ static int hf_nr_rrc_eutraPreviousCell_r16 = -1; /* CGI_InfoEUTRALogging */ static int hf_nr_rrc_failedPCellId_r16 = -1; /* T_failedPCellId_r16 */ static int hf_nr_rrc_nrFailedPCellId_r16 = -1; /* T_nrFailedPCellId_r16 */ -static int hf_nr_rrc_cellGlobalId_r16 = -1; /* CGI_Info_Logging_r16 */ -static int hf_nr_rrc_pci_arfcn_r16 = -1; /* T_pci_arfcn_r16 */ -static int hf_nr_rrc_physCellId_r16 = -1; /* PhysCellId */ +static int hf_nr_rrc_pci_arfcn_r16_01 = -1; /* T_pci_arfcn_r16_01 */ static int hf_nr_rrc_eutraFailedPCellId_r16 = -1; /* T_eutraFailedPCellId_r16 */ static int hf_nr_rrc_cellGlobalId_r16_01 = -1; /* CGI_InfoEUTRALogging */ -static int hf_nr_rrc_pci_arfcn_r16_01 = -1; /* T_pci_arfcn_r16_01 */ +static int hf_nr_rrc_pci_arfcn_r16_02 = -1; /* T_pci_arfcn_r16_02 */ static int hf_nr_rrc_physCellId_r16_01 = -1; /* EUTRA_PhysCellId */ static int hf_nr_rrc_carrierFreq_r16_02 = -1; /* ARFCN_ValueEUTRA */ static int hf_nr_rrc_reconnectCellId_r16 = -1; /* T_reconnectCellId_r16 */ @@ -1491,7 +1500,8 @@ static int hf_nr_rrc_MeasResultList2EUTRA_r16_item = -1; /* MeasResult2EUTRA_r1 static int hf_nr_rrc_ssbFrequency_r16 = -1; /* ARFCN_ValueNR */ static int hf_nr_rrc_refFreqCSI_RS_r16 = -1; /* ARFCN_ValueNR */ static int hf_nr_rrc_measResultList_r16 = -1; /* MeasResultListNR */ -static int hf_nr_rrc_MeasResultListLogging2NR_r16_item = -1; /* MeasResultListLoggingNR_r16 */ +static int hf_nr_rrc_MeasResultListLogging2NR_r16_item = -1; /* MeasResultLogging2NR_r16 */ +static int hf_nr_rrc_measResultListLoggingNR_r16 = -1; /* MeasResultListLoggingNR_r16 */ static int hf_nr_rrc_MeasResultListLoggingNR_r16_item = -1; /* MeasResultLoggingNR_r16 */ static int hf_nr_rrc_numberOfGoodSSB_r16 = -1; /* INTEGER_1_maxNrofSSBs_r16 */ static int hf_nr_rrc_measResultList_r16_01 = -1; /* MeasResultListEUTRA */ @@ -1507,24 +1517,24 @@ static int hf_nr_rrc_ulDedicatedMessageSegment_r16_01 = -1; /* ULDedicatedMessa static int hf_nr_rrc_criticalExtensionsFuture_43 = -1; /* T_criticalExtensionsFuture_43 */ static int hf_nr_rrc_segmentNumber_r16_01 = -1; /* INTEGER_0_15 */ static int hf_nr_rrc_rrc_MessageSegmentType_r16_01 = -1; /* T_rrc_MessageSegmentType_r16_01 */ -static int hf_nr_rrc_nonCriticalExtension_78 = -1; /* T_nonCriticalExtension_44 */ +static int hf_nr_rrc_nonCriticalExtension_80 = -1; /* T_nonCriticalExtension_44 */ static int hf_nr_rrc_criticalExtensions_44 = -1; /* T_criticalExtensions_44 */ static int hf_nr_rrc_ulInformationTransfer_01 = -1; /* ULInformationTransfer_IEs */ static int hf_nr_rrc_criticalExtensionsFuture_44 = -1; /* T_criticalExtensionsFuture_44 */ -static int hf_nr_rrc_nonCriticalExtension_79 = -1; /* T_nonCriticalExtension_45 */ +static int hf_nr_rrc_nonCriticalExtension_81 = -1; /* T_nonCriticalExtension_45 */ static int hf_nr_rrc_criticalExtensions_45 = -1; /* T_criticalExtensions_45 */ static int hf_nr_rrc_c1_15 = -1; /* T_c1_15 */ static int hf_nr_rrc_ulInformationTransferIRAT_r16_01 = -1; /* ULInformationTransferIRAT_r16_IEs */ static int hf_nr_rrc_criticalExtensionsFuture_45 = -1; /* T_criticalExtensionsFuture_45 */ static int hf_nr_rrc_ul_DCCH_MessageEUTRA_r16 = -1; /* T_ul_DCCH_MessageEUTRA_r16 */ -static int hf_nr_rrc_nonCriticalExtension_80 = -1; /* T_nonCriticalExtension_46 */ +static int hf_nr_rrc_nonCriticalExtension_82 = -1; /* T_nonCriticalExtension_46 */ static int hf_nr_rrc_criticalExtensions_46 = -1; /* T_criticalExtensions_46 */ static int hf_nr_rrc_c1_16 = -1; /* T_c1_16 */ static int hf_nr_rrc_ulInformationTransferMRDC_01 = -1; /* ULInformationTransferMRDC_IEs */ static int hf_nr_rrc_criticalExtensionsFuture_46 = -1; /* T_criticalExtensionsFuture_46 */ static int hf_nr_rrc_ul_DCCH_MessageNR = -1; /* T_ul_DCCH_MessageNR */ static int hf_nr_rrc_ul_DCCH_MessageEUTRA = -1; /* T_ul_DCCH_MessageEUTRA */ -static int hf_nr_rrc_nonCriticalExtension_81 = -1; /* T_nonCriticalExtension_47 */ +static int hf_nr_rrc_nonCriticalExtension_83 = -1; /* T_nonCriticalExtension_47 */ static int hf_nr_rrc_cellReselectionInfoCommon = -1; /* T_cellReselectionInfoCommon */ static int hf_nr_rrc_nrofSS_BlocksToAverage = -1; /* INTEGER_2_maxNrofSS_BlocksToAverage */ static int hf_nr_rrc_absThreshSS_BlocksConsolidation = -1; /* ThresholdNR */ @@ -1564,8 +1574,8 @@ static int hf_nr_rrc_intraFreqNeighCellList = -1; /* IntraFreqNeighCellList */ static int hf_nr_rrc_intraFreqBlackCellList = -1; /* IntraFreqBlackCellList */ static int hf_nr_rrc_intraFreqNeighCellList_v1610 = -1; /* IntraFreqNeighCellList_v1610 */ static int hf_nr_rrc_intraFreqWhiteCellList_r16 = -1; /* IntraFreqWhiteCellList_r16 */ -static int hf_nr_rrc_intraFreqCAG_CellList_r16 = -1; /* SEQUENCE_SIZE_1_maxPLMN_OF_IntraFreqCAG_CellPerPLMN_r16 */ -static int hf_nr_rrc_intraFreqCAG_CellList_r16_item = -1; /* IntraFreqCAG_CellPerPLMN_r16 */ +static int hf_nr_rrc_intraFreqCAG_CellList_r16 = -1; /* SEQUENCE_SIZE_1_maxPLMN_OF_IntraFreqCAG_CellListPerPLMN_r16 */ +static int hf_nr_rrc_intraFreqCAG_CellList_r16_item = -1; /* IntraFreqCAG_CellListPerPLMN_r16 */ static int hf_nr_rrc_IntraFreqNeighCellList_item = -1; /* IntraFreqNeighCellInfo */ static int hf_nr_rrc_IntraFreqNeighCellList_v1610_item = -1; /* IntraFreqNeighCellInfo_v1610 */ static int hf_nr_rrc_q_OffsetCell = -1; /* Q_OffsetRange */ @@ -1593,8 +1603,8 @@ static int hf_nr_rrc_interFreqNeighCellList = -1; /* InterFreqNeighCellList */ static int hf_nr_rrc_interFreqBlackCellList = -1; /* InterFreqBlackCellList */ static int hf_nr_rrc_interFreqNeighCellList_v1610 = -1; /* InterFreqNeighCellList_v1610 */ static int hf_nr_rrc_interFreqWhiteCellList_r16 = -1; /* InterFreqWhiteCellList_r16 */ -static int hf_nr_rrc_interFreqCAG_CellList_r16 = -1; /* SEQUENCE_SIZE_1_maxPLMN_OF_InterFreqCAG_CellList_r16 */ -static int hf_nr_rrc_interFreqCAG_CellList_r16_item = -1; /* InterFreqCAG_CellList_r16 */ +static int hf_nr_rrc_interFreqCAG_CellList_r16 = -1; /* SEQUENCE_SIZE_1_maxPLMN_OF_InterFreqCAG_CellListPerPLMN_r16 */ +static int hf_nr_rrc_interFreqCAG_CellList_r16_item = -1; /* InterFreqCAG_CellListPerPLMN_r16 */ static int hf_nr_rrc_InterFreqNeighCellList_item = -1; /* InterFreqNeighCellInfo */ static int hf_nr_rrc_InterFreqNeighCellList_v1610_item = -1; /* InterFreqNeighCellInfo_v1610 */ static int hf_nr_rrc_InterFreqBlackCellList_item = -1; /* PCI_Range */ @@ -1692,7 +1702,7 @@ static int hf_nr_rrc_posSib5_1_r16 = -1; /* SIBpos_r16 */ static int hf_nr_rrc_posSib6_1_r16 = -1; /* SIBpos_r16 */ static int hf_nr_rrc_posSib6_2_r16 = -1; /* SIBpos_r16 */ static int hf_nr_rrc_posSib6_3_r16 = -1; /* SIBpos_r16 */ -static int hf_nr_rrc_nonCriticalExtension_82 = -1; /* T_nonCriticalExtension_48 */ +static int hf_nr_rrc_nonCriticalExtension_84 = -1; /* T_nonCriticalExtension_48 */ static int hf_nr_rrc_posSchedulingInfoList_r16 = -1; /* SEQUENCE_SIZE_1_maxSI_Message_OF_PosSchedulingInfo_r16 */ static int hf_nr_rrc_posSchedulingInfoList_r16_item = -1; /* PosSchedulingInfo_r16 */ static int hf_nr_rrc_posSI_RequestConfig_r16 = -1; /* SI_RequestConfig */ @@ -1879,6 +1889,7 @@ static int hf_nr_rrc_simultaneousSpatial_UpdatedList1_r16_item = -1; /* ServCel static int hf_nr_rrc_simultaneousSpatial_UpdatedList2_r16 = -1; /* SEQUENCE_SIZE_1_maxNrofServingCellsTCI_r16_OF_ServCellIndex */ static int hf_nr_rrc_simultaneousSpatial_UpdatedList2_r16_item = -1; /* ServCellIndex */ static int hf_nr_rrc_uplinkTxSwitchingOption_r16 = -1; /* T_uplinkTxSwitchingOption_r16 */ +static int hf_nr_rrc_uplinkTxSwitchingPowerBoosting_r16 = -1; /* T_uplinkTxSwitchingPowerBoosting_r16 */ static int hf_nr_rrc_reconfigurationWithSync = -1; /* ReconfigurationWithSync */ static int hf_nr_rrc_rlf_TimersAndConstants = -1; /* T_rlf_TimersAndConstants */ static int hf_nr_rrc_setup_32 = -1; /* RLF_TimersAndConstants */ @@ -2083,7 +2094,7 @@ static int hf_nr_rrc_tci_StatesPDCCH_ToReleaseList_item = -1; /* TCI_StateId */ static int hf_nr_rrc_tci_PresentInDCI = -1; /* T_tci_PresentInDCI */ static int hf_nr_rrc_pdcch_DMRS_ScramblingID = -1; /* INTEGER_0_65535 */ static int hf_nr_rrc_rb_Offset_r16 = -1; /* INTEGER_0_5 */ -static int hf_nr_rrc_tci_PresentForDCI_Format1_2_r16 = -1; /* INTEGER_1_3 */ +static int hf_nr_rrc_tci_PresentDCI_1_2_r16 = -1; /* INTEGER_1_3 */ static int hf_nr_rrc_coresetPoolIndex_r16 = -1; /* INTEGER_0_1 */ static int hf_nr_rrc_controlResourceSetId_v1610 = -1; /* ControlResourceSetId_v1610 */ static int hf_nr_rrc_schedulingCellInfo = -1; /* T_schedulingCellInfo */ @@ -2092,9 +2103,10 @@ static int hf_nr_rrc_cif_Presence = -1; /* BOOLEAN */ static int hf_nr_rrc_other = -1; /* T_other */ static int hf_nr_rrc_schedulingCellId = -1; /* ServCellIndex */ static int hf_nr_rrc_cif_InSchedulingCell = -1; /* INTEGER_1_7 */ -static int hf_nr_rrc_carrierIndicatorSize = -1; /* T_carrierIndicatorSize */ -static int hf_nr_rrc_carrierIndicatorSizeForDCI_Format1_2_r16 = -1; /* INTEGER_0_3 */ -static int hf_nr_rrc_carrierIndicatorSizeForDCI_Format0_2_r16 = -1; /* INTEGER_0_3 */ +static int hf_nr_rrc_carrierIndicatorSize_r16 = -1; /* T_carrierIndicatorSize_r16 */ +static int hf_nr_rrc_carrierIndicatorSizeDCI_1_2_r16 = -1; /* INTEGER_0_3 */ +static int hf_nr_rrc_carrierIndicatorSizeDCI_0_2_r16 = -1; /* INTEGER_0_3 */ +static int hf_nr_rrc_enableDefaultBeamForCCS_r16 = -1; /* T_enableDefaultBeamForCCS_r16 */ static int hf_nr_rrc_CSI_AperiodicTriggerStateList_item = -1; /* CSI_AperiodicTriggerState */ static int hf_nr_rrc_associatedReportConfigInfoList = -1; /* SEQUENCE_SIZE_1_maxNrofReportConfigPerAperiodicTrigger_OF_CSI_AssociatedReportConfigInfo */ static int hf_nr_rrc_associatedReportConfigInfoList_item = -1; /* CSI_AssociatedReportConfigInfo */ @@ -2155,7 +2167,7 @@ static int hf_nr_rrc_aperiodicTriggerStateList = -1; /* T_aperiodicTriggerState static int hf_nr_rrc_setup_34 = -1; /* CSI_AperiodicTriggerStateList */ static int hf_nr_rrc_semiPersistentOnPUSCH_TriggerStateList = -1; /* T_semiPersistentOnPUSCH_TriggerStateList */ static int hf_nr_rrc_setup_35 = -1; /* CSI_SemiPersistentOnPUSCH_TriggerStateList */ -static int hf_nr_rrc_reportTriggerSizeForDCI_Format0_2_r16 = -1; /* INTEGER_0_6 */ +static int hf_nr_rrc_reportTriggerSizeDCI_0_2_r16 = -1; /* INTEGER_0_6 */ static int hf_nr_rrc_carrier = -1; /* ServCellIndex */ static int hf_nr_rrc_resourcesForChannelMeasurement = -1; /* CSI_ResourceConfigId */ static int hf_nr_rrc_csi_IM_ResourcesForInterference_01 = -1; /* CSI_ResourceConfigId */ @@ -2219,13 +2231,13 @@ static int hf_nr_rrc_non_PMI_PortIndication_item = -1; /* PortIndexFor8Ranks */ static int hf_nr_rrc_semiPersistentOnPUSCH_v1530 = -1; /* T_semiPersistentOnPUSCH_v1530 */ static int hf_nr_rrc_reportSlotConfig_v1530 = -1; /* T_reportSlotConfig_v1530 */ static int hf_nr_rrc_semiPersistentOnPUSCH_v1610 = -1; /* T_semiPersistentOnPUSCH_v1610 */ -static int hf_nr_rrc_reportSlotOffsetListForDCI_Format0_2_r16 = -1; /* T_reportSlotOffsetListForDCI_Format0_2_r16 */ -static int hf_nr_rrc_reportSlotOffsetListForDCI_Format0_2_r16_item = -1; /* INTEGER_0_32 */ -static int hf_nr_rrc_reportSlotOffsetListForDCI_Format0_1_r16 = -1; /* T_reportSlotOffsetListForDCI_Format0_1_r16 */ -static int hf_nr_rrc_reportSlotOffsetListForDCI_Format0_1_r16_item = -1; /* INTEGER_0_32 */ +static int hf_nr_rrc_reportSlotOffsetListDCI_0_2_r16 = -1; /* T_reportSlotOffsetListDCI_0_2_r16 */ +static int hf_nr_rrc_reportSlotOffsetListDCI_0_2_r16_item = -1; /* INTEGER_0_32 */ +static int hf_nr_rrc_reportSlotOffsetListDCI_0_1_r16 = -1; /* T_reportSlotOffsetListDCI_0_1_r16 */ +static int hf_nr_rrc_reportSlotOffsetListDCI_0_1_r16_item = -1; /* INTEGER_0_32 */ static int hf_nr_rrc_aperiodic_v1610 = -1; /* T_aperiodic_v1610 */ -static int hf_nr_rrc_reportSlotOffsetListForDCI_Format0_2_r16_01 = -1; /* T_reportSlotOffsetListForDCI_Format0_2_r16_01 */ -static int hf_nr_rrc_reportSlotOffsetListForDCI_Format0_1_r16_01 = -1; /* T_reportSlotOffsetListForDCI_Format0_1_r16_01 */ +static int hf_nr_rrc_reportSlotOffsetListDCI_0_2_r16_01 = -1; /* T_reportSlotOffsetListDCI_0_2_r16_01 */ +static int hf_nr_rrc_reportSlotOffsetListDCI_0_1_r16_01 = -1; /* T_reportSlotOffsetListDCI_0_1_r16_01 */ static int hf_nr_rrc_reportQuantity_r16 = -1; /* T_reportQuantity_r16 */ static int hf_nr_rrc_cri_SINR_r16 = -1; /* NULL */ static int hf_nr_rrc_ssb_Index_SINR_r16 = -1; /* NULL */ @@ -2433,7 +2445,7 @@ static int hf_nr_rrc_nr_PRS_Measurement_r16 = -1; /* NR_PRS_MeasurementInfoList static int hf_nr_rrc_EUTRA_RSTD_InfoList_item = -1; /* EUTRA_RSTD_Info */ static int hf_nr_rrc_measPRS_Offset = -1; /* INTEGER_0_39 */ static int hf_nr_rrc_NR_PRS_MeasurementInfoList_r16_item = -1; /* NR_PRS_MeasurementInfo_r16 */ -static int hf_nr_rrc_dl_PRS_ARFCN_PointA_r16 = -1; /* ARFCN_ValueNR */ +static int hf_nr_rrc_dl_PRS_PointA_r16 = -1; /* ARFCN_ValueNR */ static int hf_nr_rrc_nr_MeasPRS_RepetitionAndOffset_r16 = -1; /* T_nr_MeasPRS_RepetitionAndOffset_r16 */ static int hf_nr_rrc_ms20_r16 = -1; /* INTEGER_0_19 */ static int hf_nr_rrc_ms40_r16 = -1; /* INTEGER_0_39 */ @@ -2501,6 +2513,7 @@ static int hf_nr_rrc_mgrp = -1; /* T_mgrp */ static int hf_nr_rrc_mgta = -1; /* T_mgta */ static int hf_nr_rrc_refServCellIndicator = -1; /* T_refServCellIndicator */ static int hf_nr_rrc_refFR2ServCellAsyncCA_r16 = -1; /* ServCellIndex */ +static int hf_nr_rrc_mgl_r16 = -1; /* T_mgl_r16 */ static int hf_nr_rrc_gapSharingFR2 = -1; /* T_gapSharingFR2 */ static int hf_nr_rrc_setup_43 = -1; /* MeasGapSharingScheme */ static int hf_nr_rrc_gapSharingFR1 = -1; /* T_gapSharingFR1 */ @@ -2523,7 +2536,6 @@ static int hf_nr_rrc_idleRSRQ_Threshold_NR_r16 = -1; /* RSRQ_Range */ static int hf_nr_rrc_ssb_MeasConfig_r16 = -1; /* T_ssb_MeasConfig_r16 */ static int hf_nr_rrc_nrofSS_BlocksToAverage_r16 = -1; /* INTEGER_2_maxNrofSS_BlocksToAverage */ static int hf_nr_rrc_absThreshSS_BlocksConsolidation_r16 = -1; /* ThresholdNR */ -static int hf_nr_rrc_smtc_r16 = -1; /* SSB_MTC */ static int hf_nr_rrc_ssb_ToMeasure_r16 = -1; /* SSB_ToMeasure */ static int hf_nr_rrc_deriveSSB_IndexFromCell_r16 = -1; /* BOOLEAN */ static int hf_nr_rrc_ss_RSSI_Measurement_r16 = -1; /* SS_RSSI_Measurement */ @@ -2553,6 +2565,8 @@ static int hf_nr_rrc_SRS_ResourceListConfigCLI_r16_item = -1; /* SRS_ResourceCo static int hf_nr_rrc_RSSI_ResourceListConfigCLI_r16_item = -1; /* RSSI_ResourceConfigCLI_r16 */ static int hf_nr_rrc_srs_Resource_r16 = -1; /* SRS_Resource */ static int hf_nr_rrc_srs_SCS_r16 = -1; /* SubcarrierSpacing */ +static int hf_nr_rrc_refServCellIndex_r16 = -1; /* ServCellIndex */ +static int hf_nr_rrc_refBWP_r16 = -1; /* BWP_Id */ static int hf_nr_rrc_rssi_ResourceId_r16 = -1; /* RSSI_ResourceId_r16 */ static int hf_nr_rrc_rssi_SCS_r16 = -1; /* SubcarrierSpacing */ static int hf_nr_rrc_startPRB_r16 = -1; /* INTEGER_0_2169 */ @@ -2696,7 +2710,7 @@ static int hf_nr_rrc_MeasResultListUTRA_FDD_r16_item = -1; /* MeasResultUTRA_FD static int hf_nr_rrc_measResult_r16_02 = -1; /* T_measResult_r16_02 */ static int hf_nr_rrc_utra_FDD_RSCP_r16 = -1; /* INTEGER_M5_91 */ static int hf_nr_rrc_utra_FDD_EcN0_r16 = -1; /* INTEGER_0_49 */ -static int hf_nr_rrc_rssi_Result_r16 = -1; /* T_rssi_Result_r16 */ +static int hf_nr_rrc_rssi_Result_r16 = -1; /* RSSI_Range_r16 */ static int hf_nr_rrc_channelOccupancy_r16 = -1; /* INTEGER_0_100 */ static int hf_nr_rrc_measResultListSRS_RSRP_r16 = -1; /* MeasResultListSRS_RSRP_r16 */ static int hf_nr_rrc_measResultListCLI_RSSI_r16 = -1; /* MeasResultListCLI_RSSI_r16 */ @@ -2774,8 +2788,8 @@ static int hf_nr_rrc_msgA_DMRS_AdditionalPosition_r16 = -1; /* T_msgA_DMRS_Addi static int hf_nr_rrc_msgA_MaxLength_r16 = -1; /* T_msgA_MaxLength_r16 */ static int hf_nr_rrc_msgA_PUSCH_DMRS_CDM_Group_r16 = -1; /* INTEGER_0_1 */ static int hf_nr_rrc_msgA_PUSCH_NrofPorts_r16 = -1; /* INTEGER_0_1 */ -static int hf_nr_rrc_msgA_ScramblingID0_r16 = -1; /* INTEGER_0_65536 */ -static int hf_nr_rrc_msgA_ScramblingID1_r16 = -1; /* INTEGER_0_65536 */ +static int hf_nr_rrc_msgA_ScramblingID0_r16 = -1; /* INTEGER_0_65535 */ +static int hf_nr_rrc_msgA_ScramblingID1_r16 = -1; /* INTEGER_0_65535 */ static int hf_nr_rrc_MultiFrequencyBandListNR_item = -1; /* FreqBandIndicatorNR */ static int hf_nr_rrc_MultiFrequencyBandListNR_SIB_item = -1; /* NR_MultiBandInfo */ static int hf_nr_rrc_nr_NS_PmaxList = -1; /* NR_NS_PmaxList */ @@ -2846,14 +2860,14 @@ static int hf_nr_rrc_controlResourceSetToReleaseList_r16 = -1; /* SEQUENCE_SIZE static int hf_nr_rrc_controlResourceSetToReleaseList_r16_item = -1; /* ControlResourceSetId_r16 */ static int hf_nr_rrc_searchSpacesToAddModListExt_r16 = -1; /* SEQUENCE_SIZE_1_10_OF_SearchSpaceExt_r16 */ static int hf_nr_rrc_searchSpacesToAddModListExt_r16_item = -1; /* SearchSpaceExt_r16 */ -static int hf_nr_rrc_searchSpaceSwitchingTimer_r16 = -1; /* INTEGER_1_80 */ -static int hf_nr_rrc_cellGroupsForSwitchingList_r16 = -1; /* SEQUENCE_SIZE_1_4_OF_CellGroupForSwitching_r16 */ -static int hf_nr_rrc_cellGroupsForSwitchingList_r16_item = -1; /* CellGroupForSwitching_r16 */ static int hf_nr_rrc_uplinkCancellation_r16 = -1; /* T_uplinkCancellation_r16 */ static int hf_nr_rrc_setup_54 = -1; /* UplinkCancellation_r16 */ static int hf_nr_rrc_monitoringCapabilityConfig_r16 = -1; /* T_monitoringCapabilityConfig_r16 */ -static int hf_nr_rrc_searchSpaceSwitchingDelay_r16 = -1; /* INTEGER_10_52 */ -static int hf_nr_rrc_CellGroupForSwitching_r16_item = -1; /* ServCellIndex */ +static int hf_nr_rrc_searchSpaceSwitchConfig_r16 = -1; /* SearchSpaceSwitchConfig_r16 */ +static int hf_nr_rrc_cellGroupsForSwitchList_r16 = -1; /* SEQUENCE_SIZE_1_4_OF_CellGroupForSwitch_r16 */ +static int hf_nr_rrc_cellGroupsForSwitchList_r16_item = -1; /* CellGroupForSwitch_r16 */ +static int hf_nr_rrc_searchSpaceSwitchDelay_r16 = -1; /* INTEGER_10_52 */ +static int hf_nr_rrc_CellGroupForSwitch_r16_item = -1; /* ServCellIndex */ static int hf_nr_rrc_controlResourceSetZero = -1; /* ControlResourceSetZero */ static int hf_nr_rrc_commonControlResourceSet = -1; /* ControlResourceSet */ static int hf_nr_rrc_searchSpaceZero = -1; /* SearchSpaceZero */ @@ -2878,6 +2892,7 @@ static int hf_nr_rrc_slotFormatIndicator = -1; /* T_slotFormatIndicator */ static int hf_nr_rrc_setup_55 = -1; /* SlotFormatIndicator */ static int hf_nr_rrc_availabilityIndicator_r16 = -1; /* T_availabilityIndicator_r16 */ static int hf_nr_rrc_setup_56 = -1; /* AvailabilityIndicator_r16 */ +static int hf_nr_rrc_searchSpaceSwitchTimer_r16 = -1; /* INTEGER_1_80 */ static int hf_nr_rrc_drb = -1; /* T_drb */ static int hf_nr_rrc_discardTimer = -1; /* T_discardTimer */ static int hf_nr_rrc_pdcp_SN_SizeUL = -1; /* T_pdcp_SN_SizeUL */ @@ -2914,18 +2929,18 @@ static int hf_nr_rrc_cipheringDisabled = -1; /* T_cipheringDisabled */ static int hf_nr_rrc_discardTimerExt_r16 = -1; /* T_discardTimerExt_r16 */ static int hf_nr_rrc_setup_57 = -1; /* DiscardTimerExt_r16 */ static int hf_nr_rrc_moreThanTwoRLC_DRB_r16 = -1; /* T_moreThanTwoRLC_DRB_r16 */ -static int hf_nr_rrc_splitSecondaryPath = -1; /* LogicalChannelIdentity */ -static int hf_nr_rrc_duplicationState = -1; /* T_duplicationState */ -static int hf_nr_rrc_duplicationState_item = -1; /* BOOLEAN */ +static int hf_nr_rrc_splitSecondaryPath_r16 = -1; /* LogicalChannelIdentity */ +static int hf_nr_rrc_duplicationState_r16 = -1; /* T_duplicationState_r16 */ +static int hf_nr_rrc_duplicationState_r16_item = -1; /* BOOLEAN */ static int hf_nr_rrc_ethernetHeaderCompression_r16 = -1; /* T_ethernetHeaderCompression_r16 */ static int hf_nr_rrc_setup_58 = -1; /* EthernetHeaderCompression_r16 */ -static int hf_nr_rrc_ehc_Common = -1; /* T_ehc_Common */ -static int hf_nr_rrc_ehc_CID_Length = -1; /* T_ehc_CID_Length */ -static int hf_nr_rrc_ehc_Downlink = -1; /* T_ehc_Downlink */ -static int hf_nr_rrc_drb_ContinueEHC_DL = -1; /* T_drb_ContinueEHC_DL */ -static int hf_nr_rrc_ehc_Uplink = -1; /* T_ehc_Uplink */ -static int hf_nr_rrc_maxCID_EHC_UL = -1; /* INTEGER_1_32767 */ -static int hf_nr_rrc_drb_ContinueEHC_UL = -1; /* T_drb_ContinueEHC_UL */ +static int hf_nr_rrc_ehc_Common_r16 = -1; /* T_ehc_Common_r16 */ +static int hf_nr_rrc_ehc_CID_Length_r16 = -1; /* T_ehc_CID_Length_r16 */ +static int hf_nr_rrc_ehc_Downlink_r16 = -1; /* T_ehc_Downlink_r16 */ +static int hf_nr_rrc_drb_ContinueEHC_DL_r16 = -1; /* T_drb_ContinueEHC_DL_r16 */ +static int hf_nr_rrc_ehc_Uplink_r16 = -1; /* T_ehc_Uplink_r16 */ +static int hf_nr_rrc_maxCID_EHC_UL_r16 = -1; /* INTEGER_1_32767 */ +static int hf_nr_rrc_drb_ContinueEHC_UL_r16 = -1; /* T_drb_ContinueEHC_UL_r16 */ static int hf_nr_rrc_dataScramblingIdentityPDSCH = -1; /* INTEGER_0_1023 */ static int hf_nr_rrc_dmrs_DownlinkForPDSCH_MappingTypeA = -1; /* T_dmrs_DownlinkForPDSCH_MappingTypeA */ static int hf_nr_rrc_setup_59 = -1; /* DMRS_DownlinkConfig */ @@ -2972,33 +2987,33 @@ static int hf_nr_rrc_maxMIMO_Layers_r16 = -1; /* T_maxMIMO_Layers_r16 */ static int hf_nr_rrc_setup_62 = -1; /* MaxMIMO_LayersDL_r16 */ static int hf_nr_rrc_minimumSchedulingOffsetK0_r16 = -1; /* T_minimumSchedulingOffsetK0_r16 */ static int hf_nr_rrc_setup_63 = -1; /* MinSchedulingOffsetK0_Values_r16 */ -static int hf_nr_rrc_antennaPortsFieldPresenceForDCI_Format1_2_r16 = -1; /* T_antennaPortsFieldPresenceForDCI_Format1_2_r16 */ -static int hf_nr_rrc_aperiodicZP_CSI_RS_ResourceSetsToAddModListForDCI_Format1_2_r16 = -1; /* SEQUENCE_SIZE_1_maxNrofZP_CSI_RS_ResourceSets_OF_ZP_CSI_RS_ResourceSet */ -static int hf_nr_rrc_aperiodicZP_CSI_RS_ResourceSetsToAddModListForDCI_Format1_2_r16_item = -1; /* ZP_CSI_RS_ResourceSet */ -static int hf_nr_rrc_aperiodicZP_CSI_RS_ResourceSetsToReleaseListForDCI_Format1_2_r16 = -1; /* SEQUENCE_SIZE_1_maxNrofZP_CSI_RS_ResourceSets_OF_ZP_CSI_RS_ResourceSetId */ -static int hf_nr_rrc_aperiodicZP_CSI_RS_ResourceSetsToReleaseListForDCI_Format1_2_r16_item = -1; /* ZP_CSI_RS_ResourceSetId */ -static int hf_nr_rrc_dmrs_DownlinkForPDSCH_MappingTypeA_ForDCI_Format1_2_r16 = -1; /* T_dmrs_DownlinkForPDSCH_MappingTypeA_ForDCI_Format1_2_r16 */ -static int hf_nr_rrc_dmrs_DownlinkForPDSCH_MappingTypeB_ForDCI_Format1_2_r16 = -1; /* T_dmrs_DownlinkForPDSCH_MappingTypeB_ForDCI_Format1_2_r16 */ -static int hf_nr_rrc_dmrs_SequenceInitializationForDCI_Format1_2_r16 = -1; /* T_dmrs_SequenceInitializationForDCI_Format1_2_r16 */ -static int hf_nr_rrc_harq_ProcessNumberSizeForDCI_Format1_2_r16 = -1; /* INTEGER_0_4 */ -static int hf_nr_rrc_mcs_TableForDCI_Format1_2_r16 = -1; /* T_mcs_TableForDCI_Format1_2_r16 */ -static int hf_nr_rrc_numberOfBitsForRV_ForDCI_Format1_2_r16 = -1; /* INTEGER_0_2 */ -static int hf_nr_rrc_pdsch_TimeDomainAllocationListForDCI_Format1_2_r16 = -1; /* T_pdsch_TimeDomainAllocationListForDCI_Format1_2_r16 */ +static int hf_nr_rrc_antennaPortsFieldPresenceDCI_1_2_r16 = -1; /* T_antennaPortsFieldPresenceDCI_1_2_r16 */ +static int hf_nr_rrc_aperiodicZP_CSI_RS_ResourceSetsToAddModListDCI_1_2_r16 = -1; /* SEQUENCE_SIZE_1_maxNrofZP_CSI_RS_ResourceSets_OF_ZP_CSI_RS_ResourceSet */ +static int hf_nr_rrc_aperiodicZP_CSI_RS_ResourceSetsToAddModListDCI_1_2_r16_item = -1; /* ZP_CSI_RS_ResourceSet */ +static int hf_nr_rrc_aperiodicZP_CSI_RS_ResourceSetsToReleaseListDCI_1_2_r16 = -1; /* SEQUENCE_SIZE_1_maxNrofZP_CSI_RS_ResourceSets_OF_ZP_CSI_RS_ResourceSetId */ +static int hf_nr_rrc_aperiodicZP_CSI_RS_ResourceSetsToReleaseListDCI_1_2_r16_item = -1; /* ZP_CSI_RS_ResourceSetId */ +static int hf_nr_rrc_dmrs_DownlinkForPDSCH_MappingTypeA_DCI_1_2_r16 = -1; /* T_dmrs_DownlinkForPDSCH_MappingTypeA_DCI_1_2_r16 */ +static int hf_nr_rrc_dmrs_DownlinkForPDSCH_MappingTypeB_DCI_1_2_r16 = -1; /* T_dmrs_DownlinkForPDSCH_MappingTypeB_DCI_1_2_r16 */ +static int hf_nr_rrc_dmrs_SequenceInitializationDCI_1_2_r16 = -1; /* T_dmrs_SequenceInitializationDCI_1_2_r16 */ +static int hf_nr_rrc_harq_ProcessNumberSizeDCI_1_2_r16 = -1; /* INTEGER_0_4 */ +static int hf_nr_rrc_mcs_TableDCI_1_2_r16 = -1; /* T_mcs_TableDCI_1_2_r16 */ +static int hf_nr_rrc_numberOfBitsForRV_DCI_1_2_r16 = -1; /* INTEGER_0_2 */ +static int hf_nr_rrc_pdsch_TimeDomainAllocationListDCI_1_2_r16 = -1; /* T_pdsch_TimeDomainAllocationListDCI_1_2_r16 */ static int hf_nr_rrc_setup_64 = -1; /* PDSCH_TimeDomainResourceAllocationList_r16 */ -static int hf_nr_rrc_prb_BundlingTypeForDCI_Format1_2_r16 = -1; /* T_prb_BundlingTypeForDCI_Format1_2_r16 */ +static int hf_nr_rrc_prb_BundlingTypeDCI_1_2_r16 = -1; /* T_prb_BundlingTypeDCI_1_2_r16 */ static int hf_nr_rrc_staticBundling_r16 = -1; /* T_staticBundling_r16 */ static int hf_nr_rrc_bundleSize_r16 = -1; /* T_bundleSize_r16 */ static int hf_nr_rrc_dynamicBundling_r16 = -1; /* T_dynamicBundling_r16 */ static int hf_nr_rrc_bundleSizeSet1_r16 = -1; /* T_bundleSizeSet1_r16 */ static int hf_nr_rrc_bundleSizeSet2_r16 = -1; /* T_bundleSizeSet2_r16 */ -static int hf_nr_rrc_priorityIndicatorForDCI_Format1_2_r16 = -1; /* T_priorityIndicatorForDCI_Format1_2_r16 */ -static int hf_nr_rrc_rateMatchPatternGroup1ForDCI_Format1_2_r16 = -1; /* RateMatchPatternGroup */ -static int hf_nr_rrc_rateMatchPatternGroup2ForDCI_Format1_2_r16 = -1; /* RateMatchPatternGroup */ -static int hf_nr_rrc_resourceAllocationType1GranularityForDCI_Format1_2_r16 = -1; /* T_resourceAllocationType1GranularityForDCI_Format1_2_r16 */ -static int hf_nr_rrc_vrb_ToPRB_InterleaverForDCI_Format1_2_r16 = -1; /* T_vrb_ToPRB_InterleaverForDCI_Format1_2_r16 */ -static int hf_nr_rrc_referenceOfSLIVForDCI_Format1_2_r16 = -1; /* T_referenceOfSLIVForDCI_Format1_2_r16 */ -static int hf_nr_rrc_resourceAllocationForDCI_Format1_2_r16 = -1; /* T_resourceAllocationForDCI_Format1_2_r16 */ -static int hf_nr_rrc_priorityIndicatorForDCI_Format1_1_r16 = -1; /* T_priorityIndicatorForDCI_Format1_1_r16 */ +static int hf_nr_rrc_priorityIndicatorDCI_1_2_r16 = -1; /* T_priorityIndicatorDCI_1_2_r16 */ +static int hf_nr_rrc_rateMatchPatternGroup1DCI_1_2_r16 = -1; /* RateMatchPatternGroup */ +static int hf_nr_rrc_rateMatchPatternGroup2DCI_1_2_r16 = -1; /* RateMatchPatternGroup */ +static int hf_nr_rrc_resourceAllocationType1GranularityDCI_1_2_r16 = -1; /* T_resourceAllocationType1GranularityDCI_1_2_r16 */ +static int hf_nr_rrc_vrb_ToPRB_InterleaverDCI_1_2_r16 = -1; /* T_vrb_ToPRB_InterleaverDCI_1_2_r16 */ +static int hf_nr_rrc_referenceOfSLIVDCI_1_2_r16 = -1; /* T_referenceOfSLIVDCI_1_2_r16 */ +static int hf_nr_rrc_resourceAllocationDCI_1_2_r16 = -1; /* T_resourceAllocationDCI_1_2_r16 */ +static int hf_nr_rrc_priorityIndicatorDCI_1_1_r16 = -1; /* T_priorityIndicatorDCI_1_1_r16 */ static int hf_nr_rrc_dataScramblingIdentityPDSCH2_r16 = -1; /* INTEGER_0_1023 */ static int hf_nr_rrc_pdsch_TimeDomainAllocationList_r16 = -1; /* T_pdsch_TimeDomainAllocationList_r16 */ static int hf_nr_rrc_repetitionSchemeConfig_r16 = -1; /* T_repetitionSchemeConfig_r16 */ @@ -3036,6 +3051,10 @@ static int hf_nr_rrc_multiplePHR = -1; /* BOOLEAN */ static int hf_nr_rrc_dummy_03 = -1; /* BOOLEAN */ static int hf_nr_rrc_phr_Type2OtherCell = -1; /* BOOLEAN */ static int hf_nr_rrc_phr_ModeOtherCG = -1; /* T_phr_ModeOtherCG */ +static int hf_nr_rrc_mpe_Reporting_FR2_r16 = -1; /* T_mpe_Reporting_FR2_r16 */ +static int hf_nr_rrc_setup_68 = -1; /* MPE_Config_FR2_r16 */ +static int hf_nr_rrc_mpe_ProhibitTimer_r16 = -1; /* T_mpe_ProhibitTimer_r16 */ +static int hf_nr_rrc_mpe_Threshold_r16 = -1; /* T_mpe_Threshold_r16 */ static int hf_nr_rrc_harq_ACK_SpatialBundlingPUCCH = -1; /* T_harq_ACK_SpatialBundlingPUCCH */ static int hf_nr_rrc_harq_ACK_SpatialBundlingPUSCH = -1; /* T_harq_ACK_SpatialBundlingPUSCH */ static int hf_nr_rrc_p_NR_FR1 = -1; /* P_Max */ @@ -3045,17 +3064,17 @@ static int hf_nr_rrc_tpc_PUCCH_RNTI = -1; /* RNTI_Value */ static int hf_nr_rrc_tpc_PUSCH_RNTI = -1; /* RNTI_Value */ static int hf_nr_rrc_sp_CSI_RNTI = -1; /* RNTI_Value */ static int hf_nr_rrc_cs_RNTI = -1; /* T_cs_RNTI */ -static int hf_nr_rrc_setup_68 = -1; /* RNTI_Value */ +static int hf_nr_rrc_setup_69 = -1; /* RNTI_Value */ static int hf_nr_rrc_mcs_C_RNTI = -1; /* RNTI_Value */ static int hf_nr_rrc_p_UE_FR1 = -1; /* P_Max */ static int hf_nr_rrc_xScale = -1; /* T_xScale */ static int hf_nr_rrc_pdcch_BlindDetection = -1; /* T_pdcch_BlindDetection */ -static int hf_nr_rrc_setup_69 = -1; /* PDCCH_BlindDetection */ +static int hf_nr_rrc_setup_70 = -1; /* PDCCH_BlindDetection */ static int hf_nr_rrc_dcp_Config_r16 = -1; /* T_dcp_Config_r16 */ -static int hf_nr_rrc_setup_70 = -1; /* DCP_Config_r16 */ -static int hf_nr_rrc_harq_ACK_SpatialBundlingPUCCH_secondaryPUCCH_group_r16 = -1; /* T_harq_ACK_SpatialBundlingPUCCH_secondaryPUCCH_group_r16 */ -static int hf_nr_rrc_harq_ACK_SpatialBundlingPUSCH_secondaryPUCCH_group_r16 = -1; /* T_harq_ACK_SpatialBundlingPUSCH_secondaryPUCCH_group_r16 */ -static int hf_nr_rrc_pdsch_HARQ_ACK_Codebook_secondaryPUCCH_group_r16 = -1; /* T_pdsch_HARQ_ACK_Codebook_secondaryPUCCH_group_r16 */ +static int hf_nr_rrc_setup_71 = -1; /* DCP_Config_r16 */ +static int hf_nr_rrc_harq_ACK_SpatialBundlingPUCCH_secondaryPUCCHgroup_r16 = -1; /* T_harq_ACK_SpatialBundlingPUCCH_secondaryPUCCHgroup_r16 */ +static int hf_nr_rrc_harq_ACK_SpatialBundlingPUSCH_secondaryPUCCHgroup_r16 = -1; /* T_harq_ACK_SpatialBundlingPUSCH_secondaryPUCCHgroup_r16 */ +static int hf_nr_rrc_pdsch_HARQ_ACK_Codebook_secondaryPUCCHgroup_r16 = -1; /* T_pdsch_HARQ_ACK_Codebook_secondaryPUCCHgroup_r16 */ static int hf_nr_rrc_p_NR_FR2_r16 = -1; /* P_Max */ static int hf_nr_rrc_p_UE_FR2_r16 = -1; /* P_Max */ static int hf_nr_rrc_nrdc_PCmode_FR1_r16 = -1; /* T_nrdc_PCmode_FR1_r16 */ @@ -3066,17 +3085,17 @@ static int hf_nr_rrc_ul_TotalDAI_Included_r16 = -1; /* T_ul_TotalDAI_Included_r static int hf_nr_rrc_pdsch_HARQ_ACK_OneShotFeedback_r16 = -1; /* T_pdsch_HARQ_ACK_OneShotFeedback_r16 */ static int hf_nr_rrc_pdsch_HARQ_ACK_OneShotFeedbackNDI_r16 = -1; /* T_pdsch_HARQ_ACK_OneShotFeedbackNDI_r16 */ static int hf_nr_rrc_pdsch_HARQ_ACK_OneShotFeedbackCBG_r16 = -1; /* T_pdsch_HARQ_ACK_OneShotFeedbackCBG_r16 */ -static int hf_nr_rrc_downlinkAssignmentIndexForDCI_Format0_2_r16 = -1; /* T_downlinkAssignmentIndexForDCI_Format0_2_r16 */ -static int hf_nr_rrc_downlinkAssignmentIndexForDCI_Format1_2_r16 = -1; /* T_downlinkAssignmentIndexForDCI_Format1_2_r16 */ +static int hf_nr_rrc_downlinkAssignmentIndexDCI_0_2_r16 = -1; /* T_downlinkAssignmentIndexDCI_0_2_r16 */ +static int hf_nr_rrc_downlinkAssignmentIndexDCI_1_2_r16 = -1; /* T_downlinkAssignmentIndexDCI_1_2_r16 */ static int hf_nr_rrc_pdsch_HARQ_ACK_CodebookList_r16 = -1; /* T_pdsch_HARQ_ACK_CodebookList_r16 */ -static int hf_nr_rrc_setup_71 = -1; /* PDSCH_HARQ_ACK_CodebookList_r16 */ +static int hf_nr_rrc_setup_72 = -1; /* PDSCH_HARQ_ACK_CodebookList_r16 */ static int hf_nr_rrc_ackNackFeedbackMode_r16 = -1; /* T_ackNackFeedbackMode_r16 */ static int hf_nr_rrc_pdcch_BlindDetectionCA_CombIndicator_r16 = -1; /* T_pdcch_BlindDetectionCA_CombIndicator_r16 */ -static int hf_nr_rrc_setup_72 = -1; /* PDCCH_BlindDetectionCA_CombIndicator_r16 */ +static int hf_nr_rrc_setup_73 = -1; /* PDCCH_BlindDetectionCA_CombIndicator_r16 */ static int hf_nr_rrc_pdcch_BlindDetection2_r16 = -1; /* T_pdcch_BlindDetection2_r16 */ -static int hf_nr_rrc_setup_73 = -1; /* PDCCH_BlindDetection2_r16 */ +static int hf_nr_rrc_setup_74 = -1; /* PDCCH_BlindDetection2_r16 */ static int hf_nr_rrc_pdcch_BlindDetection3_r16 = -1; /* T_pdcch_BlindDetection3_r16 */ -static int hf_nr_rrc_setup_74 = -1; /* PDCCH_BlindDetection3_r16 */ +static int hf_nr_rrc_setup_75 = -1; /* PDCCH_BlindDetection3_r16 */ static int hf_nr_rrc_bdFactorR_r16 = -1; /* T_bdFactorR_r16 */ static int hf_nr_rrc_ps_RNTI_r16 = -1; /* RNTI_Value */ static int hf_nr_rrc_ps_Offset_r16 = -1; /* INTEGER_1_120 */ @@ -3125,7 +3144,7 @@ static int hf_nr_rrc_resourceToAddModList_item = -1; /* PUCCH_Resource */ static int hf_nr_rrc_resourceToReleaseList = -1; /* SEQUENCE_SIZE_1_maxNrofPUCCH_Resources_OF_PUCCH_ResourceId */ static int hf_nr_rrc_resourceToReleaseList_item = -1; /* PUCCH_ResourceId */ static int hf_nr_rrc_format1 = -1; /* T_format1 */ -static int hf_nr_rrc_setup_75 = -1; /* PUCCH_FormatConfig */ +static int hf_nr_rrc_setup_76 = -1; /* PUCCH_FormatConfig */ static int hf_nr_rrc_format2 = -1; /* T_format2 */ static int hf_nr_rrc_format3 = -1; /* T_format3 */ static int hf_nr_rrc_format4 = -1; /* T_format4 */ @@ -3145,15 +3164,15 @@ static int hf_nr_rrc_pucch_PowerControl = -1; /* PUCCH_PowerControl */ static int hf_nr_rrc_resourceToAddModListExt_r16 = -1; /* SEQUENCE_SIZE_1_maxNrofPUCCH_Resources_OF_PUCCH_ResourceExt_r16 */ static int hf_nr_rrc_resourceToAddModListExt_r16_item = -1; /* PUCCH_ResourceExt_r16 */ static int hf_nr_rrc_dl_DataToUL_ACK_r16 = -1; /* T_dl_DataToUL_ACK_r16 */ -static int hf_nr_rrc_setup_76 = -1; /* DL_DataToUL_ACK_r16 */ -static int hf_nr_rrc_ul_AccessConfigListForDCI_Format_1_1_r16 = -1; /* T_ul_AccessConfigListForDCI_Format_1_1_r16 */ -static int hf_nr_rrc_setup_77 = -1; /* UL_AccessConfigListForDCI_Format1_1_r16 */ +static int hf_nr_rrc_setup_77 = -1; /* DL_DataToUL_ACK_r16 */ +static int hf_nr_rrc_ul_AccessConfigListDCI_1_1_r16 = -1; /* T_ul_AccessConfigListDCI_1_1_r16 */ +static int hf_nr_rrc_setup_78 = -1; /* UL_AccessConfigListDCI_1_1_r16 */ static int hf_nr_rrc_subslotLengthForPUCCH_r16 = -1; /* T_subslotLengthForPUCCH_r16 */ static int hf_nr_rrc_normalCP_r16 = -1; /* T_normalCP_r16 */ static int hf_nr_rrc_extendedCP_r16 = -1; /* T_extendedCP_r16 */ -static int hf_nr_rrc_dl_DataToUL_ACK_ForDCI_Format1_2_r16 = -1; /* T_dl_DataToUL_ACK_ForDCI_Format1_2_r16 */ -static int hf_nr_rrc_setup_78 = -1; /* DL_DataToUL_ACK_ForDCI_Format1_2_r16 */ -static int hf_nr_rrc_numberOfBitsForPUCCH_ResourceIndicatorForDCI_Format1_2_r16 = -1; /* INTEGER_0_3 */ +static int hf_nr_rrc_dl_DataToUL_ACK_DCI_1_2_r16 = -1; /* T_dl_DataToUL_ACK_DCI_1_2_r16 */ +static int hf_nr_rrc_setup_79 = -1; /* DL_DataToUL_ACK_DCI_1_2_r16 */ +static int hf_nr_rrc_numberOfBitsForPUCCH_ResourceIndicatorDCI_1_2_r16 = -1; /* INTEGER_0_3 */ static int hf_nr_rrc_dmrs_UplinkTransformPrecodingPUCCH_r16 = -1; /* T_dmrs_UplinkTransformPrecodingPUCCH_r16 */ static int hf_nr_rrc_spatialRelationInfoToAddModList2_r16 = -1; /* SEQUENCE_SIZE_1_maxNrofSpatialRelationInfosDiff_r16_OF_PUCCH_SpatialRelationInfo */ static int hf_nr_rrc_spatialRelationInfoToAddModList2_r16_item = -1; /* PUCCH_SpatialRelationInfo */ @@ -3168,7 +3187,7 @@ static int hf_nr_rrc_resourceGroupToAddModList_r16_item = -1; /* PUCCH_Resource static int hf_nr_rrc_resourceGroupToReleaseList_r16 = -1; /* SEQUENCE_SIZE_1_maxNrofPUCCH_ResourceGroups_r16_OF_PUCCH_ResourceGroupId_r16 */ static int hf_nr_rrc_resourceGroupToReleaseList_r16_item = -1; /* PUCCH_ResourceGroupId_r16 */ static int hf_nr_rrc_sps_PUCCH_AN_List_r16 = -1; /* T_sps_PUCCH_AN_List_r16 */ -static int hf_nr_rrc_setup_79 = -1; /* SPS_PUCCH_AN_List_r16 */ +static int hf_nr_rrc_setup_80 = -1; /* SPS_PUCCH_AN_List_r16 */ static int hf_nr_rrc_schedulingRequestResourceToAddModList_v1610 = -1; /* SEQUENCE_SIZE_1_maxNrofSR_Resources_OF_SchedulingRequestResourceConfig_v1610 */ static int hf_nr_rrc_schedulingRequestResourceToAddModList_v1610_item = -1; /* SchedulingRequestResourceConfig_v1610 */ static int hf_nr_rrc_interslotFrequencyHopping = -1; /* T_interslotFrequencyHopping */ @@ -3214,8 +3233,8 @@ static int hf_nr_rrc_pucch_ResourceGroupId_r16 = -1; /* PUCCH_ResourceGroupId_r static int hf_nr_rrc_resourcePerGroupList_r16 = -1; /* SEQUENCE_SIZE_1_maxNrofPUCCH_ResourcesPerGroup_r16_OF_PUCCH_ResourceId */ static int hf_nr_rrc_resourcePerGroupList_r16_item = -1; /* PUCCH_ResourceId */ static int hf_nr_rrc_DL_DataToUL_ACK_r16_item = -1; /* INTEGER_M1_15 */ -static int hf_nr_rrc_DL_DataToUL_ACK_ForDCI_Format1_2_r16_item = -1; /* INTEGER_0_15 */ -static int hf_nr_rrc_UL_AccessConfigListForDCI_Format1_1_r16_item = -1; /* INTEGER_0_15 */ +static int hf_nr_rrc_DL_DataToUL_ACK_DCI_1_2_r16_item = -1; /* INTEGER_0_15 */ +static int hf_nr_rrc_UL_AccessConfigListDCI_1_1_r16_item = -1; /* INTEGER_0_15 */ static int hf_nr_rrc_pucch_ResourceCommon = -1; /* INTEGER_0_15 */ static int hf_nr_rrc_pucch_GroupHopping = -1; /* T_pucch_GroupHopping */ static int hf_nr_rrc_hoppingId = -1; /* INTEGER_0_1023 */ @@ -3232,7 +3251,7 @@ static int hf_nr_rrc_pathlossReferenceRSs = -1; /* SEQUENCE_SIZE_1_maxNrofPUCC static int hf_nr_rrc_pathlossReferenceRSs_item = -1; /* PUCCH_PathlossReferenceRS */ static int hf_nr_rrc_twoPUCCH_PC_AdjustmentStates = -1; /* T_twoPUCCH_PC_AdjustmentStates */ static int hf_nr_rrc_pathlossReferenceRSs_v1610 = -1; /* T_pathlossReferenceRSs_v1610 */ -static int hf_nr_rrc_setup_80 = -1; /* PathlossReferenceRSs_v1610 */ +static int hf_nr_rrc_setup_81 = -1; /* PathlossReferenceRSs_v1610 */ static int hf_nr_rrc_p0_PUCCH_Id = -1; /* P0_PUCCH_Id */ static int hf_nr_rrc_p0_PUCCH_Value = -1; /* INTEGER_M16_15 */ static int hf_nr_rrc_PathlossReferenceRSs_v1610_item = -1; /* PUCCH_PathlossReferenceRS_r16 */ @@ -3255,7 +3274,7 @@ static int hf_nr_rrc_tpc_IndexPUCCH_SCell = -1; /* INTEGER_1_15 */ static int hf_nr_rrc_dataScramblingIdentityPUSCH = -1; /* INTEGER_0_1023 */ static int hf_nr_rrc_txConfig = -1; /* T_txConfig */ static int hf_nr_rrc_dmrs_UplinkForPUSCH_MappingTypeA = -1; /* T_dmrs_UplinkForPUSCH_MappingTypeA */ -static int hf_nr_rrc_setup_81 = -1; /* DMRS_UplinkConfig */ +static int hf_nr_rrc_setup_82 = -1; /* DMRS_UplinkConfig */ static int hf_nr_rrc_dmrs_UplinkForPUSCH_MappingTypeB = -1; /* T_dmrs_UplinkForPUSCH_MappingTypeB */ static int hf_nr_rrc_pusch_PowerControl = -1; /* PUSCH_PowerControl */ static int hf_nr_rrc_frequencyHopping_01 = -1; /* T_frequencyHopping_01 */ @@ -3263,7 +3282,7 @@ static int hf_nr_rrc_frequencyHoppingOffsetLists = -1; /* T_frequencyHoppingOff static int hf_nr_rrc_frequencyHoppingOffsetLists_item = -1; /* INTEGER_1_maxNrofPhysicalResourceBlocks_1 */ static int hf_nr_rrc_resourceAllocation_02 = -1; /* T_resourceAllocation_02 */ static int hf_nr_rrc_pusch_TimeDomainAllocationList = -1; /* T_pusch_TimeDomainAllocationList */ -static int hf_nr_rrc_setup_82 = -1; /* PUSCH_TimeDomainResourceAllocationList */ +static int hf_nr_rrc_setup_83 = -1; /* PUSCH_TimeDomainResourceAllocationList */ static int hf_nr_rrc_pusch_AggregationFactor = -1; /* T_pusch_AggregationFactor */ static int hf_nr_rrc_mcs_Table_02 = -1; /* T_mcs_Table_02 */ static int hf_nr_rrc_mcs_TableTransformPrecoder_01 = -1; /* T_mcs_TableTransformPrecoder_01 */ @@ -3272,46 +3291,46 @@ static int hf_nr_rrc_codebookSubset = -1; /* T_codebookSubset */ static int hf_nr_rrc_maxRank = -1; /* INTEGER_1_4 */ static int hf_nr_rrc_rbg_Size_02 = -1; /* T_rbg_Size_02 */ static int hf_nr_rrc_uci_OnPUSCH_01 = -1; /* T_uci_OnPUSCH_01 */ -static int hf_nr_rrc_setup_83 = -1; /* UCI_OnPUSCH */ +static int hf_nr_rrc_setup_84 = -1; /* UCI_OnPUSCH */ static int hf_nr_rrc_tp_pi2BPSK = -1; /* T_tp_pi2BPSK */ static int hf_nr_rrc_minimumSchedulingOffsetK2_r16 = -1; /* T_minimumSchedulingOffsetK2_r16 */ -static int hf_nr_rrc_setup_84 = -1; /* MinSchedulingOffsetK2_Values_r16 */ -static int hf_nr_rrc_ul_AccessConfigListForDCI_Format0_1_r16 = -1; /* T_ul_AccessConfigListForDCI_Format0_1_r16 */ -static int hf_nr_rrc_setup_85 = -1; /* UL_AccessConfigListForDCI_Format0_1_r16 */ -static int hf_nr_rrc_harq_ProcessNumberSizeForDCI_Format0_2_r16 = -1; /* INTEGER_0_4 */ -static int hf_nr_rrc_dmrs_SequenceInitializationForDCI_Format0_2_r16 = -1; /* T_dmrs_SequenceInitializationForDCI_Format0_2_r16 */ -static int hf_nr_rrc_numberOfBitsForRV_ForDCI_Format0_2_r16 = -1; /* INTEGER_0_2 */ -static int hf_nr_rrc_antennaPortsFieldPresenceForDCI_Format0_2_r16 = -1; /* T_antennaPortsFieldPresenceForDCI_Format0_2_r16 */ -static int hf_nr_rrc_dmrs_UplinkForPUSCH_MappingTypeA_ForDCI_Format0_2_r16 = -1; /* T_dmrs_UplinkForPUSCH_MappingTypeA_ForDCI_Format0_2_r16 */ -static int hf_nr_rrc_dmrs_UplinkForPUSCH_MappingTypeB_ForDCI_Format0_2_r16 = -1; /* T_dmrs_UplinkForPUSCH_MappingTypeB_ForDCI_Format0_2_r16 */ -static int hf_nr_rrc_frequencyHoppingForDCI_Format0_2_r16 = -1; /* T_frequencyHoppingForDCI_Format0_2_r16 */ +static int hf_nr_rrc_setup_85 = -1; /* MinSchedulingOffsetK2_Values_r16 */ +static int hf_nr_rrc_ul_AccessConfigListDCI_0_1_r16 = -1; /* T_ul_AccessConfigListDCI_0_1_r16 */ +static int hf_nr_rrc_setup_86 = -1; /* UL_AccessConfigListDCI_0_1_r16 */ +static int hf_nr_rrc_harq_ProcessNumberSizeDCI_0_2_r16 = -1; /* INTEGER_0_4 */ +static int hf_nr_rrc_dmrs_SequenceInitializationDCI_0_2_r16 = -1; /* T_dmrs_SequenceInitializationDCI_0_2_r16 */ +static int hf_nr_rrc_numberOfBitsForRV_DCI_0_2_r16 = -1; /* INTEGER_0_2 */ +static int hf_nr_rrc_antennaPortsFieldPresenceDCI_0_2_r16 = -1; /* T_antennaPortsFieldPresenceDCI_0_2_r16 */ +static int hf_nr_rrc_dmrs_UplinkForPUSCH_MappingTypeA_DCI_0_2_r16 = -1; /* T_dmrs_UplinkForPUSCH_MappingTypeA_DCI_0_2_r16 */ +static int hf_nr_rrc_dmrs_UplinkForPUSCH_MappingTypeB_DCI_0_2_r16 = -1; /* T_dmrs_UplinkForPUSCH_MappingTypeB_DCI_0_2_r16 */ +static int hf_nr_rrc_frequencyHoppingDCI_0_2_r16 = -1; /* T_frequencyHoppingDCI_0_2_r16 */ static int hf_nr_rrc_pusch_RepTypeA = -1; /* T_pusch_RepTypeA */ static int hf_nr_rrc_pusch_RepTypeB = -1; /* T_pusch_RepTypeB */ -static int hf_nr_rrc_frequencyHoppingOffsetListsForDCI_Format0_2_r16 = -1; /* T_frequencyHoppingOffsetListsForDCI_Format0_2_r16 */ -static int hf_nr_rrc_setup_86 = -1; /* FrequencyHoppingOffsetListsForDCI_Format0_2_r16 */ -static int hf_nr_rrc_codebookSubsetForDCI_Format0_2_r16 = -1; /* T_codebookSubsetForDCI_Format0_2_r16 */ -static int hf_nr_rrc_invalidSymbolPatternIndicatorForDCI_Format0_2_r16 = -1; /* T_invalidSymbolPatternIndicatorForDCI_Format0_2_r16 */ -static int hf_nr_rrc_maxRankForDCI_Format0_2_r16 = -1; /* INTEGER_1_4 */ -static int hf_nr_rrc_mcs_TableForDCI_Format0_2_r16 = -1; /* T_mcs_TableForDCI_Format0_2_r16 */ -static int hf_nr_rrc_mcs_TableTransformPrecoderForDCI_Format0_2_r16 = -1; /* T_mcs_TableTransformPrecoderForDCI_Format0_2_r16 */ -static int hf_nr_rrc_priorityIndicatorForDCI_Format0_2_r16 = -1; /* T_priorityIndicatorForDCI_Format0_2_r16 */ -static int hf_nr_rrc_pusch_RepTypeIndicatorForDCI_Format0_2_r16 = -1; /* T_pusch_RepTypeIndicatorForDCI_Format0_2_r16 */ -static int hf_nr_rrc_resourceAllocationForDCI_Format0_2_r16 = -1; /* T_resourceAllocationForDCI_Format0_2_r16 */ -static int hf_nr_rrc_resourceAllocationType1GranularityForDCI_Format0_2_r16 = -1; /* T_resourceAllocationType1GranularityForDCI_Format0_2_r16 */ -static int hf_nr_rrc_uci_OnPUSCH_ListForDCI_Format0_2_r16 = -1; /* T_uci_OnPUSCH_ListForDCI_Format0_2_r16 */ -static int hf_nr_rrc_setup_87 = -1; /* UCI_OnPUSCH_ListForDCI_Format0_2_r16 */ -static int hf_nr_rrc_pusch_TimeDomainAllocationListForDCI_Format0_2_r16 = -1; /* T_pusch_TimeDomainAllocationListForDCI_Format0_2_r16 */ -static int hf_nr_rrc_setup_88 = -1; /* PUSCH_TimeDomainResourceAllocationList_r16 */ -static int hf_nr_rrc_pusch_TimeDomainAllocationListForDCI_Format0_1_r16 = -1; /* T_pusch_TimeDomainAllocationListForDCI_Format0_1_r16 */ -static int hf_nr_rrc_invalidSymbolPatternIndicatorForDCI_Format0_1_r16 = -1; /* T_invalidSymbolPatternIndicatorForDCI_Format0_1_r16 */ -static int hf_nr_rrc_priorityIndicatorForDCI_Format0_1_r16 = -1; /* T_priorityIndicatorForDCI_Format0_1_r16 */ -static int hf_nr_rrc_pusch_RepTypeIndicatorForDCI_Format0_1_r16 = -1; /* T_pusch_RepTypeIndicatorForDCI_Format0_1_r16 */ -static int hf_nr_rrc_frequencyHoppingForDCI_Format0_1_r16 = -1; /* T_frequencyHoppingForDCI_Format0_1_r16 */ -static int hf_nr_rrc_uci_OnPUSCH_ListForDCI_Format0_1_r16 = -1; /* T_uci_OnPUSCH_ListForDCI_Format0_1_r16 */ -static int hf_nr_rrc_setup_89 = -1; /* UCI_OnPUSCH_ListForDCI_Format0_1_r16 */ +static int hf_nr_rrc_frequencyHoppingOffsetListsDCI_0_2_r16 = -1; /* T_frequencyHoppingOffsetListsDCI_0_2_r16 */ +static int hf_nr_rrc_setup_87 = -1; /* FrequencyHoppingOffsetListsDCI_0_2_r16 */ +static int hf_nr_rrc_codebookSubsetDCI_0_2_r16 = -1; /* T_codebookSubsetDCI_0_2_r16 */ +static int hf_nr_rrc_invalidSymbolPatternIndicatorDCI_0_2_r16 = -1; /* T_invalidSymbolPatternIndicatorDCI_0_2_r16 */ +static int hf_nr_rrc_maxRankDCI_0_2_r16 = -1; /* INTEGER_1_4 */ +static int hf_nr_rrc_mcs_TableDCI_0_2_r16 = -1; /* T_mcs_TableDCI_0_2_r16 */ +static int hf_nr_rrc_mcs_TableTransformPrecoderDCI_0_2_r16 = -1; /* T_mcs_TableTransformPrecoderDCI_0_2_r16 */ +static int hf_nr_rrc_priorityIndicatorDCI_0_2_r16 = -1; /* T_priorityIndicatorDCI_0_2_r16 */ +static int hf_nr_rrc_pusch_RepTypeIndicatorDCI_0_2_r16 = -1; /* T_pusch_RepTypeIndicatorDCI_0_2_r16 */ +static int hf_nr_rrc_resourceAllocationDCI_0_2_r16 = -1; /* T_resourceAllocationDCI_0_2_r16 */ +static int hf_nr_rrc_resourceAllocationType1GranularityDCI_0_2_r16 = -1; /* T_resourceAllocationType1GranularityDCI_0_2_r16 */ +static int hf_nr_rrc_uci_OnPUSCH_ListDCI_0_2_r16 = -1; /* T_uci_OnPUSCH_ListDCI_0_2_r16 */ +static int hf_nr_rrc_setup_88 = -1; /* UCI_OnPUSCH_ListDCI_0_2_r16 */ +static int hf_nr_rrc_pusch_TimeDomainAllocationListDCI_0_2_r16 = -1; /* T_pusch_TimeDomainAllocationListDCI_0_2_r16 */ +static int hf_nr_rrc_setup_89 = -1; /* PUSCH_TimeDomainResourceAllocationList_r16 */ +static int hf_nr_rrc_pusch_TimeDomainAllocationListDCI_0_1_r16 = -1; /* T_pusch_TimeDomainAllocationListDCI_0_1_r16 */ +static int hf_nr_rrc_invalidSymbolPatternIndicatorDCI_0_1_r16 = -1; /* T_invalidSymbolPatternIndicatorDCI_0_1_r16 */ +static int hf_nr_rrc_priorityIndicatorDCI_0_1_r16 = -1; /* T_priorityIndicatorDCI_0_1_r16 */ +static int hf_nr_rrc_pusch_RepTypeIndicatorDCI_0_1_r16 = -1; /* T_pusch_RepTypeIndicatorDCI_0_1_r16 */ +static int hf_nr_rrc_frequencyHoppingDCI_0_1_r16 = -1; /* T_frequencyHoppingDCI_0_1_r16 */ +static int hf_nr_rrc_uci_OnPUSCH_ListDCI_0_1_r16 = -1; /* T_uci_OnPUSCH_ListDCI_0_1_r16 */ +static int hf_nr_rrc_setup_90 = -1; /* UCI_OnPUSCH_ListDCI_0_1_r16 */ static int hf_nr_rrc_invalidSymbolPattern_r16 = -1; /* InvalidSymbolPattern_r16 */ static int hf_nr_rrc_pusch_PowerControl_v1610 = -1; /* T_pusch_PowerControl_v1610 */ -static int hf_nr_rrc_setup_90 = -1; /* PUSCH_PowerControl_v1610 */ +static int hf_nr_rrc_setup_91 = -1; /* PUSCH_PowerControl_v1610 */ static int hf_nr_rrc_ul_FullPowerTransmission_r16 = -1; /* T_ul_FullPowerTransmission_r16 */ static int hf_nr_rrc_pusch_TimeDomainAllocationListForMultiPUSCH_r16 = -1; /* T_pusch_TimeDomainAllocationListForMultiPUSCH_r16 */ static int hf_nr_rrc_numberOfInvalidSymbolsForDL_UL_Switching_r16 = -1; /* INTEGER_1_4 */ @@ -3319,18 +3338,18 @@ static int hf_nr_rrc_betaOffsets = -1; /* T_betaOffsets */ static int hf_nr_rrc_dynamic_01 = -1; /* SEQUENCE_SIZE_4_OF_BetaOffsets */ static int hf_nr_rrc_scaling = -1; /* T_scaling */ static int hf_nr_rrc_MinSchedulingOffsetK2_Values_r16_item = -1; /* INTEGER_0_maxK2_SchedulingOffset_r16 */ -static int hf_nr_rrc_betaOffsetsForDCI_Format0_2_r16 = -1; /* T_betaOffsetsForDCI_Format0_2_r16 */ -static int hf_nr_rrc_dynamicForDCI_Format0_2_r16 = -1; /* T_dynamicForDCI_Format0_2_r16 */ +static int hf_nr_rrc_betaOffsetsDCI_0_2_r16 = -1; /* T_betaOffsetsDCI_0_2_r16 */ +static int hf_nr_rrc_dynamicDCI_0_2_r16 = -1; /* T_dynamicDCI_0_2_r16 */ static int hf_nr_rrc_oneBit_r16 = -1; /* SEQUENCE_SIZE_2_OF_BetaOffsets */ static int hf_nr_rrc_oneBit_r16_item = -1; /* BetaOffsets */ static int hf_nr_rrc_twoBits_r16 = -1; /* SEQUENCE_SIZE_4_OF_BetaOffsets */ static int hf_nr_rrc_twoBits_r16_item = -1; /* BetaOffsets */ -static int hf_nr_rrc_semiStaticForDCI_Format0_2_r16 = -1; /* BetaOffsets */ -static int hf_nr_rrc_scalingForDCI_Format0_2_r16 = -1; /* T_scalingForDCI_Format0_2_r16 */ -static int hf_nr_rrc_FrequencyHoppingOffsetListsForDCI_Format0_2_r16_item = -1; /* INTEGER_1_maxNrofPhysicalResourceBlocks_1 */ -static int hf_nr_rrc_UCI_OnPUSCH_ListForDCI_Format0_2_r16_item = -1; /* UCI_OnPUSCH_ForDCI_Format0_2_r16 */ -static int hf_nr_rrc_UCI_OnPUSCH_ListForDCI_Format0_1_r16_item = -1; /* UCI_OnPUSCH */ -static int hf_nr_rrc_UL_AccessConfigListForDCI_Format0_1_r16_item = -1; /* INTEGER_0_63 */ +static int hf_nr_rrc_semiStaticDCI_0_2_r16 = -1; /* BetaOffsets */ +static int hf_nr_rrc_scalingDCI_0_2_r16 = -1; /* T_scalingDCI_0_2_r16 */ +static int hf_nr_rrc_FrequencyHoppingOffsetListsDCI_0_2_r16_item = -1; /* INTEGER_1_maxNrofPhysicalResourceBlocks_1 */ +static int hf_nr_rrc_UCI_OnPUSCH_ListDCI_0_2_r16_item = -1; /* UCI_OnPUSCH_DCI_0_2_r16 */ +static int hf_nr_rrc_UCI_OnPUSCH_ListDCI_0_1_r16_item = -1; /* UCI_OnPUSCH */ +static int hf_nr_rrc_UL_AccessConfigListDCI_0_1_r16_item = -1; /* INTEGER_0_63 */ static int hf_nr_rrc_groupHoppingEnabledTransformPrecoding = -1; /* T_groupHoppingEnabledTransformPrecoding */ static int hf_nr_rrc_pusch_TimeDomainAllocationList_01 = -1; /* PUSCH_TimeDomainResourceAllocationList */ static int hf_nr_rrc_msg3_DeltaPreamble = -1; /* INTEGER_M1_6 */ @@ -3368,18 +3387,18 @@ static int hf_nr_rrc_pathlossReferenceRSToReleaseList2_r16_item = -1; /* PUSCH_ static int hf_nr_rrc_p0_PUSCH_SetList_r16 = -1; /* SEQUENCE_SIZE_1_maxNrofSRI_PUSCH_Mappings_OF_P0_PUSCH_Set_r16 */ static int hf_nr_rrc_p0_PUSCH_SetList_r16_item = -1; /* P0_PUSCH_Set_r16 */ static int hf_nr_rrc_olpc_ParameterSet = -1; /* T_olpc_ParameterSet */ -static int hf_nr_rrc_olpc_ParameterSetForDCI_Format0_1_r16 = -1; /* INTEGER_1_2 */ -static int hf_nr_rrc_olpc_ParameterSetForDCI_Format0_2_r16 = -1; /* INTEGER_1_2 */ +static int hf_nr_rrc_olpc_ParameterSetDCI_0_1_r16 = -1; /* INTEGER_1_2 */ +static int hf_nr_rrc_olpc_ParameterSetDCI_0_2_r16 = -1; /* INTEGER_1_2 */ static int hf_nr_rrc_p0_PUSCH_SetId_r16 = -1; /* P0_PUSCH_SetId_r16 */ static int hf_nr_rrc_p0_List_r16 = -1; /* SEQUENCE_SIZE_1_maxNrofP0_PUSCH_Set_r16_OF_P0_PUSCH_r16 */ static int hf_nr_rrc_p0_List_r16_item = -1; /* P0_PUSCH_r16 */ static int hf_nr_rrc_codeBlockGroupTransmission_01 = -1; /* T_codeBlockGroupTransmission_01 */ -static int hf_nr_rrc_setup_91 = -1; /* PUSCH_CodeBlockGroupTransmission */ +static int hf_nr_rrc_setup_92 = -1; /* PUSCH_CodeBlockGroupTransmission */ static int hf_nr_rrc_rateMatching = -1; /* T_rateMatching */ static int hf_nr_rrc_xOverhead_01 = -1; /* T_xOverhead_01 */ static int hf_nr_rrc_maxMIMO_Layers_01 = -1; /* INTEGER_1_4 */ -static int hf_nr_rrc_maxMIMO_LayersForDCI_Format0_2_r16 = -1; /* T_maxMIMO_LayersForDCI_Format0_2_r16 */ -static int hf_nr_rrc_setup_92 = -1; /* MaxMIMO_LayersForDCI_Format0_2_r16 */ +static int hf_nr_rrc_maxMIMO_LayersDCI_0_2_r16 = -1; /* T_maxMIMO_LayersDCI_0_2_r16 */ +static int hf_nr_rrc_setup_93 = -1; /* MaxMIMO_LayersDCI_0_2_r16 */ static int hf_nr_rrc_maxCodeBlockGroupsPerTransportBlock_01 = -1; /* T_maxCodeBlockGroupsPerTransportBlock_01 */ static int hf_nr_rrc_PUSCH_TimeDomainResourceAllocationList_item = -1; /* PUSCH_TimeDomainResourceAllocation */ static int hf_nr_rrc_k2 = -1; /* INTEGER_0_32 */ @@ -3433,7 +3452,7 @@ static int hf_nr_rrc_l839 = -1; /* INTEGER_0_837 */ static int hf_nr_rrc_l139 = -1; /* INTEGER_0_137 */ static int hf_nr_rrc_restrictedSetConfig = -1; /* T_restrictedSetConfig */ static int hf_nr_rrc_msg3_transformPrecoder = -1; /* T_msg3_transformPrecoder */ -static int hf_nr_rrc_ra_PrioritizationForAccessIdentity = -1; /* T_ra_PrioritizationForAccessIdentity */ +static int hf_nr_rrc_ra_PrioritizationForAccessIdentity_r16 = -1; /* T_ra_PrioritizationForAccessIdentity_r16 */ static int hf_nr_rrc_ra_Prioritization_r16 = -1; /* RA_Prioritization */ static int hf_nr_rrc_ra_PrioritizationForAI_r16 = -1; /* BIT_STRING_SIZE_2 */ static int hf_nr_rrc_prach_RootSequenceIndex_r16 = -1; /* T_prach_RootSequenceIndex_r16 */ @@ -3556,9 +3575,9 @@ static int hf_nr_rrc_refSeconds_r16 = -1; /* INTEGER_0_86399 */ static int hf_nr_rrc_refMilliSeconds_r16 = -1; /* INTEGER_0_999 */ static int hf_nr_rrc_refTenNanoSeconds_r16 = -1; /* INTEGER_0_99999 */ static int hf_nr_rrc_fdm_TDM_r16 = -1; /* T_fdm_TDM_r16 */ -static int hf_nr_rrc_setup_93 = -1; /* FDM_TDM_r16 */ +static int hf_nr_rrc_setup_94 = -1; /* FDM_TDM_r16 */ static int hf_nr_rrc_slotBased_r16 = -1; /* T_slotBased_r16 */ -static int hf_nr_rrc_setup_94 = -1; /* SlotBased_r16 */ +static int hf_nr_rrc_setup_95 = -1; /* SlotBased_r16 */ static int hf_nr_rrc_repetitionScheme_r16 = -1; /* T_repetitionScheme_r16 */ static int hf_nr_rrc_startingSymbolOffsetK_r16 = -1; /* INTEGER_0_7 */ static int hf_nr_rrc_tciMapping_r16 = -1; /* T_tciMapping_r16 */ @@ -3648,7 +3667,7 @@ static int hf_nr_rrc_includeBT_Meas_r16_01 = -1; /* T_includeBT_Meas_r16_01 */ static int hf_nr_rrc_includeWLAN_Meas_r16_01 = -1; /* T_includeWLAN_Meas_r16_01 */ static int hf_nr_rrc_includeSensor_Meas_r16_01 = -1; /* T_includeSensor_Meas_r16_01 */ static int hf_nr_rrc_ul_DelayValueConfig_r16 = -1; /* T_ul_DelayValueConfig_r16 */ -static int hf_nr_rrc_setup_95 = -1; /* UL_DelayValueConfig_r16 */ +static int hf_nr_rrc_setup_96 = -1; /* UL_DelayValueConfig_r16 */ static int hf_nr_rrc_reportAddNeighMeas_r16 = -1; /* T_reportAddNeighMeas_r16 */ static int hf_nr_rrc_rsrp_02 = -1; /* INTEGER_M30_30 */ static int hf_nr_rrc_rsrq_02 = -1; /* INTEGER_M30_30 */ @@ -3812,11 +3831,11 @@ static int hf_nr_rrc_defaultDownlinkBWP_Id = -1; /* BWP_Id */ static int hf_nr_rrc_uplinkConfig = -1; /* UplinkConfig */ static int hf_nr_rrc_supplementaryUplink_01 = -1; /* UplinkConfig */ static int hf_nr_rrc_pdcch_ServingCellConfig = -1; /* T_pdcch_ServingCellConfig */ -static int hf_nr_rrc_setup_96 = -1; /* PDCCH_ServingCellConfig */ +static int hf_nr_rrc_setup_97 = -1; /* PDCCH_ServingCellConfig */ static int hf_nr_rrc_pdsch_ServingCellConfig = -1; /* T_pdsch_ServingCellConfig */ -static int hf_nr_rrc_setup_97 = -1; /* PDSCH_ServingCellConfig */ +static int hf_nr_rrc_setup_98 = -1; /* PDSCH_ServingCellConfig */ static int hf_nr_rrc_csi_MeasConfig = -1; /* T_csi_MeasConfig */ -static int hf_nr_rrc_setup_98 = -1; /* CSI_MeasConfig */ +static int hf_nr_rrc_setup_99 = -1; /* CSI_MeasConfig */ static int hf_nr_rrc_sCellDeactivationTimer = -1; /* T_sCellDeactivationTimer */ static int hf_nr_rrc_crossCarrierSchedulingConfig = -1; /* CrossCarrierSchedulingConfig */ static int hf_nr_rrc_tag_Id = -1; /* TAG_Id */ @@ -3824,29 +3843,31 @@ static int hf_nr_rrc_dummy_05 = -1; /* T_dummy_02 */ static int hf_nr_rrc_pathlossReferenceLinking = -1; /* T_pathlossReferenceLinking */ static int hf_nr_rrc_servingCellMO = -1; /* MeasObjectId */ static int hf_nr_rrc_lte_CRS_ToMatchAround = -1; /* T_lte_CRS_ToMatchAround */ -static int hf_nr_rrc_setup_99 = -1; /* RateMatchPatternLTE_CRS */ +static int hf_nr_rrc_setup_100 = -1; /* RateMatchPatternLTE_CRS */ static int hf_nr_rrc_downlinkChannelBW_PerSCS_List = -1; /* SEQUENCE_SIZE_1_maxSCSs_OF_SCS_SpecificCarrier */ static int hf_nr_rrc_downlinkChannelBW_PerSCS_List_item = -1; /* SCS_SpecificCarrier */ static int hf_nr_rrc_supplementaryUplinkRelease = -1; /* T_supplementaryUplinkRelease */ -static int hf_nr_rrc_tdd_UL_DL_ConfigurationDedicated_iab_mt_r16 = -1; /* TDD_UL_DL_ConfigDedicated_IAB_MT_r16 */ +static int hf_nr_rrc_tdd_UL_DL_ConfigurationDedicated_IAB_MT_r16 = -1; /* TDD_UL_DL_ConfigDedicated_IAB_MT_r16 */ static int hf_nr_rrc_dormantBWP_Config_r16 = -1; /* T_dormantBWP_Config_r16 */ -static int hf_nr_rrc_setup_100 = -1; /* DormantBWP_Config_r16 */ +static int hf_nr_rrc_setup_101 = -1; /* DormantBWP_Config_r16 */ static int hf_nr_rrc_ca_SlotOffset_r16 = -1; /* T_ca_SlotOffset_r16 */ static int hf_nr_rrc_refSCS15kHz = -1; /* INTEGER_M2_2 */ static int hf_nr_rrc_refSCS30KHz = -1; /* INTEGER_M5_5 */ static int hf_nr_rrc_refSCS60KHz = -1; /* INTEGER_M10_10 */ static int hf_nr_rrc_refSCS120KHz = -1; /* INTEGER_M20_20 */ static int hf_nr_rrc_channelAccessConfig_r16 = -1; /* T_channelAccessConfig_r16 */ -static int hf_nr_rrc_setup_101 = -1; /* ChannelAccessConfig_r16 */ -static int hf_nr_rrc_intraCellGuardBandsUL_r16 = -1; /* IntraCellGuardBands_r16 */ -static int hf_nr_rrc_intraCellGuardBandsDL_r16 = -1; /* IntraCellGuardBands_r16 */ +static int hf_nr_rrc_setup_102 = -1; /* ChannelAccessConfig_r16 */ +static int hf_nr_rrc_intraCellGuardBandsDL_List_r16 = -1; /* SEQUENCE_SIZE_1_maxSCSs_OF_IntraCellGuardBandsPerSCS_r16 */ +static int hf_nr_rrc_intraCellGuardBandsDL_List_r16_item = -1; /* IntraCellGuardBandsPerSCS_r16 */ +static int hf_nr_rrc_intraCellGuardBandsUL_List_r16 = -1; /* SEQUENCE_SIZE_1_maxSCSs_OF_IntraCellGuardBandsPerSCS_r16 */ +static int hf_nr_rrc_intraCellGuardBandsUL_List_r16_item = -1; /* IntraCellGuardBandsPerSCS_r16 */ static int hf_nr_rrc_csi_RS_ValidationWith_DCI_r16 = -1; /* T_csi_RS_ValidationWith_DCI_r16 */ static int hf_nr_rrc_lte_CRS_PatternList1_r16 = -1; /* T_lte_CRS_PatternList1_r16 */ -static int hf_nr_rrc_setup_102 = -1; /* LTE_CRS_PatternList_r16 */ +static int hf_nr_rrc_setup_103 = -1; /* LTE_CRS_PatternList_r16 */ static int hf_nr_rrc_lte_CRS_PatternList2_r16 = -1; /* T_lte_CRS_PatternList2_r16 */ static int hf_nr_rrc_crs_RateMatch_PerCORESETPoolIndex_r16 = -1; /* T_crs_RateMatch_PerCORESETPoolIndex_r16 */ -static int hf_nr_rrc_enableTwoDefaultTCIStates_r16 = -1; /* T_enableTwoDefaultTCIStates_r16 */ -static int hf_nr_rrc_enableDefaultTCIStatePerCoresetPoolIndex_r16 = -1; /* T_enableDefaultTCIStatePerCoresetPoolIndex_r16 */ +static int hf_nr_rrc_enableTwoDefaultTCI_States_r16 = -1; /* T_enableTwoDefaultTCI_States_r16 */ +static int hf_nr_rrc_enableDefaultTCI_StatePerCoresetPoolIndex_r16 = -1; /* T_enableDefaultTCI_StatePerCoresetPoolIndex_r16 */ static int hf_nr_rrc_enableBeamSwitchTiming_r16 = -1; /* T_enableBeamSwitchTiming_r16 */ static int hf_nr_rrc_cbg_TxDiffTBsProcessingType1_r16 = -1; /* T_cbg_TxDiffTBsProcessingType1_r16 */ static int hf_nr_rrc_cbg_TxDiffTBsProcessingType2_r16 = -1; /* T_cbg_TxDiffTBsProcessingType2_r16 */ @@ -3857,30 +3878,33 @@ static int hf_nr_rrc_uplinkBWP_ToAddModList = -1; /* SEQUENCE_SIZE_1_maxNrofBWP static int hf_nr_rrc_uplinkBWP_ToAddModList_item = -1; /* BWP_Uplink */ static int hf_nr_rrc_firstActiveUplinkBWP_Id = -1; /* BWP_Id */ static int hf_nr_rrc_pusch_ServingCellConfig = -1; /* T_pusch_ServingCellConfig */ -static int hf_nr_rrc_setup_103 = -1; /* PUSCH_ServingCellConfig */ +static int hf_nr_rrc_setup_104 = -1; /* PUSCH_ServingCellConfig */ static int hf_nr_rrc_carrierSwitching = -1; /* T_carrierSwitching */ -static int hf_nr_rrc_setup_104 = -1; /* SRS_CarrierSwitching */ +static int hf_nr_rrc_setup_105 = -1; /* SRS_CarrierSwitching */ static int hf_nr_rrc_powerBoostPi2BPSK = -1; /* BOOLEAN */ static int hf_nr_rrc_uplinkChannelBW_PerSCS_List = -1; /* SEQUENCE_SIZE_1_maxSCSs_OF_SCS_SpecificCarrier */ static int hf_nr_rrc_uplinkChannelBW_PerSCS_List_item = -1; /* SCS_SpecificCarrier */ -static int hf_nr_rrc_enablePLRS_UpdateForPUSCH_SRS_r16 = -1; /* T_enablePLRS_UpdateForPUSCH_SRS_r16 */ -static int hf_nr_rrc_enableDefaultBeamPL_ForPUSCH0_r16 = -1; /* T_enableDefaultBeamPL_ForPUSCH0_r16 */ +static int hf_nr_rrc_enablePL_RS_UpdateForPUSCH_SRS_r16 = -1; /* T_enablePL_RS_UpdateForPUSCH_SRS_r16 */ +static int hf_nr_rrc_enableDefaultBeamPL_ForPUSCH0_0_r16 = -1; /* T_enableDefaultBeamPL_ForPUSCH0_0_r16 */ static int hf_nr_rrc_enableDefaultBeamPL_ForPUCCH_r16 = -1; /* T_enableDefaultBeamPL_ForPUCCH_r16 */ static int hf_nr_rrc_enableDefaultBeamPL_ForSRS_r16 = -1; /* T_enableDefaultBeamPL_ForSRS_r16 */ static int hf_nr_rrc_uplinkTxSwitching_r16 = -1; /* T_uplinkTxSwitching_r16 */ -static int hf_nr_rrc_setup_105 = -1; /* UplinkTxSwitching_r16 */ +static int hf_nr_rrc_setup_106 = -1; /* UplinkTxSwitching_r16 */ +static int hf_nr_rrc_mpr_PowerBoost_FR2_r16 = -1; /* T_mpr_PowerBoost_FR2_r16 */ static int hf_nr_rrc_maxEnergyDetectionThreshold_r16 = -1; /* INTEGER_M85_M52 */ static int hf_nr_rrc_energyDetectionThresholdOffset_r16 = -1; /* INTEGER_M20_M13 */ static int hf_nr_rrc_ul_toDL_COT_SharingED_Threshold_r16 = -1; /* INTEGER_M85_M52 */ static int hf_nr_rrc_absenceOfAnyOtherTechnology_r16 = -1; /* T_absenceOfAnyOtherTechnology_r16 */ -static int hf_nr_rrc_IntraCellGuardBands_r16_item = -1; /* GuardBand_r16 */ +static int hf_nr_rrc_guardBandSCS_r16 = -1; /* SubcarrierSpacing */ +static int hf_nr_rrc_intraCellGuardBands_r16 = -1; /* SEQUENCE_SIZE_1_4_OF_GuardBand_r16 */ +static int hf_nr_rrc_intraCellGuardBands_r16_item = -1; /* GuardBand_r16 */ static int hf_nr_rrc_startCRB_r16 = -1; /* INTEGER_0_274 */ static int hf_nr_rrc_nrofCRBs_r16 = -1; /* INTEGER_0_15 */ static int hf_nr_rrc_dormantBWP_Id_r16 = -1; /* BWP_Id */ static int hf_nr_rrc_withinActiveTimeConfig_r16 = -1; /* T_withinActiveTimeConfig_r16 */ -static int hf_nr_rrc_setup_106 = -1; /* WithinActiveTimeConfig_r16 */ +static int hf_nr_rrc_setup_107 = -1; /* WithinActiveTimeConfig_r16 */ static int hf_nr_rrc_outsideActiveTimeConfig_r16 = -1; /* T_outsideActiveTimeConfig_r16 */ -static int hf_nr_rrc_setup_107 = -1; /* OutsideActiveTimeConfig_r16 */ +static int hf_nr_rrc_setup_108 = -1; /* OutsideActiveTimeConfig_r16 */ static int hf_nr_rrc_firstWithinActiveTimeBWP_Id_r16 = -1; /* BWP_Id */ static int hf_nr_rrc_dormancyGroupWithinActiveTime_r16 = -1; /* DormancyGroupID_r16 */ static int hf_nr_rrc_firstOutsideActiveTimeBWP_Id_r16 = -1; /* BWP_Id */ @@ -3954,10 +3978,10 @@ static int hf_nr_rrc_availableRB_SetsToAddModList_r16 = -1; /* SEQUENCE_SIZE_1_ static int hf_nr_rrc_availableRB_SetsToAddModList_r16_item = -1; /* AvailableRB_SetsPerCell_r16 */ static int hf_nr_rrc_availableRB_SetsToRelease_r16 = -1; /* SEQUENCE_SIZE_1_maxNrofAggregatedCellsPerCellGroup_OF_ServCellIndex */ static int hf_nr_rrc_availableRB_SetsToRelease_r16_item = -1; /* ServCellIndex */ -static int hf_nr_rrc_searchSpaceSwitchTriggerToAddModList_r16 = -1; /* SEQUENCE_SIZE_1_4_OF_SearchSpaceSwitchTrigger_r16 */ -static int hf_nr_rrc_searchSpaceSwitchTriggerToAddModList_r16_item = -1; /* SearchSpaceSwitchTrigger_r16 */ -static int hf_nr_rrc_searchSpaceSwitchTriggerToReleaseList_r16 = -1; /* SEQUENCE_SIZE_1_4_OF_ServCellIndex */ -static int hf_nr_rrc_searchSpaceSwitchTriggerToReleaseList_r16_item = -1; /* ServCellIndex */ +static int hf_nr_rrc_switchTriggerToAddModList_r16 = -1; /* SEQUENCE_SIZE_1_4_OF_SearchSpaceSwitchTrigger_r16 */ +static int hf_nr_rrc_switchTriggerToAddModList_r16_item = -1; /* SearchSpaceSwitchTrigger_r16 */ +static int hf_nr_rrc_switchTriggerToReleaseList_r16 = -1; /* SEQUENCE_SIZE_1_4_OF_ServCellIndex */ +static int hf_nr_rrc_switchTriggerToReleaseList_r16_item = -1; /* ServCellIndex */ static int hf_nr_rrc_co_DurationsPerCellToAddModList_r16 = -1; /* SEQUENCE_SIZE_1_maxNrofAggregatedCellsPerCellGroup_OF_CO_DurationsPerCell_r16 */ static int hf_nr_rrc_co_DurationsPerCellToAddModList_r16_item = -1; /* CO_DurationsPerCell_r16 */ static int hf_nr_rrc_co_DurationsPerCellToReleaseList_r16 = -1; /* SEQUENCE_SIZE_1_maxNrofAggregatedCellsPerCellGroup_OF_ServCellIndex */ @@ -4001,12 +4025,12 @@ static int hf_nr_rrc_srs_ResourceToReleaseList_item = -1; /* SRS_ResourceId */ static int hf_nr_rrc_srs_ResourceToAddModList = -1; /* SEQUENCE_SIZE_1_maxNrofSRS_Resources_OF_SRS_Resource */ static int hf_nr_rrc_srs_ResourceToAddModList_item = -1; /* SRS_Resource */ static int hf_nr_rrc_tpc_Accumulation_01 = -1; /* T_tpc_Accumulation_01 */ -static int hf_nr_rrc_srs_RequestForDCI_Format1_2_r16 = -1; /* INTEGER_1_2 */ -static int hf_nr_rrc_srs_RequestForDCI_Format0_2_r16 = -1; /* INTEGER_1_2 */ -static int hf_nr_rrc_srs_ResourceSetToAddModListForDCI_Format0_2_r16 = -1; /* SEQUENCE_SIZE_1_maxNrofSRS_ResourceSets_OF_SRS_ResourceSet */ -static int hf_nr_rrc_srs_ResourceSetToAddModListForDCI_Format0_2_r16_item = -1; /* SRS_ResourceSet */ -static int hf_nr_rrc_srs_ResourceSetToReleaseListForDCI_Format0_2_r16 = -1; /* SEQUENCE_SIZE_1_maxNrofSRS_ResourceSets_OF_SRS_ResourceSetId */ -static int hf_nr_rrc_srs_ResourceSetToReleaseListForDCI_Format0_2_r16_item = -1; /* SRS_ResourceSetId */ +static int hf_nr_rrc_srs_RequestDCI_1_2_r16 = -1; /* INTEGER_1_2 */ +static int hf_nr_rrc_srs_RequestDCI_0_2_r16 = -1; /* INTEGER_1_2 */ +static int hf_nr_rrc_srs_ResourceSetToAddModListDCI_0_2_r16 = -1; /* SEQUENCE_SIZE_1_maxNrofSRS_ResourceSets_OF_SRS_ResourceSet */ +static int hf_nr_rrc_srs_ResourceSetToAddModListDCI_0_2_r16_item = -1; /* SRS_ResourceSet */ +static int hf_nr_rrc_srs_ResourceSetToReleaseListDCI_0_2_r16 = -1; /* SEQUENCE_SIZE_1_maxNrofSRS_ResourceSets_OF_SRS_ResourceSetId */ +static int hf_nr_rrc_srs_ResourceSetToReleaseListDCI_0_2_r16_item = -1; /* SRS_ResourceSetId */ static int hf_nr_rrc_srs_PosResourceSetToReleaseList_r16 = -1; /* SEQUENCE_SIZE_1_maxNrofSRS_PosResourceSets_r16_OF_SRS_PosResourceSetId_r16 */ static int hf_nr_rrc_srs_PosResourceSetToReleaseList_r16_item = -1; /* SRS_PosResourceSetId_r16 */ static int hf_nr_rrc_srs_PosResourceSetToAddModList_r16 = -1; /* SEQUENCE_SIZE_1_maxNrofSRS_PosResourceSets_r16_OF_SRS_PosResourceSet_r16 */ @@ -4032,7 +4056,7 @@ static int hf_nr_rrc_p0_01 = -1; /* INTEGER_M202_24 */ static int hf_nr_rrc_pathlossReferenceRS = -1; /* PathlossReferenceRS_Config */ static int hf_nr_rrc_srs_PowerControlAdjustmentStates = -1; /* T_srs_PowerControlAdjustmentStates */ static int hf_nr_rrc_pathlossReferenceRSList_r16 = -1; /* T_pathlossReferenceRSList_r16 */ -static int hf_nr_rrc_setup_108 = -1; /* PathlossReferenceRSList_r16 */ +static int hf_nr_rrc_setup_109 = -1; /* PathlossReferenceRSList_r16 */ static int hf_nr_rrc_PathlossReferenceRSList_r16_item = -1; /* PathlossReferenceRS_r16 */ static int hf_nr_rrc_srs_PathlossReferenceRS_Id_r16 = -1; /* SRS_PathlossReferenceRS_Id_r16 */ static int hf_nr_rrc_pathlossReferenceRS_r16 = -1; /* PathlossReferenceRS_Config */ @@ -4290,6 +4314,9 @@ static int hf_nr_rrc_bandList_v1610_item = -1; /* BandParameters_v1610 */ static int hf_nr_rrc_ca_ParametersNR_v1610 = -1; /* CA_ParametersNR_v1610 */ static int hf_nr_rrc_ca_ParametersNRDC_v1610 = -1; /* CA_ParametersNRDC_v1610 */ static int hf_nr_rrc_powerClass_v1610 = -1; /* T_powerClass_v1610 */ +static int hf_nr_rrc_powerClassNRPart_r16 = -1; /* T_powerClassNRPart_r16 */ +static int hf_nr_rrc_featureSetCombinationDAPS_r16 = -1; /* FeatureSetCombinationId */ +static int hf_nr_rrc_mrdc_Parameters_v1620 = -1; /* MRDC_Parameters_v1620 */ static int hf_nr_rrc_ne_DC_BC = -1; /* T_ne_DC_BC */ static int hf_nr_rrc_ca_ParametersNRDC = -1; /* CA_ParametersNRDC */ static int hf_nr_rrc_ca_ParametersEUTRA_v1560 = -1; /* CA_ParametersEUTRA_v1560 */ @@ -4308,6 +4335,7 @@ static int hf_nr_rrc_bandCombination_v1610 = -1; /* BandCombination_v1610 */ static int hf_nr_rrc_supportedBandPairListNR_r16 = -1; /* SEQUENCE_SIZE_1_maxULTxSwitchingBandPairs_OF_ULTxSwitchingBandPair_r16 */ static int hf_nr_rrc_supportedBandPairListNR_r16_item = -1; /* ULTxSwitchingBandPair_r16 */ static int hf_nr_rrc_uplinkTxSwitching_OptionSupport_r16 = -1; /* T_uplinkTxSwitching_OptionSupport_r16 */ +static int hf_nr_rrc_uplinkTxSwitching_PowerBoosting_r16 = -1; /* T_uplinkTxSwitching_PowerBoosting_r16 */ static int hf_nr_rrc_bandIndexUL1_r16 = -1; /* INTEGER_1_maxSimultaneousBands */ static int hf_nr_rrc_bandIndexUL2_r16 = -1; /* INTEGER_1_maxSimultaneousBands */ static int hf_nr_rrc_uplinkTxSwitchingPeriod_r16 = -1; /* T_uplinkTxSwitchingPeriod_r16 */ @@ -4333,24 +4361,8 @@ static int hf_nr_rrc_txSwitchImpactToRx = -1; /* INTEGER_1_32 */ static int hf_nr_rrc_txSwitchWithAnotherBand = -1; /* INTEGER_1_32 */ static int hf_nr_rrc_srs_TxSwitch_v1610 = -1; /* T_srs_TxSwitch_v1610 */ static int hf_nr_rrc_supportedSRS_TxPortSwitch_v1610 = -1; /* T_supportedSRS_TxPortSwitch_v1610 */ -static int hf_nr_rrc_intraFreqDAPS_Parameters_r16 = -1; /* T_intraFreqDAPS_Parameters_r16 */ -static int hf_nr_rrc_intraFreqDiffSCS_DAPS_r16 = -1; /* T_intraFreqDiffSCS_DAPS_r16 */ -static int hf_nr_rrc_intraFreqDAPS_r16 = -1; /* T_intraFreqDAPS_r16 */ -static int hf_nr_rrc_intraFreqAsyncDAPS_r16 = -1; /* T_intraFreqAsyncDAPS_r16 */ -static int hf_nr_rrc_intraFreqMultiUL_TransmissionDAPS_r16 = -1; /* T_intraFreqMultiUL_TransmissionDAPS_r16 */ -static int hf_nr_rrc_intraFreqTwoTAGs_DAPS_r16 = -1; /* T_intraFreqTwoTAGs_DAPS_r16 */ -static int hf_nr_rrc_intraFreqSemiStaticPowerSharingDAPS_Mode1_r16 = -1; /* T_intraFreqSemiStaticPowerSharingDAPS_Mode1_r16 */ -static int hf_nr_rrc_intraFreqSemiStaticPowerSharingDAPS_Mode2_r16 = -1; /* T_intraFreqSemiStaticPowerSharingDAPS_Mode2_r16 */ -static int hf_nr_rrc_intraFreqDynamicPowersharingDAPS_r16 = -1; /* T_intraFreqDynamicPowersharingDAPS_r16 */ -static int hf_nr_rrc_supportedBandCombinationListSidelink_r16 = -1; /* SupportedBandCombinationListSidelink_r16 */ -static int hf_nr_rrc_supportedBandCombinationListSidelinkEUTRA_r16 = -1; /* SupportedBandCombinationListSidelinkEUTRA_r16 */ -static int hf_nr_rrc_supportedBandCombinationListSidelinkEUTRA_NR_r16 = -1; /* SupportedBandCombinationListSidelinkEUTRA_NR_r16 */ -static int hf_nr_rrc_SupportedBandCombinationListSidelink_r16_item = -1; /* BandCombinationParametersSidelink_r16 */ -static int hf_nr_rrc_BandCombinationParametersSidelink_r16_item = -1; /* BandParametersSidelink_r16 */ static int hf_nr_rrc_freqBandSidelink_r16 = -1; /* FreqBandIndicatorNR */ -static int hf_nr_rrc_bandCombinationListEUTRA1_r16 = -1; /* T_bandCombinationListEUTRA1_r16 */ -static int hf_nr_rrc_bandCombinationListEUTRA2_r16 = -1; /* T_bandCombinationListEUTRA2_r16 */ -static int hf_nr_rrc_SupportedBandCombinationListSidelinkEUTRA_NR_r16_item = -1; /* BandCombinationParametersSidelinkEUTRA_NR_r16 */ +static int hf_nr_rrc_BandCombinationListSidelinkEUTRA_NR_r16_item = -1; /* BandCombinationParametersSidelinkEUTRA_NR_r16 */ static int hf_nr_rrc_BandCombinationParametersSidelinkEUTRA_NR_r16_item = -1; /* BandParametersSidelinkEUTRA_NR_r16 */ static int hf_nr_rrc_eutra_03 = -1; /* T_eutra_02 */ static int hf_nr_rrc_bandParametersSidelinkEUTRA1_r16 = -1; /* T_bandParametersSidelinkEUTRA1_r16 */ @@ -4390,17 +4402,36 @@ static int hf_nr_rrc_scellDormancyOutsideActiveTime_r16 = -1; /* T_scellDormanc static int hf_nr_rrc_crossCarrierA_CSI_trigDiffSCS_r16 = -1; /* T_crossCarrierA_CSI_trigDiffSCS_r16 */ static int hf_nr_rrc_defaultQCL_CrossCarrierA_CSI_Trig_r16 = -1; /* T_defaultQCL_CrossCarrierA_CSI_Trig_r16 */ static int hf_nr_rrc_interCA_NonAlignedFrame_r16 = -1; /* T_interCA_NonAlignedFrame_r16 */ -static int hf_nr_rrc_simul_SRS_Trans_InterBandCA_r16 = -1; /* INTEGER_1_2 */ -static int hf_nr_rrc_daps_Parameters_r16 = -1; /* T_daps_Parameters_r16 */ -static int hf_nr_rrc_asyncDAPS_r16 = -1; /* T_asyncDAPS_r16 */ +static int hf_nr_rrc_simul_SRS_Trans_BC_r16 = -1; /* T_simul_SRS_Trans_BC_r16 */ static int hf_nr_rrc_interFreqDAPS_r16 = -1; /* T_interFreqDAPS_r16 */ +static int hf_nr_rrc_interFreqAsyncDAPS_r16 = -1; /* T_interFreqAsyncDAPS_r16 */ static int hf_nr_rrc_interFreqDiffSCS_DAPS_r16 = -1; /* T_interFreqDiffSCS_DAPS_r16 */ -static int hf_nr_rrc_multiUL_TransmissionDAPS_r16 = -1; /* T_multiUL_TransmissionDAPS_r16 */ -static int hf_nr_rrc_semiStaticPowerSharingDAPS_Mode1_r16 = -1; /* T_semiStaticPowerSharingDAPS_Mode1_r16 */ -static int hf_nr_rrc_semiStaticPowerSharingDAPS_Mode2_r16 = -1; /* T_semiStaticPowerSharingDAPS_Mode2_r16 */ -static int hf_nr_rrc_dynamicPowersharingDAPS_r16 = -1; /* T_dynamicPowersharingDAPS_r16 */ -static int hf_nr_rrc_ul_TransCancellationDAPS_r16 = -1; /* T_ul_TransCancellationDAPS_r16 */ +static int hf_nr_rrc_interFreqMultiUL_TransmissionDAPS_r16 = -1; /* T_interFreqMultiUL_TransmissionDAPS_r16 */ +static int hf_nr_rrc_interFreqSemiStaticPowerSharingDAPS_Mode1_r16 = -1; /* T_interFreqSemiStaticPowerSharingDAPS_Mode1_r16 */ +static int hf_nr_rrc_interFreqSemiStaticPowerSharingDAPS_Mode2_r16 = -1; /* T_interFreqSemiStaticPowerSharingDAPS_Mode2_r16 */ +static int hf_nr_rrc_interFreqDynamicPowerSharingDAPS_r16 = -1; /* T_interFreqDynamicPowerSharingDAPS_r16 */ +static int hf_nr_rrc_interFreqUL_TransCancellationDAPS_r16 = -1; /* T_interFreqUL_TransCancellationDAPS_r16 */ static int hf_nr_rrc_codebookParametersPerBC_r16 = -1; /* CodebookParameters_v1610 */ +static int hf_nr_rrc_blindDetectFactor_r16 = -1; /* INTEGER_1_2 */ +static int hf_nr_rrc_pdcch_MonitoringCA_r16 = -1; /* T_pdcch_MonitoringCA_r16 */ +static int hf_nr_rrc_maxNumberOfMonitoringCC_r16 = -1; /* INTEGER_2_16 */ +static int hf_nr_rrc_supportedSpanArrangement_r16 = -1; /* T_supportedSpanArrangement_r16 */ +static int hf_nr_rrc_pdcch_BlindDetectionCA_Mixed_r16 = -1; /* T_pdcch_BlindDetectionCA_Mixed_r16 */ +static int hf_nr_rrc_supportedSpanArrangement_r16_01 = -1; /* T_supportedSpanArrangement_r16_01 */ +static int hf_nr_rrc_pdcch_BlindDetectionMCG_UE_r16 = -1; /* INTEGER_1_14 */ +static int hf_nr_rrc_pdcch_BlindDetectionSCG_UE_r16 = -1; /* INTEGER_1_14 */ +static int hf_nr_rrc_pdcch_BlindDetectionMCG_UE_Mixed_r16 = -1; /* T_pdcch_BlindDetectionMCG_UE_Mixed_r16 */ +static int hf_nr_rrc_pdcch_BlindDetectionMCG_UE1_r16 = -1; /* INTEGER_0_15 */ +static int hf_nr_rrc_pdcch_BlindDetectionMCG_UE2_r16 = -1; /* INTEGER_0_15 */ +static int hf_nr_rrc_pdcch_BlindDetectionSCG_UE_Mixed_r16 = -1; /* T_pdcch_BlindDetectionSCG_UE_Mixed_r16 */ +static int hf_nr_rrc_pdcch_BlindDetectionSCG_UE1_r16 = -1; /* INTEGER_0_15 */ +static int hf_nr_rrc_pdcch_BlindDetectionSCG_UE2_r16 = -1; /* INTEGER_0_15 */ +static int hf_nr_rrc_crossCarrierSchedulingDL_DiffSCS_r16 = -1; /* T_crossCarrierSchedulingDL_DiffSCS_r16 */ +static int hf_nr_rrc_crossCarrierSchedulingDefaultQCL_r16 = -1; /* T_crossCarrierSchedulingDefaultQCL_r16 */ +static int hf_nr_rrc_crossCarrierSchedulingUL_DiffSCS_r16 = -1; /* T_crossCarrierSchedulingUL_DiffSCS_r16 */ +static int hf_nr_rrc_simul_SRS_MIMO_Trans_BC_r16 = -1; /* T_simul_SRS_MIMO_Trans_BC_r16 */ +static int hf_nr_rrc_codebookParametersAdditionPerBC_r16 = -1; /* CodebookParametersAdditionPerBC_r16 */ +static int hf_nr_rrc_codebookComboParametersAdditionPerBC_r16 = -1; /* CodebookComboParametersAdditionPerBC_r16 */ static int hf_nr_rrc_ca_ParametersNR_ForDC = -1; /* CA_ParametersNR */ static int hf_nr_rrc_ca_ParametersNR_ForDC_v1540 = -1; /* CA_ParametersNR_v1540 */ static int hf_nr_rrc_ca_ParametersNR_ForDC_v1550 = -1; /* CA_ParametersNR_v1550 */ @@ -4409,6 +4440,7 @@ static int hf_nr_rrc_featureSetCombinationDC = -1; /* FeatureSetCombinationId * static int hf_nr_rrc_intraFR_NR_DC_PwrSharingMode1_r16 = -1; /* T_intraFR_NR_DC_PwrSharingMode1_r16 */ static int hf_nr_rrc_intraFR_NR_DC_PwrSharingMode2_r16 = -1; /* T_intraFR_NR_DC_PwrSharingMode2_r16 */ static int hf_nr_rrc_intraFR_NR_DC_DynamicPwrSharing_r16 = -1; /* T_intraFR_NR_DC_DynamicPwrSharing_r16 */ +static int hf_nr_rrc_asyncNRDC_r16 = -1; /* T_asyncNRDC_r16 */ static int hf_nr_rrc_fr1fdd_FR1TDD_CA_SpCellOnFR1FDD = -1; /* T_fr1fdd_FR1TDD_CA_SpCellOnFR1FDD */ static int hf_nr_rrc_fr1fdd_FR1TDD_CA_SpCellOnFR1TDD = -1; /* T_fr1fdd_FR1TDD_CA_SpCellOnFR1TDD */ static int hf_nr_rrc_fr1fdd_FR2TDD_CA_SpCellOnFR1FDD = -1; /* T_fr1fdd_FR2TDD_CA_SpCellOnFR1FDD */ @@ -4442,6 +4474,85 @@ static int hf_nr_rrc_type2_r16 = -1; /* T_type2_r16 */ static int hf_nr_rrc_type2_r16_item = -1; /* INTEGER_0_maxNrofCSI_RS_ResourcesAlt_1_r16 */ static int hf_nr_rrc_type2_PortSelection_r16 = -1; /* T_type2_PortSelection_r16 */ static int hf_nr_rrc_type2_PortSelection_r16_item = -1; /* INTEGER_0_maxNrofCSI_RS_ResourcesAlt_1_r16 */ +static int hf_nr_rrc_etype2_r16 = -1; /* T_etype2_r16 */ +static int hf_nr_rrc_etype2R1_r16 = -1; /* T_etype2R1_r16 */ +static int hf_nr_rrc_supportedCSI_RS_ResourceListAdd_r16 = -1; /* T_supportedCSI_RS_ResourceListAdd_r16 */ +static int hf_nr_rrc_supportedCSI_RS_ResourceListAdd_r16_item = -1; /* INTEGER_0_maxNrofCSI_RS_ResourcesAlt_1_r16 */ +static int hf_nr_rrc_etype2R2_r16 = -1; /* T_etype2R2_r16 */ +static int hf_nr_rrc_supportedCSI_RS_ResourceListAdd_r16_01 = -1; /* T_supportedCSI_RS_ResourceListAdd_r16_01 */ +static int hf_nr_rrc_paramComb7_8_r16 = -1; /* T_paramComb7_8_r16 */ +static int hf_nr_rrc_rank3_4_r16 = -1; /* T_rank3_4_r16 */ +static int hf_nr_rrc_softAmpRestriction_r16 = -1; /* T_softAmpRestriction_r16 */ +static int hf_nr_rrc_etype2_PS_r16 = -1; /* T_etype2_PS_r16 */ +static int hf_nr_rrc_etype2R1_PortSelection_r16 = -1; /* T_etype2R1_PortSelection_r16 */ +static int hf_nr_rrc_supportedCSI_RS_ResourceListAdd_r16_02 = -1; /* T_supportedCSI_RS_ResourceListAdd_r16_02 */ +static int hf_nr_rrc_etype2R2_PortSelection_r16 = -1; /* T_etype2R2_PortSelection_r16 */ +static int hf_nr_rrc_supportedCSI_RS_ResourceListAdd_r16_03 = -1; /* T_supportedCSI_RS_ResourceListAdd_r16_03 */ +static int hf_nr_rrc_rank3_4_r16_01 = -1; /* T_rank3_4_r16_01 */ +static int hf_nr_rrc_type1SP_Type2_null_r16 = -1; /* T_type1SP_Type2_null_r16 */ +static int hf_nr_rrc_supportedCSI_RS_ResourceListAdd_r16_04 = -1; /* T_supportedCSI_RS_ResourceListAdd_r16_04 */ +static int hf_nr_rrc_type1SP_Type2PS_null_r16 = -1; /* T_type1SP_Type2PS_null_r16 */ +static int hf_nr_rrc_supportedCSI_RS_ResourceListAdd_r16_05 = -1; /* T_supportedCSI_RS_ResourceListAdd_r16_05 */ +static int hf_nr_rrc_type1SP_eType2R1_null_r16 = -1; /* T_type1SP_eType2R1_null_r16 */ +static int hf_nr_rrc_supportedCSI_RS_ResourceListAdd_r16_06 = -1; /* T_supportedCSI_RS_ResourceListAdd_r16_06 */ +static int hf_nr_rrc_type1SP_eType2R2_null_r16 = -1; /* T_type1SP_eType2R2_null_r16 */ +static int hf_nr_rrc_supportedCSI_RS_ResourceListAdd_r16_07 = -1; /* T_supportedCSI_RS_ResourceListAdd_r16_07 */ +static int hf_nr_rrc_type1SP_eType2R1PS_null_r16 = -1; /* T_type1SP_eType2R1PS_null_r16 */ +static int hf_nr_rrc_supportedCSI_RS_ResourceListAdd_r16_08 = -1; /* T_supportedCSI_RS_ResourceListAdd_r16_08 */ +static int hf_nr_rrc_type1SP_eType2R2PS_null_r16 = -1; /* T_type1SP_eType2R2PS_null_r16 */ +static int hf_nr_rrc_supportedCSI_RS_ResourceListAdd_r16_09 = -1; /* T_supportedCSI_RS_ResourceListAdd_r16_09 */ +static int hf_nr_rrc_type1SP_Type2_Type2PS_r16 = -1; /* T_type1SP_Type2_Type2PS_r16 */ +static int hf_nr_rrc_supportedCSI_RS_ResourceListAdd_r16_10 = -1; /* T_supportedCSI_RS_ResourceListAdd_r16_10 */ +static int hf_nr_rrc_type1MP_Type2_null_r16 = -1; /* T_type1MP_Type2_null_r16 */ +static int hf_nr_rrc_supportedCSI_RS_ResourceListAdd_r16_11 = -1; /* T_supportedCSI_RS_ResourceListAdd_r16_11 */ +static int hf_nr_rrc_type1MP_Type2PS_null_r16 = -1; /* T_type1MP_Type2PS_null_r16 */ +static int hf_nr_rrc_supportedCSI_RS_ResourceListAdd_r16_12 = -1; /* T_supportedCSI_RS_ResourceListAdd_r16_12 */ +static int hf_nr_rrc_type1MP_eType2R1_null_r16 = -1; /* T_type1MP_eType2R1_null_r16 */ +static int hf_nr_rrc_supportedCSI_RS_ResourceListAdd_r16_13 = -1; /* T_supportedCSI_RS_ResourceListAdd_r16_13 */ +static int hf_nr_rrc_type1MP_eType2R2_null_r16 = -1; /* T_type1MP_eType2R2_null_r16 */ +static int hf_nr_rrc_supportedCSI_RS_ResourceListAdd_r16_14 = -1; /* T_supportedCSI_RS_ResourceListAdd_r16_14 */ +static int hf_nr_rrc_type1MP_eType2R1PS_null_r16 = -1; /* T_type1MP_eType2R1PS_null_r16 */ +static int hf_nr_rrc_supportedCSI_RS_ResourceListAdd_r16_15 = -1; /* T_supportedCSI_RS_ResourceListAdd_r16_15 */ +static int hf_nr_rrc_type1MP_eType2R2PS_null_r16 = -1; /* T_type1MP_eType2R2PS_null_r16 */ +static int hf_nr_rrc_supportedCSI_RS_ResourceListAdd_r16_16 = -1; /* T_supportedCSI_RS_ResourceListAdd_r16_16 */ +static int hf_nr_rrc_type1MP_Type2_Type2PS_r16 = -1; /* T_type1MP_Type2_Type2PS_r16 */ +static int hf_nr_rrc_supportedCSI_RS_ResourceListAdd_r16_17 = -1; /* T_supportedCSI_RS_ResourceListAdd_r16_17 */ +static int hf_nr_rrc_etype2R1_r16_01 = -1; /* T_etype2R1_r16_01 */ +static int hf_nr_rrc_etype2R1_r16_item = -1; /* INTEGER_0_maxNrofCSI_RS_ResourcesAlt_1_r16 */ +static int hf_nr_rrc_etype2R2_r16_01 = -1; /* T_etype2R2_r16_01 */ +static int hf_nr_rrc_etype2R2_r16_item = -1; /* INTEGER_0_maxNrofCSI_RS_ResourcesAlt_1_r16 */ +static int hf_nr_rrc_etype2R1_PortSelection_r16_01 = -1; /* T_etype2R1_PortSelection_r16_01 */ +static int hf_nr_rrc_etype2R1_PortSelection_r16_item = -1; /* INTEGER_0_maxNrofCSI_RS_ResourcesAlt_1_r16 */ +static int hf_nr_rrc_etype2R2_PortSelection_r16_01 = -1; /* T_etype2R2_PortSelection_r16_01 */ +static int hf_nr_rrc_etype2R2_PortSelection_r16_item = -1; /* INTEGER_0_maxNrofCSI_RS_ResourcesAlt_1_r16 */ +static int hf_nr_rrc_type1SP_Type2_null_r16_01 = -1; /* T_type1SP_Type2_null_r16_01 */ +static int hf_nr_rrc_type1SP_Type2_null_r16_item = -1; /* INTEGER_0_maxNrofCSI_RS_ResourcesAlt_1_r16 */ +static int hf_nr_rrc_type1SP_Type2PS_null_r16_01 = -1; /* T_type1SP_Type2PS_null_r16_01 */ +static int hf_nr_rrc_type1SP_Type2PS_null_r16_item = -1; /* INTEGER_0_maxNrofCSI_RS_ResourcesAlt_1_r16 */ +static int hf_nr_rrc_type1SP_eType2R1_null_r16_01 = -1; /* T_type1SP_eType2R1_null_r16_01 */ +static int hf_nr_rrc_type1SP_eType2R1_null_r16_item = -1; /* INTEGER_0_maxNrofCSI_RS_ResourcesAlt_1_r16 */ +static int hf_nr_rrc_type1SP_eType2R2_null_r16_01 = -1; /* T_type1SP_eType2R2_null_r16_01 */ +static int hf_nr_rrc_type1SP_eType2R2_null_r16_item = -1; /* INTEGER_0_maxNrofCSI_RS_ResourcesAlt_1_r16 */ +static int hf_nr_rrc_type1SP_eType2R1PS_null_r16_01 = -1; /* T_type1SP_eType2R1PS_null_r16_01 */ +static int hf_nr_rrc_type1SP_eType2R1PS_null_r16_item = -1; /* INTEGER_0_maxNrofCSI_RS_ResourcesAlt_1_r16 */ +static int hf_nr_rrc_type1SP_eType2R2PS_null_r16_01 = -1; /* T_type1SP_eType2R2PS_null_r16_01 */ +static int hf_nr_rrc_type1SP_eType2R2PS_null_r16_item = -1; /* INTEGER_0_maxNrofCSI_RS_ResourcesAlt_1_r16 */ +static int hf_nr_rrc_type1SP_Type2_Type2PS_r16_01 = -1; /* T_type1SP_Type2_Type2PS_r16_01 */ +static int hf_nr_rrc_type1SP_Type2_Type2PS_r16_item = -1; /* INTEGER_0_maxNrofCSI_RS_ResourcesAlt_1_r16 */ +static int hf_nr_rrc_type1MP_Type2_null_r16_01 = -1; /* T_type1MP_Type2_null_r16_01 */ +static int hf_nr_rrc_type1MP_Type2_null_r16_item = -1; /* INTEGER_0_maxNrofCSI_RS_ResourcesAlt_1_r16 */ +static int hf_nr_rrc_type1MP_Type2PS_null_r16_01 = -1; /* T_type1MP_Type2PS_null_r16_01 */ +static int hf_nr_rrc_type1MP_Type2PS_null_r16_item = -1; /* INTEGER_0_maxNrofCSI_RS_ResourcesAlt_1_r16 */ +static int hf_nr_rrc_type1MP_eType2R1_null_r16_01 = -1; /* T_type1MP_eType2R1_null_r16_01 */ +static int hf_nr_rrc_type1MP_eType2R1_null_r16_item = -1; /* INTEGER_0_maxNrofCSI_RS_ResourcesAlt_1_r16 */ +static int hf_nr_rrc_type1MP_eType2R2_null_r16_01 = -1; /* T_type1MP_eType2R2_null_r16_01 */ +static int hf_nr_rrc_type1MP_eType2R2_null_r16_item = -1; /* INTEGER_0_maxNrofCSI_RS_ResourcesAlt_1_r16 */ +static int hf_nr_rrc_type1MP_eType2R1PS_null_r16_01 = -1; /* T_type1MP_eType2R1PS_null_r16_01 */ +static int hf_nr_rrc_type1MP_eType2R1PS_null_r16_item = -1; /* INTEGER_0_maxNrofCSI_RS_ResourcesAlt_1_r16 */ +static int hf_nr_rrc_type1MP_eType2R2PS_null_r16_01 = -1; /* T_type1MP_eType2R2PS_null_r16_01 */ +static int hf_nr_rrc_type1MP_eType2R2PS_null_r16_item = -1; /* INTEGER_0_maxNrofCSI_RS_ResourcesAlt_1_r16 */ +static int hf_nr_rrc_type1MP_Type2_Type2PS_r16_01 = -1; /* T_type1MP_Type2_Type2PS_r16_01 */ +static int hf_nr_rrc_type1MP_Type2_Type2PS_r16_item = -1; /* INTEGER_0_maxNrofCSI_RS_ResourcesAlt_1_r16 */ static int hf_nr_rrc_CodebookVariantsList_r16_item = -1; /* SupportedCSI_RS_Resource */ static int hf_nr_rrc_maxNumberTxPortsPerResource = -1; /* T_maxNumberTxPortsPerResource */ static int hf_nr_rrc_maxNumberResourcesPerBand = -1; /* INTEGER_1_64 */ @@ -4502,16 +4613,38 @@ static int hf_nr_rrc_pdsch_ProcessingType2_Limited = -1; /* T_pdsch_ProcessingT static int hf_nr_rrc_differentTB_PerSlot_SCS_30kHz = -1; /* T_differentTB_PerSlot_SCS_30kHz */ static int hf_nr_rrc_dl_MCS_TableAlt_DynamicIndication = -1; /* T_dl_MCS_TableAlt_DynamicIndication */ static int hf_nr_rrc_supportedSRS_Resources = -1; /* SRS_Resources */ -static int hf_nr_rrc_cbgPDSCH_ProcessingType1_DifferentTB_PerSlot = -1; /* T_cbgPDSCH_ProcessingType1_DifferentTB_PerSlot */ +static int hf_nr_rrc_cbgPDSCH_ProcessingType1_NumberOfTB_PerSlot = -1; /* T_cbgPDSCH_ProcessingType1_NumberOfTB_PerSlot */ static int hf_nr_rrc_scs_15kHz_03 = -1; /* T_scs_15kHz_02 */ static int hf_nr_rrc_scs_30kHz_03 = -1; /* T_scs_30kHz_02 */ static int hf_nr_rrc_scs_60kHz_04 = -1; /* T_scs_60kHz_03 */ static int hf_nr_rrc_scs_120kHz_03 = -1; /* T_scs_120kHz_03 */ -static int hf_nr_rrc_cbgPDSCH_ProcessingType2_DifferentTB_PerSlot = -1; /* T_cbgPDSCH_ProcessingType2_DifferentTB_PerSlot */ +static int hf_nr_rrc_cbgPDSCH_ProcessingType2_NumberOfTB_PerSlot = -1; /* T_cbgPDSCH_ProcessingType2_NumberOfTB_PerSlot */ static int hf_nr_rrc_scs_15kHz_04 = -1; /* T_scs_15kHz_03 */ static int hf_nr_rrc_scs_30kHz_04 = -1; /* T_scs_30kHz_03 */ static int hf_nr_rrc_scs_60kHz_05 = -1; /* T_scs_60kHz_04 */ static int hf_nr_rrc_scs_120kHz_04 = -1; /* T_scs_120kHz_04 */ +static int hf_nr_rrc_intraFreqDAPS_r16 = -1; /* T_intraFreqDAPS_r16 */ +static int hf_nr_rrc_intraFreqDiffSCS_DAPS_r16 = -1; /* T_intraFreqDiffSCS_DAPS_r16 */ +static int hf_nr_rrc_intraFreqAsyncDAPS_r16 = -1; /* T_intraFreqAsyncDAPS_r16 */ +static int hf_nr_rrc_intraBandFreqSeparationDL_v1620 = -1; /* FreqSeparationClassDL_v1620 */ +static int hf_nr_rrc_intraBandFreqSeparationDL_Only_r16 = -1; /* FreqSeparationClassDL_Only_r16 */ +static int hf_nr_rrc_pdcch_Monitoring_r16 = -1; /* T_pdcch_Monitoring_r16 */ +static int hf_nr_rrc_pdsch_ProcessingType1_r16 = -1; /* T_pdsch_ProcessingType1_r16 */ +static int hf_nr_rrc_scs_15kHz_r16 = -1; /* PDCCH_MonitoringOccasions_r16 */ +static int hf_nr_rrc_scs_30kHz_r16 = -1; /* PDCCH_MonitoringOccasions_r16 */ +static int hf_nr_rrc_pdsch_ProcessingType2_r16 = -1; /* T_pdsch_ProcessingType2_r16 */ +static int hf_nr_rrc_pdcch_MonitoringMixed_r16 = -1; /* T_pdcch_MonitoringMixed_r16 */ +static int hf_nr_rrc_crossCarrierSchedulingProcessing_DiffSCS_r16 = -1; /* T_crossCarrierSchedulingProcessing_DiffSCS_r16 */ +static int hf_nr_rrc_scs_15kHz_120kHz_r16 = -1; /* T_scs_15kHz_120kHz_r16 */ +static int hf_nr_rrc_scs_15kHz_60kHz_r16 = -1; /* T_scs_15kHz_60kHz_r16 */ +static int hf_nr_rrc_scs_30kHz_120kHz_r16 = -1; /* T_scs_30kHz_120kHz_r16 */ +static int hf_nr_rrc_scs_15kHz_30kHz_r16 = -1; /* T_scs_15kHz_30kHz_r16 */ +static int hf_nr_rrc_scs_30kHz_60kHz_r16 = -1; /* T_scs_30kHz_60kHz_r16 */ +static int hf_nr_rrc_scs_60kHz_120kHz_r16 = -1; /* T_scs_60kHz_120kHz_r16 */ +static int hf_nr_rrc_singleDCI_SDM_scheme_r16 = -1; /* T_singleDCI_SDM_scheme_r16 */ +static int hf_nr_rrc_period7span3_r16 = -1; /* T_period7span3_r16 */ +static int hf_nr_rrc_period4span3_r16 = -1; /* T_period4span3_r16 */ +static int hf_nr_rrc_period2span2_r16 = -1; /* T_period2span2_r16 */ static int hf_nr_rrc_maxNumberNZP_CSI_RS_PerCC = -1; /* INTEGER_1_32 */ static int hf_nr_rrc_maxNumberPortsAcrossNZP_CSI_RS_PerCC = -1; /* T_maxNumberPortsAcrossNZP_CSI_RS_PerCC */ static int hf_nr_rrc_maxNumberCS_IM_PerCC = -1; /* T_maxNumberCS_IM_PerCC */ @@ -4534,6 +4667,11 @@ static int hf_nr_rrc_supportedBandwidthDL = -1; /* SupportedBandwidth */ static int hf_nr_rrc_channelBW_90mhz = -1; /* T_channelBW_90mhz */ static int hf_nr_rrc_maxNumberMIMO_LayersPDSCH = -1; /* MIMO_LayersDL */ static int hf_nr_rrc_supportedModulationOrderDL = -1; /* ModulationOrder */ +static int hf_nr_rrc_multiDCI_MultiTRP_r16 = -1; /* MultiDCI_MultiTRP_r16 */ +static int hf_nr_rrc_supportFDM_SchemeB_r16 = -1; /* T_supportFDM_SchemeB_r16 */ +static int hf_nr_rrc_maxNumberCORESET_r16 = -1; /* T_maxNumberCORESET_r16 */ +static int hf_nr_rrc_maxNumberCORESETPerPoolIndex_r16 = -1; /* INTEGER_1_3 */ +static int hf_nr_rrc_maxNumberUnicastPDSCH_PerPool_r16 = -1; /* T_maxNumberUnicastPDSCH_PerPool_r16 */ static int hf_nr_rrc_featureSetsDownlink = -1; /* SEQUENCE_SIZE_1_maxDownlinkFeatureSets_OF_FeatureSetDownlink */ static int hf_nr_rrc_featureSetsDownlink_item = -1; /* FeatureSetDownlink */ static int hf_nr_rrc_featureSetsDownlinkPerCC = -1; /* SEQUENCE_SIZE_1_maxPerCC_FeatureSets_OF_FeatureSetDownlinkPerCC */ @@ -4554,6 +4692,8 @@ static int hf_nr_rrc_featureSetsDownlink_v1610 = -1; /* SEQUENCE_SIZE_1_maxDown static int hf_nr_rrc_featureSetsDownlink_v1610_item = -1; /* FeatureSetDownlink_v1610 */ static int hf_nr_rrc_featureSetsUplink_v1610 = -1; /* SEQUENCE_SIZE_1_maxUplinkFeatureSets_OF_FeatureSetUplink_v1610 */ static int hf_nr_rrc_featureSetsUplink_v1610_item = -1; /* FeatureSetUplink_v1610 */ +static int hf_nr_rrc_featureSetDownlinkPerCC_v1620 = -1; /* SEQUENCE_SIZE_1_maxPerCC_FeatureSets_OF_FeatureSetDownlinkPerCC_v1620 */ +static int hf_nr_rrc_featureSetDownlinkPerCC_v1620_item = -1; /* FeatureSetDownlinkPerCC_v1620 */ static int hf_nr_rrc_featureSetListPerUplinkCC = -1; /* SEQUENCE_SIZE_1_maxNrofServingCells_OF_FeatureSetUplinkPerCC_Id */ static int hf_nr_rrc_featureSetListPerUplinkCC_item = -1; /* FeatureSetUplinkPerCC_Id */ static int hf_nr_rrc_scalingFactor_01 = -1; /* T_scalingFactor_01 */ @@ -4592,6 +4732,47 @@ static int hf_nr_rrc_scs_30kHz_07 = -1; /* T_scs_30kHz_06 */ static int hf_nr_rrc_scs_60kHz_08 = -1; /* T_scs_60kHz_07 */ static int hf_nr_rrc_scs_120kHz_07 = -1; /* T_scs_120kHz_07 */ static int hf_nr_rrc_supportedSRS_PosResources_r16 = -1; /* SRS_AllPosResources_r16 */ +static int hf_nr_rrc_intraFreqDAPS_UL_r16 = -1; /* T_intraFreqDAPS_UL_r16 */ +static int hf_nr_rrc_intraFreqMultiUL_TransmissionDAPS_r16 = -1; /* T_intraFreqMultiUL_TransmissionDAPS_r16 */ +static int hf_nr_rrc_intraFreqTwoTAGs_DAPS_r16 = -1; /* T_intraFreqTwoTAGs_DAPS_r16 */ +static int hf_nr_rrc_intraFreqSemiStaticPowerSharingDAPS_Mode1_r16 = -1; /* T_intraFreqSemiStaticPowerSharingDAPS_Mode1_r16 */ +static int hf_nr_rrc_intraFreqSemiStaticPowerSharingDAPS_Mode2_r16 = -1; /* T_intraFreqSemiStaticPowerSharingDAPS_Mode2_r16 */ +static int hf_nr_rrc_intraFreqDynamicPowerSharingDAPS_r16 = -1; /* T_intraFreqDynamicPowerSharingDAPS_r16 */ +static int hf_nr_rrc_intraBandFreqSeparationUL_v1620 = -1; /* FreqSeparationClassUL_v1620 */ +static int hf_nr_rrc_multiPUCCH_r16 = -1; /* T_multiPUCCH_r16 */ +static int hf_nr_rrc_sub_SlotConfig_NCP_r16 = -1; /* T_sub_SlotConfig_NCP_r16 */ +static int hf_nr_rrc_sub_SlotConfig_ECP_r16 = -1; /* T_sub_SlotConfig_ECP_r16 */ +static int hf_nr_rrc_twoPUCCH_Type1_r16 = -1; /* T_twoPUCCH_Type1_r16 */ +static int hf_nr_rrc_twoPUCCH_Type2_r16 = -1; /* T_twoPUCCH_Type2_r16 */ +static int hf_nr_rrc_twoPUCCH_Type3_r16 = -1; /* T_twoPUCCH_Type3_r16 */ +static int hf_nr_rrc_twoPUCCH_Type4_r16 = -1; /* T_twoPUCCH_Type4_r16 */ +static int hf_nr_rrc_mux_SR_HARQ_ACK_r16 = -1; /* T_mux_SR_HARQ_ACK_r16 */ +static int hf_nr_rrc_twoHARQ_ACK_Codebook_type1_r16 = -1; /* T_twoHARQ_ACK_Codebook_type1_r16 */ +static int hf_nr_rrc_twoHARQ_ACK_Codebook_type2_r16 = -1; /* T_twoHARQ_ACK_Codebook_type2_r16 */ +static int hf_nr_rrc_twoPUCCH_Type5_r16 = -1; /* T_twoPUCCH_Type5_r16 */ +static int hf_nr_rrc_twoPUCCH_Type6_r16 = -1; /* T_twoPUCCH_Type6_r16 */ +static int hf_nr_rrc_twoPUCCH_Type7_r16 = -1; /* T_twoPUCCH_Type7_r16 */ +static int hf_nr_rrc_twoPUCCH_Type8_r16 = -1; /* T_twoPUCCH_Type8_r16 */ +static int hf_nr_rrc_twoPUCCH_Type9_r16 = -1; /* T_twoPUCCH_Type9_r16 */ +static int hf_nr_rrc_twoPUCCH_Type10_r16 = -1; /* T_twoPUCCH_Type10_r16 */ +static int hf_nr_rrc_twoPUCCH_Type11_r16 = -1; /* T_twoPUCCH_Type11_r16 */ +static int hf_nr_rrc_ul_IntraUE_Mux_r16 = -1; /* T_ul_IntraUE_Mux_r16 */ +static int hf_nr_rrc_pusch_PreparationLowPriority_r16 = -1; /* T_pusch_PreparationLowPriority_r16 */ +static int hf_nr_rrc_pusch_PreparationHighPriority_r16 = -1; /* T_pusch_PreparationHighPriority_r16 */ +static int hf_nr_rrc_ul_FullPwrMode_r16 = -1; /* T_ul_FullPwrMode_r16 */ +static int hf_nr_rrc_crossCarrierSchedulingProcessing_DiffSCS_r16_01 = -1; /* T_crossCarrierSchedulingProcessing_DiffSCS_r16_01 */ +static int hf_nr_rrc_scs_15kHz_120kHz_r16_01 = -1; /* T_scs_15kHz_120kHz_r16_01 */ +static int hf_nr_rrc_scs_15kHz_60kHz_r16_01 = -1; /* T_scs_15kHz_60kHz_r16_01 */ +static int hf_nr_rrc_scs_30kHz_120kHz_r16_01 = -1; /* T_scs_30kHz_120kHz_r16_01 */ +static int hf_nr_rrc_scs_15kHz_30kHz_r16_01 = -1; /* T_scs_15kHz_30kHz_r16_01 */ +static int hf_nr_rrc_scs_30kHz_60kHz_r16_01 = -1; /* T_scs_30kHz_60kHz_r16_01 */ +static int hf_nr_rrc_scs_60kHz_120kHz_r16_01 = -1; /* T_scs_60kHz_120kHz_r16_01 */ +static int hf_nr_rrc_ul_FullPwrMode1_r16 = -1; /* T_ul_FullPwrMode1_r16 */ +static int hf_nr_rrc_ul_FullPwrMode2_SRSConfig_diffNumSRSPorts_r16 = -1; /* T_ul_FullPwrMode2_SRSConfig_diffNumSRSPorts_r16 */ +static int hf_nr_rrc_ul_FullPwrMode2_TPMIGroup_r16 = -1; /* T_ul_FullPwrMode2_TPMIGroup_r16 */ +static int hf_nr_rrc_twoPorts_r16 = -1; /* BIT_STRING_SIZE_2 */ +static int hf_nr_rrc_fourPortsNonCoherent_r16 = -1; /* T_fourPortsNonCoherent_r16 */ +static int hf_nr_rrc_fourPortsPartialCoherent_r16 = -1; /* T_fourPortsPartialCoherent_r16 */ static int hf_nr_rrc_srs_PosResources_r16 = -1; /* SRS_PosResources_r16 */ static int hf_nr_rrc_srs_PosResourceAP_r16 = -1; /* SRS_PosResourceAP_r16 */ static int hf_nr_rrc_srs_PosResourceSP_r16 = -1; /* SRS_PosResourceSP_r16 */ @@ -4664,7 +4845,6 @@ static int hf_nr_rrc_lch_ToSCellRestriction = -1; /* T_lch_ToSCellRestriction * static int hf_nr_rrc_recommendedBitRate = -1; /* T_recommendedBitRate */ static int hf_nr_rrc_recommendedBitRateQuery = -1; /* T_recommendedBitRateQuery */ static int hf_nr_rrc_recommendedBitRateMultiplier_r16 = -1; /* T_recommendedBitRateMultiplier_r16 */ -static int hf_nr_rrc_secondaryDRX_Group = -1; /* T_secondaryDRX_Group */ static int hf_nr_rrc_preEmptiveBSR_r16 = -1; /* T_preEmptiveBSR_r16 */ static int hf_nr_rrc_autonomousTransmission_r16 = -1; /* T_autonomousTransmission_r16 */ static int hf_nr_rrc_lch_PriorityBasedPrioritization_r16 = -1; /* T_lch_PriorityBasedPrioritization_r16 */ @@ -4672,21 +4852,24 @@ static int hf_nr_rrc_lch_ToConfiguredGrantMapping_r16 = -1; /* T_lch_ToConfigur static int hf_nr_rrc_lch_ToGrantPriorityRestriction_r16 = -1; /* T_lch_ToGrantPriorityRestriction_r16 */ static int hf_nr_rrc_singlePHR_P_r16 = -1; /* T_singlePHR_P_r16 */ static int hf_nr_rrc_ul_LBT_FailureDetectionRecovery_r16 = -1; /* T_ul_LBT_FailureDetectionRecovery_r16 */ +static int hf_nr_rrc_tdd_MPE_P_MPR_Reporting_r16 = -1; /* T_tdd_MPE_P_MPR_Reporting_r16 */ +static int hf_nr_rrc_lcid_ExtensionIAB_r16 = -1; /* T_lcid_ExtensionIAB_r16 */ static int hf_nr_rrc_directMCG_SCellActivation_r16 = -1; /* T_directMCG_SCellActivation_r16 */ static int hf_nr_rrc_directMCG_SCellActivationResume_r16 = -1; /* T_directMCG_SCellActivationResume_r16 */ static int hf_nr_rrc_directSCG_SCellActivation_r16 = -1; /* T_directSCG_SCellActivation_r16 */ static int hf_nr_rrc_directSCG_SCellActivationResume_r16 = -1; /* T_directSCG_SCellActivationResume_r16 */ static int hf_nr_rrc_drx_Adaptation_r16 = -1; /* T_drx_Adaptation_r16 */ -static int hf_nr_rrc_licensedBand_r16 = -1; /* MinTimeGap_r16 */ -static int hf_nr_rrc_unlicensedBand_r16 = -1; /* MinTimeGap_r16 */ +static int hf_nr_rrc_non_SharedSpectrumChAccess_r16 = -1; /* MinTimeGap_r16 */ +static int hf_nr_rrc_sharedSpectrumChAccess_r16 = -1; /* MinTimeGap_r16 */ static int hf_nr_rrc_skipUplinkTxDynamic_01 = -1; /* T_skipUplinkTxDynamic */ static int hf_nr_rrc_logicalChannelSR_DelayTimer_01 = -1; /* T_logicalChannelSR_DelayTimer_01 */ static int hf_nr_rrc_longDRX_Cycle = -1; /* T_longDRX_Cycle */ static int hf_nr_rrc_shortDRX_Cycle = -1; /* T_shortDRX_Cycle */ static int hf_nr_rrc_multipleSR_Configurations = -1; /* T_multipleSR_Configurations */ static int hf_nr_rrc_multipleConfiguredGrants = -1; /* T_multipleConfiguredGrants */ -static int hf_nr_rrc_scs_15kHz_r16 = -1; /* T_scs_15kHz_r16 */ -static int hf_nr_rrc_scs_30kHz_r16 = -1; /* T_scs_30kHz_r16 */ +static int hf_nr_rrc_secondaryDRX_Group_r16 = -1; /* T_secondaryDRX_Group_r16 */ +static int hf_nr_rrc_scs_15kHz_r16_01 = -1; /* T_scs_15kHz_r16 */ +static int hf_nr_rrc_scs_30kHz_r16_01 = -1; /* T_scs_30kHz_r16 */ static int hf_nr_rrc_scs_60kHz_r16 = -1; /* T_scs_60kHz_r16 */ static int hf_nr_rrc_scs_120kHz_r16 = -1; /* T_scs_120kHz_r16 */ static int hf_nr_rrc_measAndMobParametersCommon = -1; /* MeasAndMobParametersCommon */ @@ -4723,6 +4906,11 @@ static int hf_nr_rrc_multipleNS_And_Pmax_IAB_r16 = -1; /* T_multipleNS_And_Pmax static int hf_nr_rrc_nr_CGI_Reporting_NPN_r16 = -1; /* T_nr_CGI_Reporting_NPN_r16 */ static int hf_nr_rrc_idleInactiveEUTRA_MeasReport_r16 = -1; /* T_idleInactiveEUTRA_MeasReport_r16 */ static int hf_nr_rrc_idleInactive_ValidityArea_r16 = -1; /* T_idleInactive_ValidityArea_r16 */ +static int hf_nr_rrc_eutra_AutonomousGaps_r16 = -1; /* T_eutra_AutonomousGaps_r16 */ +static int hf_nr_rrc_eutra_AutonomousGaps_NEDC_r16 = -1; /* T_eutra_AutonomousGaps_NEDC_r16 */ +static int hf_nr_rrc_eutra_AutonomousGaps_NRDC_r16 = -1; /* T_eutra_AutonomousGaps_NRDC_r16 */ +static int hf_nr_rrc_pcellT312_r16 = -1; /* T_pcellT312_r16 */ +static int hf_nr_rrc_supportedGapPattern_r16 = -1; /* BIT_STRING_SIZE_2 */ static int hf_nr_rrc_intraAndInterF_MeasAndReport = -1; /* T_intraAndInterF_MeasAndReport */ static int hf_nr_rrc_eventA_MeasAndReport = -1; /* T_eventA_MeasAndReport */ static int hf_nr_rrc_handoverInterF = -1; /* T_handoverInterF */ @@ -4730,19 +4918,6 @@ static int hf_nr_rrc_handoverLTE_EPC = -1; /* T_handoverLTE_EPC */ static int hf_nr_rrc_handoverLTE_5GC = -1; /* T_handoverLTE_5GC */ static int hf_nr_rrc_sftd_MeasNR_Neigh = -1; /* T_sftd_MeasNR_Neigh */ static int hf_nr_rrc_sftd_MeasNR_Neigh_DRX = -1; /* T_sftd_MeasNR_Neigh_DRX */ -static int hf_nr_rrc_condHandoverParametersXDD_Diff_r16 = -1; /* T_condHandoverParametersXDD_Diff_r16 */ -static int hf_nr_rrc_condHandover_r16 = -1; /* T_condHandover_r16 */ -static int hf_nr_rrc_condHandoverFailure_r16 = -1; /* T_condHandoverFailure_r16 */ -static int hf_nr_rrc_condHandoverTwoTriggerEvents_r16 = -1; /* T_condHandoverTwoTriggerEvents_r16 */ -static int hf_nr_rrc_pcellT312_r16 = -1; /* T_pcellT312_r16 */ -static int hf_nr_rrc_handoverIntraF_IAB_r16 = -1; /* T_handoverIntraF_IAB_r16 */ -static int hf_nr_rrc_eutra_AutonomousGaps_r16 = -1; /* T_eutra_AutonomousGaps_r16 */ -static int hf_nr_rrc_eutra_AutonomousGapsNEDC_r16 = -1; /* T_eutra_AutonomousGapsNEDC_r16 */ -static int hf_nr_rrc_eutra_AutonomousGapsNRDC_r16 = -1; /* T_eutra_AutonomousGapsNRDC_r16 */ -static int hf_nr_rrc_nr_AutonomousGaps_r16 = -1; /* T_nr_AutonomousGaps_r16 */ -static int hf_nr_rrc_nr_AutonomousGaps_ENDC_r16 = -1; /* T_nr_AutonomousGaps_ENDC_r16 */ -static int hf_nr_rrc_nr_AutonomousGapsNEDC_r16 = -1; /* T_nr_AutonomousGapsNEDC_r16 */ -static int hf_nr_rrc_nr_AutonomousGapsNRDC_r16 = -1; /* T_nr_AutonomousGapsNRDC_r16 */ static int hf_nr_rrc_handoverUTRA_FDD_r16 = -1; /* T_handoverUTRA_FDD_r16 */ static int hf_nr_rrc_ss_SINR_Meas = -1; /* T_ss_SINR_Meas */ static int hf_nr_rrc_csi_RSRP_AndRSRQ_MeasWithSSB = -1; /* T_csi_RSRP_AndRSRQ_MeasWithSSB */ @@ -4754,44 +4929,32 @@ static int hf_nr_rrc_handoverLTE_EPC_01 = -1; /* T_handoverLTE_EPC_01 */ static int hf_nr_rrc_handoverLTE_5GC_01 = -1; /* T_handoverLTE_5GC_01 */ static int hf_nr_rrc_maxNumberResource_CSI_RS_RLM = -1; /* T_maxNumberResource_CSI_RS_RLM */ static int hf_nr_rrc_simultaneousRxDataSSB_DiffNumerology = -1; /* T_simultaneousRxDataSSB_DiffNumerology */ -static int hf_nr_rrc_nr_AutonomousGaps_r16_01 = -1; /* T_nr_AutonomousGaps_r16_01 */ -static int hf_nr_rrc_nr_AutonomousGaps_ENDC_r16_01 = -1; /* T_nr_AutonomousGaps_ENDC_r16_01 */ +static int hf_nr_rrc_nr_AutonomousGaps_r16 = -1; /* T_nr_AutonomousGaps_r16 */ +static int hf_nr_rrc_nr_AutonomousGaps_ENDC_r16 = -1; /* T_nr_AutonomousGaps_ENDC_r16 */ +static int hf_nr_rrc_nr_AutonomousGaps_NEDC_r16 = -1; /* T_nr_AutonomousGaps_NEDC_r16 */ +static int hf_nr_rrc_nr_AutonomousGaps_NRDC_r16 = -1; /* T_nr_AutonomousGaps_NRDC_r16 */ static int hf_nr_rrc_handoverUTRA_FDD_r16_01 = -1; /* T_handoverUTRA_FDD_r16_01 */ static int hf_nr_rrc_cli_RSSI_Meas_r16 = -1; /* T_cli_RSSI_Meas_r16 */ static int hf_nr_rrc_cli_SRS_RSRP_Meas_r16 = -1; /* T_cli_SRS_RSRP_Meas_r16 */ -static int hf_nr_rrc_condHandoverParametersFRX_Diff_r16 = -1; /* T_condHandoverParametersFRX_Diff_r16 */ -static int hf_nr_rrc_condHandover_r16_01 = -1; /* T_condHandover_r16_01 */ -static int hf_nr_rrc_condHandoverFailure_r16_01 = -1; /* T_condHandoverFailure_r16_01 */ -static int hf_nr_rrc_condHandoverTwoTriggerEvents_r16_01 = -1; /* T_condHandoverTwoTriggerEvents_r16_01 */ -static int hf_nr_rrc_pcellT312_r16_01 = -1; /* T_pcellT312_r16_01 */ static int hf_nr_rrc_interFrequencyMeas_Nogap_r16 = -1; /* T_interFrequencyMeas_Nogap_r16 */ static int hf_nr_rrc_simultaneousRxDataSSB_DiffNumerology_Inter_r16 = -1; /* T_simultaneousRxDataSSB_DiffNumerology_Inter_r16 */ -static int hf_nr_rrc_handoverIntraF_IAB_r16_01 = -1; /* T_handoverIntraF_IAB_r16_01 */ static int hf_nr_rrc_idleInactiveNR_MeasReport_r16 = -1; /* T_idleInactiveNR_MeasReport_r16 */ +static int hf_nr_rrc_idleInactiveNR_MeasBeamReport_r16 = -1; /* T_idleInactiveNR_MeasBeamReport_r16 */ static int hf_nr_rrc_measAndMobParametersMRDC_Common = -1; /* MeasAndMobParametersMRDC_Common */ static int hf_nr_rrc_measAndMobParametersMRDC_XDD_Diff = -1; /* MeasAndMobParametersMRDC_XDD_Diff */ static int hf_nr_rrc_measAndMobParametersMRDC_FRX_Diff = -1; /* MeasAndMobParametersMRDC_FRX_Diff */ static int hf_nr_rrc_measAndMobParametersMRDC_XDD_Diff_v1560 = -1; /* MeasAndMobParametersMRDC_XDD_Diff_v1560 */ static int hf_nr_rrc_measAndMobParametersMRDC_Common_v1610 = -1; /* MeasAndMobParametersMRDC_Common_v1610 */ -static int hf_nr_rrc_measAndMobParametersMRDC_XDD_Diff_v1610 = -1; /* MeasAndMobParametersMRDC_XDD_Diff_v1610 */ -static int hf_nr_rrc_measAndMobParametersMRDC_FRX_Diff_v1610 = -1; /* MeasAndMobParametersMRDC_FRX_Diff_v1610 */ static int hf_nr_rrc_interNR_MeasEUTRA_IAB_r16 = -1; /* T_interNR_MeasEUTRA_IAB_r16 */ static int hf_nr_rrc_independentGapConfig_01 = -1; /* T_independentGapConfig_01 */ static int hf_nr_rrc_condPSCellChangeParametersCommon_r16 = -1; /* T_condPSCellChangeParametersCommon_r16 */ static int hf_nr_rrc_condPSCellChangeFDD_TDD_r16 = -1; /* T_condPSCellChangeFDD_TDD_r16 */ static int hf_nr_rrc_condPSCellChangeFR1_FR2_r16 = -1; /* T_condPSCellChangeFR1_FR2_r16 */ +static int hf_nr_rrc_pscellT312_r16 = -1; /* T_pscellT312_r16 */ static int hf_nr_rrc_sftd_MeasPSCell = -1; /* T_sftd_MeasPSCell */ static int hf_nr_rrc_sftd_MeasNR_Cell = -1; /* T_sftd_MeasNR_Cell */ static int hf_nr_rrc_sftd_MeasPSCell_NEDC = -1; /* T_sftd_MeasPSCell_NEDC */ -static int hf_nr_rrc_condPSCellChangeParametersXDD_Diff_r16 = -1; /* T_condPSCellChangeParametersXDD_Diff_r16 */ -static int hf_nr_rrc_condPSCellChange_r16 = -1; /* T_condPSCellChange_r16 */ -static int hf_nr_rrc_condPSCellChangeTwoTriggerEvents_r16 = -1; /* T_condPSCellChangeTwoTriggerEvents_r16 */ -static int hf_nr_rrc_pscellT312_r16 = -1; /* T_pscellT312_r16 */ static int hf_nr_rrc_simultaneousRxDataSSB_DiffNumerology_01 = -1; /* T_simultaneousRxDataSSB_DiffNumerology_01 */ -static int hf_nr_rrc_condPSCellChangeParametersFRX_Diff_r16 = -1; /* T_condPSCellChangeParametersFRX_Diff_r16 */ -static int hf_nr_rrc_condPSCellChange_r16_01 = -1; /* T_condPSCellChange_r16_01 */ -static int hf_nr_rrc_condPSCellChangeTwoTriggerEvents_r16_01 = -1; /* T_condPSCellChangeTwoTriggerEvents_r16_01 */ -static int hf_nr_rrc_pscellT312_r16_01 = -1; /* T_pscellT312_r16_01 */ static int hf_nr_rrc_tci_StatePDSCH = -1; /* T_tci_StatePDSCH */ static int hf_nr_rrc_maxNumberConfiguredTCIstatesPerCC = -1; /* T_maxNumberConfiguredTCIstatesPerCC */ static int hf_nr_rrc_maxNumberActiveTCI_PerBWP = -1; /* T_maxNumberActiveTCI_PerBWP */ @@ -4854,6 +5017,54 @@ static int hf_nr_rrc_srs_AssocCSI_RS_item = -1; /* SupportedCSI_RS_Resource */ static int hf_nr_rrc_spatialRelations = -1; /* SpatialRelations */ static int hf_nr_rrc_defaultQCL_TwoTCI_r16 = -1; /* T_defaultQCL_TwoTCI_r16 */ static int hf_nr_rrc_codebookParametersPerBand_r16 = -1; /* CodebookParameters_v1610 */ +static int hf_nr_rrc_simul_SpatialRelationUpdatePUCCHResGroup_r16 = -1; /* T_simul_SpatialRelationUpdatePUCCHResGroup_r16 */ +static int hf_nr_rrc_maxNumberSCellBFR_r16 = -1; /* T_maxNumberSCellBFR_r16 */ +static int hf_nr_rrc_simultaneousReceptionDiffTypeD_r16 = -1; /* T_simultaneousReceptionDiffTypeD_r16 */ +static int hf_nr_rrc_ssb_csirs_SINR_measurement_r16 = -1; /* T_ssb_csirs_SINR_measurement_r16 */ +static int hf_nr_rrc_maxNumberSSB_CSIRS_OneTx_CMR_r16 = -1; /* T_maxNumberSSB_CSIRS_OneTx_CMR_r16 */ +static int hf_nr_rrc_maxNumberCSI_IM_NZP_IMR_res_r16 = -1; /* T_maxNumberCSI_IM_NZP_IMR_res_r16 */ +static int hf_nr_rrc_maxNumberCSIRS_2Tx_res_r16 = -1; /* T_maxNumberCSIRS_2Tx_res_r16 */ +static int hf_nr_rrc_maxNumberSSB_CSIRS_res_r16 = -1; /* T_maxNumberSSB_CSIRS_res_r16 */ +static int hf_nr_rrc_maxNumberCSI_IM_NZP_IMR_res_mem_r16 = -1; /* T_maxNumberCSI_IM_NZP_IMR_res_mem_r16 */ +static int hf_nr_rrc_supportedCSI_RS_Density_CMR_r16 = -1; /* T_supportedCSI_RS_Density_CMR_r16 */ +static int hf_nr_rrc_maxNumberAperiodicCSI_RS_Res_r16 = -1; /* T_maxNumberAperiodicCSI_RS_Res_r16 */ +static int hf_nr_rrc_supportedSNIR_meas_r16 = -1; /* T_supportedSNIR_meas_r16 */ +static int hf_nr_rrc_nonGroupSINR_reporting_r16 = -1; /* T_nonGroupSINR_reporting_r16 */ +static int hf_nr_rrc_groupSINR_reporting_r16 = -1; /* T_groupSINR_reporting_r16 */ +static int hf_nr_rrc_multiDCI_multiTRP_Parameters_r16 = -1; /* T_multiDCI_multiTRP_Parameters_r16 */ +static int hf_nr_rrc_overlapPDSCHsFullyFreqTime_r16 = -1; /* INTEGER_1_2 */ +static int hf_nr_rrc_overlapPDSCHsInTimePartiallyFreq_r16 = -1; /* T_overlapPDSCHsInTimePartiallyFreq_r16 */ +static int hf_nr_rrc_outOfOrderOperationDL_r16 = -1; /* T_outOfOrderOperationDL_r16 */ +static int hf_nr_rrc_supportPDCCH_ToPDSCH_r16 = -1; /* T_supportPDCCH_ToPDSCH_r16 */ +static int hf_nr_rrc_supportPDSCH_ToHARQ_ACK_r16 = -1; /* T_supportPDSCH_ToHARQ_ACK_r16 */ +static int hf_nr_rrc_outOfOrderOperationUL_r16 = -1; /* T_outOfOrderOperationUL_r16 */ +static int hf_nr_rrc_separateCRS_RateMatching_r16 = -1; /* T_separateCRS_RateMatching_r16 */ +static int hf_nr_rrc_defaultQCL_PerCORESETPoolIndex_r16 = -1; /* T_defaultQCL_PerCORESETPoolIndex_r16 */ +static int hf_nr_rrc_maxNumberActivatedTCI_States_r16 = -1; /* T_maxNumberActivatedTCI_States_r16 */ +static int hf_nr_rrc_maxNumberPerCORESET_Pool_r16 = -1; /* T_maxNumberPerCORESET_Pool_r16 */ +static int hf_nr_rrc_maxTotalNumberAcrossCORESET_Pool_r16 = -1; /* T_maxTotalNumberAcrossCORESET_Pool_r16 */ +static int hf_nr_rrc_singleDCI_SDM_scheme_Parameters_r16 = -1; /* T_singleDCI_SDM_scheme_Parameters_r16 */ +static int hf_nr_rrc_supportNewDMRS_Port_r16 = -1; /* T_supportNewDMRS_Port_r16 */ +static int hf_nr_rrc_supportTwoPortDL_PTRS_r16 = -1; /* T_supportTwoPortDL_PTRS_r16 */ +static int hf_nr_rrc_supportFDM_SchemeA_r16 = -1; /* T_supportFDM_SchemeA_r16 */ +static int hf_nr_rrc_supportCodeWordSoftCombining_r16 = -1; /* T_supportCodeWordSoftCombining_r16 */ +static int hf_nr_rrc_supportTDM_SchemeA_r16 = -1; /* T_supportTDM_SchemeA_r16 */ +static int hf_nr_rrc_supportInter_slotTDM_r16 = -1; /* T_supportInter_slotTDM_r16 */ +static int hf_nr_rrc_supportRepNumPDSCH_TDRA_r16 = -1; /* T_supportRepNumPDSCH_TDRA_r16 */ +static int hf_nr_rrc_maxTBS_Size_r16 = -1; /* T_maxTBS_Size_r16 */ +static int hf_nr_rrc_maxNumberTCI_states_r16 = -1; /* INTEGER_1_2 */ +static int hf_nr_rrc_lowPAPR_DMRS_PDSCH_r16 = -1; /* T_lowPAPR_DMRS_PDSCH_r16 */ +static int hf_nr_rrc_lowPAPR_DMRS_PUSCHwithoutPrecoding_r16 = -1; /* T_lowPAPR_DMRS_PUSCHwithoutPrecoding_r16 */ +static int hf_nr_rrc_lowPAPR_DMRS_PUCCH_r16 = -1; /* T_lowPAPR_DMRS_PUCCH_r16 */ +static int hf_nr_rrc_lowPAPR_DMRS_PUSCHwithPrecoding_r16 = -1; /* T_lowPAPR_DMRS_PUSCHwithPrecoding_r16 */ +static int hf_nr_rrc_csi_ReportFrameworkExt_r16 = -1; /* CSI_ReportFrameworkExt_r16 */ +static int hf_nr_rrc_codebookParametersAddition_r16 = -1; /* CodebookParametersAddition_r16 */ +static int hf_nr_rrc_codebookComboParametersAddition_r16 = -1; /* CodebookComboParametersAddition_r16 */ +static int hf_nr_rrc_beamCorrespondenceSSB_based_r16 = -1; /* T_beamCorrespondenceSSB_based_r16 */ +static int hf_nr_rrc_beamCorrespondenceCSI_RS_based_r16 = -1; /* T_beamCorrespondenceCSI_RS_based_r16 */ +static int hf_nr_rrc_beamSwitchTiming_r16 = -1; /* T_beamSwitchTiming_r16 */ +static int hf_nr_rrc_scs_60kHz_r16_01 = -1; /* T_scs_60kHz_r16_01 */ +static int hf_nr_rrc_scs_120kHz_r16_01 = -1; /* T_scs_120kHz_r16_01 */ static int hf_nr_rrc_maxNumberSSB_CSI_RS_ResourceOneTx = -1; /* T_maxNumberSSB_CSI_RS_ResourceOneTx */ static int hf_nr_rrc_maxNumberSSB_CSI_RS_ResourceTwoTx = -1; /* T_maxNumberSSB_CSI_RS_ResourceTwoTx */ static int hf_nr_rrc_supportedCSI_RS_Density = -1; /* T_supportedCSI_RS_Density */ @@ -4885,6 +5096,7 @@ static int hf_nr_rrc_maxNumberAperiodicCSI_PerBWP_ForBeamReport = -1; /* INTEGE static int hf_nr_rrc_maxNumberAperiodicCSI_triggeringStatePerCC = -1; /* T_maxNumberAperiodicCSI_triggeringStatePerCC */ static int hf_nr_rrc_maxNumberSemiPersistentCSI_PerBWP_ForBeamReport = -1; /* INTEGER_0_4 */ static int hf_nr_rrc_simultaneousCSI_ReportsPerCC = -1; /* INTEGER_1_8 */ +static int hf_nr_rrc_maxNumberAperiodicCSI_PerBWP_ForCSI_ReportExt_r16 = -1; /* INTEGER_5_8 */ static int hf_nr_rrc_frequencyDensity1 = -1; /* INTEGER_1_276 */ static int hf_nr_rrc_frequencyDensity2 = -1; /* INTEGER_1_276 */ static int hf_nr_rrc_timeDensity1 = -1; /* INTEGER_0_29 */ @@ -4911,6 +5123,8 @@ static int hf_nr_rrc_asyncIntraBandENDC = -1; /* T_asyncIntraBandENDC */ static int hf_nr_rrc_dualPA_Architecture_01 = -1; /* T_dualPA_Architecture_01 */ static int hf_nr_rrc_intraBandENDC_Support = -1; /* T_intraBandENDC_Support */ static int hf_nr_rrc_ul_TimingAlignmentEUTRA_NR = -1; /* T_ul_TimingAlignmentEUTRA_NR */ +static int hf_nr_rrc_dynamicPowerSharingNEDC = -1; /* T_dynamicPowerSharingNEDC */ +static int hf_nr_rrc_interBandContiguousMRDC = -1; /* T_interBandContiguousMRDC */ static int hf_nr_rrc_maxUplinkDutyCycle_interBandENDC_TDD_PC2_r16 = -1; /* T_maxUplinkDutyCycle_interBandENDC_TDD_PC2_r16 */ static int hf_nr_rrc_eutra_TDD_Config0_r16 = -1; /* T_eutra_TDD_Config0_r16 */ static int hf_nr_rrc_eutra_TDD_Config1_r16 = -1; /* T_eutra_TDD_Config1_r16 */ @@ -4919,8 +5133,10 @@ static int hf_nr_rrc_eutra_TDD_Config3_r16 = -1; /* T_eutra_TDD_Config3_r16 */ static int hf_nr_rrc_eutra_TDD_Config4_r16 = -1; /* T_eutra_TDD_Config4_r16 */ static int hf_nr_rrc_eutra_TDD_Config5_r16 = -1; /* T_eutra_TDD_Config5_r16 */ static int hf_nr_rrc_eutra_TDD_Config6_r16 = -1; /* T_eutra_TDD_Config6_r16 */ -static int hf_nr_rrc_dynamicPowerSharingNEDC = -1; /* T_dynamicPowerSharingNEDC */ -static int hf_nr_rrc_interBandContiguousMRDC = -1; /* T_interBandContiguousMRDC */ +static int hf_nr_rrc_tdm_restrictionTDD_endc_r16 = -1; /* T_tdm_restrictionTDD_endc_r16 */ +static int hf_nr_rrc_tdm_restrictionFDD_endc_r16 = -1; /* T_tdm_restrictionFDD_endc_r16 */ +static int hf_nr_rrc_singleUL_HARQ_offsetTDD_PCell_r16 = -1; /* T_singleUL_HARQ_offsetTDD_PCell_r16 */ +static int hf_nr_rrc_tdm_restrictionDualTX_FDD_endc_r16 = -1; /* T_tdm_restrictionDualTX_FDD_endc_r16 */ static int hf_nr_rrc_measAndMobParametersNRDC = -1; /* MeasAndMobParametersMRDC */ static int hf_nr_rrc_generalParametersNRDC = -1; /* GeneralParametersMRDC_XDD_Diff */ static int hf_nr_rrc_fdd_Add_UE_NRDC_Capabilities = -1; /* UE_MRDC_CapabilityAddXDD_Mode */ @@ -5016,13 +5232,28 @@ static int hf_nr_rrc_t_DeltaReceptionSupport_IAB_r16 = -1; /* T_t_DeltaReceptio static int hf_nr_rrc_guardSymbolReportReception_IAB_r16 = -1; /* T_guardSymbolReportReception_IAB_r16 */ static int hf_nr_rrc_harqACK_CB_SpatialBundlingPUCCH_Group_r16 = -1; /* T_harqACK_CB_SpatialBundlingPUCCH_Group_r16 */ static int hf_nr_rrc_crossSlotScheduling_r16 = -1; /* T_crossSlotScheduling_r16 */ -static int hf_nr_rrc_licensedBand_r16_01 = -1; /* T_licensedBand_r16 */ -static int hf_nr_rrc_unlicensedBand_r16_01 = -1; /* T_unlicensedBand_r16 */ +static int hf_nr_rrc_non_SharedSpectrumChAccess_r16_01 = -1; /* T_non_SharedSpectrumChAccess_r16 */ +static int hf_nr_rrc_sharedSpectrumChAccess_r16_01 = -1; /* T_sharedSpectrumChAccess_r16 */ static int hf_nr_rrc_maxNumberSRS_PosPathLossEstimateAllServingCells_r16 = -1; /* T_maxNumberSRS_PosPathLossEstimateAllServingCells_r16 */ -static int hf_nr_rrc_maxNumberSRS_PosSpatialRelationsAllServingCells_r16 = -1; /* T_maxNumberSRS_PosSpatialRelationsAllServingCells_r16 */ static int hf_nr_rrc_extendedCG_Periodicities_r16 = -1; /* T_extendedCG_Periodicities_r16 */ static int hf_nr_rrc_extendedSPS_Periodicities_r16 = -1; /* T_extendedSPS_Periodicities_r16 */ static int hf_nr_rrc_codebookVariantsList_r16 = -1; /* CodebookVariantsList_r16 */ +static int hf_nr_rrc_pusch_RepetitionTypeA_r16 = -1; /* T_pusch_RepetitionTypeA_r16 */ +static int hf_nr_rrc_sharedSpectrumChAccess_r16_02 = -1; /* T_sharedSpectrumChAccess_r16_01 */ +static int hf_nr_rrc_non_SharedSpectrumChAccess_r16_02 = -1; /* T_non_SharedSpectrumChAccess_r16_01 */ +static int hf_nr_rrc_dci_DL_PriorityIndicator_r16 = -1; /* T_dci_DL_PriorityIndicator_r16 */ +static int hf_nr_rrc_dci_UL_PriorityIndicator_r16 = -1; /* T_dci_UL_PriorityIndicator_r16 */ +static int hf_nr_rrc_maxNumberPathlossRS_Update_r16 = -1; /* T_maxNumberPathlossRS_Update_r16 */ +static int hf_nr_rrc_type2_HARQ_ACK_Codebook_r16 = -1; /* T_type2_HARQ_ACK_Codebook_r16 */ +static int hf_nr_rrc_maxTotalResourcesForAcrossFreqRanges_r16 = -1; /* T_maxTotalResourcesForAcrossFreqRanges_r16 */ +static int hf_nr_rrc_maxNumberResWithinSlotAcrossCC_AcrossFR_r16 = -1; /* T_maxNumberResWithinSlotAcrossCC_AcrossFR_r16 */ +static int hf_nr_rrc_maxNumberResAcrossCC_AcrossFR_r16 = -1; /* T_maxNumberResAcrossCC_AcrossFR_r16 */ +static int hf_nr_rrc_harqACK_separateMultiDCI_MultiTRP_r16 = -1; /* T_harqACK_separateMultiDCI_MultiTRP_r16 */ +static int hf_nr_rrc_maxNumberLongPUCCHs_r16 = -1; /* T_maxNumberLongPUCCHs_r16 */ +static int hf_nr_rrc_harqACK_jointMultiDCI_MultiTRP_r16 = -1; /* T_harqACK_jointMultiDCI_MultiTRP_r16 */ +static int hf_nr_rrc_bwp_SwitchingMultiCCs_r16 = -1; /* T_bwp_SwitchingMultiCCs_r16 */ +static int hf_nr_rrc_type1_r16 = -1; /* T_type1_r16 */ +static int hf_nr_rrc_type2_r16_01 = -1; /* T_type2_r16_01 */ static int hf_nr_rrc_dynamicSFI = -1; /* T_dynamicSFI */ static int hf_nr_rrc_twoPUCCH_F0_2_ConsecSymbols = -1; /* T_twoPUCCH_F0_2_ConsecSymbols */ static int hf_nr_rrc_twoDifferentTPC_Loop_PUSCH = -1; /* T_twoDifferentTPC_Loop_PUSCH */ @@ -5089,11 +5320,13 @@ static int hf_nr_rrc_type1_HARQ_ACK_Codebook_r16 = -1; /* T_type1_HARQ_ACK_Code static int hf_nr_rrc_enhancedPowerControl_r16 = -1; /* T_enhancedPowerControl_r16 */ static int hf_nr_rrc_simultaneousTCI_ActMultipleCC_r16 = -1; /* T_simultaneousTCI_ActMultipleCC_r16 */ static int hf_nr_rrc_simultaneousSpatialRelationMultipleCC_r16 = -1; /* T_simultaneousSpatialRelationMultipleCC_r16 */ -static int hf_nr_rrc_defaultSpatialRelationPathlossRS_r16 = -1; /* T_defaultSpatialRelationPathlossRS_r16 */ -static int hf_nr_rrc_spatialRelationUpdateAP_SRS_r16 = -1; /* T_spatialRelationUpdateAP_SRS_r16 */ static int hf_nr_rrc_cli_RSSI_FDM_DL_r16 = -1; /* T_cli_RSSI_FDM_DL_r16 */ static int hf_nr_rrc_cli_SRS_RSRP_FDM_DL_r16 = -1; /* T_cli_SRS_RSRP_FDM_DL_r16 */ static int hf_nr_rrc_maxLayersMIMO_Adaptation_r16 = -1; /* T_maxLayersMIMO_Adaptation_r16 */ +static int hf_nr_rrc_aggregationFactorSPS_DL_r16 = -1; /* T_aggregationFactorSPS_DL_r16 */ +static int hf_nr_rrc_maxTotalResourcesForOneFreqRange_r16 = -1; /* T_maxTotalResourcesForOneFreqRange_r16 */ +static int hf_nr_rrc_maxNumberResWithinSlotAcrossCC_OneFR_r16 = -1; /* T_maxNumberResWithinSlotAcrossCC_OneFR_r16 */ +static int hf_nr_rrc_maxNumberResAcrossCC_OneFR_r16 = -1; /* T_maxNumberResAcrossCC_OneFR_r16 */ static int hf_nr_rrc_pdcch_MonitoringSingleOccasion = -1; /* T_pdcch_MonitoringSingleOccasion */ static int hf_nr_rrc_scs_60kHz_14 = -1; /* T_scs_60kHz_11 */ static int hf_nr_rrc_pdsch_256QAM_FR1 = -1; /* T_pdsch_256QAM_FR1 */ @@ -5103,8 +5336,13 @@ static int hf_nr_rrc_dummy_12 = -1; /* T_dummy_08 */ static int hf_nr_rrc_pdsch_RE_MappingFR2_PerSymbol = -1; /* T_pdsch_RE_MappingFR2_PerSymbol */ static int hf_nr_rrc_pCell_FR2 = -1; /* T_pCell_FR2 */ static int hf_nr_rrc_pdsch_RE_MappingFR2_PerSlot = -1; /* T_pdsch_RE_MappingFR2_PerSlot */ +static int hf_nr_rrc_defaultSpatialRelationPathlossRS_r16 = -1; /* T_defaultSpatialRelationPathlossRS_r16 */ +static int hf_nr_rrc_spatialRelationUpdateAP_SRS_r16 = -1; /* T_spatialRelationUpdateAP_SRS_r16 */ +static int hf_nr_rrc_maxNumberSRS_PosSpatialRelationsAllServingCells_r16 = -1; /* T_maxNumberSRS_PosSpatialRelationsAllServingCells_r16 */ static int hf_nr_rrc_naics_Capability_List = -1; /* SEQUENCE_SIZE_1_maxNrofNAICS_Entries_OF_NAICS_Capability_Entry */ static int hf_nr_rrc_naics_Capability_List_item = -1; /* NAICS_Capability_Entry */ +static int hf_nr_rrc_tdd_PCellUL_TX_AllUL_Subframe_r16 = -1; /* T_tdd_PCellUL_TX_AllUL_Subframe_r16 */ +static int hf_nr_rrc_fdd_PCellUL_TX_AllUL_Subframe_r16 = -1; /* T_fdd_PCellUL_TX_AllUL_Subframe_r16 */ static int hf_nr_rrc_numberOfNAICS_CapableCC = -1; /* INTEGER_1_5 */ static int hf_nr_rrc_numberOfAggregatedPRB = -1; /* T_numberOfAggregatedPRB */ static int hf_nr_rrc_powSav_ParametersCommon_r16 = -1; /* PowSav_ParametersCommon_r16 */ @@ -5130,7 +5368,7 @@ static int hf_nr_rrc_srs_SwitchingTimeRequested = -1; /* T_srs_SwitchingTimeReq static int hf_nr_rrc_supportedBandCombinationList_v1550 = -1; /* BandCombinationList_v1550 */ static int hf_nr_rrc_supportedBandCombinationList_v1560 = -1; /* BandCombinationList_v1560 */ static int hf_nr_rrc_supportedBandCombinationList_v1610 = -1; /* BandCombinationList_v1610 */ -static int hf_nr_rrc_supportedBandCombinationListSidelink_r16_01 = -1; /* BandCombinationListSidelink_r16 */ +static int hf_nr_rrc_supportedBandCombinationListSidelinkEUTRA_NR_r16 = -1; /* BandCombinationListSidelinkEUTRA_NR_r16 */ static int hf_nr_rrc_supportedBandCombinationList_UplinkTxSwitch_r16 = -1; /* BandCombinationList_UplinkTxSwitch_r16 */ static int hf_nr_rrc_modifiedMPR_Behaviour = -1; /* BIT_STRING_SIZE_8 */ static int hf_nr_rrc_mimo_ParametersPerBand = -1; /* MIMO_ParametersPerBand */ @@ -5171,17 +5409,17 @@ static int hf_nr_rrc_channelBWs_UL_v1590 = -1; /* T_channelBWs_UL_v1590 */ static int hf_nr_rrc_fr1_03 = -1; /* T_fr1_03 */ static int hf_nr_rrc_fr2_03 = -1; /* T_fr2_03 */ static int hf_nr_rrc_asymmetricBandwidthCombinationSet = -1; /* BIT_STRING_SIZE_1_32 */ -static int hf_nr_rrc_unlicensedParametersPerBand_r16 = -1; /* UnlicensedParametersPerBand_r16 */ +static int hf_nr_rrc_sharedSpectrumChAccessParamsPerBand_r16 = -1; /* SharedSpectrumChAccessParamsPerBand_r16 */ static int hf_nr_rrc_cancelOverlappingPUSCH_r16 = -1; /* T_cancelOverlappingPUSCH_r16 */ static int hf_nr_rrc_multipleRateMatchingEUTRA_CRS_r16 = -1; /* T_multipleRateMatchingEUTRA_CRS_r16 */ static int hf_nr_rrc_maxNumberPatterns_r16 = -1; /* INTEGER_2_6 */ static int hf_nr_rrc_maxNumberNon_OverlapPatterns_r16 = -1; /* INTEGER_1_3 */ static int hf_nr_rrc_overlapRateMatchingEUTRA_CRS_r16 = -1; /* T_overlapRateMatchingEUTRA_CRS_r16 */ static int hf_nr_rrc_pdsch_MappingTypeB_Alt_r16 = -1; /* T_pdsch_MappingTypeB_Alt_r16 */ -static int hf_nr_rrc_oneShotPeriodicTRS_r16 = -1; /* T_oneShotPeriodicTRS_r16 */ +static int hf_nr_rrc_oneSlotPeriodicTRS_r16 = -1; /* T_oneSlotPeriodicTRS_r16 */ static int hf_nr_rrc_olpc_SRS_Pos_r16 = -1; /* OLPC_SRS_Pos_r16 */ static int hf_nr_rrc_spatialRelationsSRS_Pos_r16 = -1; /* SpatialRelationsSRS_Pos_r16 */ -static int hf_nr_rrc_simul_SRS_Trans_IntraBandCA_r16 = -1; /* INTEGER_1_2 */ +static int hf_nr_rrc_simulSRS_MIMO_TransWithinBand_r16 = -1; /* T_simulSRS_MIMO_TransWithinBand_r16 */ static int hf_nr_rrc_channelBW_DL_IAB_r16 = -1; /* T_channelBW_DL_IAB_r16 */ static int hf_nr_rrc_fr1_100mhz = -1; /* T_fr1_100mhz */ static int hf_nr_rrc_scs_15kHz_14 = -1; /* T_scs_15kHz_09 */ @@ -5200,6 +5438,22 @@ static int hf_nr_rrc_scs_60kHz_22 = -1; /* T_scs_60kHz_15 */ static int hf_nr_rrc_scs_120kHz_16 = -1; /* T_scs_120kHz_12 */ static int hf_nr_rrc_rasterShift7dot5_IAB_r16 = -1; /* T_rasterShift7dot5_IAB_r16 */ static int hf_nr_rrc_ue_PowerClass_v1610 = -1; /* T_ue_PowerClass_v1610 */ +static int hf_nr_rrc_condHandover_r16 = -1; /* T_condHandover_r16 */ +static int hf_nr_rrc_condHandoverFailure_r16 = -1; /* T_condHandoverFailure_r16 */ +static int hf_nr_rrc_condHandoverTwoTriggerEvents_r16 = -1; /* T_condHandoverTwoTriggerEvents_r16 */ +static int hf_nr_rrc_condPSCellChange_r16 = -1; /* T_condPSCellChange_r16 */ +static int hf_nr_rrc_condPSCellChangeTwoTriggerEvents_r16 = -1; /* T_condPSCellChangeTwoTriggerEvents_r16 */ +static int hf_nr_rrc_mpr_PowerBoost_FR2_r16_01 = -1; /* T_mpr_PowerBoost_FR2_r16_01 */ +static int hf_nr_rrc_activeConfiguredGrant_r16 = -1; /* T_activeConfiguredGrant_r16 */ +static int hf_nr_rrc_maxNumberConfigsPerBWP_r16 = -1; /* T_maxNumberConfigsPerBWP_r16 */ +static int hf_nr_rrc_maxNumberConfigsAllCC_r16 = -1; /* INTEGER_2_32 */ +static int hf_nr_rrc_jointReleaseConfiguredGrantType2_r16 = -1; /* T_jointReleaseConfiguredGrantType2_r16 */ +static int hf_nr_rrc_sps_r16 = -1; /* T_sps_r16 */ +static int hf_nr_rrc_maxNumberConfigsPerBWP_r16_01 = -1; /* INTEGER_1_8 */ +static int hf_nr_rrc_jointReleaseSPS_r16 = -1; /* T_jointReleaseSPS_r16 */ +static int hf_nr_rrc_simulSRS_TransWithinBand_r16 = -1; /* T_simulSRS_TransWithinBand_r16 */ +static int hf_nr_rrc_trs_AdditionalBandwidth_r16 = -1; /* T_trs_AdditionalBandwidth_r16 */ +static int hf_nr_rrc_handoverIntraF_IAB_r16 = -1; /* T_handoverIntraF_IAB_r16 */ static int hf_nr_rrc_srs_SwitchingTimeRequested_01 = -1; /* T_srs_SwitchingTimeRequested_01 */ static int hf_nr_rrc_supportedBandCombinationListNEDC_Only = -1; /* BandCombinationList */ static int hf_nr_rrc_supportedBandCombinationList_v1570 = -1; /* BandCombinationList_v1570 */ @@ -5221,6 +5475,8 @@ static int hf_nr_rrc_rlc_ParametersSidelink_r16 = -1; /* RLC_ParametersSidelink static int hf_nr_rrc_mac_ParametersSidelink_r16 = -1; /* MAC_ParametersSidelink_r16 */ static int hf_nr_rrc_fdd_Add_UE_Sidelink_Capabilities_r16 = -1; /* UE_SidelinkCapabilityAddXDD_Mode_r16 */ static int hf_nr_rrc_tdd_Add_UE_Sidelink_Capabilities_r16 = -1; /* UE_SidelinkCapabilityAddXDD_Mode_r16 */ +static int hf_nr_rrc_supportedBandListSidelink_r16 = -1; /* SEQUENCE_SIZE_1_maxBands_OF_BandSidelink_r16 */ +static int hf_nr_rrc_supportedBandListSidelink_r16_item = -1; /* BandSidelink_r16 */ static int hf_nr_rrc_sl_ParametersEUTRA1_r16 = -1; /* T_sl_ParametersEUTRA1_r16 */ static int hf_nr_rrc_sl_ParametersEUTRA2_r16 = -1; /* T_sl_ParametersEUTRA2_r16 */ static int hf_nr_rrc_sl_ParametersEUTRA3_r16 = -1; /* T_sl_ParametersEUTRA3_r16 */ @@ -5238,6 +5494,34 @@ static int hf_nr_rrc_freqBandSidelinkEUTRA_r16 = -1; /* FreqBandIndicatorEUTRA static int hf_nr_rrc_gnb_ScheduledMode3SidelinkEUTRA_r16 = -1; /* T_gnb_ScheduledMode3SidelinkEUTRA_r16 */ static int hf_nr_rrc_gnb_ScheduledMode3DelaySidelinkEUTRA_r16 = -1; /* T_gnb_ScheduledMode3DelaySidelinkEUTRA_r16 */ static int hf_nr_rrc_gnb_ScheduledMode4SidelinkEUTRA_r16 = -1; /* T_gnb_ScheduledMode4SidelinkEUTRA_r16 */ +static int hf_nr_rrc_sl_Reception_r16 = -1; /* T_sl_Reception_r16 */ +static int hf_nr_rrc_harq_RxProcessSidelink_r16 = -1; /* T_harq_RxProcessSidelink_r16 */ +static int hf_nr_rrc_pscch_RxSidelink_r16 = -1; /* T_pscch_RxSidelink_r16 */ +static int hf_nr_rrc_scs_CP_PatternRxSidelink_r16 = -1; /* T_scs_CP_PatternRxSidelink_r16 */ +static int hf_nr_rrc_fr1_r16 = -1; /* T_fr1_r16 */ +static int hf_nr_rrc_scs_15kHz_r16_02 = -1; /* BIT_STRING_SIZE_16 */ +static int hf_nr_rrc_scs_30kHz_r16_02 = -1; /* BIT_STRING_SIZE_16 */ +static int hf_nr_rrc_scs_60kHz_r16_02 = -1; /* BIT_STRING_SIZE_16 */ +static int hf_nr_rrc_fr2_r16 = -1; /* T_fr2_r16 */ +static int hf_nr_rrc_scs_120kHz_r16_02 = -1; /* BIT_STRING_SIZE_16 */ +static int hf_nr_rrc_extendedCP_RxSidelink_r16 = -1; /* T_extendedCP_RxSidelink_r16 */ +static int hf_nr_rrc_sl_TransmissionMode1_r16 = -1; /* T_sl_TransmissionMode1_r16 */ +static int hf_nr_rrc_harq_TxProcessModeOneSidelink_r16 = -1; /* T_harq_TxProcessModeOneSidelink_r16 */ +static int hf_nr_rrc_scs_CP_PatternTxSidelinkModeOne_r16 = -1; /* T_scs_CP_PatternTxSidelinkModeOne_r16 */ +static int hf_nr_rrc_fr1_r16_01 = -1; /* T_fr1_r16_01 */ +static int hf_nr_rrc_fr2_r16_01 = -1; /* T_fr2_r16_01 */ +static int hf_nr_rrc_extendedCP_TxSidelink_r16 = -1; /* T_extendedCP_TxSidelink_r16 */ +static int hf_nr_rrc_harq_ReportOnPUCCH_r16 = -1; /* T_harq_ReportOnPUCCH_r16 */ +static int hf_nr_rrc_sync_Sidelink_r16 = -1; /* T_sync_Sidelink_r16 */ +static int hf_nr_rrc_gNB_Sync_r16 = -1; /* T_gNB_Sync_r16 */ +static int hf_nr_rrc_gNB_GNSS_UE_SyncWithPriorityOnGNB_ENB_r16 = -1; /* T_gNB_GNSS_UE_SyncWithPriorityOnGNB_ENB_r16 */ +static int hf_nr_rrc_gNB_GNSS_UE_SyncWithPriorityOnGNSS_r16 = -1; /* T_gNB_GNSS_UE_SyncWithPriorityOnGNSS_r16 */ +static int hf_nr_rrc_sl_Tx_256QAM_r16 = -1; /* T_sl_Tx_256QAM_r16 */ +static int hf_nr_rrc_psfch_FormatZeroSidelink_r16 = -1; /* T_psfch_FormatZeroSidelink_r16 */ +static int hf_nr_rrc_psfch_RxNumber = -1; /* T_psfch_RxNumber */ +static int hf_nr_rrc_psfch_TxNumber = -1; /* T_psfch_TxNumber */ +static int hf_nr_rrc_lowSE_64QAM_MCS_TableSidelink_r16 = -1; /* T_lowSE_64QAM_MCS_TableSidelink_r16 */ +static int hf_nr_rrc_enb_sync_Sidelink_r16 = -1; /* T_enb_sync_Sidelink_r16 */ static int hf_nr_rrc_rach_Report_r16 = -1; /* T_rach_Report_r16 */ static int hf_nr_rrc_spatialRelation_SRS_PosBasedOnSSB_Serving_r16 = -1; /* T_spatialRelation_SRS_PosBasedOnSSB_Serving_r16 */ static int hf_nr_rrc_spatialRelation_SRS_PosBasedOnCSI_RS_Serving_r16 = -1; /* T_spatialRelation_SRS_PosBasedOnCSI_RS_Serving_r16 */ @@ -5273,13 +5557,13 @@ static int hf_nr_rrc_includeNE_DC = -1; /* T_includeNE_DC */ static int hf_nr_rrc_codebookTypeRequest_r16 = -1; /* T_codebookTypeRequest_r16 */ static int hf_nr_rrc_type1_SinglePanel_r16_01 = -1; /* T_type1_SinglePanel_r16_01 */ static int hf_nr_rrc_type1_MultiPanel_r16_01 = -1; /* T_type1_MultiPanel_r16_01 */ -static int hf_nr_rrc_type2_r16_01 = -1; /* T_type2_r16_01 */ +static int hf_nr_rrc_type2_r16_02 = -1; /* T_type2_r16_02 */ static int hf_nr_rrc_type2_PortSelection_r16_01 = -1; /* T_type2_PortSelection_r16_01 */ static int hf_nr_rrc_uplinkTxSwitchRequest_r16 = -1; /* T_uplinkTxSwitchRequest_r16 */ static int hf_nr_rrc_frequencyBandListFilter = -1; /* FreqBandList */ -static int hf_nr_rrc_nonCriticalExtension_83 = -1; /* UE_CapabilityRequestFilterNR_v1540 */ +static int hf_nr_rrc_nonCriticalExtension_85 = -1; /* UE_CapabilityRequestFilterNR_v1540 */ static int hf_nr_rrc_srs_SwitchingTimeRequest = -1; /* T_srs_SwitchingTimeRequest */ -static int hf_nr_rrc_nonCriticalExtension_84 = -1; /* T_nonCriticalExtension_49 */ +static int hf_nr_rrc_nonCriticalExtension_86 = -1; /* T_nonCriticalExtension_49 */ static int hf_nr_rrc_measAndMobParametersMRDC = -1; /* MeasAndMobParametersMRDC */ static int hf_nr_rrc_phy_ParametersMRDC_v1530 = -1; /* Phy_ParametersMRDC */ static int hf_nr_rrc_rf_ParametersMRDC = -1; /* RF_ParametersMRDC */ @@ -5291,16 +5575,16 @@ static int hf_nr_rrc_fr2_Add_UE_MRDC_Capabilities = -1; /* UE_MRDC_CapabilityAd static int hf_nr_rrc_featureSetCombinations = -1; /* SEQUENCE_SIZE_1_maxFeatureSetCombinations_OF_FeatureSetCombination */ static int hf_nr_rrc_featureSetCombinations_item = -1; /* FeatureSetCombination */ static int hf_nr_rrc_pdcp_ParametersMRDC_v1530 = -1; /* PDCP_ParametersMRDC */ -static int hf_nr_rrc_nonCriticalExtension_85 = -1; /* UE_MRDC_Capability_v1560 */ +static int hf_nr_rrc_nonCriticalExtension_87 = -1; /* UE_MRDC_Capability_v1560 */ static int hf_nr_rrc_receivedFilters = -1; /* T_receivedFilters */ static int hf_nr_rrc_measAndMobParametersMRDC_v1560 = -1; /* MeasAndMobParametersMRDC_v1560 */ static int hf_nr_rrc_fdd_Add_UE_MRDC_Capabilities_v1560 = -1; /* UE_MRDC_CapabilityAddXDD_Mode_v1560 */ static int hf_nr_rrc_tdd_Add_UE_MRDC_Capabilities_v1560 = -1; /* UE_MRDC_CapabilityAddXDD_Mode_v1560 */ -static int hf_nr_rrc_nonCriticalExtension_86 = -1; /* UE_MRDC_Capability_v1610 */ +static int hf_nr_rrc_nonCriticalExtension_88 = -1; /* UE_MRDC_Capability_v1610 */ static int hf_nr_rrc_measAndMobParametersMRDC_v1610 = -1; /* MeasAndMobParametersMRDC_v1610 */ static int hf_nr_rrc_generalParametersMRDC_v1610 = -1; /* GeneralParametersMRDC_v1610 */ static int hf_nr_rrc_pdcp_ParametersMRDC_v1610 = -1; /* PDCP_ParametersMRDC_v1610 */ -static int hf_nr_rrc_nonCriticalExtension_87 = -1; /* T_nonCriticalExtension_50 */ +static int hf_nr_rrc_nonCriticalExtension_89 = -1; /* T_nonCriticalExtension_50 */ static int hf_nr_rrc_generalParametersMRDC_XDD_Diff = -1; /* GeneralParametersMRDC_XDD_Diff */ static int hf_nr_rrc_splitSRB_WithOneUL_Path = -1; /* T_splitSRB_WithOneUL_Path */ static int hf_nr_rrc_splitDRB_withUL_Both_MCG_SCG = -1; /* T_splitDRB_withUL_Both_MCG_SCG */ @@ -5319,28 +5603,28 @@ static int hf_nr_rrc_tdd_Add_UE_NR_Capabilities = -1; /* UE_NR_CapabilityAddXDD static int hf_nr_rrc_fr1_Add_UE_NR_Capabilities = -1; /* UE_NR_CapabilityAddFRX_Mode */ static int hf_nr_rrc_fr2_Add_UE_NR_Capabilities = -1; /* UE_NR_CapabilityAddFRX_Mode */ static int hf_nr_rrc_featureSets = -1; /* FeatureSets */ -static int hf_nr_rrc_nonCriticalExtension_88 = -1; /* UE_NR_Capability_v1530 */ +static int hf_nr_rrc_nonCriticalExtension_90 = -1; /* UE_NR_Capability_v1530 */ static int hf_nr_rrc_fdd_Add_UE_NR_Capabilities_v1530 = -1; /* UE_NR_CapabilityAddXDD_Mode_v1530 */ static int hf_nr_rrc_tdd_Add_UE_NR_Capabilities_v1530 = -1; /* UE_NR_CapabilityAddXDD_Mode_v1530 */ static int hf_nr_rrc_dummy_13 = -1; /* T_dummy_09 */ static int hf_nr_rrc_interRAT_Parameters = -1; /* InterRAT_Parameters */ static int hf_nr_rrc_inactiveState = -1; /* T_inactiveState */ static int hf_nr_rrc_delayBudgetReporting = -1; /* T_delayBudgetReporting */ -static int hf_nr_rrc_nonCriticalExtension_89 = -1; /* UE_NR_Capability_v1540 */ +static int hf_nr_rrc_nonCriticalExtension_91 = -1; /* UE_NR_Capability_v1540 */ static int hf_nr_rrc_sdap_Parameters = -1; /* SDAP_Parameters */ static int hf_nr_rrc_overheatingInd = -1; /* T_overheatingInd */ static int hf_nr_rrc_ims_Parameters = -1; /* IMS_Parameters */ static int hf_nr_rrc_fr1_Add_UE_NR_Capabilities_v1540 = -1; /* UE_NR_CapabilityAddFRX_Mode_v1540 */ static int hf_nr_rrc_fr2_Add_UE_NR_Capabilities_v1540 = -1; /* UE_NR_CapabilityAddFRX_Mode_v1540 */ static int hf_nr_rrc_fr1_fr2_Add_UE_NR_Capabilities = -1; /* UE_NR_CapabilityAddFRX_Mode */ -static int hf_nr_rrc_nonCriticalExtension_90 = -1; /* UE_NR_Capability_v1550 */ +static int hf_nr_rrc_nonCriticalExtension_92 = -1; /* UE_NR_Capability_v1550 */ static int hf_nr_rrc_reducedCP_Latency = -1; /* T_reducedCP_Latency */ -static int hf_nr_rrc_nonCriticalExtension_91 = -1; /* UE_NR_Capability_v1560 */ +static int hf_nr_rrc_nonCriticalExtension_93 = -1; /* UE_NR_Capability_v1560 */ static int hf_nr_rrc_nrdc_Parameters = -1; /* NRDC_Parameters */ static int hf_nr_rrc_receivedFilters_01 = -1; /* T_receivedFilters_01 */ -static int hf_nr_rrc_nonCriticalExtension_92 = -1; /* UE_NR_Capability_v1570 */ +static int hf_nr_rrc_nonCriticalExtension_94 = -1; /* UE_NR_Capability_v1570 */ static int hf_nr_rrc_nrdc_Parameters_v1570 = -1; /* NRDC_Parameters_v1570 */ -static int hf_nr_rrc_nonCriticalExtension_93 = -1; /* UE_NR_Capability_v1610 */ +static int hf_nr_rrc_nonCriticalExtension_95 = -1; /* UE_NR_Capability_v1610 */ static int hf_nr_rrc_inDeviceCoexInd_r16 = -1; /* T_inDeviceCoexInd_r16 */ static int hf_nr_rrc_dl_DedicatedMessageSegmentation_r16 = -1; /* T_dl_DedicatedMessageSegmentation_r16 */ static int hf_nr_rrc_nrdc_Parameters_v1610 = -1; /* NRDC_Parameters_v1610 */ @@ -5361,18 +5645,31 @@ static int hf_nr_rrc_resumeWithSCG_Config_r16 = -1; /* T_resumeWithSCG_Config_r static int hf_nr_rrc_ue_BasedPerfMeas_Parameters_r16 = -1; /* UE_BasedPerfMeas_Parameters_r16 */ static int hf_nr_rrc_son_Parameters_r16 = -1; /* SON_Parameters_r16 */ static int hf_nr_rrc_onDemandSIB_Connected_r16 = -1; /* T_onDemandSIB_Connected_r16 */ -static int hf_nr_rrc_nonCriticalExtension_94 = -1; /* T_nonCriticalExtension_51 */ +static int hf_nr_rrc_nonCriticalExtension_96 = -1; /* T_nonCriticalExtension_51 */ static int hf_nr_rrc_flowControlBH_RLC_ChannelBased_r16 = -1; /* T_flowControlBH_RLC_ChannelBased_r16 */ static int hf_nr_rrc_flowControlRouting_ID_Based_r16 = -1; /* T_flowControlRouting_ID_Based_r16 */ +static int hf_nr_rrc_ul_DynamicChAccess_r16 = -1; /* T_ul_DynamicChAccess_r16 */ +static int hf_nr_rrc_ul_Semi_StaticChAccess_r16 = -1; /* T_ul_Semi_StaticChAccess_r16 */ +static int hf_nr_rrc_ssb_RRM_DynamicChAccess_r16 = -1; /* T_ssb_RRM_DynamicChAccess_r16 */ +static int hf_nr_rrc_ssb_RRM_Semi_StaticChAccess_r16 = -1; /* T_ssb_RRM_Semi_StaticChAccess_r16 */ +static int hf_nr_rrc_mib_Acquisition_r16 = -1; /* T_mib_Acquisition_r16 */ +static int hf_nr_rrc_ssb_RLM_DynamicChAccess_r16 = -1; /* T_ssb_RLM_DynamicChAccess_r16 */ +static int hf_nr_rrc_ssb_RLM_Semi_StaticChAccess_r16 = -1; /* T_ssb_RLM_Semi_StaticChAccess_r16 */ +static int hf_nr_rrc_sib1_Acquisition_r16 = -1; /* T_sib1_Acquisition_r16 */ +static int hf_nr_rrc_extendedRAR_Window_r16 = -1; /* T_extendedRAR_Window_r16 */ static int hf_nr_rrc_ssb_BFD_CBD_dynamicChannelAccess_r16 = -1; /* T_ssb_BFD_CBD_dynamicChannelAccess_r16 */ static int hf_nr_rrc_ssb_BFD_CBD_semi_staticChannelAccess_r16 = -1; /* T_ssb_BFD_CBD_semi_staticChannelAccess_r16 */ static int hf_nr_rrc_csi_RS_BFD_CBD_r16 = -1; /* T_csi_RS_BFD_CBD_r16 */ +static int hf_nr_rrc_ul_ChannelBW_SCell_10mhz_r16 = -1; /* T_ul_ChannelBW_SCell_10mhz_r16 */ static int hf_nr_rrc_rssi_ChannelOccupancyReporting_r16 = -1; /* T_rssi_ChannelOccupancyReporting_r16 */ static int hf_nr_rrc_srs_StartAnyOFDM_Symbol_r16 = -1; /* T_srs_StartAnyOFDM_Symbol_r16 */ static int hf_nr_rrc_searchSpaceFreqMonitorLocation_r16 = -1; /* INTEGER_1_5 */ static int hf_nr_rrc_coreset_RB_Offset_r16 = -1; /* T_coreset_RB_Offset_r16 */ static int hf_nr_rrc_cgi_Acquisition_r16 = -1; /* T_cgi_Acquisition_r16 */ static int hf_nr_rrc_configuredUL_Tx_r16 = -1; /* T_configuredUL_Tx_r16 */ +static int hf_nr_rrc_prach_Wideband_r16 = -1; /* T_prach_Wideband_r16 */ +static int hf_nr_rrc_dci_AvailableRB_Set_r16 = -1; /* T_dci_AvailableRB_Set_r16 */ +static int hf_nr_rrc_dci_ChOccupancyDuration_r16 = -1; /* T_dci_ChOccupancyDuration_r16 */ static int hf_nr_rrc_typeB_PDSCH_length_r16 = -1; /* T_typeB_PDSCH_length_r16 */ static int hf_nr_rrc_searchSpaceSetGroupSwitchingwithDCI_r16 = -1; /* T_searchSpaceSetGroupSwitchingwithDCI_r16 */ static int hf_nr_rrc_searchSpaceSetGroupSwitchingwithoutDCI_r16 = -1; /* T_searchSpaceSetGroupSwitchingwithoutDCI_r16 */ @@ -5382,12 +5679,15 @@ static int hf_nr_rrc_enhancedDynamicHARQ_codebook_r16 = -1; /* T_enhancedDynami static int hf_nr_rrc_oneShotHARQ_feedback_r16 = -1; /* T_oneShotHARQ_feedback_r16 */ static int hf_nr_rrc_multiPUSCH_UL_grant_r16 = -1; /* T_multiPUSCH_UL_grant_r16 */ static int hf_nr_rrc_csi_RS_RLM_r16 = -1; /* T_csi_RS_RLM_r16 */ -static int hf_nr_rrc_vcsi_RS_RRM_r16 = -1; /* T_vcsi_RS_RRM_r16 */ +static int hf_nr_rrc_csi_RS_RRM_r16 = -1; /* T_csi_RS_RRM_r16 */ +static int hf_nr_rrc_periodicAndSemi_PersistentCSI_RS_r16 = -1; /* T_periodicAndSemi_PersistentCSI_RS_r16 */ static int hf_nr_rrc_pusch_PRB_interlace_r16 = -1; /* T_pusch_PRB_interlace_r16 */ static int hf_nr_rrc_pucch_F0_F1_PRB_Interlace_r16 = -1; /* T_pucch_F0_F1_PRB_Interlace_r16 */ static int hf_nr_rrc_occ_PRB_PF2_PF3_r16 = -1; /* T_occ_PRB_PF2_PF3_r16 */ static int hf_nr_rrc_extCP_rangeCG_PUSCH_r16 = -1; /* T_extCP_rangeCG_PUSCH_r16 */ static int hf_nr_rrc_configuredGrantWithReTx_r16 = -1; /* T_configuredGrantWithReTx_r16 */ +static int hf_nr_rrc_ed_Threshold_r16 = -1; /* T_ed_Threshold_r16 */ +static int hf_nr_rrc_ul_DL_COT_Sharing_r16 = -1; /* T_ul_DL_COT_Sharing_r16 */ static int hf_nr_rrc_mux_CG_UCI_HARQ_ACK_r16 = -1; /* T_mux_CG_UCI_HARQ_ACK_r16 */ static int hf_nr_rrc_cg_resourceConfig_r16 = -1; /* T_cg_resourceConfig_r16 */ static int hf_nr_rrc_areaConfig_r16 = -1; /* AreaConfig_r16 */ @@ -5436,25 +5736,25 @@ static int hf_nr_rrc_rttValue_r16 = -1; /* INTEGER_0_16777215 */ static int hf_nr_rrc_rttUnits_r16 = -1; /* T_rttUnits_r16 */ static int hf_nr_rrc_rttAccuracy_r16 = -1; /* INTEGER_0_255 */ static int hf_nr_rrc_delayBudgetReportingConfig = -1; /* T_delayBudgetReportingConfig */ -static int hf_nr_rrc_setup_109 = -1; /* T_setup */ +static int hf_nr_rrc_setup_110 = -1; /* T_setup */ static int hf_nr_rrc_delayBudgetReportingProhibitTimer = -1; /* T_delayBudgetReportingProhibitTimer */ static int hf_nr_rrc_overheatingAssistanceConfig = -1; /* T_overheatingAssistanceConfig */ -static int hf_nr_rrc_setup_110 = -1; /* OverheatingAssistanceConfig */ +static int hf_nr_rrc_setup_111 = -1; /* OverheatingAssistanceConfig */ static int hf_nr_rrc_CandidateServingFreqListNR_r16_item = -1; /* ARFCN_ValueNR */ static int hf_nr_rrc_idc_AssistanceConfig_r16 = -1; /* T_idc_AssistanceConfig_r16 */ -static int hf_nr_rrc_setup_111 = -1; /* IDC_AssistanceConfig_r16 */ +static int hf_nr_rrc_setup_112 = -1; /* IDC_AssistanceConfig_r16 */ static int hf_nr_rrc_drx_PreferenceConfig_r16 = -1; /* T_drx_PreferenceConfig_r16 */ -static int hf_nr_rrc_setup_112 = -1; /* DRX_PreferenceConfig_r16 */ +static int hf_nr_rrc_setup_113 = -1; /* DRX_PreferenceConfig_r16 */ static int hf_nr_rrc_maxBW_PreferenceConfig_r16 = -1; /* T_maxBW_PreferenceConfig_r16 */ -static int hf_nr_rrc_setup_113 = -1; /* MaxBW_PreferenceConfig_r16 */ +static int hf_nr_rrc_setup_114 = -1; /* MaxBW_PreferenceConfig_r16 */ static int hf_nr_rrc_maxCC_PreferenceConfig_r16 = -1; /* T_maxCC_PreferenceConfig_r16 */ -static int hf_nr_rrc_setup_114 = -1; /* MaxCC_PreferenceConfig_r16 */ +static int hf_nr_rrc_setup_115 = -1; /* MaxCC_PreferenceConfig_r16 */ static int hf_nr_rrc_maxMIMO_LayerPreferenceConfig_r16 = -1; /* T_maxMIMO_LayerPreferenceConfig_r16 */ -static int hf_nr_rrc_setup_115 = -1; /* MaxMIMO_LayerPreferenceConfig_r16 */ +static int hf_nr_rrc_setup_116 = -1; /* MaxMIMO_LayerPreferenceConfig_r16 */ static int hf_nr_rrc_minSchedulingOffsetPreferenceConfig_r16 = -1; /* T_minSchedulingOffsetPreferenceConfig_r16 */ -static int hf_nr_rrc_setup_116 = -1; /* MinSchedulingOffsetPreferenceConfig_r16 */ +static int hf_nr_rrc_setup_117 = -1; /* MinSchedulingOffsetPreferenceConfig_r16 */ static int hf_nr_rrc_releasePreferenceConfig_r16 = -1; /* T_releasePreferenceConfig_r16 */ -static int hf_nr_rrc_setup_117 = -1; /* ReleasePreferenceConfig_r16 */ +static int hf_nr_rrc_setup_118 = -1; /* ReleasePreferenceConfig_r16 */ static int hf_nr_rrc_referenceTimePreferenceReporting_r16 = -1; /* T_referenceTimePreferenceReporting_r16 */ static int hf_nr_rrc_btNameList_r16 = -1; /* T_btNameList_r16 */ static int hf_nr_rrc_wlanNameList_r16 = -1; /* T_wlanNameList_r16 */ @@ -5482,10 +5782,10 @@ static int hf_nr_rrc_rlf_InfoAvailable_r16 = -1; /* T_rlf_InfoAvailable_r16 */ static int hf_nr_rrc_VisitedCellInfoList_r16_item = -1; /* VisitedCellInfo_r16 */ static int hf_nr_rrc_visitedCellId_r16 = -1; /* T_visitedCellId_r16 */ static int hf_nr_rrc_nr_CellId_r16 = -1; /* T_nr_CellId_r16 */ -static int hf_nr_rrc_pci_arfcn_r16_02 = -1; /* T_pci_arfcn_r16_02 */ +static int hf_nr_rrc_pci_arfcn_r16_03 = -1; /* T_pci_arfcn_r16_03 */ static int hf_nr_rrc_eutra_CellId_r16 = -1; /* T_eutra_CellId_r16 */ static int hf_nr_rrc_cellGlobalId_r16_02 = -1; /* CGI_InfoEUTRA */ -static int hf_nr_rrc_pci_arfcn_r16_03 = -1; /* T_pci_arfcn_r16_03 */ +static int hf_nr_rrc_pci_arfcn_r16_04 = -1; /* T_pci_arfcn_r16_04 */ static int hf_nr_rrc_timeSpent_r16 = -1; /* INTEGER_0_4095 */ static int hf_nr_rrc_WLAN_NameList_r16_item = -1; /* WLAN_Name_r16 */ static int hf_nr_rrc_sl_BWP_Id = -1; /* BWP_Id */ @@ -5495,7 +5795,7 @@ static int hf_nr_rrc_sl_BWP_r16 = -1; /* BWP */ static int hf_nr_rrc_sl_LengthSymbols_r16 = -1; /* T_sl_LengthSymbols_r16 */ static int hf_nr_rrc_sl_StartSymbol_r16 = -1; /* T_sl_StartSymbol_r16 */ static int hf_nr_rrc_sl_PSBCH_Config_r16 = -1; /* T_sl_PSBCH_Config_r16 */ -static int hf_nr_rrc_setup_118 = -1; /* SL_PSBCH_Config_r16 */ +static int hf_nr_rrc_setup_119 = -1; /* SL_PSBCH_Config_r16 */ static int hf_nr_rrc_sl_TxDirectCurrentLocation_r16 = -1; /* INTEGER_0_3301 */ static int hf_nr_rrc_sl_RxPool_r16 = -1; /* SEQUENCE_SIZE_1_maxNrofRXPool_r16_OF_SL_ResourcePool_r16 */ static int hf_nr_rrc_sl_RxPool_r16_item = -1; /* SL_ResourcePool_r16 */ @@ -5532,9 +5832,9 @@ static int hf_nr_rrc_sl_MeasConfigInfoToAddModList_r16 = -1; /* SEQUENCE_SIZE_1 static int hf_nr_rrc_sl_MeasConfigInfoToAddModList_r16_item = -1; /* SL_MeasConfigInfo_r16 */ static int hf_nr_rrc_t400_r16 = -1; /* T_t400_r16 */ static int hf_nr_rrc_sl_ScheduledConfig_r16 = -1; /* T_sl_ScheduledConfig_r16 */ -static int hf_nr_rrc_setup_119 = -1; /* SL_ScheduledConfig_r16 */ +static int hf_nr_rrc_setup_120 = -1; /* SL_ScheduledConfig_r16 */ static int hf_nr_rrc_sl_UE_SelectedConfig_r16 = -1; /* T_sl_UE_SelectedConfig_r16 */ -static int hf_nr_rrc_setup_120 = -1; /* SL_UE_SelectedConfig_r16 */ +static int hf_nr_rrc_setup_121 = -1; /* SL_UE_SelectedConfig_r16 */ static int hf_nr_rrc_sl_FreqInfoToReleaseList_r16 = -1; /* SEQUENCE_SIZE_1_maxNrofFreqSL_r16_OF_SL_Freq_Id_r16 */ static int hf_nr_rrc_sl_FreqInfoToReleaseList_r16_item = -1; /* SL_Freq_Id_r16 */ static int hf_nr_rrc_sl_FreqInfoToAddModList_r16 = -1; /* SEQUENCE_SIZE_1_maxNrofFreqSL_r16_OF_SL_FreqConfig_r16 */ @@ -5546,7 +5846,7 @@ static int hf_nr_rrc_sl_RLC_BearerToAddModList_r16_item = -1; /* SL_RLC_BearerC static int hf_nr_rrc_sl_MaxNumConsecutiveDTX_r16 = -1; /* T_sl_MaxNumConsecutiveDTX_r16 */ static int hf_nr_rrc_sl_CSI_Acquisition_r16 = -1; /* T_sl_CSI_Acquisition_r16 */ static int hf_nr_rrc_sl_CSI_SchedulingRequestId_r16 = -1; /* T_sl_CSI_SchedulingRequestId_r16 */ -static int hf_nr_rrc_setup_121 = -1; /* SchedulingRequestId */ +static int hf_nr_rrc_setup_122 = -1; /* SchedulingRequestId */ static int hf_nr_rrc_sl_SSB_PriorityNR_r16 = -1; /* INTEGER_1_8 */ static int hf_nr_rrc_networkControlledSyncTx_r16 = -1; /* T_networkControlledSyncTx_r16 */ static int hf_nr_rrc_sl_ConfigIndexCG_r16 = -1; /* SL_ConfigIndexCG_r16 */ @@ -5554,13 +5854,14 @@ static int hf_nr_rrc_sl_PeriodCG_r16 = -1; /* SL_PeriodCG_r16 */ static int hf_nr_rrc_sl_NrOfHARQ_Processes_r16 = -1; /* INTEGER_1_16 */ static int hf_nr_rrc_sl_HARQ_ProcID_offset_r16 = -1; /* INTEGER_1_16 */ static int hf_nr_rrc_sl_CG_MaxTransNumList_r16 = -1; /* SL_CG_MaxTransNumList_r16 */ -static int hf_nr_rrc_rrc_ConfiguredSidelinkGrant = -1; /* T_rrc_ConfiguredSidelinkGrant */ +static int hf_nr_rrc_rrc_ConfiguredSidelinkGrant_r16 = -1; /* T_rrc_ConfiguredSidelinkGrant_r16 */ static int hf_nr_rrc_sl_TimeResourceCG_Type1_r16 = -1; /* INTEGER_0_496 */ static int hf_nr_rrc_sl_StartSubchannelCG_Type1_r16 = -1; /* INTEGER_0_26 */ static int hf_nr_rrc_sl_FreqResourceCG_Type1_r16 = -1; /* INTEGER_0_6929 */ static int hf_nr_rrc_sl_TimeOffsetCG_Type1_r16 = -1; /* INTEGER_0_7999 */ static int hf_nr_rrc_sl_N1PUCCH_AN_r16 = -1; /* PUCCH_ResourceId */ static int hf_nr_rrc_sl_PSFCH_ToPUCCH_CG_Type1_r16 = -1; /* INTEGER_0_15 */ +static int hf_nr_rrc_sl_TimeReferenceSFN_Type1_r16 = -1; /* T_sl_TimeReferenceSFN_Type1_r16 */ static int hf_nr_rrc_SL_CG_MaxTransNumList_r16_item = -1; /* SL_CG_MaxTransNum_r16 */ static int hf_nr_rrc_sl_Priority_r16 = -1; /* INTEGER_1_8 */ static int hf_nr_rrc_sl_MaxTransNum_r16 = -1; /* INTEGER_1_32 */ @@ -5661,13 +5962,14 @@ static int hf_nr_rrc_sl_TimeToTrigger_r16 = -1; /* TimeToTrigger */ static int hf_nr_rrc_eventS2_r16 = -1; /* T_eventS2_r16 */ static int hf_nr_rrc_s2_Threshold_r16 = -1; /* SL_MeasTriggerQuantity_r16 */ static int hf_nr_rrc_sl_ReportAmount_r16_01 = -1; /* T_sl_ReportAmount_r16_01 */ -static int hf_nr_rrc_sl_RSRP_r16 = -1; /* RSRP_Range */ +static int hf_nr_rrc_sl_RSRP_r16 = -1; /* BOOLEAN */ +static int hf_nr_rrc_sl_RSRP_r16_01 = -1; /* RSRP_Range */ static int hf_nr_rrc_sl_PSCCH_Config_r16 = -1; /* T_sl_PSCCH_Config_r16 */ -static int hf_nr_rrc_setup_122 = -1; /* SL_PSCCH_Config_r16 */ +static int hf_nr_rrc_setup_123 = -1; /* SL_PSCCH_Config_r16 */ static int hf_nr_rrc_sl_PSSCH_Config_r16 = -1; /* T_sl_PSSCH_Config_r16 */ -static int hf_nr_rrc_setup_123 = -1; /* SL_PSSCH_Config_r16 */ +static int hf_nr_rrc_setup_124 = -1; /* SL_PSSCH_Config_r16 */ static int hf_nr_rrc_sl_PSFCH_Config_r16 = -1; /* T_sl_PSFCH_Config_r16 */ -static int hf_nr_rrc_setup_124 = -1; /* SL_PSFCH_Config_r16 */ +static int hf_nr_rrc_setup_125 = -1; /* SL_PSFCH_Config_r16 */ static int hf_nr_rrc_sl_SyncAllowed_r16 = -1; /* SL_SyncAllowed_r16 */ static int hf_nr_rrc_sl_SubchannelSize_r16 = -1; /* T_sl_SubchannelSize_r16 */ static int hf_nr_rrc_sl_TimeResource_r16 = -1; /* INTEGER_10_160 */ @@ -5757,7 +6059,6 @@ static int hf_nr_rrc_sl_UM_RLC_r16 = -1; /* T_sl_UM_RLC_r16 */ static int hf_nr_rrc_sl_SN_FieldLengthUM_r16 = -1; /* SN_FieldLengthUM */ static int hf_nr_rrc_sl_RNTI_r16 = -1; /* RNTI_Value */ static int hf_nr_rrc_mac_MainConfigSL_r16 = -1; /* MAC_MainConfigSL_r16 */ -static int hf_nr_rrc_sl_Timing_Config_r16 = -1; /* SL_TimingConfig_r16 */ static int hf_nr_rrc_sl_CS_RNTI_r16 = -1; /* RNTI_Value */ static int hf_nr_rrc_sl_PSFCH_ToPUCCH_r16 = -1; /* T_sl_PSFCH_ToPUCCH_r16 */ static int hf_nr_rrc_sl_PSFCH_ToPUCCH_r16_item = -1; /* INTEGER_0_15 */ @@ -5765,7 +6066,6 @@ static int hf_nr_rrc_sl_ConfiguredGrantConfigList_r16 = -1; /* SL_ConfiguredGra static int hf_nr_rrc_sl_BSR_Config_r16 = -1; /* BSR_Config */ static int hf_nr_rrc_ul_PrioritizationThres_r16 = -1; /* INTEGER_1_16 */ static int hf_nr_rrc_sl_PrioritizationThres_r16 = -1; /* INTEGER_1_8 */ -static int hf_nr_rrc_sl_DCI_ToSL_Trans_r16 = -1; /* T_sl_DCI_ToSL_Trans_r16 */ static int hf_nr_rrc_sl_ConfiguredGrantConfigToReleaseList_r16 = -1; /* SEQUENCE_SIZE_1_maxNrofCG_SL_r16_OF_SL_ConfigIndexCG_r16 */ static int hf_nr_rrc_sl_ConfiguredGrantConfigToReleaseList_r16_item = -1; /* SL_ConfigIndexCG_r16 */ static int hf_nr_rrc_sl_ConfiguredGrantConfigToAddModList_r16 = -1; /* SEQUENCE_SIZE_1_maxNrofCG_SL_r16_OF_SL_ConfiguredGrantConfig_r16 */ @@ -5827,7 +6127,7 @@ static int hf_nr_rrc_criticalExtensions_47 = -1; /* T_criticalExtensions_47 */ static int hf_nr_rrc_measurementReportSidelink_r16 = -1; /* MeasurementReportSidelink_IEs_r16 */ static int hf_nr_rrc_criticalExtensionsFuture_47 = -1; /* T_criticalExtensionsFuture_47 */ static int hf_nr_rrc_sl_measResults_r16 = -1; /* SL_MeasResults_r16 */ -static int hf_nr_rrc_nonCriticalExtension_95 = -1; /* T_nonCriticalExtension_52 */ +static int hf_nr_rrc_nonCriticalExtension_97 = -1; /* T_nonCriticalExtension_52 */ static int hf_nr_rrc_sl_MeasResult_r16 = -1; /* SL_MeasResult_r16 */ static int hf_nr_rrc_sl_ResultDMRS_r16 = -1; /* SL_MeasQuantityResult_r16 */ static int hf_nr_rrc_rrc_TransactionIdentifier_r16 = -1; /* RRC_TransactionIdentifier */ @@ -5839,23 +6139,24 @@ static int hf_nr_rrc_slrb_ConfigToAddModList_r16_item = -1; /* SLRB_Config_r16 static int hf_nr_rrc_slrb_ConfigToReleaseList_r16 = -1; /* SEQUENCE_SIZE_1_maxNrofSLRB_r16_OF_SLRB_PC5_ConfigIndex_r16 */ static int hf_nr_rrc_slrb_ConfigToReleaseList_r16_item = -1; /* SLRB_PC5_ConfigIndex_r16 */ static int hf_nr_rrc_sl_MeasConfig_r16_01 = -1; /* T_sl_MeasConfig_r16 */ -static int hf_nr_rrc_setup_125 = -1; /* SL_MeasConfig_r16 */ +static int hf_nr_rrc_setup_126 = -1; /* SL_MeasConfig_r16 */ static int hf_nr_rrc_sl_CSI_RS_Config_r16 = -1; /* T_sl_CSI_RS_Config_r16 */ -static int hf_nr_rrc_setup_126 = -1; /* SL_CSI_RS_Config_r16 */ +static int hf_nr_rrc_setup_127 = -1; /* SL_CSI_RS_Config_r16 */ static int hf_nr_rrc_sl_ResetConfig_r16 = -1; /* T_sl_ResetConfig_r16 */ static int hf_nr_rrc_sl_LatencyBoundCSI_Report_r16 = -1; /* INTEGER_3_160 */ -static int hf_nr_rrc_nonCriticalExtension_96 = -1; /* T_nonCriticalExtension_53 */ +static int hf_nr_rrc_nonCriticalExtension_98 = -1; /* T_nonCriticalExtension_53 */ static int hf_nr_rrc_slrb_PC5_ConfigIndex_r16 = -1; /* SLRB_PC5_ConfigIndex_r16 */ static int hf_nr_rrc_sl_SDAP_ConfigPC5_r16 = -1; /* SL_SDAP_ConfigPC5_r16 */ static int hf_nr_rrc_sl_PDCP_ConfigPC5_r16 = -1; /* SL_PDCP_ConfigPC5_r16 */ static int hf_nr_rrc_sl_RLC_ConfigPC5_r16 = -1; /* SL_RLC_ConfigPC5_r16 */ static int hf_nr_rrc_sl_MAC_LogicalChannelConfigPC5_r16 = -1; /* SL_LogicalChannelConfigPC5_r16 */ -static int hf_nr_rrc_sl_MappedQoS_FlowsToAddList_r16_01 = -1; /* SEQUENCE_SIZE_1_maxNrofSL_QFIsPerDest_r16_OF_SL_PFI_r16 */ -static int hf_nr_rrc_sl_MappedQoS_FlowsToAddList_r16_item_01 = -1; /* SL_PFI_r16 */ -static int hf_nr_rrc_sl_MappedQoS_FlowsToReleaseList_r16 = -1; /* SEQUENCE_SIZE_1_maxNrofSL_QFIsPerDest_r16_OF_SL_PFI_r16 */ -static int hf_nr_rrc_sl_MappedQoS_FlowsToReleaseList_r16_item = -1; /* SL_PFI_r16 */ +static int hf_nr_rrc_sl_MappedQoS_FlowsToAddList_r16_01 = -1; /* SEQUENCE_SIZE_1_maxNrofSL_QFIsPerDest_r16_OF_SL_PQFI_r16 */ +static int hf_nr_rrc_sl_MappedQoS_FlowsToAddList_r16_item_01 = -1; /* SL_PQFI_r16 */ +static int hf_nr_rrc_sl_MappedQoS_FlowsToReleaseList_r16 = -1; /* SEQUENCE_SIZE_1_maxNrofSL_QFIsPerDest_r16_OF_SL_PQFI_r16 */ +static int hf_nr_rrc_sl_MappedQoS_FlowsToReleaseList_r16_item = -1; /* SL_PQFI_r16 */ +static int hf_nr_rrc_sl_SDAP_Header_r16_01 = -1; /* T_sl_SDAP_Header_r16_01 */ static int hf_nr_rrc_sl_PDCP_SN_Size_r16_01 = -1; /* T_sl_PDCP_SN_Size_r16_01 */ -static int hf_nr_rrc_sl_OutOfOrderDelivery_01 = -1; /* T_sl_OutOfOrderDelivery_01 */ +static int hf_nr_rrc_sl_OutOfOrderDelivery_r16 = -1; /* T_sl_OutOfOrderDelivery_r16 */ static int hf_nr_rrc_sl_AM_RLC_r16_01 = -1; /* T_sl_AM_RLC_r16_01 */ static int hf_nr_rrc_sl_UM_Bi_Directional_RLC_r16 = -1; /* T_sl_UM_Bi_Directional_RLC_r16 */ static int hf_nr_rrc_sl_UM_Uni_Directional_RLC_r16 = -1; /* T_sl_UM_Uni_Directional_RLC_r16 */ @@ -5867,29 +6168,42 @@ static int hf_nr_rrc_sl_CSI_RS_FirstSymbol_r16 = -1; /* INTEGER_3_12 */ static int hf_nr_rrc_criticalExtensions_49 = -1; /* T_criticalExtensions_49 */ static int hf_nr_rrc_rrcReconfigurationCompleteSidelink_r16 = -1; /* RRCReconfigurationCompleteSidelink_IEs_r16 */ static int hf_nr_rrc_criticalExtensionsFuture_49 = -1; /* T_criticalExtensionsFuture_49 */ -static int hf_nr_rrc_nonCriticalExtension_97 = -1; /* T_nonCriticalExtension_54 */ +static int hf_nr_rrc_nonCriticalExtension_99 = -1; /* T_nonCriticalExtension_54 */ static int hf_nr_rrc_criticalExtensions_50 = -1; /* T_criticalExtensions_50 */ static int hf_nr_rrc_rrcReconfigurationFailureSidelink_r16 = -1; /* RRCReconfigurationFailureSidelink_IEs_r16 */ static int hf_nr_rrc_criticalExtensionsFuture_50 = -1; /* T_criticalExtensionsFuture_50 */ -static int hf_nr_rrc_nonCriticalExtension_98 = -1; /* T_nonCriticalExtension_55 */ +static int hf_nr_rrc_nonCriticalExtension_100 = -1; /* T_nonCriticalExtension_55 */ static int hf_nr_rrc_criticalExtensions_51 = -1; /* T_criticalExtensions_51 */ static int hf_nr_rrc_ueCapabilityEnquirySidelink_r16 = -1; /* UECapabilityEnquirySidelink_IEs_r16 */ static int hf_nr_rrc_criticalExtensionsFuture_51 = -1; /* T_criticalExtensionsFuture_51 */ -static int hf_nr_rrc_ueCapabilityRequestFilterSidelink_r16 = -1; /* UE_CapabilityRequestFilterSidelink_r16 */ +static int hf_nr_rrc_frequencyBandListFilterSidelink_r16 = -1; /* FreqBandList */ static int hf_nr_rrc_ue_CapabilityInformationSidelink_r16 = -1; /* OCTET_STRING */ -static int hf_nr_rrc_nonCriticalExtension_99 = -1; /* T_nonCriticalExtension_56 */ +static int hf_nr_rrc_nonCriticalExtension_101 = -1; /* T_nonCriticalExtension_56 */ static int hf_nr_rrc_criticalExtensions_52 = -1; /* T_criticalExtensions_52 */ static int hf_nr_rrc_ueCapabilityInformationSidelink_r16 = -1; /* UECapabilityInformationSidelink_IEs_r16 */ static int hf_nr_rrc_criticalExtensionsFuture_52 = -1; /* T_criticalExtensionsFuture_52 */ static int hf_nr_rrc_accessStratumReleaseSidelink_r16 = -1; /* AccessStratumReleaseSidelink_r16 */ static int hf_nr_rrc_pdcp_ParametersSidelink_r16 = -1; /* PDCP_ParametersSidelink_r16 */ static int hf_nr_rrc_rlc_ParametersSidelink_r16_01 = -1; /* PC5_RLC_ParametersSidelink_r16 */ -static int hf_nr_rrc_nonCriticalExtension_100 = -1; /* T_nonCriticalExtension_57 */ +static int hf_nr_rrc_supportedBandCombinationListSidelinkNR_r16 = -1; /* BandCombinationListSidelinkNR_r16 */ +static int hf_nr_rrc_supportedBandListSidelink_r16_01 = -1; /* SEQUENCE_SIZE_1_maxBands_OF_PC5_BandSidelink_r16 */ +static int hf_nr_rrc_supportedBandListSidelink_r16_item_01 = -1; /* PC5_BandSidelink_r16 */ +static int hf_nr_rrc_appliedFreqBandListFilter_r16 = -1; /* FreqBandList */ +static int hf_nr_rrc_nonCriticalExtension_102 = -1; /* T_nonCriticalExtension_57 */ static int hf_nr_rrc_outOfOrderDeliverySidelink_r16 = -1; /* T_outOfOrderDeliverySidelink_r16 */ static int hf_nr_rrc_am_WithLongSN_Sidelink_r16_01 = -1; /* T_am_WithLongSN_Sidelink_r16_01 */ static int hf_nr_rrc_um_WithLongSN_Sidelink_r16_01 = -1; /* T_um_WithLongSN_Sidelink_r16_01 */ -static int hf_nr_rrc_frequencyBandListFilterSidelink_r16 = -1; /* FreqBandList */ -static int hf_nr_rrc_nonCriticalExtension_101 = -1; /* T_nonCriticalExtension_58 */ +static int hf_nr_rrc_BandCombinationListSidelinkNR_r16_item = -1; /* BandCombinationParametersSidelinkNR_r16 */ +static int hf_nr_rrc_BandCombinationParametersSidelinkNR_r16_item = -1; /* BandParametersSidelink_r16 */ +static int hf_nr_rrc_sl_Reception_r16_01 = -1; /* T_sl_Reception_r16_01 */ +static int hf_nr_rrc_harq_RxProcessSidelink_r16_01 = -1; /* T_harq_RxProcessSidelink_r16_01 */ +static int hf_nr_rrc_pscch_RxSidelink_r16_01 = -1; /* T_pscch_RxSidelink_r16_01 */ +static int hf_nr_rrc_scs_CP_PatternRxSidelink_r16_01 = -1; /* T_scs_CP_PatternRxSidelink_r16_01 */ +static int hf_nr_rrc_fr1_r16_02 = -1; /* T_fr1_r16_02 */ +static int hf_nr_rrc_fr2_r16_02 = -1; /* T_fr2_r16_02 */ +static int hf_nr_rrc_extendedCP_RxSidelink_r16_01 = -1; /* T_extendedCP_RxSidelink_r16_01 */ +static int hf_nr_rrc_sl_Tx_256QAM_r16_01 = -1; /* T_sl_Tx_256QAM_r16_01 */ +static int hf_nr_rrc_lowSE_64QAM_MCS_TableSidelink_r16_01 = -1; /* T_lowSE_64QAM_MCS_TableSidelink_r16_01 */ static int dummy_hf_nr_rrc_eag_field = -1; /* never registered */ /*--- End of included file: packet-nr-rrc-hf.c ---*/ @@ -5968,6 +6282,7 @@ static gint ett_nr_rrc_CG_Config_v1590_IEs = -1; static gint ett_nr_rrc_SEQUENCE_SIZE_1_maxNrofServingCells_1_OF_ARFCN_ValueNR = -1; static gint ett_nr_rrc_SEQUENCE_SIZE_1_maxNrofServingCells_1_OF_ARFCN_ValueEUTRA = -1; static gint ett_nr_rrc_CG_Config_v1610_IEs = -1; +static gint ett_nr_rrc_CG_Config_v1620_IEs = -1; static gint ett_nr_rrc_T_nonCriticalExtension_02 = -1; static gint ett_nr_rrc_PH_TypeListSCG = -1; static gint ett_nr_rrc_PH_InfoSCG = -1; @@ -5997,6 +6312,7 @@ static gint ett_nr_rrc_CG_ConfigInfo_v1590_IEs = -1; static gint ett_nr_rrc_CG_ConfigInfo_v1610_IEs = -1; static gint ett_nr_rrc_T_scgFailureInfo_r16 = -1; static gint ett_nr_rrc_T_scgFailureInfoEUTRA_r16 = -1; +static gint ett_nr_rrc_CG_ConfigInfo_v1620_IEs = -1; static gint ett_nr_rrc_T_nonCriticalExtension_03 = -1; static gint ett_nr_rrc_SFTD_FrequencyList_NR = -1; static gint ett_nr_rrc_SFTD_FrequencyList_EUTRA = -1; @@ -6138,14 +6454,14 @@ static gint ett_nr_rrc_IABOtherInformation_r16 = -1; static gint ett_nr_rrc_T_criticalExtensions_14 = -1; static gint ett_nr_rrc_T_criticalExtensionsFuture_14 = -1; static gint ett_nr_rrc_IABOtherInformation_r16_IEs = -1; -static gint ett_nr_rrc_T_ip_InfoType = -1; +static gint ett_nr_rrc_T_ip_InfoType_r16 = -1; static gint ett_nr_rrc_T_iab_IP_Request_r16 = -1; static gint ett_nr_rrc_T_iab_IPv6_AddressReq_r16 = -1; static gint ett_nr_rrc_T_iab_IP_Report_r16 = -1; static gint ett_nr_rrc_T_iab_IPv6_Report_r16 = -1; static gint ett_nr_rrc_T_nonCriticalExtension_14 = -1; -static gint ett_nr_rrc_IAB_IPAddressNumReq_r16 = -1; -static gint ett_nr_rrc_IAB_IPAddressPrefixReq_r16 = -1; +static gint ett_nr_rrc_IAB_IP_AddressNumReq_r16 = -1; +static gint ett_nr_rrc_IAB_IP_AddressPrefixReq_r16 = -1; static gint ett_nr_rrc_IAB_IP_AddressAndTraffic_r16 = -1; static gint ett_nr_rrc_SEQUENCE_SIZE_1_8_OF_IAB_IP_Address_r16 = -1; static gint ett_nr_rrc_IAB_IP_PrefixAndTraffic_r16 = -1; @@ -6452,6 +6768,8 @@ static gint ett_nr_rrc_T_cellResults_r16 = -1; static gint ett_nr_rrc_T_rsIndexResults_r16 = -1; static gint ett_nr_rrc_RA_ReportList_r16 = -1; static gint ett_nr_rrc_RA_Report_r16 = -1; +static gint ett_nr_rrc_T_cellId_r16 = -1; +static gint ett_nr_rrc_T_pci_arfcn_r16 = -1; static gint ett_nr_rrc_RA_InformationCommon_r16 = -1; static gint ett_nr_rrc_PerRAInfoList_r16 = -1; static gint ett_nr_rrc_PerRAInfo_r16 = -1; @@ -6465,15 +6783,16 @@ static gint ett_nr_rrc_T_measResultNeighCells_r16_02 = -1; static gint ett_nr_rrc_T_previousPCellId_r16 = -1; static gint ett_nr_rrc_T_failedPCellId_r16 = -1; static gint ett_nr_rrc_T_nrFailedPCellId_r16 = -1; -static gint ett_nr_rrc_T_pci_arfcn_r16 = -1; -static gint ett_nr_rrc_T_eutraFailedPCellId_r16 = -1; static gint ett_nr_rrc_T_pci_arfcn_r16_01 = -1; +static gint ett_nr_rrc_T_eutraFailedPCellId_r16 = -1; +static gint ett_nr_rrc_T_pci_arfcn_r16_02 = -1; static gint ett_nr_rrc_T_reconnectCellId_r16 = -1; static gint ett_nr_rrc_T_eutra_RLF_Report_r16 = -1; static gint ett_nr_rrc_MeasResultList2NR_r16 = -1; static gint ett_nr_rrc_MeasResultList2EUTRA_r16 = -1; static gint ett_nr_rrc_MeasResult2NR_r16 = -1; static gint ett_nr_rrc_MeasResultListLogging2NR_r16 = -1; +static gint ett_nr_rrc_MeasResultLogging2NR_r16 = -1; static gint ett_nr_rrc_MeasResultListLoggingNR_r16 = -1; static gint ett_nr_rrc_MeasResultLoggingNR_r16 = -1; static gint ett_nr_rrc_MeasResult2EUTRA_r16 = -1; @@ -6513,14 +6832,14 @@ static gint ett_nr_rrc_T_relaxedMeasurement_r16 = -1; static gint ett_nr_rrc_T_lowMobilityEvaluation_r16 = -1; static gint ett_nr_rrc_T_cellEdgeEvaluation_r16 = -1; static gint ett_nr_rrc_SIB3 = -1; -static gint ett_nr_rrc_SEQUENCE_SIZE_1_maxPLMN_OF_IntraFreqCAG_CellPerPLMN_r16 = -1; +static gint ett_nr_rrc_SEQUENCE_SIZE_1_maxPLMN_OF_IntraFreqCAG_CellListPerPLMN_r16 = -1; static gint ett_nr_rrc_IntraFreqNeighCellList = -1; static gint ett_nr_rrc_IntraFreqNeighCellList_v1610 = -1; static gint ett_nr_rrc_IntraFreqNeighCellInfo = -1; static gint ett_nr_rrc_IntraFreqNeighCellInfo_v1610 = -1; static gint ett_nr_rrc_IntraFreqBlackCellList = -1; static gint ett_nr_rrc_IntraFreqWhiteCellList_r16 = -1; -static gint ett_nr_rrc_IntraFreqCAG_CellPerPLMN_r16 = -1; +static gint ett_nr_rrc_IntraFreqCAG_CellListPerPLMN_r16 = -1; static gint ett_nr_rrc_SEQUENCE_SIZE_1_maxCAG_Cell_r16_OF_PCI_Range = -1; static gint ett_nr_rrc_SIB4 = -1; static gint ett_nr_rrc_InterFreqCarrierFreqList = -1; @@ -6528,14 +6847,14 @@ static gint ett_nr_rrc_InterFreqCarrierFreqList_v1610 = -1; static gint ett_nr_rrc_InterFreqCarrierFreqInfo = -1; static gint ett_nr_rrc_T_threshX_Q = -1; static gint ett_nr_rrc_InterFreqCarrierFreqInfo_v1610 = -1; -static gint ett_nr_rrc_SEQUENCE_SIZE_1_maxPLMN_OF_InterFreqCAG_CellList_r16 = -1; +static gint ett_nr_rrc_SEQUENCE_SIZE_1_maxPLMN_OF_InterFreqCAG_CellListPerPLMN_r16 = -1; static gint ett_nr_rrc_InterFreqNeighCellList = -1; static gint ett_nr_rrc_InterFreqNeighCellList_v1610 = -1; static gint ett_nr_rrc_InterFreqNeighCellInfo = -1; static gint ett_nr_rrc_InterFreqNeighCellInfo_v1610 = -1; static gint ett_nr_rrc_InterFreqBlackCellList = -1; static gint ett_nr_rrc_InterFreqWhiteCellList_r16 = -1; -static gint ett_nr_rrc_InterFreqCAG_CellList_r16 = -1; +static gint ett_nr_rrc_InterFreqCAG_CellListPerPLMN_r16 = -1; static gint ett_nr_rrc_SIB5 = -1; static gint ett_nr_rrc_CarrierFreqListEUTRA = -1; static gint ett_nr_rrc_CarrierFreqListEUTRA_v1610 = -1; @@ -6576,7 +6895,7 @@ static gint ett_nr_rrc_T_resourceAvailability_r16 = -1; static gint ett_nr_rrc_AvailabilityIndicator_r16 = -1; static gint ett_nr_rrc_SEQUENCE_SIZE_1_maxNrofDUCells_r16_OF_AvailabilityCombinationsPerCell_r16 = -1; static gint ett_nr_rrc_SEQUENCE_SIZE_1_maxNrofDUCells_r16_OF_AvailabilityCombinationsPerCellIndex_r16 = -1; -static gint ett_nr_rrc_BAP_Routing_ID_r16 = -1; +static gint ett_nr_rrc_BAP_RoutingID_r16 = -1; static gint ett_nr_rrc_BeamFailureRecoveryConfig = -1; static gint ett_nr_rrc_SEQUENCE_SIZE_1_maxNrofCandidateBeams_OF_PRACH_ResourceDedicatedBFR = -1; static gint ett_nr_rrc_T_candidateBeamRSListExt_v1610 = -1; @@ -6708,7 +7027,7 @@ static gint ett_nr_rrc_CrossCarrierSchedulingConfig = -1; static gint ett_nr_rrc_T_schedulingCellInfo = -1; static gint ett_nr_rrc_T_own = -1; static gint ett_nr_rrc_T_other = -1; -static gint ett_nr_rrc_T_carrierIndicatorSize = -1; +static gint ett_nr_rrc_T_carrierIndicatorSize_r16 = -1; static gint ett_nr_rrc_CSI_AperiodicTriggerStateList = -1; static gint ett_nr_rrc_CSI_AperiodicTriggerState = -1; static gint ett_nr_rrc_SEQUENCE_SIZE_1_maxNrofReportConfigPerAperiodicTrigger_OF_CSI_AssociatedReportConfigInfo = -1; @@ -6758,11 +7077,11 @@ static gint ett_nr_rrc_T_disabled = -1; static gint ett_nr_rrc_SEQUENCE_SIZE_1_maxNrofNZP_CSI_RS_ResourcesPerConfig_OF_PortIndexFor8Ranks = -1; static gint ett_nr_rrc_T_semiPersistentOnPUSCH_v1530 = -1; static gint ett_nr_rrc_T_semiPersistentOnPUSCH_v1610 = -1; -static gint ett_nr_rrc_T_reportSlotOffsetListForDCI_Format0_2_r16 = -1; -static gint ett_nr_rrc_T_reportSlotOffsetListForDCI_Format0_1_r16 = -1; +static gint ett_nr_rrc_T_reportSlotOffsetListDCI_0_2_r16 = -1; +static gint ett_nr_rrc_T_reportSlotOffsetListDCI_0_1_r16 = -1; static gint ett_nr_rrc_T_aperiodic_v1610 = -1; -static gint ett_nr_rrc_T_reportSlotOffsetListForDCI_Format0_2_r16_01 = -1; -static gint ett_nr_rrc_T_reportSlotOffsetListForDCI_Format0_1_r16_01 = -1; +static gint ett_nr_rrc_T_reportSlotOffsetListDCI_0_2_r16_01 = -1; +static gint ett_nr_rrc_T_reportSlotOffsetListDCI_0_1_r16_01 = -1; static gint ett_nr_rrc_T_reportQuantity_r16 = -1; static gint ett_nr_rrc_CSI_ReportPeriodicityAndOffset = -1; static gint ett_nr_rrc_PUCCH_CSI_Resource = -1; @@ -7038,9 +7357,10 @@ static gint ett_nr_rrc_T_tpc_SRS = -1; static gint ett_nr_rrc_SEQUENCE_SIZE_1_2_OF_ControlResourceSet = -1; static gint ett_nr_rrc_SEQUENCE_SIZE_1_5_OF_ControlResourceSetId_r16 = -1; static gint ett_nr_rrc_SEQUENCE_SIZE_1_10_OF_SearchSpaceExt_r16 = -1; -static gint ett_nr_rrc_SEQUENCE_SIZE_1_4_OF_CellGroupForSwitching_r16 = -1; static gint ett_nr_rrc_T_uplinkCancellation_r16 = -1; -static gint ett_nr_rrc_CellGroupForSwitching_r16 = -1; +static gint ett_nr_rrc_SearchSpaceSwitchConfig_r16 = -1; +static gint ett_nr_rrc_SEQUENCE_SIZE_1_4_OF_CellGroupForSwitch_r16 = -1; +static gint ett_nr_rrc_CellGroupForSwitch_r16 = -1; static gint ett_nr_rrc_PDCCH_ConfigCommon = -1; static gint ett_nr_rrc_SEQUENCE_SIZE_1_4_OF_SearchSpace = -1; static gint ett_nr_rrc_T_firstPDCCH_MonitoringOccasionOfPO_01 = -1; @@ -7068,12 +7388,12 @@ static gint ett_nr_rrc_T_moreThanOneRLC = -1; static gint ett_nr_rrc_T_primaryPath = -1; static gint ett_nr_rrc_T_discardTimerExt_r16 = -1; static gint ett_nr_rrc_T_moreThanTwoRLC_DRB_r16 = -1; -static gint ett_nr_rrc_T_duplicationState = -1; +static gint ett_nr_rrc_T_duplicationState_r16 = -1; static gint ett_nr_rrc_T_ethernetHeaderCompression_r16 = -1; static gint ett_nr_rrc_EthernetHeaderCompression_r16 = -1; -static gint ett_nr_rrc_T_ehc_Common = -1; -static gint ett_nr_rrc_T_ehc_Downlink = -1; -static gint ett_nr_rrc_T_ehc_Uplink = -1; +static gint ett_nr_rrc_T_ehc_Common_r16 = -1; +static gint ett_nr_rrc_T_ehc_Downlink_r16 = -1; +static gint ett_nr_rrc_T_ehc_Uplink_r16 = -1; static gint ett_nr_rrc_PDSCH_Config = -1; static gint ett_nr_rrc_T_dmrs_DownlinkForPDSCH_MappingTypeA = -1; static gint ett_nr_rrc_T_dmrs_DownlinkForPDSCH_MappingTypeB = -1; @@ -7092,10 +7412,10 @@ static gint ett_nr_rrc_SEQUENCE_SIZE_1_maxNrofZP_CSI_RS_ResourceSets_OF_ZP_CSI_R static gint ett_nr_rrc_T_p_ZP_CSI_RS_ResourceSet = -1; static gint ett_nr_rrc_T_maxMIMO_Layers_r16 = -1; static gint ett_nr_rrc_T_minimumSchedulingOffsetK0_r16 = -1; -static gint ett_nr_rrc_T_dmrs_DownlinkForPDSCH_MappingTypeA_ForDCI_Format1_2_r16 = -1; -static gint ett_nr_rrc_T_dmrs_DownlinkForPDSCH_MappingTypeB_ForDCI_Format1_2_r16 = -1; -static gint ett_nr_rrc_T_pdsch_TimeDomainAllocationListForDCI_Format1_2_r16 = -1; -static gint ett_nr_rrc_T_prb_BundlingTypeForDCI_Format1_2_r16 = -1; +static gint ett_nr_rrc_T_dmrs_DownlinkForPDSCH_MappingTypeA_DCI_1_2_r16 = -1; +static gint ett_nr_rrc_T_dmrs_DownlinkForPDSCH_MappingTypeB_DCI_1_2_r16 = -1; +static gint ett_nr_rrc_T_pdsch_TimeDomainAllocationListDCI_1_2_r16 = -1; +static gint ett_nr_rrc_T_prb_BundlingTypeDCI_1_2_r16 = -1; static gint ett_nr_rrc_T_staticBundling_r16 = -1; static gint ett_nr_rrc_T_dynamicBundling_r16 = -1; static gint ett_nr_rrc_T_pdsch_TimeDomainAllocationList_r16 = -1; @@ -7114,6 +7434,8 @@ static gint ett_nr_rrc_PDSCH_TimeDomainResourceAllocation = -1; static gint ett_nr_rrc_PDSCH_TimeDomainResourceAllocationList_r16 = -1; static gint ett_nr_rrc_PDSCH_TimeDomainResourceAllocation_r16 = -1; static gint ett_nr_rrc_PHR_Config = -1; +static gint ett_nr_rrc_T_mpe_Reporting_FR2_r16 = -1; +static gint ett_nr_rrc_MPE_Config_FR2_r16 = -1; static gint ett_nr_rrc_PhysicalCellGroupConfig = -1; static gint ett_nr_rrc_T_cs_RNTI = -1; static gint ett_nr_rrc_T_pdcch_BlindDetection = -1; @@ -7158,9 +7480,9 @@ static gint ett_nr_rrc_SEQUENCE_SIZE_1_maxNrofSpatialRelationInfos_OF_PUCCH_Spat static gint ett_nr_rrc_SEQUENCE_SIZE_1_maxNrofSpatialRelationInfos_OF_PUCCH_SpatialRelationInfoId = -1; static gint ett_nr_rrc_SEQUENCE_SIZE_1_maxNrofPUCCH_Resources_OF_PUCCH_ResourceExt_r16 = -1; static gint ett_nr_rrc_T_dl_DataToUL_ACK_r16 = -1; -static gint ett_nr_rrc_T_ul_AccessConfigListForDCI_Format_1_1_r16 = -1; +static gint ett_nr_rrc_T_ul_AccessConfigListDCI_1_1_r16 = -1; static gint ett_nr_rrc_T_subslotLengthForPUCCH_r16 = -1; -static gint ett_nr_rrc_T_dl_DataToUL_ACK_ForDCI_Format1_2_r16 = -1; +static gint ett_nr_rrc_T_dl_DataToUL_ACK_DCI_1_2_r16 = -1; static gint ett_nr_rrc_SEQUENCE_SIZE_1_maxNrofSpatialRelationInfosDiff_r16_OF_PUCCH_SpatialRelationInfo = -1; static gint ett_nr_rrc_SEQUENCE_SIZE_1_maxNrofSpatialRelationInfosDiff_r16_OF_PUCCH_SpatialRelationInfoId = -1; static gint ett_nr_rrc_SEQUENCE_SIZE_1_maxNrofSpatialRelationInfos_r16_OF_PUCCH_SpatialRelationInfoExt_r16 = -1; @@ -7187,8 +7509,8 @@ static gint ett_nr_rrc_PUCCH_format4 = -1; static gint ett_nr_rrc_PUCCH_ResourceGroup_r16 = -1; static gint ett_nr_rrc_SEQUENCE_SIZE_1_maxNrofPUCCH_ResourcesPerGroup_r16_OF_PUCCH_ResourceId = -1; static gint ett_nr_rrc_DL_DataToUL_ACK_r16 = -1; -static gint ett_nr_rrc_DL_DataToUL_ACK_ForDCI_Format1_2_r16 = -1; -static gint ett_nr_rrc_UL_AccessConfigListForDCI_Format1_1_r16 = -1; +static gint ett_nr_rrc_DL_DataToUL_ACK_DCI_1_2_r16 = -1; +static gint ett_nr_rrc_UL_AccessConfigListDCI_1_1_r16 = -1; static gint ett_nr_rrc_PUCCH_ConfigCommon = -1; static gint ett_nr_rrc_PUCCH_ConfigurationList_r16 = -1; static gint ett_nr_rrc_PUCCH_PowerControl = -1; @@ -7213,29 +7535,29 @@ static gint ett_nr_rrc_T_frequencyHoppingOffsetLists = -1; static gint ett_nr_rrc_T_pusch_TimeDomainAllocationList = -1; static gint ett_nr_rrc_T_uci_OnPUSCH_01 = -1; static gint ett_nr_rrc_T_minimumSchedulingOffsetK2_r16 = -1; -static gint ett_nr_rrc_T_ul_AccessConfigListForDCI_Format0_1_r16 = -1; -static gint ett_nr_rrc_T_dmrs_UplinkForPUSCH_MappingTypeA_ForDCI_Format0_2_r16 = -1; -static gint ett_nr_rrc_T_dmrs_UplinkForPUSCH_MappingTypeB_ForDCI_Format0_2_r16 = -1; -static gint ett_nr_rrc_T_frequencyHoppingForDCI_Format0_2_r16 = -1; -static gint ett_nr_rrc_T_frequencyHoppingOffsetListsForDCI_Format0_2_r16 = -1; -static gint ett_nr_rrc_T_uci_OnPUSCH_ListForDCI_Format0_2_r16 = -1; -static gint ett_nr_rrc_T_pusch_TimeDomainAllocationListForDCI_Format0_2_r16 = -1; -static gint ett_nr_rrc_T_pusch_TimeDomainAllocationListForDCI_Format0_1_r16 = -1; -static gint ett_nr_rrc_T_uci_OnPUSCH_ListForDCI_Format0_1_r16 = -1; +static gint ett_nr_rrc_T_ul_AccessConfigListDCI_0_1_r16 = -1; +static gint ett_nr_rrc_T_dmrs_UplinkForPUSCH_MappingTypeA_DCI_0_2_r16 = -1; +static gint ett_nr_rrc_T_dmrs_UplinkForPUSCH_MappingTypeB_DCI_0_2_r16 = -1; +static gint ett_nr_rrc_T_frequencyHoppingDCI_0_2_r16 = -1; +static gint ett_nr_rrc_T_frequencyHoppingOffsetListsDCI_0_2_r16 = -1; +static gint ett_nr_rrc_T_uci_OnPUSCH_ListDCI_0_2_r16 = -1; +static gint ett_nr_rrc_T_pusch_TimeDomainAllocationListDCI_0_2_r16 = -1; +static gint ett_nr_rrc_T_pusch_TimeDomainAllocationListDCI_0_1_r16 = -1; +static gint ett_nr_rrc_T_uci_OnPUSCH_ListDCI_0_1_r16 = -1; static gint ett_nr_rrc_T_pusch_PowerControl_v1610 = -1; static gint ett_nr_rrc_T_pusch_TimeDomainAllocationListForMultiPUSCH_r16 = -1; static gint ett_nr_rrc_UCI_OnPUSCH = -1; static gint ett_nr_rrc_T_betaOffsets = -1; static gint ett_nr_rrc_SEQUENCE_SIZE_4_OF_BetaOffsets = -1; static gint ett_nr_rrc_MinSchedulingOffsetK2_Values_r16 = -1; -static gint ett_nr_rrc_UCI_OnPUSCH_ForDCI_Format0_2_r16 = -1; -static gint ett_nr_rrc_T_betaOffsetsForDCI_Format0_2_r16 = -1; -static gint ett_nr_rrc_T_dynamicForDCI_Format0_2_r16 = -1; +static gint ett_nr_rrc_UCI_OnPUSCH_DCI_0_2_r16 = -1; +static gint ett_nr_rrc_T_betaOffsetsDCI_0_2_r16 = -1; +static gint ett_nr_rrc_T_dynamicDCI_0_2_r16 = -1; static gint ett_nr_rrc_SEQUENCE_SIZE_2_OF_BetaOffsets = -1; -static gint ett_nr_rrc_FrequencyHoppingOffsetListsForDCI_Format0_2_r16 = -1; -static gint ett_nr_rrc_UCI_OnPUSCH_ListForDCI_Format0_2_r16 = -1; -static gint ett_nr_rrc_UCI_OnPUSCH_ListForDCI_Format0_1_r16 = -1; -static gint ett_nr_rrc_UL_AccessConfigListForDCI_Format0_1_r16 = -1; +static gint ett_nr_rrc_FrequencyHoppingOffsetListsDCI_0_2_r16 = -1; +static gint ett_nr_rrc_UCI_OnPUSCH_ListDCI_0_2_r16 = -1; +static gint ett_nr_rrc_UCI_OnPUSCH_ListDCI_0_1_r16 = -1; +static gint ett_nr_rrc_UL_AccessConfigListDCI_0_1_r16 = -1; static gint ett_nr_rrc_PUSCH_ConfigCommon = -1; static gint ett_nr_rrc_PUSCH_PowerControl = -1; static gint ett_nr_rrc_SEQUENCE_SIZE_1_maxNrofP0_PUSCH_AlphaSets_OF_P0_PUSCH_AlphaSet = -1; @@ -7258,7 +7580,7 @@ static gint ett_nr_rrc_P0_PUSCH_Set_r16 = -1; static gint ett_nr_rrc_SEQUENCE_SIZE_1_maxNrofP0_PUSCH_Set_r16_OF_P0_PUSCH_r16 = -1; static gint ett_nr_rrc_PUSCH_ServingCellConfig = -1; static gint ett_nr_rrc_T_codeBlockGroupTransmission_01 = -1; -static gint ett_nr_rrc_T_maxMIMO_LayersForDCI_Format0_2_r16 = -1; +static gint ett_nr_rrc_T_maxMIMO_LayersDCI_0_2_r16 = -1; static gint ett_nr_rrc_PUSCH_CodeBlockGroupTransmission = -1; static gint ett_nr_rrc_PUSCH_TimeDomainResourceAllocationList = -1; static gint ett_nr_rrc_PUSCH_TimeDomainResourceAllocation = -1; @@ -7278,7 +7600,7 @@ static gint ett_nr_rrc_RACH_ConfigCommon = -1; static gint ett_nr_rrc_T_ssb_perRACH_OccasionAndCB_PreamblesPerSSB = -1; static gint ett_nr_rrc_T_groupBconfigured = -1; static gint ett_nr_rrc_T_prach_RootSequenceIndex = -1; -static gint ett_nr_rrc_T_ra_PrioritizationForAccessIdentity = -1; +static gint ett_nr_rrc_T_ra_PrioritizationForAccessIdentity_r16 = -1; static gint ett_nr_rrc_T_prach_RootSequenceIndex_r16 = -1; static gint ett_nr_rrc_RACH_ConfigCommonTwoStepRA_r16 = -1; static gint ett_nr_rrc_T_msgA_SSB_PerRACH_OccasionAndCB_PreamblesPerSSB_r16 = -1; @@ -7445,6 +7767,7 @@ static gint ett_nr_rrc_T_lte_CRS_ToMatchAround = -1; static gint ett_nr_rrc_T_dormantBWP_Config_r16 = -1; static gint ett_nr_rrc_T_ca_SlotOffset_r16 = -1; static gint ett_nr_rrc_T_channelAccessConfig_r16 = -1; +static gint ett_nr_rrc_SEQUENCE_SIZE_1_maxSCSs_OF_IntraCellGuardBandsPerSCS_r16 = -1; static gint ett_nr_rrc_T_lte_CRS_PatternList1_r16 = -1; static gint ett_nr_rrc_T_lte_CRS_PatternList2_r16 = -1; static gint ett_nr_rrc_UplinkConfig = -1; @@ -7453,7 +7776,8 @@ static gint ett_nr_rrc_T_pusch_ServingCellConfig = -1; static gint ett_nr_rrc_T_carrierSwitching = -1; static gint ett_nr_rrc_T_uplinkTxSwitching_r16 = -1; static gint ett_nr_rrc_ChannelAccessConfig_r16 = -1; -static gint ett_nr_rrc_IntraCellGuardBands_r16 = -1; +static gint ett_nr_rrc_IntraCellGuardBandsPerSCS_r16 = -1; +static gint ett_nr_rrc_SEQUENCE_SIZE_1_4_OF_GuardBand_r16 = -1; static gint ett_nr_rrc_GuardBand_r16 = -1; static gint ett_nr_rrc_DormantBWP_Config_r16 = -1; static gint ett_nr_rrc_T_withinActiveTimeConfig_r16 = -1; @@ -7659,13 +7983,8 @@ static gint ett_nr_rrc_SEQUENCE_SIZE_1_maxSimultaneousBands_OF_SRS_SwitchingTime static gint ett_nr_rrc_T_srs_TxSwitch = -1; static gint ett_nr_rrc_BandParameters_v1610 = -1; static gint ett_nr_rrc_T_srs_TxSwitch_v1610 = -1; -static gint ett_nr_rrc_T_intraFreqDAPS_Parameters_r16 = -1; -static gint ett_nr_rrc_BandCombinationListSidelink_r16 = -1; -static gint ett_nr_rrc_SupportedBandCombinationListSidelink_r16 = -1; -static gint ett_nr_rrc_BandCombinationParametersSidelink_r16 = -1; static gint ett_nr_rrc_BandParametersSidelink_r16 = -1; -static gint ett_nr_rrc_SupportedBandCombinationListSidelinkEUTRA_r16 = -1; -static gint ett_nr_rrc_SupportedBandCombinationListSidelinkEUTRA_NR_r16 = -1; +static gint ett_nr_rrc_BandCombinationListSidelinkEUTRA_NR_r16 = -1; static gint ett_nr_rrc_BandCombinationParametersSidelinkEUTRA_NR_r16 = -1; static gint ett_nr_rrc_BandParametersSidelinkEUTRA_NR_r16 = -1; static gint ett_nr_rrc_T_eutra_02 = -1; @@ -7679,7 +7998,11 @@ static gint ett_nr_rrc_T_csi_RS_IM_ReceptionForFeedbackPerBandComb = -1; static gint ett_nr_rrc_CA_ParametersNR_v1550 = -1; static gint ett_nr_rrc_CA_ParametersNR_v1560 = -1; static gint ett_nr_rrc_CA_ParametersNR_v1610 = -1; -static gint ett_nr_rrc_T_daps_Parameters_r16 = -1; +static gint ett_nr_rrc_T_interFreqDAPS_r16 = -1; +static gint ett_nr_rrc_T_pdcch_MonitoringCA_r16 = -1; +static gint ett_nr_rrc_T_pdcch_BlindDetectionCA_Mixed_r16 = -1; +static gint ett_nr_rrc_T_pdcch_BlindDetectionMCG_UE_Mixed_r16 = -1; +static gint ett_nr_rrc_T_pdcch_BlindDetectionSCG_UE_Mixed_r16 = -1; static gint ett_nr_rrc_CA_ParametersNRDC = -1; static gint ett_nr_rrc_CA_ParametersNRDC_v1610 = -1; static gint ett_nr_rrc_CarrierAggregationVariant = -1; @@ -7696,6 +8019,66 @@ static gint ett_nr_rrc_T_type1_SinglePanel_r16 = -1; static gint ett_nr_rrc_T_type1_MultiPanel_r16 = -1; static gint ett_nr_rrc_T_type2_r16 = -1; static gint ett_nr_rrc_T_type2_PortSelection_r16 = -1; +static gint ett_nr_rrc_CodebookParametersAddition_r16 = -1; +static gint ett_nr_rrc_T_etype2_r16 = -1; +static gint ett_nr_rrc_T_etype2R1_r16 = -1; +static gint ett_nr_rrc_T_supportedCSI_RS_ResourceListAdd_r16 = -1; +static gint ett_nr_rrc_T_etype2R2_r16 = -1; +static gint ett_nr_rrc_T_supportedCSI_RS_ResourceListAdd_r16_01 = -1; +static gint ett_nr_rrc_T_etype2_PS_r16 = -1; +static gint ett_nr_rrc_T_etype2R1_PortSelection_r16 = -1; +static gint ett_nr_rrc_T_supportedCSI_RS_ResourceListAdd_r16_02 = -1; +static gint ett_nr_rrc_T_etype2R2_PortSelection_r16 = -1; +static gint ett_nr_rrc_T_supportedCSI_RS_ResourceListAdd_r16_03 = -1; +static gint ett_nr_rrc_CodebookComboParametersAddition_r16 = -1; +static gint ett_nr_rrc_T_type1SP_Type2_null_r16 = -1; +static gint ett_nr_rrc_T_supportedCSI_RS_ResourceListAdd_r16_04 = -1; +static gint ett_nr_rrc_T_type1SP_Type2PS_null_r16 = -1; +static gint ett_nr_rrc_T_supportedCSI_RS_ResourceListAdd_r16_05 = -1; +static gint ett_nr_rrc_T_type1SP_eType2R1_null_r16 = -1; +static gint ett_nr_rrc_T_supportedCSI_RS_ResourceListAdd_r16_06 = -1; +static gint ett_nr_rrc_T_type1SP_eType2R2_null_r16 = -1; +static gint ett_nr_rrc_T_supportedCSI_RS_ResourceListAdd_r16_07 = -1; +static gint ett_nr_rrc_T_type1SP_eType2R1PS_null_r16 = -1; +static gint ett_nr_rrc_T_supportedCSI_RS_ResourceListAdd_r16_08 = -1; +static gint ett_nr_rrc_T_type1SP_eType2R2PS_null_r16 = -1; +static gint ett_nr_rrc_T_supportedCSI_RS_ResourceListAdd_r16_09 = -1; +static gint ett_nr_rrc_T_type1SP_Type2_Type2PS_r16 = -1; +static gint ett_nr_rrc_T_supportedCSI_RS_ResourceListAdd_r16_10 = -1; +static gint ett_nr_rrc_T_type1MP_Type2_null_r16 = -1; +static gint ett_nr_rrc_T_supportedCSI_RS_ResourceListAdd_r16_11 = -1; +static gint ett_nr_rrc_T_type1MP_Type2PS_null_r16 = -1; +static gint ett_nr_rrc_T_supportedCSI_RS_ResourceListAdd_r16_12 = -1; +static gint ett_nr_rrc_T_type1MP_eType2R1_null_r16 = -1; +static gint ett_nr_rrc_T_supportedCSI_RS_ResourceListAdd_r16_13 = -1; +static gint ett_nr_rrc_T_type1MP_eType2R2_null_r16 = -1; +static gint ett_nr_rrc_T_supportedCSI_RS_ResourceListAdd_r16_14 = -1; +static gint ett_nr_rrc_T_type1MP_eType2R1PS_null_r16 = -1; +static gint ett_nr_rrc_T_supportedCSI_RS_ResourceListAdd_r16_15 = -1; +static gint ett_nr_rrc_T_type1MP_eType2R2PS_null_r16 = -1; +static gint ett_nr_rrc_T_supportedCSI_RS_ResourceListAdd_r16_16 = -1; +static gint ett_nr_rrc_T_type1MP_Type2_Type2PS_r16 = -1; +static gint ett_nr_rrc_T_supportedCSI_RS_ResourceListAdd_r16_17 = -1; +static gint ett_nr_rrc_CodebookParametersAdditionPerBC_r16 = -1; +static gint ett_nr_rrc_T_etype2R1_r16_01 = -1; +static gint ett_nr_rrc_T_etype2R2_r16_01 = -1; +static gint ett_nr_rrc_T_etype2R1_PortSelection_r16_01 = -1; +static gint ett_nr_rrc_T_etype2R2_PortSelection_r16_01 = -1; +static gint ett_nr_rrc_CodebookComboParametersAdditionPerBC_r16 = -1; +static gint ett_nr_rrc_T_type1SP_Type2_null_r16_01 = -1; +static gint ett_nr_rrc_T_type1SP_Type2PS_null_r16_01 = -1; +static gint ett_nr_rrc_T_type1SP_eType2R1_null_r16_01 = -1; +static gint ett_nr_rrc_T_type1SP_eType2R2_null_r16_01 = -1; +static gint ett_nr_rrc_T_type1SP_eType2R1PS_null_r16_01 = -1; +static gint ett_nr_rrc_T_type1SP_eType2R2PS_null_r16_01 = -1; +static gint ett_nr_rrc_T_type1SP_Type2_Type2PS_r16_01 = -1; +static gint ett_nr_rrc_T_type1MP_Type2_null_r16_01 = -1; +static gint ett_nr_rrc_T_type1MP_Type2PS_null_r16_01 = -1; +static gint ett_nr_rrc_T_type1MP_eType2R1_null_r16_01 = -1; +static gint ett_nr_rrc_T_type1MP_eType2R2_null_r16_01 = -1; +static gint ett_nr_rrc_T_type1MP_eType2R1PS_null_r16_01 = -1; +static gint ett_nr_rrc_T_type1MP_eType2R2PS_null_r16_01 = -1; +static gint ett_nr_rrc_T_type1MP_Type2_Type2PS_r16_01 = -1; static gint ett_nr_rrc_CodebookVariantsList_r16 = -1; static gint ett_nr_rrc_SupportedCSI_RS_Resource = -1; static gint ett_nr_rrc_FeatureSetCombination = -1; @@ -7717,14 +8100,22 @@ static gint ett_nr_rrc_T_pdsch_ProcessingType2 = -1; static gint ett_nr_rrc_T_pdsch_ProcessingType2_Limited = -1; static gint ett_nr_rrc_FeatureSetDownlink_v15a0 = -1; static gint ett_nr_rrc_FeatureSetDownlink_v1610 = -1; -static gint ett_nr_rrc_T_cbgPDSCH_ProcessingType1_DifferentTB_PerSlot = -1; -static gint ett_nr_rrc_T_cbgPDSCH_ProcessingType2_DifferentTB_PerSlot = -1; +static gint ett_nr_rrc_T_cbgPDSCH_ProcessingType1_NumberOfTB_PerSlot = -1; +static gint ett_nr_rrc_T_cbgPDSCH_ProcessingType2_NumberOfTB_PerSlot = -1; +static gint ett_nr_rrc_T_intraFreqDAPS_r16 = -1; +static gint ett_nr_rrc_T_pdcch_Monitoring_r16 = -1; +static gint ett_nr_rrc_T_pdsch_ProcessingType1_r16 = -1; +static gint ett_nr_rrc_T_pdsch_ProcessingType2_r16 = -1; +static gint ett_nr_rrc_T_crossCarrierSchedulingProcessing_DiffSCS_r16 = -1; +static gint ett_nr_rrc_PDCCH_MonitoringOccasions_r16 = -1; static gint ett_nr_rrc_DummyA = -1; static gint ett_nr_rrc_DummyB = -1; static gint ett_nr_rrc_DummyC = -1; static gint ett_nr_rrc_DummyD = -1; static gint ett_nr_rrc_DummyE = -1; static gint ett_nr_rrc_FeatureSetDownlinkPerCC = -1; +static gint ett_nr_rrc_FeatureSetDownlinkPerCC_v1620 = -1; +static gint ett_nr_rrc_MultiDCI_MultiTRP_r16 = -1; static gint ett_nr_rrc_FeatureSets = -1; static gint ett_nr_rrc_SEQUENCE_SIZE_1_maxDownlinkFeatureSets_OF_FeatureSetDownlink = -1; static gint ett_nr_rrc_SEQUENCE_SIZE_1_maxPerCC_FeatureSets_OF_FeatureSetDownlinkPerCC = -1; @@ -7736,6 +8127,7 @@ static gint ett_nr_rrc_SEQUENCE_SIZE_1_maxPerCC_FeatureSets_OF_FeatureSetUplinkP static gint ett_nr_rrc_SEQUENCE_SIZE_1_maxDownlinkFeatureSets_OF_FeatureSetDownlink_v15a0 = -1; static gint ett_nr_rrc_SEQUENCE_SIZE_1_maxDownlinkFeatureSets_OF_FeatureSetDownlink_v1610 = -1; static gint ett_nr_rrc_SEQUENCE_SIZE_1_maxUplinkFeatureSets_OF_FeatureSetUplink_v1610 = -1; +static gint ett_nr_rrc_SEQUENCE_SIZE_1_maxPerCC_FeatureSets_OF_FeatureSetDownlinkPerCC_v1620 = -1; static gint ett_nr_rrc_FeatureSetUplink = -1; static gint ett_nr_rrc_SEQUENCE_SIZE_1_maxNrofServingCells_OF_FeatureSetUplinkPerCC_Id = -1; static gint ett_nr_rrc_T_pusch_ProcessingType1_DifferentTB_PerSlot = -1; @@ -7745,6 +8137,11 @@ static gint ett_nr_rrc_FeatureSetUplink_v1610 = -1; static gint ett_nr_rrc_T_pusch_RepetitionTypeB_r16 = -1; static gint ett_nr_rrc_T_cbgPUSCH_ProcessingType1_DifferentTB_PerSlot = -1; static gint ett_nr_rrc_T_cbgPUSCH_ProcessingType2_DifferentTB_PerSlot = -1; +static gint ett_nr_rrc_T_intraFreqDAPS_UL_r16 = -1; +static gint ett_nr_rrc_T_multiPUCCH_r16 = -1; +static gint ett_nr_rrc_T_ul_IntraUE_Mux_r16 = -1; +static gint ett_nr_rrc_T_crossCarrierSchedulingProcessing_DiffSCS_r16_01 = -1; +static gint ett_nr_rrc_T_ul_FullPwrMode2_TPMIGroup_r16 = -1; static gint ett_nr_rrc_SRS_AllPosResources_r16 = -1; static gint ett_nr_rrc_SRS_PosResources_r16 = -1; static gint ett_nr_rrc_SRS_PosResourceAP_r16 = -1; @@ -7781,9 +8178,7 @@ static gint ett_nr_rrc_MeasAndMobParameters = -1; static gint ett_nr_rrc_MeasAndMobParametersCommon = -1; static gint ett_nr_rrc_T_condHandoverParametersCommon_r16 = -1; static gint ett_nr_rrc_MeasAndMobParametersXDD_Diff = -1; -static gint ett_nr_rrc_T_condHandoverParametersXDD_Diff_r16 = -1; static gint ett_nr_rrc_MeasAndMobParametersFRX_Diff = -1; -static gint ett_nr_rrc_T_condHandoverParametersFRX_Diff_r16 = -1; static gint ett_nr_rrc_MeasAndMobParametersMRDC = -1; static gint ett_nr_rrc_MeasAndMobParametersMRDC_v1560 = -1; static gint ett_nr_rrc_MeasAndMobParametersMRDC_v1610 = -1; @@ -7792,11 +8187,7 @@ static gint ett_nr_rrc_MeasAndMobParametersMRDC_Common_v1610 = -1; static gint ett_nr_rrc_T_condPSCellChangeParametersCommon_r16 = -1; static gint ett_nr_rrc_MeasAndMobParametersMRDC_XDD_Diff = -1; static gint ett_nr_rrc_MeasAndMobParametersMRDC_XDD_Diff_v1560 = -1; -static gint ett_nr_rrc_MeasAndMobParametersMRDC_XDD_Diff_v1610 = -1; -static gint ett_nr_rrc_T_condPSCellChangeParametersXDD_Diff_r16 = -1; static gint ett_nr_rrc_MeasAndMobParametersMRDC_FRX_Diff = -1; -static gint ett_nr_rrc_MeasAndMobParametersMRDC_FRX_Diff_v1610 = -1; -static gint ett_nr_rrc_T_condPSCellChangeParametersFRX_Diff_r16 = -1; static gint ett_nr_rrc_MIMO_ParametersPerBand = -1; static gint ett_nr_rrc_T_tci_StatePDSCH = -1; static gint ett_nr_rrc_T_maxNumberRxTxBeamSwitchDL = -1; @@ -7805,6 +8196,13 @@ static gint ett_nr_rrc_T_beamReportTiming = -1; static gint ett_nr_rrc_T_ptrs_DensityRecommendationSetDL = -1; static gint ett_nr_rrc_T_ptrs_DensityRecommendationSetUL = -1; static gint ett_nr_rrc_T_beamSwitchTiming = -1; +static gint ett_nr_rrc_T_ssb_csirs_SINR_measurement_r16 = -1; +static gint ett_nr_rrc_T_multiDCI_multiTRP_Parameters_r16 = -1; +static gint ett_nr_rrc_T_outOfOrderOperationDL_r16 = -1; +static gint ett_nr_rrc_T_maxNumberActivatedTCI_States_r16 = -1; +static gint ett_nr_rrc_T_singleDCI_SDM_scheme_Parameters_r16 = -1; +static gint ett_nr_rrc_T_supportInter_slotTDM_r16 = -1; +static gint ett_nr_rrc_T_beamSwitchTiming_r16 = -1; static gint ett_nr_rrc_DummyG = -1; static gint ett_nr_rrc_BeamManagementSSB_CSI_RS = -1; static gint ett_nr_rrc_DummyH = -1; @@ -7812,14 +8210,16 @@ static gint ett_nr_rrc_CSI_RS_ForTracking = -1; static gint ett_nr_rrc_CSI_RS_IM_ReceptionForFeedback = -1; static gint ett_nr_rrc_CSI_RS_ProcFrameworkForSRS = -1; static gint ett_nr_rrc_CSI_ReportFramework = -1; +static gint ett_nr_rrc_CSI_ReportFrameworkExt_r16 = -1; static gint ett_nr_rrc_PTRS_DensityRecommendationDL = -1; static gint ett_nr_rrc_PTRS_DensityRecommendationUL = -1; static gint ett_nr_rrc_SpatialRelations = -1; static gint ett_nr_rrc_DummyI = -1; static gint ett_nr_rrc_MRDC_Parameters = -1; -static gint ett_nr_rrc_T_maxUplinkDutyCycle_interBandENDC_TDD_PC2_r16 = -1; static gint ett_nr_rrc_MRDC_Parameters_v1580 = -1; static gint ett_nr_rrc_MRDC_Parameters_v1590 = -1; +static gint ett_nr_rrc_MRDC_Parameters_v1620 = -1; +static gint ett_nr_rrc_T_maxUplinkDutyCycle_interBandENDC_TDD_PC2_r16 = -1; static gint ett_nr_rrc_NRDC_Parameters = -1; static gint ett_nr_rrc_T_dummy_06 = -1; static gint ett_nr_rrc_NRDC_Parameters_v1570 = -1; @@ -7832,10 +8232,15 @@ static gint ett_nr_rrc_PDCP_ParametersMRDC_v1610 = -1; static gint ett_nr_rrc_Phy_Parameters = -1; static gint ett_nr_rrc_Phy_ParametersCommon = -1; static gint ett_nr_rrc_T_crossSlotScheduling_r16 = -1; +static gint ett_nr_rrc_T_pusch_RepetitionTypeA_r16 = -1; +static gint ett_nr_rrc_T_maxTotalResourcesForAcrossFreqRanges_r16 = -1; +static gint ett_nr_rrc_T_harqACK_separateMultiDCI_MultiTRP_r16 = -1; +static gint ett_nr_rrc_T_bwp_SwitchingMultiCCs_r16 = -1; static gint ett_nr_rrc_Phy_ParametersXDD_Diff = -1; static gint ett_nr_rrc_Phy_ParametersFRX_Diff = -1; static gint ett_nr_rrc_T_mux_SR_HARQ_ACK_CSI_PUCCH_OncePerSlot = -1; static gint ett_nr_rrc_T_pdcch_BlindDetectionNRDC = -1; +static gint ett_nr_rrc_T_maxTotalResourcesForOneFreqRange_r16 = -1; static gint ett_nr_rrc_Phy_ParametersFR1 = -1; static gint ett_nr_rrc_Phy_ParametersFR2 = -1; static gint ett_nr_rrc_Phy_ParametersMRDC = -1; @@ -7868,12 +8273,15 @@ static gint ett_nr_rrc_T_fr2_200mhz = -1; static gint ett_nr_rrc_T_channelBW_UL_IAB_r16 = -1; static gint ett_nr_rrc_T_fr1_100mhz_01 = -1; static gint ett_nr_rrc_T_fr2_200mhz_01 = -1; +static gint ett_nr_rrc_T_activeConfiguredGrant_r16 = -1; +static gint ett_nr_rrc_T_sps_r16 = -1; static gint ett_nr_rrc_RF_ParametersMRDC = -1; static gint ett_nr_rrc_T_supportedBandCombinationListNEDC_Only_v15a0 = -1; static gint ett_nr_rrc_RLC_Parameters = -1; static gint ett_nr_rrc_SDAP_Parameters = -1; static gint ett_nr_rrc_SidelinkParameters_r16 = -1; static gint ett_nr_rrc_SidelinkParametersNR_r16 = -1; +static gint ett_nr_rrc_SEQUENCE_SIZE_1_maxBands_OF_BandSidelink_r16 = -1; static gint ett_nr_rrc_SidelinkParametersEUTRA_r16 = -1; static gint ett_nr_rrc_SEQUENCE_SIZE_1_maxBandsEUTRA_OF_BandSidelinkEUTRA_r16 = -1; static gint ett_nr_rrc_RLC_ParametersSidelink_r16 = -1; @@ -7883,6 +8291,17 @@ static gint ett_nr_rrc_MAC_ParametersSidelinkCommon_r16 = -1; static gint ett_nr_rrc_MAC_ParametersSidelinkXDD_Diff_r16 = -1; static gint ett_nr_rrc_BandSidelinkEUTRA_r16 = -1; static gint ett_nr_rrc_T_gnb_ScheduledMode3SidelinkEUTRA_r16 = -1; +static gint ett_nr_rrc_BandSidelink_r16 = -1; +static gint ett_nr_rrc_T_sl_Reception_r16 = -1; +static gint ett_nr_rrc_T_scs_CP_PatternRxSidelink_r16 = -1; +static gint ett_nr_rrc_T_fr1_r16 = -1; +static gint ett_nr_rrc_T_fr2_r16 = -1; +static gint ett_nr_rrc_T_sl_TransmissionMode1_r16 = -1; +static gint ett_nr_rrc_T_scs_CP_PatternTxSidelinkModeOne_r16 = -1; +static gint ett_nr_rrc_T_fr1_r16_01 = -1; +static gint ett_nr_rrc_T_fr2_r16_01 = -1; +static gint ett_nr_rrc_T_sync_Sidelink_r16 = -1; +static gint ett_nr_rrc_T_psfch_FormatZeroSidelink_r16 = -1; static gint ett_nr_rrc_SON_Parameters_r16 = -1; static gint ett_nr_rrc_SpatialRelationsSRS_Pos_r16 = -1; static gint ett_nr_rrc_SRS_SwitchingTimeNR = -1; @@ -7923,7 +8342,7 @@ static gint ett_nr_rrc_UE_NR_CapabilityAddFRX_Mode = -1; static gint ett_nr_rrc_UE_NR_CapabilityAddFRX_Mode_v1540 = -1; static gint ett_nr_rrc_UE_NR_CapabilityAddFRX_Mode_v1610 = -1; static gint ett_nr_rrc_BAP_Parameters_r16 = -1; -static gint ett_nr_rrc_UnlicensedParametersPerBand_r16 = -1; +static gint ett_nr_rrc_SharedSpectrumChAccessParamsPerBand_r16 = -1; static gint ett_nr_rrc_AreaConfiguration_r16 = -1; static gint ett_nr_rrc_SEQUENCE_SIZE_1_maxFreq_OF_InterFreqTargetInfo_r16 = -1; static gint ett_nr_rrc_AreaConfig_r16 = -1; @@ -7977,14 +8396,14 @@ static gint ett_nr_rrc_MinSchedulingOffsetPreferenceConfig_r16 = -1; static gint ett_nr_rrc_ReleasePreferenceConfig_r16 = -1; static gint ett_nr_rrc_Sensor_NameList_r16 = -1; static gint ett_nr_rrc_TraceReference_r16 = -1; -static gint ett_nr_rrc_UEMeasurementsAvailable_r16 = -1; +static gint ett_nr_rrc_UE_MeasurementsAvailable_r16 = -1; static gint ett_nr_rrc_VisitedCellInfoList_r16 = -1; static gint ett_nr_rrc_VisitedCellInfo_r16 = -1; static gint ett_nr_rrc_T_visitedCellId_r16 = -1; static gint ett_nr_rrc_T_nr_CellId_r16 = -1; -static gint ett_nr_rrc_T_pci_arfcn_r16_02 = -1; -static gint ett_nr_rrc_T_eutra_CellId_r16 = -1; static gint ett_nr_rrc_T_pci_arfcn_r16_03 = -1; +static gint ett_nr_rrc_T_eutra_CellId_r16 = -1; +static gint ett_nr_rrc_T_pci_arfcn_r16_04 = -1; static gint ett_nr_rrc_WLAN_NameList_r16 = -1; static gint ett_nr_rrc_SL_BWP_Config_r16 = -1; static gint ett_nr_rrc_SL_BWP_Generic_r16 = -1; @@ -8017,7 +8436,7 @@ static gint ett_nr_rrc_SEQUENCE_SIZE_1_maxSL_LCID_r16_OF_SL_RLC_BearerConfigInde static gint ett_nr_rrc_SEQUENCE_SIZE_1_maxSL_LCID_r16_OF_SL_RLC_BearerConfig_r16 = -1; static gint ett_nr_rrc_T_sl_CSI_SchedulingRequestId_r16 = -1; static gint ett_nr_rrc_SL_ConfiguredGrantConfig_r16 = -1; -static gint ett_nr_rrc_T_rrc_ConfiguredSidelinkGrant = -1; +static gint ett_nr_rrc_T_rrc_ConfiguredSidelinkGrant_r16 = -1; static gint ett_nr_rrc_SL_CG_MaxTransNumList_r16 = -1; static gint ett_nr_rrc_SL_CG_MaxTransNum_r16 = -1; static gint ett_nr_rrc_SL_PeriodCG_r16 = -1; @@ -8090,7 +8509,6 @@ static gint ett_nr_rrc_T_sl_UM_RLC_r16 = -1; static gint ett_nr_rrc_SL_ScheduledConfig_r16 = -1; static gint ett_nr_rrc_T_sl_PSFCH_ToPUCCH_r16 = -1; static gint ett_nr_rrc_MAC_MainConfigSL_r16 = -1; -static gint ett_nr_rrc_SL_TimingConfig_r16 = -1; static gint ett_nr_rrc_SL_ConfiguredGrantConfigList_r16 = -1; static gint ett_nr_rrc_SEQUENCE_SIZE_1_maxNrofCG_SL_r16_OF_SL_ConfigIndexCG_r16 = -1; static gint ett_nr_rrc_SEQUENCE_SIZE_1_maxNrofCG_SL_r16_OF_SL_ConfiguredGrantConfig_r16 = -1; @@ -8135,7 +8553,7 @@ static gint ett_nr_rrc_T_sl_CSI_RS_Config_r16 = -1; static gint ett_nr_rrc_T_nonCriticalExtension_53 = -1; static gint ett_nr_rrc_SLRB_Config_r16 = -1; static gint ett_nr_rrc_SL_SDAP_ConfigPC5_r16 = -1; -static gint ett_nr_rrc_SEQUENCE_SIZE_1_maxNrofSL_QFIsPerDest_r16_OF_SL_PFI_r16 = -1; +static gint ett_nr_rrc_SEQUENCE_SIZE_1_maxNrofSL_QFIsPerDest_r16_OF_SL_PQFI_r16 = -1; static gint ett_nr_rrc_SL_PDCP_ConfigPC5_r16 = -1; static gint ett_nr_rrc_SL_RLC_ConfigPC5_r16 = -1; static gint ett_nr_rrc_T_sl_AM_RLC_r16_01 = -1; @@ -8163,11 +8581,17 @@ static gint ett_nr_rrc_UECapabilityInformationSidelink = -1; static gint ett_nr_rrc_T_criticalExtensions_52 = -1; static gint ett_nr_rrc_T_criticalExtensionsFuture_52 = -1; static gint ett_nr_rrc_UECapabilityInformationSidelink_IEs_r16 = -1; +static gint ett_nr_rrc_SEQUENCE_SIZE_1_maxBands_OF_PC5_BandSidelink_r16 = -1; static gint ett_nr_rrc_T_nonCriticalExtension_57 = -1; static gint ett_nr_rrc_PDCP_ParametersSidelink_r16 = -1; static gint ett_nr_rrc_PC5_RLC_ParametersSidelink_r16 = -1; -static gint ett_nr_rrc_UE_CapabilityRequestFilterSidelink_r16 = -1; -static gint ett_nr_rrc_T_nonCriticalExtension_58 = -1; +static gint ett_nr_rrc_BandCombinationListSidelinkNR_r16 = -1; +static gint ett_nr_rrc_BandCombinationParametersSidelinkNR_r16 = -1; +static gint ett_nr_rrc_PC5_BandSidelink_r16 = -1; +static gint ett_nr_rrc_T_sl_Reception_r16_01 = -1; +static gint ett_nr_rrc_T_scs_CP_PatternRxSidelink_r16_01 = -1; +static gint ett_nr_rrc_T_fr1_r16_02 = -1; +static gint ett_nr_rrc_T_fr2_r16_02 = -1; /*--- End of included file: packet-nr-rrc-ett.c ---*/ #line 103 "./asn1/nr-rrc/packet-nr-rrc-template.c" @@ -8211,8 +8635,6 @@ static gint ett_nr_rrc_locationSource_r16 = -1; static gint ett_nr_rrc_velocityEstimate_r16 = -1; static gint ett_nr_rrc_sensor_MeasurementInformation_r16 = -1; static gint ett_nr_rrc_sensor_MotionInformation_r16 = -1; -static gint ett_nr_rrc_bandCombinationListEUTRA1_r16 = -1; -static gint ett_nr_rrc_bandCombinationListEUTRA2_r16 = -1; static gint ett_nr_rrc_bandParametersSidelinkEUTRA1_r16 = -1; static gint ett_nr_rrc_bandParametersSidelinkEUTRA2_r16 = -1; static gint ett_nr_rrc_sl_ParametersEUTRA1_r16 = -1; @@ -8489,14 +8911,14 @@ nr_rrc_timeConnFailure_r16_fmt(gchar *s, guint32 v) } static void -nr_rrc_CLI_RSSI_Range_r16_fmt(gchar *s, guint32 v) +nr_rrc_RSSI_Range_r16_fmt(gchar *s, guint32 v) { if (v == 0) { - g_snprintf(s, ITEM_LABEL_LENGTH, "CLI-RSSI < -100dBm (0)"); + g_snprintf(s, ITEM_LABEL_LENGTH, "RSSI < -100dBm (0)"); } else if (v < 76) { - g_snprintf(s, ITEM_LABEL_LENGTH, "%ddBm <= CLI-RSSI < %ddBm (%u)", v-101, v-100, v); + g_snprintf(s, ITEM_LABEL_LENGTH, "%ddBm <= RSSI < %ddBm (%u)", v-101, v-100, v); } else { - g_snprintf(s, ITEM_LABEL_LENGTH, "-25dBm <= CLI-RSSI (76)"); + g_snprintf(s, ITEM_LABEL_LENGTH, "-25dBm <= RSSI (76)"); } } @@ -10641,6 +11063,28 @@ dissect_nr_rrc_OverheatingAssistance(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx } +static const value_string nr_rrc_T_Offset_r16_vals[] = { + { 0, "ms0dot5" }, + { 1, "ms0dot75" }, + { 2, "ms1" }, + { 3, "ms1dot5" }, + { 4, "ms2" }, + { 5, "ms2dot5" }, + { 6, "ms3" }, + { 7, "spare1" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_Offset_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 8, NULL, FALSE, 0, NULL); + + return offset; +} + + static const per_sequence_t ConfigRestrictInfoSCG_eag_3_sequence[] = { { &hf_nr_rrc_p_maxNR_FR1_MCG_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_P_Max }, { &hf_nr_rrc_powerCoordination_FR2_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_powerCoordination_FR2_r16 }, @@ -10650,6 +11094,7 @@ static const per_sequence_t ConfigRestrictInfoSCG_eag_3_sequence[] = { { &hf_nr_rrc_maxMeasCLI_ResourceSCG_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_INTEGER_0_maxNrofCLI_RSSI_Resources_r16 }, { &hf_nr_rrc_maxNumberEHC_ContextsSN_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_INTEGER_0_65536 }, { &hf_nr_rrc_allowedReducedConfigForOverheating_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_OverheatingAssistance }, + { &hf_nr_rrc_maxToffset_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_Offset_r16 }, { NULL, 0, 0, NULL } }; @@ -11286,6 +11731,7 @@ static const per_sequence_t ConfigRestrictModReqSCG_eag_2_sequence[] = { { &hf_nr_rrc_requestedP_MaxFR2_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_P_Max }, { &hf_nr_rrc_requestedMaxInterFreqMeasIdSCG_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_INTEGER_1_maxMeasIdentitiesMN }, { &hf_nr_rrc_requestedMaxIntraFreqMeasIdSCG_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_INTEGER_1_maxMeasIdentitiesMN }, + { &hf_nr_rrc_requestedToffset_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_Offset_r16 }, { NULL, 0, 0, NULL } }; @@ -12447,6 +12893,16 @@ dissect_nr_rrc_DRX_Info2(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_ } + +static int +dissect_nr_rrc_T_ueAssistanceInformationSCG_r16_01(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_octet_string_containing_pdu_new(tvb, offset, actx, tree, hf_index, + NO_BOUND, NO_BOUND, FALSE, dissect_nr_rrc_UEAssistanceInformation_PDU); + + return offset; +} + + static const per_sequence_t T_nonCriticalExtension_02_sequence[] = { { NULL, 0, 0, NULL } }; @@ -12460,9 +12916,24 @@ dissect_nr_rrc_T_nonCriticalExtension_02(tvbuff_t *tvb _U_, int offset _U_, asn1 } +static const per_sequence_t CG_Config_v1620_IEs_sequence[] = { + { &hf_nr_rrc_ueAssistanceInformationSCG_r16_01, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_ueAssistanceInformationSCG_r16_01 }, + { &hf_nr_rrc_nonCriticalExtension_07, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_nonCriticalExtension_02 }, + { NULL, 0, 0, NULL } +}; + +static int +dissect_nr_rrc_CG_Config_v1620_IEs(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_sequence(tvb, offset, actx, tree, hf_index, + ett_nr_rrc_CG_Config_v1620_IEs, CG_Config_v1620_IEs_sequence); + + return offset; +} + + static const per_sequence_t CG_Config_v1610_IEs_sequence[] = { { &hf_nr_rrc_drx_InfoSCG2 , ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_DRX_Info2 }, - { &hf_nr_rrc_nonCriticalExtension_06, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_nonCriticalExtension_02 }, + { &hf_nr_rrc_nonCriticalExtension_06, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_CG_Config_v1620_IEs }, { NULL, 0, 0, NULL } }; @@ -12832,8 +13303,25 @@ dissect_nr_rrc_GapConfig_eag_1(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *ac } +static const value_string nr_rrc_T_mgl_r16_vals[] = { + { 0, "ms10" }, + { 1, "ms20" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_mgl_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 2, NULL, FALSE, 0, NULL); + + return offset; +} + + static const per_sequence_t GapConfig_eag_2_sequence[] = { { &hf_nr_rrc_refFR2ServCellAsyncCA_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_ServCellIndex }, + { &hf_nr_rrc_mgl_r16 , ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_mgl_r16 }, { NULL, 0, 0, NULL } }; @@ -13619,6 +14107,16 @@ dissect_nr_rrc_OCTET_STRING(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx } + +static int +dissect_nr_rrc_T_ueAssistanceInformationSourceSCG_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_octet_string_containing_pdu_new(tvb, offset, actx, tree, hf_index, + NO_BOUND, NO_BOUND, FALSE, dissect_nr_rrc_UEAssistanceInformation_PDU); + + return offset; +} + + static const per_sequence_t T_nonCriticalExtension_03_sequence[] = { { NULL, 0, 0, NULL } }; @@ -13632,6 +14130,21 @@ dissect_nr_rrc_T_nonCriticalExtension_03(tvbuff_t *tvb _U_, int offset _U_, asn1 } +static const per_sequence_t CG_ConfigInfo_v1620_IEs_sequence[] = { + { &hf_nr_rrc_ueAssistanceInformationSourceSCG_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_ueAssistanceInformationSourceSCG_r16 }, + { &hf_nr_rrc_nonCriticalExtension_14, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_nonCriticalExtension_03 }, + { NULL, 0, 0, NULL } +}; + +static int +dissect_nr_rrc_CG_ConfigInfo_v1620_IEs(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_sequence(tvb, offset, actx, tree, hf_index, + ett_nr_rrc_CG_ConfigInfo_v1620_IEs, CG_ConfigInfo_v1620_IEs_sequence); + + return offset; +} + + static const per_sequence_t CG_ConfigInfo_v1610_IEs_sequence[] = { { &hf_nr_rrc_drx_InfoMCG2 , ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_DRX_Info2 }, { &hf_nr_rrc_alignedDRX_Indication, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_alignedDRX_Indication }, @@ -13639,7 +14152,7 @@ static const per_sequence_t CG_ConfigInfo_v1610_IEs_sequence[] = { { &hf_nr_rrc_scgFailureInfoEUTRA_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_scgFailureInfoEUTRA_r16 }, { &hf_nr_rrc_sidelinkUEInformationNR_r16_01, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_sidelinkUEInformationNR_r16_01 }, { &hf_nr_rrc_sidelinkUEInformationEUTRA_r16_01, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_OCTET_STRING }, - { &hf_nr_rrc_nonCriticalExtension_12, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_nonCriticalExtension_03 }, + { &hf_nr_rrc_nonCriticalExtension_13, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_CG_ConfigInfo_v1620_IEs }, { NULL, 0, 0, NULL } }; @@ -13654,7 +14167,7 @@ dissect_nr_rrc_CG_ConfigInfo_v1610_IEs(tvbuff_t *tvb _U_, int offset _U_, asn1_c static const per_sequence_t CG_ConfigInfo_v1590_IEs_sequence[] = { { &hf_nr_rrc_servFrequenciesMN_NR, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_SEQUENCE_SIZE_1_maxNrofServingCells_1_OF_ARFCN_ValueNR }, - { &hf_nr_rrc_nonCriticalExtension_11, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_CG_ConfigInfo_v1610_IEs }, + { &hf_nr_rrc_nonCriticalExtension_12, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_CG_ConfigInfo_v1610_IEs }, { NULL, 0, 0, NULL } }; @@ -13670,7 +14183,7 @@ dissect_nr_rrc_CG_ConfigInfo_v1590_IEs(tvbuff_t *tvb _U_, int offset _U_, asn1_c static const per_sequence_t CG_ConfigInfo_v1570_IEs_sequence[] = { { &hf_nr_rrc_sftdFrequencyList_NR, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_SFTD_FrequencyList_NR }, { &hf_nr_rrc_sftdFrequencyList_EUTRA, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_SFTD_FrequencyList_EUTRA }, - { &hf_nr_rrc_nonCriticalExtension_10, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_CG_ConfigInfo_v1590_IEs }, + { &hf_nr_rrc_nonCriticalExtension_11, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_CG_ConfigInfo_v1590_IEs }, { NULL, 0, 0, NULL } }; @@ -13692,7 +14205,7 @@ static const per_sequence_t CG_ConfigInfo_v1560_IEs_sequence[] = { { &hf_nr_rrc_measResultReportCGI_EUTRA, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_measResultReportCGI_EUTRA }, { &hf_nr_rrc_measResultCellListSFTD_EUTRA, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_MeasResultCellListSFTD_EUTRA }, { &hf_nr_rrc_fr_InfoListMCG, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_FR_InfoList }, - { &hf_nr_rrc_nonCriticalExtension_09, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_CG_ConfigInfo_v1570_IEs }, + { &hf_nr_rrc_nonCriticalExtension_10, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_CG_ConfigInfo_v1570_IEs }, { NULL, 0, 0, NULL } }; @@ -13708,7 +14221,7 @@ dissect_nr_rrc_CG_ConfigInfo_v1560_IEs(tvbuff_t *tvb _U_, int offset _U_, asn1_c static const per_sequence_t CG_ConfigInfo_v1540_IEs_sequence[] = { { &hf_nr_rrc_ph_InfoMCG , ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_PH_TypeListMCG }, { &hf_nr_rrc_measResultReportCGI, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_measResultReportCGI }, - { &hf_nr_rrc_nonCriticalExtension_08, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_CG_ConfigInfo_v1560_IEs }, + { &hf_nr_rrc_nonCriticalExtension_09, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_CG_ConfigInfo_v1560_IEs }, { NULL, 0, 0, NULL } }; @@ -13734,7 +14247,7 @@ static const per_sequence_t CG_ConfigInfo_IEs_sequence[] = { { &hf_nr_rrc_scg_RB_Config_01, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_scg_RB_Config_01 }, { &hf_nr_rrc_mcg_RB_Config, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_mcg_RB_Config }, { &hf_nr_rrc_mrdc_AssistanceInfo, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_MRDC_AssistanceInfo }, - { &hf_nr_rrc_nonCriticalExtension_07, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_CG_ConfigInfo_v1540_IEs }, + { &hf_nr_rrc_nonCriticalExtension_08, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_CG_ConfigInfo_v1540_IEs }, { NULL, 0, 0, NULL } }; @@ -14302,7 +14815,7 @@ dissect_nr_rrc_T_nonCriticalExtension_04(tvbuff_t *tvb _U_, int offset _U_, asn1 static const per_sequence_t MeasurementTimingConfiguration_v1610_IEs_sequence[] = { { &hf_nr_rrc_csi_RS_Config_r16, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_T_csi_RS_Config_r16 }, - { &hf_nr_rrc_nonCriticalExtension_15, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_nonCriticalExtension_04 }, + { &hf_nr_rrc_nonCriticalExtension_17, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_nonCriticalExtension_04 }, { NULL, 0, 0, NULL } }; @@ -14318,7 +14831,7 @@ dissect_nr_rrc_MeasurementTimingConfiguration_v1610_IEs(tvbuff_t *tvb _U_, int o static const per_sequence_t MeasurementTimingConfiguration_v1550_IEs_sequence[] = { { &hf_nr_rrc_campOnFirstSSB, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_BOOLEAN }, { &hf_nr_rrc_psCellOnlyOnFirstSSB, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_BOOLEAN }, - { &hf_nr_rrc_nonCriticalExtension_14, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_MeasurementTimingConfiguration_v1610_IEs }, + { &hf_nr_rrc_nonCriticalExtension_16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_MeasurementTimingConfiguration_v1610_IEs }, { NULL, 0, 0, NULL } }; @@ -14333,7 +14846,7 @@ dissect_nr_rrc_MeasurementTimingConfiguration_v1550_IEs(tvbuff_t *tvb _U_, int o static const per_sequence_t MeasurementTimingConfiguration_IEs_sequence[] = { { &hf_nr_rrc_measTiming , ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_MeasTimingList }, - { &hf_nr_rrc_nonCriticalExtension_13, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_MeasurementTimingConfiguration_v1550_IEs }, + { &hf_nr_rrc_nonCriticalExtension_15, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_MeasurementTimingConfiguration_v1550_IEs }, { NULL, 0, 0, NULL } }; @@ -14452,7 +14965,7 @@ dissect_nr_rrc_T_nonCriticalExtension_05(tvbuff_t *tvb _U_, int offset _U_, asn1 static const per_sequence_t UERadioPagingInformation_IEs_sequence[] = { { &hf_nr_rrc_supportedBandListNRForPaging, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_SEQUENCE_SIZE_1_maxBands_OF_FreqBandIndicatorNR }, - { &hf_nr_rrc_nonCriticalExtension_16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_nonCriticalExtension_05 }, + { &hf_nr_rrc_nonCriticalExtension_18, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_nonCriticalExtension_05 }, { NULL, 0, 0, NULL } }; @@ -14575,7 +15088,7 @@ dissect_nr_rrc_T_nonCriticalExtension_06(tvbuff_t *tvb _U_, int offset _U_, asn1 static const per_sequence_t UERadioAccessCapabilityInformation_IEs_sequence[] = { { &hf_nr_rrc_ue_RadioAccessCapabilityInfo, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_T_ue_RadioAccessCapabilityInfo }, - { &hf_nr_rrc_nonCriticalExtension_17, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_nonCriticalExtension_06 }, + { &hf_nr_rrc_nonCriticalExtension_19, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_nonCriticalExtension_06 }, { NULL, 0, 0, NULL } }; @@ -15756,29 +16269,29 @@ dissect_nr_rrc_SEQUENCE_SIZE_1_maxCAG_Cell_r16_OF_PCI_Range(tvbuff_t *tvb _U_, i } -static const per_sequence_t IntraFreqCAG_CellPerPLMN_r16_sequence[] = { +static const per_sequence_t IntraFreqCAG_CellListPerPLMN_r16_sequence[] = { { &hf_nr_rrc_plmn_IdentityIndex_r16, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_INTEGER_1_maxPLMN }, { &hf_nr_rrc_cag_CellList_r16, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_SEQUENCE_SIZE_1_maxCAG_Cell_r16_OF_PCI_Range }, { NULL, 0, 0, NULL } }; static int -dissect_nr_rrc_IntraFreqCAG_CellPerPLMN_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { +dissect_nr_rrc_IntraFreqCAG_CellListPerPLMN_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { offset = dissect_per_sequence(tvb, offset, actx, tree, hf_index, - ett_nr_rrc_IntraFreqCAG_CellPerPLMN_r16, IntraFreqCAG_CellPerPLMN_r16_sequence); + ett_nr_rrc_IntraFreqCAG_CellListPerPLMN_r16, IntraFreqCAG_CellListPerPLMN_r16_sequence); return offset; } -static const per_sequence_t SEQUENCE_SIZE_1_maxPLMN_OF_IntraFreqCAG_CellPerPLMN_r16_sequence_of[1] = { - { &hf_nr_rrc_intraFreqCAG_CellList_r16_item, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_IntraFreqCAG_CellPerPLMN_r16 }, +static const per_sequence_t SEQUENCE_SIZE_1_maxPLMN_OF_IntraFreqCAG_CellListPerPLMN_r16_sequence_of[1] = { + { &hf_nr_rrc_intraFreqCAG_CellList_r16_item, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_IntraFreqCAG_CellListPerPLMN_r16 }, }; static int -dissect_nr_rrc_SEQUENCE_SIZE_1_maxPLMN_OF_IntraFreqCAG_CellPerPLMN_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { +dissect_nr_rrc_SEQUENCE_SIZE_1_maxPLMN_OF_IntraFreqCAG_CellListPerPLMN_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { offset = dissect_per_constrained_sequence_of(tvb, offset, actx, tree, hf_index, - ett_nr_rrc_SEQUENCE_SIZE_1_maxPLMN_OF_IntraFreqCAG_CellPerPLMN_r16, SEQUENCE_SIZE_1_maxPLMN_OF_IntraFreqCAG_CellPerPLMN_r16_sequence_of, + ett_nr_rrc_SEQUENCE_SIZE_1_maxPLMN_OF_IntraFreqCAG_CellListPerPLMN_r16, SEQUENCE_SIZE_1_maxPLMN_OF_IntraFreqCAG_CellListPerPLMN_r16_sequence_of, 1, maxPLMN, FALSE); return offset; @@ -15788,7 +16301,7 @@ dissect_nr_rrc_SEQUENCE_SIZE_1_maxPLMN_OF_IntraFreqCAG_CellPerPLMN_r16(tvbuff_t static const per_sequence_t SIB3_eag_1_sequence[] = { { &hf_nr_rrc_intraFreqNeighCellList_v1610, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_IntraFreqNeighCellList_v1610 }, { &hf_nr_rrc_intraFreqWhiteCellList_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_IntraFreqWhiteCellList_r16 }, - { &hf_nr_rrc_intraFreqCAG_CellList_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_SEQUENCE_SIZE_1_maxPLMN_OF_IntraFreqCAG_CellPerPLMN_r16 }, + { &hf_nr_rrc_intraFreqCAG_CellList_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_SEQUENCE_SIZE_1_maxPLMN_OF_IntraFreqCAG_CellListPerPLMN_r16 }, { NULL, 0, 0, NULL } }; @@ -15975,29 +16488,29 @@ dissect_nr_rrc_InterFreqWhiteCellList_r16(tvbuff_t *tvb _U_, int offset _U_, asn } -static const per_sequence_t InterFreqCAG_CellList_r16_sequence[] = { +static const per_sequence_t InterFreqCAG_CellListPerPLMN_r16_sequence[] = { { &hf_nr_rrc_plmn_IdentityIndex_r16, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_INTEGER_1_maxPLMN }, { &hf_nr_rrc_cag_CellList_r16, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_SEQUENCE_SIZE_1_maxCAG_Cell_r16_OF_PCI_Range }, { NULL, 0, 0, NULL } }; static int -dissect_nr_rrc_InterFreqCAG_CellList_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { +dissect_nr_rrc_InterFreqCAG_CellListPerPLMN_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { offset = dissect_per_sequence(tvb, offset, actx, tree, hf_index, - ett_nr_rrc_InterFreqCAG_CellList_r16, InterFreqCAG_CellList_r16_sequence); + ett_nr_rrc_InterFreqCAG_CellListPerPLMN_r16, InterFreqCAG_CellListPerPLMN_r16_sequence); return offset; } -static const per_sequence_t SEQUENCE_SIZE_1_maxPLMN_OF_InterFreqCAG_CellList_r16_sequence_of[1] = { - { &hf_nr_rrc_interFreqCAG_CellList_r16_item, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_InterFreqCAG_CellList_r16 }, +static const per_sequence_t SEQUENCE_SIZE_1_maxPLMN_OF_InterFreqCAG_CellListPerPLMN_r16_sequence_of[1] = { + { &hf_nr_rrc_interFreqCAG_CellList_r16_item, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_InterFreqCAG_CellListPerPLMN_r16 }, }; static int -dissect_nr_rrc_SEQUENCE_SIZE_1_maxPLMN_OF_InterFreqCAG_CellList_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { +dissect_nr_rrc_SEQUENCE_SIZE_1_maxPLMN_OF_InterFreqCAG_CellListPerPLMN_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { offset = dissect_per_constrained_sequence_of(tvb, offset, actx, tree, hf_index, - ett_nr_rrc_SEQUENCE_SIZE_1_maxPLMN_OF_InterFreqCAG_CellList_r16, SEQUENCE_SIZE_1_maxPLMN_OF_InterFreqCAG_CellList_r16_sequence_of, + ett_nr_rrc_SEQUENCE_SIZE_1_maxPLMN_OF_InterFreqCAG_CellListPerPLMN_r16, SEQUENCE_SIZE_1_maxPLMN_OF_InterFreqCAG_CellListPerPLMN_r16_sequence_of, 1, maxPLMN, FALSE); return offset; @@ -16009,7 +16522,7 @@ static const per_sequence_t InterFreqCarrierFreqInfo_v1610_sequence[] = { { &hf_nr_rrc_smtc2_LP_r16 , ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_SSB_MTC2_LP_r16 }, { &hf_nr_rrc_interFreqWhiteCellList_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_InterFreqWhiteCellList_r16 }, { &hf_nr_rrc_ssb_PositionQCL_Common_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_SSB_PositionQCL_Relation_r16 }, - { &hf_nr_rrc_interFreqCAG_CellList_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_SEQUENCE_SIZE_1_maxPLMN_OF_InterFreqCAG_CellList_r16 }, + { &hf_nr_rrc_interFreqCAG_CellList_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_SEQUENCE_SIZE_1_maxPLMN_OF_InterFreqCAG_CellListPerPLMN_r16 }, { NULL, 0, 0, NULL } }; @@ -16036,10 +16549,23 @@ dissect_nr_rrc_InterFreqCarrierFreqList_v1610(tvbuff_t *tvb _U_, int offset _U_, } +static const per_sequence_t SIB4_eag_1_sequence[] = { + { &hf_nr_rrc_interFreqCarrierFreqList_v1610, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_InterFreqCarrierFreqList_v1610 }, + { NULL, 0, 0, NULL } +}; + +static int +dissect_nr_rrc_SIB4_eag_1(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_sequence_eag(tvb, offset, actx, tree, SIB4_eag_1_sequence); + + return offset; +} + + static const per_sequence_t SIB4_sequence[] = { { &hf_nr_rrc_interFreqCarrierFreqList, ASN1_EXTENSION_ROOT , ASN1_NOT_OPTIONAL, dissect_nr_rrc_InterFreqCarrierFreqList }, { &hf_nr_rrc_lateNonCriticalExtension, ASN1_EXTENSION_ROOT , ASN1_OPTIONAL , dissect_nr_rrc_OCTET_STRING }, - { &hf_nr_rrc_interFreqCarrierFreqList_v1610, ASN1_NOT_EXTENSION_ROOT, ASN1_OPTIONAL , dissect_nr_rrc_InterFreqCarrierFreqList_v1610 }, + { &dummy_hf_nr_rrc_eag_field, ASN1_NOT_EXTENSION_ROOT, ASN1_NOT_OPTIONAL, dissect_nr_rrc_SIB4_eag_1 }, { NULL, 0, 0, NULL } }; @@ -17520,7 +18046,7 @@ dissect_nr_rrc_T_nonCriticalExtension_38(tvbuff_t *tvb _U_, int offset _U_, asn1 static const per_sequence_t SystemInformation_IEs_sequence[] = { { &hf_nr_rrc_sib_TypeAndInfo, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_T_sib_TypeAndInfo }, { &hf_nr_rrc_lateNonCriticalExtension, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_OCTET_STRING }, - { &hf_nr_rrc_nonCriticalExtension_69, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_nonCriticalExtension_38 }, + { &hf_nr_rrc_nonCriticalExtension_71, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_nonCriticalExtension_38 }, { NULL, 0, 0, NULL } }; @@ -17670,7 +18196,7 @@ dissect_nr_rrc_T_nonCriticalExtension_48(tvbuff_t *tvb _U_, int offset _U_, asn1 static const per_sequence_t PosSystemInformation_r16_IEs_sequence[] = { { &hf_nr_rrc_posSIB_TypeAndInfo_r16, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_T_posSIB_TypeAndInfo_r16 }, { &hf_nr_rrc_lateNonCriticalExtension, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_OCTET_STRING }, - { &hf_nr_rrc_nonCriticalExtension_82, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_nonCriticalExtension_48 }, + { &hf_nr_rrc_nonCriticalExtension_84, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_nonCriticalExtension_48 }, { NULL, 0, 0, NULL } }; @@ -18719,7 +19245,7 @@ dissect_nr_rrc_ControlResourceSetId_v1610(tvbuff_t *tvb _U_, int offset _U_, asn static const per_sequence_t ControlResourceSet_eag_1_sequence[] = { { &hf_nr_rrc_rb_Offset_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_INTEGER_0_5 }, - { &hf_nr_rrc_tci_PresentForDCI_Format1_2_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_INTEGER_1_3 }, + { &hf_nr_rrc_tci_PresentDCI_1_2_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_INTEGER_1_3 }, { &hf_nr_rrc_coresetPoolIndex_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_INTEGER_0_1 }, { &hf_nr_rrc_controlResourceSetId_v1610, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_ControlResourceSetId_v1610 }, { NULL, 0, 0, NULL } @@ -19572,6 +20098,19 @@ dissect_nr_rrc_T_firstPDCCH_MonitoringOccasionOfPO_01(tvbuff_t *tvb _U_, int off } +static const per_sequence_t PDCCH_ConfigCommon_eag_1_sequence[] = { + { &hf_nr_rrc_firstPDCCH_MonitoringOccasionOfPO_01, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_firstPDCCH_MonitoringOccasionOfPO_01 }, + { NULL, 0, 0, NULL } +}; + +static int +dissect_nr_rrc_PDCCH_ConfigCommon_eag_1(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_sequence_eag(tvb, offset, actx, tree, PDCCH_ConfigCommon_eag_1_sequence); + + return offset; +} + + static int dissect_nr_rrc_ControlResourceSetId_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { @@ -19904,15 +20443,14 @@ dissect_nr_rrc_SEQUENCE_SIZE_1_4_OF_SearchSpaceExt_r16(tvbuff_t *tvb _U_, int of } -static const per_sequence_t PDCCH_ConfigCommon_eag_1_sequence[] = { - { &hf_nr_rrc_firstPDCCH_MonitoringOccasionOfPO_01, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_firstPDCCH_MonitoringOccasionOfPO_01 }, +static const per_sequence_t PDCCH_ConfigCommon_eag_2_sequence[] = { { &hf_nr_rrc_commonSearchSpaceListExt_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_SEQUENCE_SIZE_1_4_OF_SearchSpaceExt_r16 }, { NULL, 0, 0, NULL } }; static int -dissect_nr_rrc_PDCCH_ConfigCommon_eag_1(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { - offset = dissect_per_sequence_eag(tvb, offset, actx, tree, PDCCH_ConfigCommon_eag_1_sequence); +dissect_nr_rrc_PDCCH_ConfigCommon_eag_2(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_sequence_eag(tvb, offset, actx, tree, PDCCH_ConfigCommon_eag_2_sequence); return offset; } @@ -19928,6 +20466,7 @@ static const per_sequence_t PDCCH_ConfigCommon_sequence[] = { { &hf_nr_rrc_pagingSearchSpace, ASN1_EXTENSION_ROOT , ASN1_OPTIONAL , dissect_nr_rrc_SearchSpaceId }, { &hf_nr_rrc_ra_SearchSpace, ASN1_EXTENSION_ROOT , ASN1_OPTIONAL , dissect_nr_rrc_SearchSpaceId }, { &dummy_hf_nr_rrc_eag_field, ASN1_NOT_EXTENSION_ROOT, ASN1_NOT_OPTIONAL, dissect_nr_rrc_PDCCH_ConfigCommon_eag_1 }, + { &dummy_hf_nr_rrc_eag_field, ASN1_NOT_EXTENSION_ROOT, ASN1_NOT_OPTIONAL, dissect_nr_rrc_PDCCH_ConfigCommon_eag_2 }, { NULL, 0, 0, NULL } }; @@ -20833,16 +21372,16 @@ dissect_nr_rrc_BIT_STRING_SIZE_2(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t * } -static const per_sequence_t T_ra_PrioritizationForAccessIdentity_sequence[] = { +static const per_sequence_t T_ra_PrioritizationForAccessIdentity_r16_sequence[] = { { &hf_nr_rrc_ra_Prioritization_r16, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_RA_Prioritization }, { &hf_nr_rrc_ra_PrioritizationForAI_r16, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_BIT_STRING_SIZE_2 }, { NULL, 0, 0, NULL } }; static int -dissect_nr_rrc_T_ra_PrioritizationForAccessIdentity(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { +dissect_nr_rrc_T_ra_PrioritizationForAccessIdentity_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { offset = dissect_per_sequence(tvb, offset, actx, tree, hf_index, - ett_nr_rrc_T_ra_PrioritizationForAccessIdentity, T_ra_PrioritizationForAccessIdentity_sequence); + ett_nr_rrc_T_ra_PrioritizationForAccessIdentity_r16, T_ra_PrioritizationForAccessIdentity_r16_sequence); return offset; } @@ -20891,7 +21430,7 @@ dissect_nr_rrc_T_prach_RootSequenceIndex_r16(tvbuff_t *tvb _U_, int offset _U_, static const per_sequence_t RACH_ConfigCommon_eag_1_sequence[] = { - { &hf_nr_rrc_ra_PrioritizationForAccessIdentity, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_ra_PrioritizationForAccessIdentity }, + { &hf_nr_rrc_ra_PrioritizationForAccessIdentity_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_ra_PrioritizationForAccessIdentity_r16 }, { &hf_nr_rrc_prach_RootSequenceIndex_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_prach_RootSequenceIndex_r16 }, { NULL, 0, 0, NULL } }; @@ -21789,8 +22328,8 @@ static const per_sequence_t MsgA_DMRS_Config_r16_sequence[] = { { &hf_nr_rrc_msgA_MaxLength_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_msgA_MaxLength_r16 }, { &hf_nr_rrc_msgA_PUSCH_DMRS_CDM_Group_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_INTEGER_0_1 }, { &hf_nr_rrc_msgA_PUSCH_NrofPorts_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_INTEGER_0_1 }, - { &hf_nr_rrc_msgA_ScramblingID0_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_INTEGER_0_65536 }, - { &hf_nr_rrc_msgA_ScramblingID1_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_INTEGER_0_65536 }, + { &hf_nr_rrc_msgA_ScramblingID0_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_INTEGER_0_65535 }, + { &hf_nr_rrc_msgA_ScramblingID1_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_INTEGER_0_65535 }, { NULL, 0, 0, NULL } }; @@ -23163,7 +23702,7 @@ static const per_sequence_t SIB1_v1610_IEs_sequence[] = { { &hf_nr_rrc_idleModeMeasurementsEUTRA_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_idleModeMeasurementsEUTRA_r16 }, { &hf_nr_rrc_idleModeMeasurementsNR_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_idleModeMeasurementsNR_r16 }, { &hf_nr_rrc_posSI_SchedulingInfo_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_PosSI_SchedulingInfo_r16 }, - { &hf_nr_rrc_nonCriticalExtension_67, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_nonCriticalExtension_36 }, + { &hf_nr_rrc_nonCriticalExtension_69, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_nonCriticalExtension_36 }, { NULL, 0, 0, NULL } }; @@ -23188,7 +23727,7 @@ static const per_sequence_t SIB1_sequence[] = { { &hf_nr_rrc_uac_BarringInfo, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_uac_BarringInfo }, { &hf_nr_rrc_useFullResumeID, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_useFullResumeID }, { &hf_nr_rrc_lateNonCriticalExtension, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_OCTET_STRING }, - { &hf_nr_rrc_nonCriticalExtension_66, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_SIB1_v1610_IEs }, + { &hf_nr_rrc_nonCriticalExtension_68, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_SIB1_v1610_IEs }, { NULL, 0, 0, NULL } }; @@ -23310,7 +23849,7 @@ dissect_nr_rrc_T_nonCriticalExtension_25(tvbuff_t *tvb _U_, int offset _U_, asn1 static const per_sequence_t RRCReject_IEs_sequence[] = { { &hf_nr_rrc_waitTime , ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_RejectWaitTime }, { &hf_nr_rrc_lateNonCriticalExtension, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_OCTET_STRING }, - { &hf_nr_rrc_nonCriticalExtension_47, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_nonCriticalExtension_25 }, + { &hf_nr_rrc_nonCriticalExtension_49, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_nonCriticalExtension_25 }, { NULL, 0, 0, NULL } }; @@ -23952,14 +24491,14 @@ dissect_nr_rrc_T_discardTimerExt_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx } -static const per_sequence_t T_duplicationState_sequence_of[1] = { - { &hf_nr_rrc_duplicationState_item, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_BOOLEAN }, +static const per_sequence_t T_duplicationState_r16_sequence_of[1] = { + { &hf_nr_rrc_duplicationState_r16_item, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_BOOLEAN }, }; static int -dissect_nr_rrc_T_duplicationState(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { +dissect_nr_rrc_T_duplicationState_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { offset = dissect_per_constrained_sequence_of(tvb, offset, actx, tree, hf_index, - ett_nr_rrc_T_duplicationState, T_duplicationState_sequence_of, + ett_nr_rrc_T_duplicationState_r16, T_duplicationState_r16_sequence_of, 3, 3, FALSE); return offset; @@ -23967,8 +24506,8 @@ dissect_nr_rrc_T_duplicationState(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t static const per_sequence_t T_moreThanTwoRLC_DRB_r16_sequence[] = { - { &hf_nr_rrc_splitSecondaryPath, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_LogicalChannelIdentity }, - { &hf_nr_rrc_duplicationState, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_duplicationState }, + { &hf_nr_rrc_splitSecondaryPath_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_LogicalChannelIdentity }, + { &hf_nr_rrc_duplicationState_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_duplicationState_r16 }, { NULL, 0, 0, NULL } }; @@ -23981,7 +24520,7 @@ dissect_nr_rrc_T_moreThanTwoRLC_DRB_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ } -static const value_string nr_rrc_T_ehc_CID_Length_vals[] = { +static const value_string nr_rrc_T_ehc_CID_Length_r16_vals[] = { { 0, "bits7" }, { 1, "bits15" }, { 0, NULL } @@ -23989,7 +24528,7 @@ static const value_string nr_rrc_T_ehc_CID_Length_vals[] = { static int -dissect_nr_rrc_T_ehc_CID_Length(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { +dissect_nr_rrc_T_ehc_CID_Length_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, 2, NULL, FALSE, 0, NULL); @@ -23997,28 +24536,28 @@ dissect_nr_rrc_T_ehc_CID_Length(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *a } -static const per_sequence_t T_ehc_Common_sequence[] = { - { &hf_nr_rrc_ehc_CID_Length, ASN1_EXTENSION_ROOT , ASN1_NOT_OPTIONAL, dissect_nr_rrc_T_ehc_CID_Length }, +static const per_sequence_t T_ehc_Common_r16_sequence[] = { + { &hf_nr_rrc_ehc_CID_Length_r16, ASN1_EXTENSION_ROOT , ASN1_NOT_OPTIONAL, dissect_nr_rrc_T_ehc_CID_Length_r16 }, { NULL, 0, 0, NULL } }; static int -dissect_nr_rrc_T_ehc_Common(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { +dissect_nr_rrc_T_ehc_Common_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { offset = dissect_per_sequence(tvb, offset, actx, tree, hf_index, - ett_nr_rrc_T_ehc_Common, T_ehc_Common_sequence); + ett_nr_rrc_T_ehc_Common_r16, T_ehc_Common_r16_sequence); return offset; } -static const value_string nr_rrc_T_drb_ContinueEHC_DL_vals[] = { +static const value_string nr_rrc_T_drb_ContinueEHC_DL_r16_vals[] = { { 0, "true" }, { 0, NULL } }; static int -dissect_nr_rrc_T_drb_ContinueEHC_DL(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { +dissect_nr_rrc_T_drb_ContinueEHC_DL_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, 1, NULL, FALSE, 0, NULL); @@ -24026,15 +24565,15 @@ dissect_nr_rrc_T_drb_ContinueEHC_DL(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_ } -static const per_sequence_t T_ehc_Downlink_sequence[] = { - { &hf_nr_rrc_drb_ContinueEHC_DL, ASN1_EXTENSION_ROOT , ASN1_OPTIONAL , dissect_nr_rrc_T_drb_ContinueEHC_DL }, +static const per_sequence_t T_ehc_Downlink_r16_sequence[] = { + { &hf_nr_rrc_drb_ContinueEHC_DL_r16, ASN1_EXTENSION_ROOT , ASN1_OPTIONAL , dissect_nr_rrc_T_drb_ContinueEHC_DL_r16 }, { NULL, 0, 0, NULL } }; static int -dissect_nr_rrc_T_ehc_Downlink(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { +dissect_nr_rrc_T_ehc_Downlink_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { offset = dissect_per_sequence(tvb, offset, actx, tree, hf_index, - ett_nr_rrc_T_ehc_Downlink, T_ehc_Downlink_sequence); + ett_nr_rrc_T_ehc_Downlink_r16, T_ehc_Downlink_r16_sequence); return offset; } @@ -24050,14 +24589,14 @@ dissect_nr_rrc_INTEGER_1_32767(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *ac } -static const value_string nr_rrc_T_drb_ContinueEHC_UL_vals[] = { +static const value_string nr_rrc_T_drb_ContinueEHC_UL_r16_vals[] = { { 0, "true" }, { 0, NULL } }; static int -dissect_nr_rrc_T_drb_ContinueEHC_UL(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { +dissect_nr_rrc_T_drb_ContinueEHC_UL_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, 1, NULL, FALSE, 0, NULL); @@ -24065,25 +24604,25 @@ dissect_nr_rrc_T_drb_ContinueEHC_UL(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_ } -static const per_sequence_t T_ehc_Uplink_sequence[] = { - { &hf_nr_rrc_maxCID_EHC_UL, ASN1_EXTENSION_ROOT , ASN1_NOT_OPTIONAL, dissect_nr_rrc_INTEGER_1_32767 }, - { &hf_nr_rrc_drb_ContinueEHC_UL, ASN1_EXTENSION_ROOT , ASN1_OPTIONAL , dissect_nr_rrc_T_drb_ContinueEHC_UL }, +static const per_sequence_t T_ehc_Uplink_r16_sequence[] = { + { &hf_nr_rrc_maxCID_EHC_UL_r16, ASN1_EXTENSION_ROOT , ASN1_NOT_OPTIONAL, dissect_nr_rrc_INTEGER_1_32767 }, + { &hf_nr_rrc_drb_ContinueEHC_UL_r16, ASN1_EXTENSION_ROOT , ASN1_OPTIONAL , dissect_nr_rrc_T_drb_ContinueEHC_UL_r16 }, { NULL, 0, 0, NULL } }; static int -dissect_nr_rrc_T_ehc_Uplink(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { +dissect_nr_rrc_T_ehc_Uplink_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { offset = dissect_per_sequence(tvb, offset, actx, tree, hf_index, - ett_nr_rrc_T_ehc_Uplink, T_ehc_Uplink_sequence); + ett_nr_rrc_T_ehc_Uplink_r16, T_ehc_Uplink_r16_sequence); return offset; } static const per_sequence_t EthernetHeaderCompression_r16_sequence[] = { - { &hf_nr_rrc_ehc_Common , ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_T_ehc_Common }, - { &hf_nr_rrc_ehc_Downlink , ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_ehc_Downlink }, - { &hf_nr_rrc_ehc_Uplink , ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_ehc_Uplink }, + { &hf_nr_rrc_ehc_Common_r16, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_T_ehc_Common_r16 }, + { &hf_nr_rrc_ehc_Downlink_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_ehc_Downlink_r16 }, + { &hf_nr_rrc_ehc_Uplink_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_ehc_Uplink_r16 }, { NULL, 0, 0, NULL } }; @@ -24574,7 +25113,7 @@ static const per_sequence_t RRCSetup_IEs_sequence[] = { { &hf_nr_rrc_radioBearerConfig, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_RadioBearerConfig }, { &hf_nr_rrc_masterCellGroup_02, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_T_masterCellGroup_02 }, { &hf_nr_rrc_lateNonCriticalExtension, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_OCTET_STRING }, - { &hf_nr_rrc_nonCriticalExtension_56, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_nonCriticalExtension_29 }, + { &hf_nr_rrc_nonCriticalExtension_58, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_nonCriticalExtension_29 }, { NULL, 0, 0, NULL } }; @@ -26198,6 +26737,8 @@ dissect_nr_rrc_SRS_Resource(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx static const per_sequence_t SRS_ResourceConfigCLI_r16_sequence[] = { { &hf_nr_rrc_srs_Resource_r16, ASN1_EXTENSION_ROOT , ASN1_NOT_OPTIONAL, dissect_nr_rrc_SRS_Resource }, { &hf_nr_rrc_srs_SCS_r16 , ASN1_EXTENSION_ROOT , ASN1_NOT_OPTIONAL, dissect_nr_rrc_SubcarrierSpacing }, + { &hf_nr_rrc_refServCellIndex_r16, ASN1_EXTENSION_ROOT , ASN1_OPTIONAL , dissect_nr_rrc_ServCellIndex }, + { &hf_nr_rrc_refBWP_r16 , ASN1_EXTENSION_ROOT , ASN1_NOT_OPTIONAL, dissect_nr_rrc_BWP_Id }, { NULL, 0, 0, NULL } }; @@ -26316,6 +26857,7 @@ static const per_sequence_t RSSI_ResourceConfigCLI_r16_sequence[] = { { &hf_nr_rrc_startPosition_r16, ASN1_EXTENSION_ROOT , ASN1_NOT_OPTIONAL, dissect_nr_rrc_INTEGER_0_13 }, { &hf_nr_rrc_nrofSymbols_r16, ASN1_EXTENSION_ROOT , ASN1_NOT_OPTIONAL, dissect_nr_rrc_INTEGER_1_14 }, { &hf_nr_rrc_rssi_PeriodicityAndOffset_r16, ASN1_EXTENSION_ROOT , ASN1_NOT_OPTIONAL, dissect_nr_rrc_RSSI_PeriodicityAndOffset_r16 }, + { &hf_nr_rrc_refServCellIndex_r16, ASN1_EXTENSION_ROOT , ASN1_OPTIONAL , dissect_nr_rrc_ServCellIndex }, { NULL, 0, 0, NULL } }; @@ -26816,7 +27358,7 @@ static const value_string nr_rrc_T_ul_DelayValueConfig_r16_vals[] = { static const per_choice_t T_ul_DelayValueConfig_r16_choice[] = { { 0, &hf_nr_rrc_release , ASN1_NO_EXTENSIONS , dissect_nr_rrc_NULL }, - { 1, &hf_nr_rrc_setup_95 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_UL_DelayValueConfig_r16 }, + { 1, &hf_nr_rrc_setup_96 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_UL_DelayValueConfig_r16 }, { 0, NULL, 0, NULL } }; @@ -28996,7 +29538,7 @@ static const value_string nr_rrc_T_delayBudgetReportingConfig_vals[] = { static const per_choice_t T_delayBudgetReportingConfig_choice[] = { { 0, &hf_nr_rrc_release , ASN1_NO_EXTENSIONS , dissect_nr_rrc_NULL }, - { 1, &hf_nr_rrc_setup_109 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_T_setup }, + { 1, &hf_nr_rrc_setup_110 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_T_setup }, { 0, NULL, 0, NULL } }; @@ -29076,7 +29618,7 @@ static const value_string nr_rrc_T_overheatingAssistanceConfig_vals[] = { static const per_choice_t T_overheatingAssistanceConfig_choice[] = { { 0, &hf_nr_rrc_release , ASN1_NO_EXTENSIONS , dissect_nr_rrc_NULL }, - { 1, &hf_nr_rrc_setup_110 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_OverheatingAssistanceConfig }, + { 1, &hf_nr_rrc_setup_111 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_OverheatingAssistanceConfig }, { 0, NULL, 0, NULL } }; @@ -29262,7 +29804,7 @@ static const value_string nr_rrc_T_idc_AssistanceConfig_r16_vals[] = { static const per_choice_t T_idc_AssistanceConfig_r16_choice[] = { { 0, &hf_nr_rrc_release , ASN1_NO_EXTENSIONS , dissect_nr_rrc_NULL }, - { 1, &hf_nr_rrc_setup_111 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_IDC_AssistanceConfig_r16 }, + { 1, &hf_nr_rrc_setup_112 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_IDC_AssistanceConfig_r16 }, { 0, NULL, 0, NULL } }; @@ -29328,7 +29870,7 @@ static const value_string nr_rrc_T_drx_PreferenceConfig_r16_vals[] = { static const per_choice_t T_drx_PreferenceConfig_r16_choice[] = { { 0, &hf_nr_rrc_release , ASN1_NO_EXTENSIONS , dissect_nr_rrc_NULL }, - { 1, &hf_nr_rrc_setup_112 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_DRX_PreferenceConfig_r16 }, + { 1, &hf_nr_rrc_setup_113 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_DRX_PreferenceConfig_r16 }, { 0, NULL, 0, NULL } }; @@ -29394,7 +29936,7 @@ static const value_string nr_rrc_T_maxBW_PreferenceConfig_r16_vals[] = { static const per_choice_t T_maxBW_PreferenceConfig_r16_choice[] = { { 0, &hf_nr_rrc_release , ASN1_NO_EXTENSIONS , dissect_nr_rrc_NULL }, - { 1, &hf_nr_rrc_setup_113 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_MaxBW_PreferenceConfig_r16 }, + { 1, &hf_nr_rrc_setup_114 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_MaxBW_PreferenceConfig_r16 }, { 0, NULL, 0, NULL } }; @@ -29460,7 +30002,7 @@ static const value_string nr_rrc_T_maxCC_PreferenceConfig_r16_vals[] = { static const per_choice_t T_maxCC_PreferenceConfig_r16_choice[] = { { 0, &hf_nr_rrc_release , ASN1_NO_EXTENSIONS , dissect_nr_rrc_NULL }, - { 1, &hf_nr_rrc_setup_114 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_MaxCC_PreferenceConfig_r16 }, + { 1, &hf_nr_rrc_setup_115 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_MaxCC_PreferenceConfig_r16 }, { 0, NULL, 0, NULL } }; @@ -29526,7 +30068,7 @@ static const value_string nr_rrc_T_maxMIMO_LayerPreferenceConfig_r16_vals[] = { static const per_choice_t T_maxMIMO_LayerPreferenceConfig_r16_choice[] = { { 0, &hf_nr_rrc_release , ASN1_NO_EXTENSIONS , dissect_nr_rrc_NULL }, - { 1, &hf_nr_rrc_setup_115 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_MaxMIMO_LayerPreferenceConfig_r16 }, + { 1, &hf_nr_rrc_setup_116 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_MaxMIMO_LayerPreferenceConfig_r16 }, { 0, NULL, 0, NULL } }; @@ -29592,7 +30134,7 @@ static const value_string nr_rrc_T_minSchedulingOffsetPreferenceConfig_r16_vals[ static const per_choice_t T_minSchedulingOffsetPreferenceConfig_r16_choice[] = { { 0, &hf_nr_rrc_release , ASN1_NO_EXTENSIONS , dissect_nr_rrc_NULL }, - { 1, &hf_nr_rrc_setup_116 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_MinSchedulingOffsetPreferenceConfig_r16 }, + { 1, &hf_nr_rrc_setup_117 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_MinSchedulingOffsetPreferenceConfig_r16 }, { 0, NULL, 0, NULL } }; @@ -29674,7 +30216,7 @@ static const value_string nr_rrc_T_releasePreferenceConfig_r16_vals[] = { static const per_choice_t T_releasePreferenceConfig_r16_choice[] = { { 0, &hf_nr_rrc_release , ASN1_NO_EXTENSIONS , dissect_nr_rrc_NULL }, - { 1, &hf_nr_rrc_setup_117 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_ReleasePreferenceConfig_r16 }, + { 1, &hf_nr_rrc_setup_118 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_ReleasePreferenceConfig_r16 }, { 0, NULL, 0, NULL } }; @@ -29835,16 +30377,16 @@ dissect_nr_rrc_BIT_STRING_SIZE_10(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t } -static const per_sequence_t BAP_Routing_ID_r16_sequence[] = { +static const per_sequence_t BAP_RoutingID_r16_sequence[] = { { &hf_nr_rrc_bap_Address_r16, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_BIT_STRING_SIZE_10 }, { &hf_nr_rrc_bap_PathId_r16, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_BIT_STRING_SIZE_10 }, { NULL, 0, 0, NULL } }; static int -dissect_nr_rrc_BAP_Routing_ID_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { +dissect_nr_rrc_BAP_RoutingID_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { offset = dissect_per_sequence(tvb, offset, actx, tree, hf_index, - ett_nr_rrc_BAP_Routing_ID_r16, BAP_Routing_ID_r16_sequence); + ett_nr_rrc_BAP_RoutingID_r16, BAP_RoutingID_r16_sequence); return offset; } @@ -29879,7 +30421,7 @@ dissect_nr_rrc_T_flowControlFeedbackType_r16(tvbuff_t *tvb _U_, int offset _U_, static const per_sequence_t BAP_Config_r16_sequence[] = { { &hf_nr_rrc_bap_Address_r16, ASN1_EXTENSION_ROOT , ASN1_OPTIONAL , dissect_nr_rrc_BIT_STRING_SIZE_10 }, - { &hf_nr_rrc_defaultUL_BAProutingID_r16, ASN1_EXTENSION_ROOT , ASN1_OPTIONAL , dissect_nr_rrc_BAP_Routing_ID_r16 }, + { &hf_nr_rrc_defaultUL_BAP_RoutingID_r16, ASN1_EXTENSION_ROOT , ASN1_OPTIONAL , dissect_nr_rrc_BAP_RoutingID_r16 }, { &hf_nr_rrc_defaultUL_BH_RLC_Channel_r16, ASN1_EXTENSION_ROOT , ASN1_OPTIONAL , dissect_nr_rrc_BH_RLC_ChannelID_r16 }, { &hf_nr_rrc_flowControlFeedbackType_r16, ASN1_EXTENSION_ROOT , ASN1_OPTIONAL , dissect_nr_rrc_T_flowControlFeedbackType_r16 }, { NULL, 0, 0, NULL } @@ -30436,35 +30978,6 @@ dissect_nr_rrc_MAC_MainConfigSL_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_ } -static const value_string nr_rrc_T_sl_DCI_ToSL_Trans_r16_vals[] = { - { 0, "ffs" }, - { 0, NULL } -}; - - -static int -dissect_nr_rrc_T_sl_DCI_ToSL_Trans_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { - offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, - 1, NULL, FALSE, 0, NULL); - - return offset; -} - - -static const per_sequence_t SL_TimingConfig_r16_sequence[] = { - { &hf_nr_rrc_sl_DCI_ToSL_Trans_r16, ASN1_EXTENSION_ROOT , ASN1_OPTIONAL , dissect_nr_rrc_T_sl_DCI_ToSL_Trans_r16 }, - { NULL, 0, 0, NULL } -}; - -static int -dissect_nr_rrc_SL_TimingConfig_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { - offset = dissect_per_sequence(tvb, offset, actx, tree, hf_index, - ett_nr_rrc_SL_TimingConfig_r16, SL_TimingConfig_r16_sequence); - - return offset; -} - - static const per_sequence_t T_sl_PSFCH_ToPUCCH_r16_sequence_of[1] = { { &hf_nr_rrc_sl_PSFCH_ToPUCCH_r16_item, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_INTEGER_0_15 }, }; @@ -30504,17 +31017,22 @@ dissect_nr_rrc_SEQUENCE_SIZE_1_maxNrofCG_SL_r16_OF_SL_ConfigIndexCG_r16(tvbuff_t static const value_string nr_rrc_T_sl_PeriodCG1_r16_vals[] = { - { 0, "ms0" }, - { 1, "ms100" }, - { 2, "ms200" }, - { 3, "ms300" }, - { 4, "ms400" }, - { 5, "ms500" }, - { 6, "ms600" }, - { 7, "ms700" }, - { 8, "ms800" }, - { 9, "ms900" }, - { 10, "ms1000" }, + { 0, "ms100" }, + { 1, "ms200" }, + { 2, "ms300" }, + { 3, "ms400" }, + { 4, "ms500" }, + { 5, "ms600" }, + { 6, "ms700" }, + { 7, "ms800" }, + { 8, "ms900" }, + { 9, "ms1000" }, + { 10, "spare6" }, + { 11, "spare5" }, + { 12, "spare4" }, + { 13, "spare3" }, + { 14, "spare2" }, + { 15, "spare1" }, { 0, NULL } }; @@ -30522,7 +31040,7 @@ static const value_string nr_rrc_T_sl_PeriodCG1_r16_vals[] = { static int dissect_nr_rrc_T_sl_PeriodCG1_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, - 11, NULL, FALSE, 0, NULL); + 16, NULL, FALSE, 0, NULL); return offset; } @@ -30639,20 +31157,37 @@ dissect_nr_rrc_PUCCH_ResourceId(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *a } -static const per_sequence_t T_rrc_ConfiguredSidelinkGrant_sequence[] = { +static const value_string nr_rrc_T_sl_TimeReferenceSFN_Type1_r16_vals[] = { + { 0, "sfn512" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_sl_TimeReferenceSFN_Type1_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 1, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const per_sequence_t T_rrc_ConfiguredSidelinkGrant_r16_sequence[] = { { &hf_nr_rrc_sl_TimeResourceCG_Type1_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_INTEGER_0_496 }, { &hf_nr_rrc_sl_StartSubchannelCG_Type1_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_INTEGER_0_26 }, { &hf_nr_rrc_sl_FreqResourceCG_Type1_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_INTEGER_0_6929 }, { &hf_nr_rrc_sl_TimeOffsetCG_Type1_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_INTEGER_0_7999 }, { &hf_nr_rrc_sl_N1PUCCH_AN_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_PUCCH_ResourceId }, { &hf_nr_rrc_sl_PSFCH_ToPUCCH_CG_Type1_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_INTEGER_0_15 }, + { &hf_nr_rrc_sl_ResourcePoolID_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_SL_ResourcePoolID_r16 }, + { &hf_nr_rrc_sl_TimeReferenceSFN_Type1_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_sl_TimeReferenceSFN_Type1_r16 }, { NULL, 0, 0, NULL } }; static int -dissect_nr_rrc_T_rrc_ConfiguredSidelinkGrant(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { +dissect_nr_rrc_T_rrc_ConfiguredSidelinkGrant_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { offset = dissect_per_sequence(tvb, offset, actx, tree, hf_index, - ett_nr_rrc_T_rrc_ConfiguredSidelinkGrant, T_rrc_ConfiguredSidelinkGrant_sequence); + ett_nr_rrc_T_rrc_ConfiguredSidelinkGrant_r16, T_rrc_ConfiguredSidelinkGrant_r16_sequence); return offset; } @@ -30664,7 +31199,7 @@ static const per_sequence_t SL_ConfiguredGrantConfig_r16_sequence[] = { { &hf_nr_rrc_sl_NrOfHARQ_Processes_r16, ASN1_EXTENSION_ROOT , ASN1_OPTIONAL , dissect_nr_rrc_INTEGER_1_16 }, { &hf_nr_rrc_sl_HARQ_ProcID_offset_r16, ASN1_EXTENSION_ROOT , ASN1_OPTIONAL , dissect_nr_rrc_INTEGER_1_16 }, { &hf_nr_rrc_sl_CG_MaxTransNumList_r16, ASN1_EXTENSION_ROOT , ASN1_OPTIONAL , dissect_nr_rrc_SL_CG_MaxTransNumList_r16 }, - { &hf_nr_rrc_rrc_ConfiguredSidelinkGrant, ASN1_EXTENSION_ROOT , ASN1_OPTIONAL , dissect_nr_rrc_T_rrc_ConfiguredSidelinkGrant }, + { &hf_nr_rrc_rrc_ConfiguredSidelinkGrant_r16, ASN1_EXTENSION_ROOT , ASN1_OPTIONAL , dissect_nr_rrc_T_rrc_ConfiguredSidelinkGrant_r16 }, { NULL, 0, 0, NULL } }; @@ -30709,7 +31244,6 @@ dissect_nr_rrc_SL_ConfiguredGrantConfigList_r16(tvbuff_t *tvb _U_, int offset _U static const per_sequence_t SL_ScheduledConfig_r16_sequence[] = { { &hf_nr_rrc_sl_RNTI_r16 , ASN1_EXTENSION_ROOT , ASN1_NOT_OPTIONAL, dissect_nr_rrc_RNTI_Value }, { &hf_nr_rrc_mac_MainConfigSL_r16, ASN1_EXTENSION_ROOT , ASN1_OPTIONAL , dissect_nr_rrc_MAC_MainConfigSL_r16 }, - { &hf_nr_rrc_sl_Timing_Config_r16, ASN1_EXTENSION_ROOT , ASN1_OPTIONAL , dissect_nr_rrc_SL_TimingConfig_r16 }, { &hf_nr_rrc_sl_CS_RNTI_r16, ASN1_EXTENSION_ROOT , ASN1_OPTIONAL , dissect_nr_rrc_RNTI_Value }, { &hf_nr_rrc_sl_PSFCH_ToPUCCH_r16, ASN1_EXTENSION_ROOT , ASN1_OPTIONAL , dissect_nr_rrc_T_sl_PSFCH_ToPUCCH_r16 }, { &hf_nr_rrc_sl_ConfiguredGrantConfigList_r16, ASN1_EXTENSION_ROOT , ASN1_OPTIONAL , dissect_nr_rrc_SL_ConfiguredGrantConfigList_r16 }, @@ -30733,7 +31267,7 @@ static const value_string nr_rrc_T_sl_ScheduledConfig_r16_vals[] = { static const per_choice_t T_sl_ScheduledConfig_r16_choice[] = { { 0, &hf_nr_rrc_release , ASN1_NO_EXTENSIONS , dissect_nr_rrc_NULL }, - { 1, &hf_nr_rrc_setup_119 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_SL_ScheduledConfig_r16 }, + { 1, &hf_nr_rrc_setup_120 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_SL_ScheduledConfig_r16 }, { 0, NULL, 0, NULL } }; @@ -31029,7 +31563,7 @@ static const value_string nr_rrc_T_sl_UE_SelectedConfig_r16_vals[] = { static const per_choice_t T_sl_UE_SelectedConfig_r16_choice[] = { { 0, &hf_nr_rrc_release , ASN1_NO_EXTENSIONS , dissect_nr_rrc_NULL }, - { 1, &hf_nr_rrc_setup_120 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_SL_UE_SelectedConfig_r16 }, + { 1, &hf_nr_rrc_setup_121 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_SL_UE_SelectedConfig_r16 }, { 0, NULL, 0, NULL } }; @@ -31205,7 +31739,7 @@ static const value_string nr_rrc_T_sl_PSBCH_Config_r16_vals[] = { static const per_choice_t T_sl_PSBCH_Config_r16_choice[] = { { 0, &hf_nr_rrc_release , ASN1_NO_EXTENSIONS , dissect_nr_rrc_NULL }, - { 1, &hf_nr_rrc_setup_118 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_SL_PSBCH_Config_r16 }, + { 1, &hf_nr_rrc_setup_119 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_SL_PSBCH_Config_r16 }, { 0, NULL, 0, NULL } }; @@ -31307,7 +31841,7 @@ static const value_string nr_rrc_T_sl_PSCCH_Config_r16_vals[] = { static const per_choice_t T_sl_PSCCH_Config_r16_choice[] = { { 0, &hf_nr_rrc_release , ASN1_NO_EXTENSIONS , dissect_nr_rrc_NULL }, - { 1, &hf_nr_rrc_setup_122 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_SL_PSCCH_Config_r16 }, + { 1, &hf_nr_rrc_setup_123 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_SL_PSCCH_Config_r16 }, { 0, NULL, 0, NULL } }; @@ -31401,7 +31935,7 @@ static const value_string nr_rrc_T_sl_PSSCH_Config_r16_vals[] = { static const per_choice_t T_sl_PSSCH_Config_r16_choice[] = { { 0, &hf_nr_rrc_release , ASN1_NO_EXTENSIONS , dissect_nr_rrc_NULL }, - { 1, &hf_nr_rrc_setup_123 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_SL_PSSCH_Config_r16 }, + { 1, &hf_nr_rrc_setup_124 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_SL_PSSCH_Config_r16 }, { 0, NULL, 0, NULL } }; @@ -31520,7 +32054,7 @@ static const value_string nr_rrc_T_sl_PSFCH_Config_r16_vals[] = { static const per_choice_t T_sl_PSFCH_Config_r16_choice[] = { { 0, &hf_nr_rrc_release , ASN1_NO_EXTENSIONS , dissect_nr_rrc_NULL }, - { 1, &hf_nr_rrc_setup_124 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_SL_PSFCH_Config_r16 }, + { 1, &hf_nr_rrc_setup_125 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_SL_PSFCH_Config_r16 }, { 0, NULL, 0, NULL } }; @@ -32107,14 +32641,15 @@ static const value_string nr_rrc_T_sl_TransRange_r16_01_vals[] = { { 20, "m600" }, { 21, "m700" }, { 22, "m1000" }, - { 23, "spare8" }, - { 24, "spare7" }, - { 25, "spare6" }, - { 26, "spare5" }, - { 27, "spare4" }, - { 28, "spare3" }, - { 29, "spare2" }, - { 30, "spare1" }, + { 23, "spare9" }, + { 24, "spare8" }, + { 25, "spare7" }, + { 26, "spare6" }, + { 27, "spare5" }, + { 28, "spare4" }, + { 29, "spare3" }, + { 30, "spare2" }, + { 31, "spare1" }, { 0, NULL } }; @@ -32124,7 +32659,7 @@ static value_string_ext nr_rrc_T_sl_TransRange_r16_01_vals_ext = VALUE_STRING_EX static int dissect_nr_rrc_T_sl_TransRange_r16_01(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, - 31, NULL, FALSE, 0, NULL); + 32, NULL, FALSE, 0, NULL); return offset; } @@ -32636,7 +33171,7 @@ static const value_string nr_rrc_T_sl_NumSSB_WithinPeriod_r16_vals[] = { { 0, "n1" }, { 1, "n2" }, { 2, "n4" }, - { 3, "n5" }, + { 3, "n8" }, { 4, "n16" }, { 5, "n32" }, { 6, "n64" }, @@ -33444,7 +33979,7 @@ static const value_string nr_rrc_T_sl_CSI_SchedulingRequestId_r16_vals[] = { static const per_choice_t T_sl_CSI_SchedulingRequestId_r16_choice[] = { { 0, &hf_nr_rrc_release , ASN1_NO_EXTENSIONS , dissect_nr_rrc_NULL }, - { 1, &hf_nr_rrc_setup_121 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_SchedulingRequestId }, + { 1, &hf_nr_rrc_setup_122 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_SchedulingRequestId }, { 0, NULL, 0, NULL } }; @@ -34037,7 +34572,7 @@ static const value_string nr_rrc_SL_MeasReportQuantity_r16_vals[] = { }; static const per_choice_t SL_MeasReportQuantity_r16_choice[] = { - { 0, &hf_nr_rrc_sl_RSRP_r16 , ASN1_EXTENSION_ROOT , dissect_nr_rrc_RSRP_Range }, + { 0, &hf_nr_rrc_sl_RSRP_r16 , ASN1_EXTENSION_ROOT , dissect_nr_rrc_BOOLEAN }, { 0, NULL, 0, NULL } }; @@ -34092,7 +34627,7 @@ static const value_string nr_rrc_SL_MeasTriggerQuantity_r16_vals[] = { }; static const per_choice_t SL_MeasTriggerQuantity_r16_choice[] = { - { 0, &hf_nr_rrc_sl_RSRP_r16 , ASN1_EXTENSION_ROOT , dissect_nr_rrc_RSRP_Range }, + { 0, &hf_nr_rrc_sl_RSRP_r16_01, ASN1_EXTENSION_ROOT , dissect_nr_rrc_RSRP_Range }, { 0, NULL, 0, NULL } }; @@ -34575,7 +35110,8 @@ static const per_sequence_t RRCReconfiguration_v1610_IEs_sequence[] = { { &hf_nr_rrc_dedicatedPosSysInfoDelivery_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_dedicatedPosSysInfoDelivery_r16 }, { &hf_nr_rrc_sl_ConfigDedicatedNR_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_sl_ConfigDedicatedNR_r16 }, { &hf_nr_rrc_sl_ConfigDedicatedEUTRA_Info_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_sl_ConfigDedicatedEUTRA_Info_r16 }, - { &hf_nr_rrc_nonCriticalExtension_42, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_nonCriticalExtension_23 }, + { &hf_nr_rrc_smtc_r16 , ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_SSB_MTC }, + { &hf_nr_rrc_nonCriticalExtension_44, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_nonCriticalExtension_23 }, { NULL, 0, 0, NULL } }; @@ -34592,7 +35128,7 @@ static const per_sequence_t RRCReconfiguration_v1560_IEs_sequence[] = { { &hf_nr_rrc_mrdc_SecondaryCellGroupConfig, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_mrdc_SecondaryCellGroupConfig }, { &hf_nr_rrc_radioBearerConfig2, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_radioBearerConfig2 }, { &hf_nr_rrc_sk_Counter , ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_SK_Counter }, - { &hf_nr_rrc_nonCriticalExtension_41, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_RRCReconfiguration_v1610_IEs }, + { &hf_nr_rrc_nonCriticalExtension_43, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_RRCReconfiguration_v1610_IEs }, { NULL, 0, 0, NULL } }; @@ -34607,7 +35143,7 @@ dissect_nr_rrc_RRCReconfiguration_v1560_IEs(tvbuff_t *tvb _U_, int offset _U_, a static const per_sequence_t RRCReconfiguration_v1540_IEs_sequence[] = { { &hf_nr_rrc_otherConfig_v1540, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_OtherConfig_v1540 }, - { &hf_nr_rrc_nonCriticalExtension_40, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_RRCReconfiguration_v1560_IEs }, + { &hf_nr_rrc_nonCriticalExtension_42, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_RRCReconfiguration_v1560_IEs }, { NULL, 0, 0, NULL } }; @@ -34628,7 +35164,7 @@ static const per_sequence_t RRCReconfiguration_v1530_IEs_sequence[] = { { &hf_nr_rrc_dedicatedSIB1_Delivery, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_dedicatedSIB1_Delivery }, { &hf_nr_rrc_dedicatedSystemInformationDelivery, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_dedicatedSystemInformationDelivery }, { &hf_nr_rrc_otherConfig , ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_OtherConfig }, - { &hf_nr_rrc_nonCriticalExtension_39, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_RRCReconfiguration_v1540_IEs }, + { &hf_nr_rrc_nonCriticalExtension_41, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_RRCReconfiguration_v1540_IEs }, { NULL, 0, 0, NULL } }; @@ -34646,7 +35182,7 @@ static const per_sequence_t RRCReconfiguration_IEs_sequence[] = { { &hf_nr_rrc_secondaryCellGroup, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_secondaryCellGroup }, { &hf_nr_rrc_measConfig , ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_MeasConfig }, { &hf_nr_rrc_lateNonCriticalExtension, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_OCTET_STRING }, - { &hf_nr_rrc_nonCriticalExtension_38, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_RRCReconfiguration_v1530_IEs }, + { &hf_nr_rrc_nonCriticalExtension_40, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_RRCReconfiguration_v1530_IEs }, { NULL, 0, 0, NULL } }; @@ -34884,7 +35420,7 @@ static const per_sequence_t RRCResume_v1610_IEs_sequence[] = { { &hf_nr_rrc_restoreSCG_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_restoreSCG_r16 }, { &hf_nr_rrc_mrdc_SecondaryCellGroup_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_mrdc_SecondaryCellGroup_r16 }, { &hf_nr_rrc_needForGapsConfigNR_r16_01, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_needForGapsConfigNR_r16_01 }, - { &hf_nr_rrc_nonCriticalExtension_53, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_nonCriticalExtension_27 }, + { &hf_nr_rrc_nonCriticalExtension_55, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_nonCriticalExtension_27 }, { NULL, 0, 0, NULL } }; @@ -34900,7 +35436,7 @@ dissect_nr_rrc_RRCResume_v1610_IEs(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t static const per_sequence_t RRCResume_v1560_IEs_sequence[] = { { &hf_nr_rrc_radioBearerConfig2_01, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_radioBearerConfig2_01 }, { &hf_nr_rrc_sk_Counter , ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_SK_Counter }, - { &hf_nr_rrc_nonCriticalExtension_52, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_RRCResume_v1610_IEs }, + { &hf_nr_rrc_nonCriticalExtension_54, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_RRCResume_v1610_IEs }, { NULL, 0, 0, NULL } }; @@ -34919,7 +35455,7 @@ static const per_sequence_t RRCResume_IEs_sequence[] = { { &hf_nr_rrc_measConfig , ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_MeasConfig }, { &hf_nr_rrc_fullConfig_01, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_fullConfig_01 }, { &hf_nr_rrc_lateNonCriticalExtension, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_OCTET_STRING }, - { &hf_nr_rrc_nonCriticalExtension_51, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_RRCResume_v1560_IEs }, + { &hf_nr_rrc_nonCriticalExtension_53, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_RRCResume_v1560_IEs }, { NULL, 0, 0, NULL } }; @@ -35396,7 +35932,7 @@ dissect_nr_rrc_T_nonCriticalExtension_26(tvbuff_t *tvb _U_, int offset _U_, asn1 static const per_sequence_t RRCRelease_v1610_IEs_sequence[] = { { &hf_nr_rrc_voiceFallbackIndication_r16_01, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_voiceFallbackIndication_r16_01 }, { &hf_nr_rrc_measIdleConfig_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_measIdleConfig_r16 }, - { &hf_nr_rrc_nonCriticalExtension_50, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_nonCriticalExtension_26 }, + { &hf_nr_rrc_nonCriticalExtension_52, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_nonCriticalExtension_26 }, { NULL, 0, 0, NULL } }; @@ -35411,7 +35947,7 @@ dissect_nr_rrc_RRCRelease_v1610_IEs(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_ static const per_sequence_t RRCRelease_v1540_IEs_sequence[] = { { &hf_nr_rrc_waitTime , ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_RejectWaitTime }, - { &hf_nr_rrc_nonCriticalExtension_49, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_RRCRelease_v1610_IEs }, + { &hf_nr_rrc_nonCriticalExtension_51, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_RRCRelease_v1610_IEs }, { NULL, 0, 0, NULL } }; @@ -35430,7 +35966,7 @@ static const per_sequence_t RRCRelease_IEs_sequence[] = { { &hf_nr_rrc_suspendConfig, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_SuspendConfig }, { &hf_nr_rrc_deprioritisationReq, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_deprioritisationReq }, { &hf_nr_rrc_lateNonCriticalExtension, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_OCTET_STRING }, - { &hf_nr_rrc_nonCriticalExtension_48, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_RRCRelease_v1540_IEs }, + { &hf_nr_rrc_nonCriticalExtension_50, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_RRCRelease_v1540_IEs }, { NULL, 0, 0, NULL } }; @@ -35511,7 +36047,7 @@ dissect_nr_rrc_T_nonCriticalExtension_21(tvbuff_t *tvb _U_, int offset _U_, asn1 static const per_sequence_t RRCReestablishment_IEs_sequence[] = { { &hf_nr_rrc_nextHopChainingCount, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_NextHopChainingCount }, { &hf_nr_rrc_lateNonCriticalExtension, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_OCTET_STRING }, - { &hf_nr_rrc_nonCriticalExtension_35, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_nonCriticalExtension_21 }, + { &hf_nr_rrc_nonCriticalExtension_37, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_nonCriticalExtension_21 }, { NULL, 0, 0, NULL } }; @@ -35606,7 +36142,7 @@ dissect_nr_rrc_T_nonCriticalExtension_33(tvbuff_t *tvb _U_, int offset _U_, asn1 static const per_sequence_t SecurityModeCommand_IEs_sequence[] = { { &hf_nr_rrc_securityConfigSMC, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_SecurityConfigSMC }, { &hf_nr_rrc_lateNonCriticalExtension, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_OCTET_STRING }, - { &hf_nr_rrc_nonCriticalExtension_63, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_nonCriticalExtension_33 }, + { &hf_nr_rrc_nonCriticalExtension_65, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_nonCriticalExtension_33 }, { NULL, 0, 0, NULL } }; @@ -35686,7 +36222,7 @@ dissect_nr_rrc_T_nonCriticalExtension_11(tvbuff_t *tvb _U_, int offset _U_, asn1 static const per_sequence_t DLInformationTransfer_v1610_IEs_sequence[] = { { &hf_nr_rrc_referenceTimeInfo_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_ReferenceTimeInfo_r16 }, - { &hf_nr_rrc_nonCriticalExtension_23, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_nonCriticalExtension_11 }, + { &hf_nr_rrc_nonCriticalExtension_25, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_nonCriticalExtension_11 }, { NULL, 0, 0, NULL } }; @@ -35702,7 +36238,7 @@ dissect_nr_rrc_DLInformationTransfer_v1610_IEs(tvbuff_t *tvb _U_, int offset _U_ static const per_sequence_t DLInformationTransfer_IEs_sequence[] = { { &hf_nr_rrc_dedicatedNAS_Message, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_DedicatedNAS_Message }, { &hf_nr_rrc_lateNonCriticalExtension, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_OCTET_STRING }, - { &hf_nr_rrc_nonCriticalExtension_22, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_DLInformationTransfer_v1610_IEs }, + { &hf_nr_rrc_nonCriticalExtension_24, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_DLInformationTransfer_v1610_IEs }, { NULL, 0, 0, NULL } }; @@ -35966,7 +36502,7 @@ dissect_nr_rrc_T_nonCriticalExtension_07(tvbuff_t *tvb _U_, int offset _U_, asn1 static const per_sequence_t CounterCheck_IEs_sequence[] = { { &hf_nr_rrc_drb_CountMSB_InfoList, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_DRB_CountMSB_InfoList }, { &hf_nr_rrc_lateNonCriticalExtension, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_OCTET_STRING }, - { &hf_nr_rrc_nonCriticalExtension_18, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_nonCriticalExtension_07 }, + { &hf_nr_rrc_nonCriticalExtension_20, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_nonCriticalExtension_07 }, { NULL, 0, 0, NULL } }; @@ -36141,7 +36677,7 @@ dissect_nr_rrc_T_nonCriticalExtension_19(tvbuff_t *tvb _U_, int offset _U_, asn1 static const per_sequence_t MobilityFromNRCommand_v1610_IEs_sequence[] = { { &hf_nr_rrc_voiceFallbackIndication_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_voiceFallbackIndication_r16 }, - { &hf_nr_rrc_nonCriticalExtension_33, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_nonCriticalExtension_19 }, + { &hf_nr_rrc_nonCriticalExtension_35, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_nonCriticalExtension_19 }, { NULL, 0, 0, NULL } }; @@ -36159,7 +36695,7 @@ static const per_sequence_t MobilityFromNRCommand_IEs_sequence[] = { { &hf_nr_rrc_targetRAT_MessageContainer, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_T_targetRAT_MessageContainer }, { &hf_nr_rrc_nas_SecurityParamFromNR, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_nas_SecurityParamFromNR }, { &hf_nr_rrc_lateNonCriticalExtension, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_OCTET_STRING }, - { &hf_nr_rrc_nonCriticalExtension_32, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_MobilityFromNRCommand_v1610_IEs }, + { &hf_nr_rrc_nonCriticalExtension_34, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_MobilityFromNRCommand_v1610_IEs }, { NULL, 0, 0, NULL } }; @@ -36258,7 +36794,7 @@ static const per_sequence_t DLDedicatedMessageSegment_r16_IEs_sequence[] = { { &hf_nr_rrc_rrc_MessageSegmentContainer_r16, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_OCTET_STRING }, { &hf_nr_rrc_rrc_MessageSegmentType_r16, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_T_rrc_MessageSegmentType_r16 }, { &hf_nr_rrc_lateNonCriticalExtension, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_OCTET_STRING }, - { &hf_nr_rrc_nonCriticalExtension_21, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_nonCriticalExtension_10 }, + { &hf_nr_rrc_nonCriticalExtension_23, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_nonCriticalExtension_10 }, { NULL, 0, 0, NULL } }; @@ -36433,7 +36969,7 @@ static const per_sequence_t UEInformationRequest_r16_IEs_sequence[] = { { &hf_nr_rrc_rlf_ReportReq_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_rlf_ReportReq_r16 }, { &hf_nr_rrc_mobilityHistoryReportReq_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_mobilityHistoryReportReq_r16 }, { &hf_nr_rrc_lateNonCriticalExtension, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_OCTET_STRING }, - { &hf_nr_rrc_nonCriticalExtension_76, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_nonCriticalExtension_42 }, + { &hf_nr_rrc_nonCriticalExtension_78, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_nonCriticalExtension_42 }, { NULL, 0, 0, NULL } }; @@ -36551,7 +37087,7 @@ static const per_sequence_t DLInformationTransferMRDC_r16_IEs_sequence[] = { { &hf_nr_rrc_dl_DCCH_MessageNR_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_dl_DCCH_MessageNR_r16 }, { &hf_nr_rrc_dl_DCCH_MessageEUTRA_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_dl_DCCH_MessageEUTRA_r16 }, { &hf_nr_rrc_lateNonCriticalExtension, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_OCTET_STRING }, - { &hf_nr_rrc_nonCriticalExtension_24, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_nonCriticalExtension_12 }, + { &hf_nr_rrc_nonCriticalExtension_26, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_nonCriticalExtension_12 }, { NULL, 0, 0, NULL } }; @@ -37105,7 +37641,7 @@ static const per_sequence_t LoggedMeasurementConfiguration_r16_IEs_sequence[] = { &hf_nr_rrc_loggingDuration_r16, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_LoggingDuration_r16 }, { &hf_nr_rrc_reportType , ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_T_reportType }, { &hf_nr_rrc_lateNonCriticalExtension, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_OCTET_STRING }, - { &hf_nr_rrc_nonCriticalExtension_29, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_nonCriticalExtension_16 }, + { &hf_nr_rrc_nonCriticalExtension_31, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_nonCriticalExtension_16 }, { NULL, 0, 0, NULL } }; @@ -37370,7 +37906,7 @@ dissect_nr_rrc_T_nonCriticalExtension_20(tvbuff_t *tvb _U_, int offset _U_, asn1 static const per_sequence_t Paging_sequence[] = { { &hf_nr_rrc_pagingRecordList, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_PagingRecordList }, { &hf_nr_rrc_lateNonCriticalExtension, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_OCTET_STRING }, - { &hf_nr_rrc_nonCriticalExtension_34, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_nonCriticalExtension_20 }, + { &hf_nr_rrc_nonCriticalExtension_36, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_nonCriticalExtension_20 }, { NULL, 0, 0, NULL } }; @@ -38188,21 +38724,6 @@ dissect_nr_rrc_MeasResults_eag_2(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t * } -static const value_string nr_rrc_T_rssi_Result_r16_vals[] = { - { 0, "ffs" }, - { 0, NULL } -}; - - -static int -dissect_nr_rrc_T_rssi_Result_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { - offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, - 1, NULL, FALSE, 0, NULL); - - return offset; -} - - static int dissect_nr_rrc_INTEGER_0_100(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { @@ -38214,7 +38735,7 @@ dissect_nr_rrc_INTEGER_0_100(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx static const per_sequence_t MeasResultForRSSI_r16_sequence[] = { - { &hf_nr_rrc_rssi_Result_r16, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_T_rssi_Result_r16 }, + { &hf_nr_rrc_rssi_Result_r16, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_RSSI_Range_r16 }, { &hf_nr_rrc_channelOccupancy_r16, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_INTEGER_0_100 }, { NULL, 0, 0, NULL } }; @@ -38811,7 +39332,7 @@ dissect_nr_rrc_T_nonCriticalExtension_18(tvbuff_t *tvb _U_, int offset _U_, asn1 static const per_sequence_t MeasurementReport_IEs_sequence[] = { { &hf_nr_rrc_measResults , ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_MeasResults }, { &hf_nr_rrc_lateNonCriticalExtension, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_OCTET_STRING }, - { &hf_nr_rrc_nonCriticalExtension_31, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_nonCriticalExtension_18 }, + { &hf_nr_rrc_nonCriticalExtension_33, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_nonCriticalExtension_18 }, { NULL, 0, 0, NULL } }; @@ -39075,7 +39596,7 @@ dissect_nr_rrc_T_rlf_InfoAvailable_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_c } -static const per_sequence_t UEMeasurementsAvailable_r16_sequence[] = { +static const per_sequence_t UE_MeasurementsAvailable_r16_sequence[] = { { &hf_nr_rrc_logMeasAvailable_r16_01, ASN1_EXTENSION_ROOT , ASN1_OPTIONAL , dissect_nr_rrc_T_logMeasAvailable_r16_01 }, { &hf_nr_rrc_logMeasAvailableBT_r16_01, ASN1_EXTENSION_ROOT , ASN1_OPTIONAL , dissect_nr_rrc_T_logMeasAvailableBT_r16_01 }, { &hf_nr_rrc_logMeasAvailableWLAN_r16_01, ASN1_EXTENSION_ROOT , ASN1_OPTIONAL , dissect_nr_rrc_T_logMeasAvailableWLAN_r16_01 }, @@ -39085,9 +39606,9 @@ static const per_sequence_t UEMeasurementsAvailable_r16_sequence[] = { }; static int -dissect_nr_rrc_UEMeasurementsAvailable_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { +dissect_nr_rrc_UE_MeasurementsAvailable_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { offset = dissect_per_sequence(tvb, offset, actx, tree, hf_index, - ett_nr_rrc_UEMeasurementsAvailable_r16, UEMeasurementsAvailable_r16_sequence); + ett_nr_rrc_UE_MeasurementsAvailable_r16, UE_MeasurementsAvailable_r16_sequence); return offset; } @@ -39107,9 +39628,9 @@ dissect_nr_rrc_T_nonCriticalExtension_24(tvbuff_t *tvb _U_, int offset _U_, asn1 static const per_sequence_t RRCReconfigurationComplete_v1610_IEs_sequence[] = { - { &hf_nr_rrc_ueMeasurementsAvailable_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_UEMeasurementsAvailable_r16 }, + { &hf_nr_rrc_ue_MeasurementsAvailable_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_UE_MeasurementsAvailable_r16 }, { &hf_nr_rrc_needForGapsInfoNR_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_NeedForGapsInfoNR_r16 }, - { &hf_nr_rrc_nonCriticalExtension_46, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_nonCriticalExtension_24 }, + { &hf_nr_rrc_nonCriticalExtension_48, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_nonCriticalExtension_24 }, { NULL, 0, 0, NULL } }; @@ -39124,7 +39645,7 @@ dissect_nr_rrc_RRCReconfigurationComplete_v1610_IEs(tvbuff_t *tvb _U_, int offse static const per_sequence_t RRCReconfigurationComplete_v1560_IEs_sequence[] = { { &hf_nr_rrc_scg_Response , ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_scg_Response }, - { &hf_nr_rrc_nonCriticalExtension_45, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_RRCReconfigurationComplete_v1610_IEs }, + { &hf_nr_rrc_nonCriticalExtension_47, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_RRCReconfigurationComplete_v1610_IEs }, { NULL, 0, 0, NULL } }; @@ -39139,7 +39660,7 @@ dissect_nr_rrc_RRCReconfigurationComplete_v1560_IEs(tvbuff_t *tvb _U_, int offse static const per_sequence_t RRCReconfigurationComplete_v1530_IEs_sequence[] = { { &hf_nr_rrc_uplinkTxDirectCurrentList, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_UplinkTxDirectCurrentList }, - { &hf_nr_rrc_nonCriticalExtension_44, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_RRCReconfigurationComplete_v1560_IEs }, + { &hf_nr_rrc_nonCriticalExtension_46, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_RRCReconfigurationComplete_v1560_IEs }, { NULL, 0, 0, NULL } }; @@ -39154,7 +39675,7 @@ dissect_nr_rrc_RRCReconfigurationComplete_v1530_IEs(tvbuff_t *tvb _U_, int offse static const per_sequence_t RRCReconfigurationComplete_IEs_sequence[] = { { &hf_nr_rrc_lateNonCriticalExtension, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_OCTET_STRING }, - { &hf_nr_rrc_nonCriticalExtension_43, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_RRCReconfigurationComplete_v1530_IEs }, + { &hf_nr_rrc_nonCriticalExtension_45, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_RRCReconfigurationComplete_v1530_IEs }, { NULL, 0, 0, NULL } }; @@ -39409,10 +39930,10 @@ dissect_nr_rrc_T_nonCriticalExtension_30(tvbuff_t *tvb _U_, int offset _U_, asn1 static const per_sequence_t RRCSetupComplete_v1610_IEs_sequence[] = { { &hf_nr_rrc_iab_NodeIndication_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_iab_NodeIndication_r16 }, { &hf_nr_rrc_idleMeasAvailable_r16_01, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_idleMeasAvailable_r16_01 }, - { &hf_nr_rrc_ueMeasurementsAvailable_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_UEMeasurementsAvailable_r16 }, + { &hf_nr_rrc_ue_MeasurementsAvailable_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_UE_MeasurementsAvailable_r16 }, { &hf_nr_rrc_mobilityHistoryAvail_r16_01, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_mobilityHistoryAvail_r16_01 }, { &hf_nr_rrc_mobilityState_r16_01, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_mobilityState_r16_01 }, - { &hf_nr_rrc_nonCriticalExtension_58, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_nonCriticalExtension_30 }, + { &hf_nr_rrc_nonCriticalExtension_60, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_nonCriticalExtension_30 }, { NULL, 0, 0, NULL } }; @@ -39433,7 +39954,7 @@ static const per_sequence_t RRCSetupComplete_IEs_sequence[] = { { &hf_nr_rrc_dedicatedNAS_Message, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_DedicatedNAS_Message }, { &hf_nr_rrc_ng_5G_S_TMSI_Value, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_ng_5G_S_TMSI_Value }, { &hf_nr_rrc_lateNonCriticalExtension, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_OCTET_STRING }, - { &hf_nr_rrc_nonCriticalExtension_57, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_RRCSetupComplete_v1610_IEs }, + { &hf_nr_rrc_nonCriticalExtension_59, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_RRCSetupComplete_v1610_IEs }, { NULL, 0, 0, NULL } }; @@ -39512,8 +40033,8 @@ dissect_nr_rrc_T_nonCriticalExtension_22(tvbuff_t *tvb _U_, int offset _U_, asn1 static const per_sequence_t RRCReestablishmentComplete_v1610_IEs_sequence[] = { - { &hf_nr_rrc_ueMeasurementsAvailable_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_UEMeasurementsAvailable_r16 }, - { &hf_nr_rrc_nonCriticalExtension_37, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_nonCriticalExtension_22 }, + { &hf_nr_rrc_ue_MeasurementsAvailable_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_UE_MeasurementsAvailable_r16 }, + { &hf_nr_rrc_nonCriticalExtension_39, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_nonCriticalExtension_22 }, { NULL, 0, 0, NULL } }; @@ -39528,7 +40049,7 @@ dissect_nr_rrc_RRCReestablishmentComplete_v1610_IEs(tvbuff_t *tvb _U_, int offse static const per_sequence_t RRCReestablishmentComplete_IEs_sequence[] = { { &hf_nr_rrc_lateNonCriticalExtension, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_OCTET_STRING }, - { &hf_nr_rrc_nonCriticalExtension_36, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_RRCReestablishmentComplete_v1610_IEs }, + { &hf_nr_rrc_nonCriticalExtension_38, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_RRCReestablishmentComplete_v1610_IEs }, { NULL, 0, 0, NULL } }; @@ -39945,11 +40466,11 @@ static const per_sequence_t RRCResumeComplete_v1610_IEs_sequence[] = { { &hf_nr_rrc_measResultIdleEUTRA_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_MeasResultIdleEUTRA_r16 }, { &hf_nr_rrc_measResultIdleNR_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_MeasResultIdleNR_r16 }, { &hf_nr_rrc_scg_Response_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_scg_Response_r16 }, - { &hf_nr_rrc_ueMeasurementsAvailable_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_UEMeasurementsAvailable_r16 }, + { &hf_nr_rrc_ue_MeasurementsAvailable_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_UE_MeasurementsAvailable_r16 }, { &hf_nr_rrc_mobilityHistoryAvail_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_mobilityHistoryAvail_r16 }, { &hf_nr_rrc_mobilityState_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_mobilityState_r16 }, { &hf_nr_rrc_needForGapsInfoNR_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_NeedForGapsInfoNR_r16 }, - { &hf_nr_rrc_nonCriticalExtension_55, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_nonCriticalExtension_28 }, + { &hf_nr_rrc_nonCriticalExtension_57, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_nonCriticalExtension_28 }, { NULL, 0, 0, NULL } }; @@ -39967,7 +40488,7 @@ static const per_sequence_t RRCResumeComplete_IEs_sequence[] = { { &hf_nr_rrc_selectedPLMN_Identity, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_INTEGER_1_maxPLMN }, { &hf_nr_rrc_uplinkTxDirectCurrentList, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_UplinkTxDirectCurrentList }, { &hf_nr_rrc_lateNonCriticalExtension, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_OCTET_STRING }, - { &hf_nr_rrc_nonCriticalExtension_54, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_RRCResumeComplete_v1610_IEs }, + { &hf_nr_rrc_nonCriticalExtension_56, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_RRCResumeComplete_v1610_IEs }, { NULL, 0, 0, NULL } }; @@ -40047,7 +40568,7 @@ dissect_nr_rrc_T_nonCriticalExtension_34(tvbuff_t *tvb _U_, int offset _U_, asn1 static const per_sequence_t SecurityModeComplete_IEs_sequence[] = { { &hf_nr_rrc_lateNonCriticalExtension, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_OCTET_STRING }, - { &hf_nr_rrc_nonCriticalExtension_64, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_nonCriticalExtension_34 }, + { &hf_nr_rrc_nonCriticalExtension_66, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_nonCriticalExtension_34 }, { NULL, 0, 0, NULL } }; @@ -40127,7 +40648,7 @@ dissect_nr_rrc_T_nonCriticalExtension_35(tvbuff_t *tvb _U_, int offset _U_, asn1 static const per_sequence_t SecurityModeFailure_IEs_sequence[] = { { &hf_nr_rrc_lateNonCriticalExtension, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_OCTET_STRING }, - { &hf_nr_rrc_nonCriticalExtension_65, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_nonCriticalExtension_35 }, + { &hf_nr_rrc_nonCriticalExtension_67, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_nonCriticalExtension_35 }, { NULL, 0, 0, NULL } }; @@ -40208,7 +40729,7 @@ dissect_nr_rrc_T_nonCriticalExtension_45(tvbuff_t *tvb _U_, int offset _U_, asn1 static const per_sequence_t ULInformationTransfer_IEs_sequence[] = { { &hf_nr_rrc_dedicatedNAS_Message, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_DedicatedNAS_Message }, { &hf_nr_rrc_lateNonCriticalExtension, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_OCTET_STRING }, - { &hf_nr_rrc_nonCriticalExtension_79, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_nonCriticalExtension_45 }, + { &hf_nr_rrc_nonCriticalExtension_81, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_nonCriticalExtension_45 }, { NULL, 0, 0, NULL } }; @@ -40334,8 +40855,8 @@ static const value_string nr_rrc_T_nr_MeasPRS_length_r16_vals[] = { { 3, "ms4" }, { 4, "ms5dot5" }, { 5, "ms6" }, - { 6, "spare2" }, - { 7, "spare1" }, + { 6, "ms10" }, + { 7, "ms20" }, { 0, NULL } }; @@ -40350,7 +40871,7 @@ dissect_nr_rrc_T_nr_MeasPRS_length_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_c static const per_sequence_t NR_PRS_MeasurementInfo_r16_sequence[] = { - { &hf_nr_rrc_dl_PRS_ARFCN_PointA_r16, ASN1_EXTENSION_ROOT , ASN1_NOT_OPTIONAL, dissect_nr_rrc_ARFCN_ValueNR }, + { &hf_nr_rrc_dl_PRS_PointA_r16, ASN1_EXTENSION_ROOT , ASN1_NOT_OPTIONAL, dissect_nr_rrc_ARFCN_ValueNR }, { &hf_nr_rrc_nr_MeasPRS_RepetitionAndOffset_r16, ASN1_EXTENSION_ROOT , ASN1_NOT_OPTIONAL, dissect_nr_rrc_T_nr_MeasPRS_RepetitionAndOffset_r16 }, { &hf_nr_rrc_nr_MeasPRS_length_r16, ASN1_EXTENSION_ROOT , ASN1_NOT_OPTIONAL, dissect_nr_rrc_T_nr_MeasPRS_length_r16 }, { NULL, 0, 0, NULL } @@ -40441,7 +40962,7 @@ dissect_nr_rrc_T_nonCriticalExtension_15(tvbuff_t *tvb _U_, int offset _U_, asn1 static const per_sequence_t LocationMeasurementIndication_IEs_sequence[] = { { &hf_nr_rrc_measurementIndication, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_T_measurementIndication }, { &hf_nr_rrc_lateNonCriticalExtension, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_OCTET_STRING }, - { &hf_nr_rrc_nonCriticalExtension_28, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_nonCriticalExtension_15 }, + { &hf_nr_rrc_nonCriticalExtension_30, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_nonCriticalExtension_15 }, { NULL, 0, 0, NULL } }; @@ -40521,7 +41042,7 @@ dissect_nr_rrc_T_nonCriticalExtension_41(tvbuff_t *tvb _U_, int offset _U_, asn1 static const per_sequence_t UECapabilityInformation_IEs_sequence[] = { { &hf_nr_rrc_ue_CapabilityRAT_ContainerList, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_UE_CapabilityRAT_ContainerList }, { &hf_nr_rrc_lateNonCriticalExtension, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_OCTET_STRING }, - { &hf_nr_rrc_nonCriticalExtension_75, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_nonCriticalExtension_41 }, + { &hf_nr_rrc_nonCriticalExtension_77, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_nonCriticalExtension_41 }, { NULL, 0, 0, NULL } }; @@ -40642,7 +41163,7 @@ dissect_nr_rrc_T_nonCriticalExtension_08(tvbuff_t *tvb _U_, int offset _U_, asn1 static const per_sequence_t CounterCheckResponse_IEs_sequence[] = { { &hf_nr_rrc_drb_CountInfoList, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_DRB_CountInfoList }, { &hf_nr_rrc_lateNonCriticalExtension, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_OCTET_STRING }, - { &hf_nr_rrc_nonCriticalExtension_19, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_nonCriticalExtension_08 }, + { &hf_nr_rrc_nonCriticalExtension_21, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_nonCriticalExtension_08 }, { NULL, 0, 0, NULL } }; @@ -41530,7 +42051,7 @@ static const per_sequence_t UEAssistanceInformation_v1610_IEs_sequence[] = { { &hf_nr_rrc_releasePreference_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_ReleasePreference_r16 }, { &hf_nr_rrc_sl_UE_AssistanceInformationNR_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_SL_UE_AssistanceInformationNR_r16 }, { &hf_nr_rrc_referenceTimeInfoPreference_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_BOOLEAN }, - { &hf_nr_rrc_nonCriticalExtension_72, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_nonCriticalExtension_39 }, + { &hf_nr_rrc_nonCriticalExtension_74, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_nonCriticalExtension_39 }, { NULL, 0, 0, NULL } }; @@ -41545,7 +42066,7 @@ dissect_nr_rrc_UEAssistanceInformation_v1610_IEs(tvbuff_t *tvb _U_, int offset _ static const per_sequence_t UEAssistanceInformation_v1540_IEs_sequence[] = { { &hf_nr_rrc_overheatingAssistance, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_OverheatingAssistance }, - { &hf_nr_rrc_nonCriticalExtension_71, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_UEAssistanceInformation_v1610_IEs }, + { &hf_nr_rrc_nonCriticalExtension_73, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_UEAssistanceInformation_v1610_IEs }, { NULL, 0, 0, NULL } }; @@ -41561,7 +42082,7 @@ dissect_nr_rrc_UEAssistanceInformation_v1540_IEs(tvbuff_t *tvb _U_, int offset _ static const per_sequence_t UEAssistanceInformation_IEs_sequence[] = { { &hf_nr_rrc_delayBudgetReport, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_DelayBudgetReport }, { &hf_nr_rrc_lateNonCriticalExtension, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_OCTET_STRING }, - { &hf_nr_rrc_nonCriticalExtension_70, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_UEAssistanceInformation_v1540_IEs }, + { &hf_nr_rrc_nonCriticalExtension_72, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_UEAssistanceInformation_v1540_IEs }, { NULL, 0, 0, NULL } }; @@ -41708,7 +42229,7 @@ dissect_nr_rrc_T_nonCriticalExtension_13(tvbuff_t *tvb _U_, int offset _U_, asn1 static const per_sequence_t FailureInformation_v1610_IEs_sequence[] = { { &hf_nr_rrc_failureInfoDAPS_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_FailureInfoDAPS_r16 }, - { &hf_nr_rrc_nonCriticalExtension_26, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_nonCriticalExtension_13 }, + { &hf_nr_rrc_nonCriticalExtension_28, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_nonCriticalExtension_13 }, { NULL, 0, 0, NULL } }; @@ -41724,7 +42245,7 @@ dissect_nr_rrc_FailureInformation_v1610_IEs(tvbuff_t *tvb _U_, int offset _U_, a static const per_sequence_t FailureInformation_IEs_sequence[] = { { &hf_nr_rrc_failureInfoRLC_Bearer, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_FailureInfoRLC_Bearer }, { &hf_nr_rrc_lateNonCriticalExtension, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_OCTET_STRING }, - { &hf_nr_rrc_nonCriticalExtension_25, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_FailureInformation_v1610_IEs }, + { &hf_nr_rrc_nonCriticalExtension_27, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_FailureInformation_v1610_IEs }, { NULL, 0, 0, NULL } }; @@ -41841,7 +42362,7 @@ static const per_sequence_t ULInformationTransferMRDC_IEs_sequence[] = { { &hf_nr_rrc_ul_DCCH_MessageNR, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_ul_DCCH_MessageNR }, { &hf_nr_rrc_ul_DCCH_MessageEUTRA, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_ul_DCCH_MessageEUTRA }, { &hf_nr_rrc_lateNonCriticalExtension, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_OCTET_STRING }, - { &hf_nr_rrc_nonCriticalExtension_81, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_nonCriticalExtension_47 }, + { &hf_nr_rrc_nonCriticalExtension_83, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_nonCriticalExtension_47 }, { NULL, 0, 0, NULL } }; @@ -42045,7 +42566,7 @@ dissect_nr_rrc_T_nonCriticalExtension_31(tvbuff_t *tvb _U_, int offset _U_, asn1 static const per_sequence_t SCGFailureInformation_v1590_IEs_sequence[] = { { &hf_nr_rrc_lateNonCriticalExtension, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_OCTET_STRING }, - { &hf_nr_rrc_nonCriticalExtension_60, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_nonCriticalExtension_31 }, + { &hf_nr_rrc_nonCriticalExtension_62, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_nonCriticalExtension_31 }, { NULL, 0, 0, NULL } }; @@ -42060,7 +42581,7 @@ dissect_nr_rrc_SCGFailureInformation_v1590_IEs(tvbuff_t *tvb _U_, int offset _U_ static const per_sequence_t SCGFailureInformation_IEs_sequence[] = { { &hf_nr_rrc_failureReportSCG, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_FailureReportSCG }, - { &hf_nr_rrc_nonCriticalExtension_59, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_SCGFailureInformation_v1590_IEs }, + { &hf_nr_rrc_nonCriticalExtension_61, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_SCGFailureInformation_v1590_IEs }, { NULL, 0, 0, NULL } }; @@ -42223,7 +42744,7 @@ dissect_nr_rrc_T_nonCriticalExtension_32(tvbuff_t *tvb _U_, int offset _U_, asn1 static const per_sequence_t SCGFailureInformationEUTRA_v1590_IEs_sequence[] = { { &hf_nr_rrc_lateNonCriticalExtension, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_OCTET_STRING }, - { &hf_nr_rrc_nonCriticalExtension_62, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_nonCriticalExtension_32 }, + { &hf_nr_rrc_nonCriticalExtension_64, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_nonCriticalExtension_32 }, { NULL, 0, 0, NULL } }; @@ -42238,7 +42759,7 @@ dissect_nr_rrc_SCGFailureInformationEUTRA_v1590_IEs(tvbuff_t *tvb _U_, int offse static const per_sequence_t SCGFailureInformationEUTRA_IEs_sequence[] = { { &hf_nr_rrc_failureReportSCG_EUTRA, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_FailureReportSCG_EUTRA }, - { &hf_nr_rrc_nonCriticalExtension_61, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_SCGFailureInformationEUTRA_v1590_IEs }, + { &hf_nr_rrc_nonCriticalExtension_63, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_SCGFailureInformationEUTRA_v1590_IEs }, { NULL, 0, 0, NULL } }; @@ -42386,7 +42907,7 @@ static const per_sequence_t ULDedicatedMessageSegment_r16_IEs_sequence[] = { { &hf_nr_rrc_rrc_MessageSegmentContainer_r16, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_OCTET_STRING }, { &hf_nr_rrc_rrc_MessageSegmentType_r16_01, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_T_rrc_MessageSegmentType_r16_01 }, { &hf_nr_rrc_lateNonCriticalExtension, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_OCTET_STRING }, - { &hf_nr_rrc_nonCriticalExtension_78, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_nonCriticalExtension_44 }, + { &hf_nr_rrc_nonCriticalExtension_80, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_nonCriticalExtension_44 }, { NULL, 0, 0, NULL } }; @@ -42598,7 +43119,7 @@ dissect_nr_rrc_T_nonCriticalExtension_09(tvbuff_t *tvb _U_, int offset _U_, asn1 static const per_sequence_t DedicatedSIBRequest_r16_IEs_sequence[] = { { &hf_nr_rrc_onDemandSIB_RequestList_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_onDemandSIB_RequestList_r16 }, { &hf_nr_rrc_lateNonCriticalExtension, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_OCTET_STRING }, - { &hf_nr_rrc_nonCriticalExtension_20, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_nonCriticalExtension_09 }, + { &hf_nr_rrc_nonCriticalExtension_22, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_nonCriticalExtension_09 }, { NULL, 0, 0, NULL } }; @@ -42805,7 +43326,7 @@ dissect_nr_rrc_T_nonCriticalExtension_17(tvbuff_t *tvb _U_, int offset _U_, asn1 static const per_sequence_t MCGFailureInformation_r16_IEs_sequence[] = { { &hf_nr_rrc_failureReportMCG_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_FailureReportMCG_r16 }, { &hf_nr_rrc_lateNonCriticalExtension, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_OCTET_STRING }, - { &hf_nr_rrc_nonCriticalExtension_30, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_nonCriticalExtension_17 }, + { &hf_nr_rrc_nonCriticalExtension_32, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_nonCriticalExtension_17 }, { NULL, 0, 0, NULL } }; @@ -42950,8 +43471,23 @@ dissect_nr_rrc_MeasResultListLoggingNR_r16(tvbuff_t *tvb _U_, int offset _U_, as } +static const per_sequence_t MeasResultLogging2NR_r16_sequence[] = { + { &hf_nr_rrc_carrierFreq_r16_01, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_ARFCN_ValueNR }, + { &hf_nr_rrc_measResultListLoggingNR_r16, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_MeasResultListLoggingNR_r16 }, + { NULL, 0, 0, NULL } +}; + +static int +dissect_nr_rrc_MeasResultLogging2NR_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_sequence(tvb, offset, actx, tree, hf_index, + ett_nr_rrc_MeasResultLogging2NR_r16, MeasResultLogging2NR_r16_sequence); + + return offset; +} + + static const per_sequence_t MeasResultListLogging2NR_r16_sequence_of[1] = { - { &hf_nr_rrc_MeasResultListLogging2NR_r16_item, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_MeasResultListLoggingNR_r16 }, + { &hf_nr_rrc_MeasResultListLogging2NR_r16_item, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_MeasResultLogging2NR_r16 }, }; static int @@ -43345,6 +43881,43 @@ dissect_nr_rrc_ConnEstFailReport_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx } +static const per_sequence_t T_pci_arfcn_r16_sequence[] = { + { &hf_nr_rrc_physCellId_r16, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_PhysCellId }, + { &hf_nr_rrc_carrierFreq_r16_01, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_ARFCN_ValueNR }, + { NULL, 0, 0, NULL } +}; + +static int +dissect_nr_rrc_T_pci_arfcn_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_sequence(tvb, offset, actx, tree, hf_index, + ett_nr_rrc_T_pci_arfcn_r16, T_pci_arfcn_r16_sequence); + + return offset; +} + + +static const value_string nr_rrc_T_cellId_r16_vals[] = { + { 0, "cellGlobalId-r16" }, + { 1, "pci-arfcn-r16" }, + { 0, NULL } +}; + +static const per_choice_t T_cellId_r16_choice[] = { + { 0, &hf_nr_rrc_cellGlobalId_r16, ASN1_NO_EXTENSIONS , dissect_nr_rrc_CGI_Info_Logging_r16 }, + { 1, &hf_nr_rrc_pci_arfcn_r16, ASN1_NO_EXTENSIONS , dissect_nr_rrc_T_pci_arfcn_r16 }, + { 0, NULL, 0, NULL } +}; + +static int +dissect_nr_rrc_T_cellId_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_choice(tvb, offset, actx, tree, hf_index, + ett_nr_rrc_T_cellId_r16, T_cellId_r16_choice, + NULL); + + return offset; +} + + static const value_string nr_rrc_T_msg1_FDM_r16_vals[] = { { 0, "one" }, { 1, "two" }, @@ -43435,7 +44008,7 @@ dissect_nr_rrc_T_raPurpose_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *ac static const per_sequence_t RA_Report_r16_sequence[] = { - { &hf_nr_rrc_cellId_r16 , ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_CGI_Info_Logging_r16 }, + { &hf_nr_rrc_cellId_r16 , ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_T_cellId_r16 }, { &hf_nr_rrc_ra_InformationCommon_r16, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_RA_InformationCommon_r16 }, { &hf_nr_rrc_raPurpose_r16, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_T_raPurpose_r16 }, { NULL, 0, 0, NULL } @@ -43591,16 +44164,16 @@ dissect_nr_rrc_T_previousPCellId_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx } -static const per_sequence_t T_pci_arfcn_r16_sequence[] = { +static const per_sequence_t T_pci_arfcn_r16_01_sequence[] = { { &hf_nr_rrc_physCellId_r16, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_PhysCellId }, { &hf_nr_rrc_carrierFreq_r16_01, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_ARFCN_ValueNR }, { NULL, 0, 0, NULL } }; static int -dissect_nr_rrc_T_pci_arfcn_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { +dissect_nr_rrc_T_pci_arfcn_r16_01(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { offset = dissect_per_sequence(tvb, offset, actx, tree, hf_index, - ett_nr_rrc_T_pci_arfcn_r16, T_pci_arfcn_r16_sequence); + ett_nr_rrc_T_pci_arfcn_r16_01, T_pci_arfcn_r16_01_sequence); return offset; } @@ -43614,7 +44187,7 @@ static const value_string nr_rrc_T_nrFailedPCellId_r16_vals[] = { static const per_choice_t T_nrFailedPCellId_r16_choice[] = { { 0, &hf_nr_rrc_cellGlobalId_r16, ASN1_NO_EXTENSIONS , dissect_nr_rrc_CGI_Info_Logging_r16 }, - { 1, &hf_nr_rrc_pci_arfcn_r16, ASN1_NO_EXTENSIONS , dissect_nr_rrc_T_pci_arfcn_r16 }, + { 1, &hf_nr_rrc_pci_arfcn_r16_01, ASN1_NO_EXTENSIONS , dissect_nr_rrc_T_pci_arfcn_r16_01 }, { 0, NULL, 0, NULL } }; @@ -43628,16 +44201,16 @@ dissect_nr_rrc_T_nrFailedPCellId_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx } -static const per_sequence_t T_pci_arfcn_r16_01_sequence[] = { +static const per_sequence_t T_pci_arfcn_r16_02_sequence[] = { { &hf_nr_rrc_physCellId_r16_01, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_EUTRA_PhysCellId }, { &hf_nr_rrc_carrierFreq_r16_02, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_ARFCN_ValueEUTRA }, { NULL, 0, 0, NULL } }; static int -dissect_nr_rrc_T_pci_arfcn_r16_01(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { +dissect_nr_rrc_T_pci_arfcn_r16_02(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { offset = dissect_per_sequence(tvb, offset, actx, tree, hf_index, - ett_nr_rrc_T_pci_arfcn_r16_01, T_pci_arfcn_r16_01_sequence); + ett_nr_rrc_T_pci_arfcn_r16_02, T_pci_arfcn_r16_02_sequence); return offset; } @@ -43651,7 +44224,7 @@ static const value_string nr_rrc_T_eutraFailedPCellId_r16_vals[] = { static const per_choice_t T_eutraFailedPCellId_r16_choice[] = { { 0, &hf_nr_rrc_cellGlobalId_r16_01, ASN1_NO_EXTENSIONS , dissect_nr_rrc_CGI_InfoEUTRALogging }, - { 1, &hf_nr_rrc_pci_arfcn_r16_01, ASN1_NO_EXTENSIONS , dissect_nr_rrc_T_pci_arfcn_r16_01 }, + { 1, &hf_nr_rrc_pci_arfcn_r16_02, ASN1_NO_EXTENSIONS , dissect_nr_rrc_T_pci_arfcn_r16_02 }, { 0, NULL, 0, NULL } }; @@ -43773,21 +44346,21 @@ dissect_nr_rrc_T_noSuitableCellFound_r16(tvbuff_t *tvb _U_, int offset _U_, asn1 static const per_sequence_t T_nr_RLF_Report_r16_sequence[] = { - { &hf_nr_rrc_measResultLastServCell_r16, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_MeasResultRLFNR_r16 }, - { &hf_nr_rrc_measResultNeighCells_r16_02, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_measResultNeighCells_r16_02 }, - { &hf_nr_rrc_c_RNTI_r16 , ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_RNTI_Value }, - { &hf_nr_rrc_previousPCellId_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_previousPCellId_r16 }, - { &hf_nr_rrc_failedPCellId_r16, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_T_failedPCellId_r16 }, - { &hf_nr_rrc_reconnectCellId_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_reconnectCellId_r16 }, - { &hf_nr_rrc_timeUntilReconnection_16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_TimeUntilReconnection_16 }, - { &hf_nr_rrc_reestablishmentCellId_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_CGI_Info_Logging_r16 }, - { &hf_nr_rrc_timeConnFailure_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_INTEGER_0_1023 }, - { &hf_nr_rrc_timeSinceFailure_r16, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_TimeSinceFailure_r16 }, - { &hf_nr_rrc_connectionFailureType_r16, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_T_connectionFailureType_r16 }, - { &hf_nr_rrc_rlf_Cause_r16, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_T_rlf_Cause_r16 }, - { &hf_nr_rrc_locationInfo_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_LocationInfo_r16 }, - { &hf_nr_rrc_noSuitableCellFound_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_noSuitableCellFound_r16 }, - { &hf_nr_rrc_ra_InformationCommon_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_RA_InformationCommon_r16 }, + { &hf_nr_rrc_measResultLastServCell_r16, ASN1_EXTENSION_ROOT , ASN1_NOT_OPTIONAL, dissect_nr_rrc_MeasResultRLFNR_r16 }, + { &hf_nr_rrc_measResultNeighCells_r16_02, ASN1_EXTENSION_ROOT , ASN1_OPTIONAL , dissect_nr_rrc_T_measResultNeighCells_r16_02 }, + { &hf_nr_rrc_c_RNTI_r16 , ASN1_EXTENSION_ROOT , ASN1_NOT_OPTIONAL, dissect_nr_rrc_RNTI_Value }, + { &hf_nr_rrc_previousPCellId_r16, ASN1_EXTENSION_ROOT , ASN1_OPTIONAL , dissect_nr_rrc_T_previousPCellId_r16 }, + { &hf_nr_rrc_failedPCellId_r16, ASN1_EXTENSION_ROOT , ASN1_NOT_OPTIONAL, dissect_nr_rrc_T_failedPCellId_r16 }, + { &hf_nr_rrc_reconnectCellId_r16, ASN1_EXTENSION_ROOT , ASN1_OPTIONAL , dissect_nr_rrc_T_reconnectCellId_r16 }, + { &hf_nr_rrc_timeUntilReconnection_16, ASN1_EXTENSION_ROOT , ASN1_OPTIONAL , dissect_nr_rrc_TimeUntilReconnection_16 }, + { &hf_nr_rrc_reestablishmentCellId_r16, ASN1_EXTENSION_ROOT , ASN1_OPTIONAL , dissect_nr_rrc_CGI_Info_Logging_r16 }, + { &hf_nr_rrc_timeConnFailure_r16, ASN1_EXTENSION_ROOT , ASN1_OPTIONAL , dissect_nr_rrc_INTEGER_0_1023 }, + { &hf_nr_rrc_timeSinceFailure_r16, ASN1_EXTENSION_ROOT , ASN1_NOT_OPTIONAL, dissect_nr_rrc_TimeSinceFailure_r16 }, + { &hf_nr_rrc_connectionFailureType_r16, ASN1_EXTENSION_ROOT , ASN1_NOT_OPTIONAL, dissect_nr_rrc_T_connectionFailureType_r16 }, + { &hf_nr_rrc_rlf_Cause_r16, ASN1_EXTENSION_ROOT , ASN1_NOT_OPTIONAL, dissect_nr_rrc_T_rlf_Cause_r16 }, + { &hf_nr_rrc_locationInfo_r16, ASN1_EXTENSION_ROOT , ASN1_OPTIONAL , dissect_nr_rrc_LocationInfo_r16 }, + { &hf_nr_rrc_noSuitableCellFound_r16, ASN1_EXTENSION_ROOT , ASN1_OPTIONAL , dissect_nr_rrc_T_noSuitableCellFound_r16 }, + { &hf_nr_rrc_ra_InformationCommon_r16, ASN1_EXTENSION_ROOT , ASN1_OPTIONAL , dissect_nr_rrc_RA_InformationCommon_r16 }, { NULL, 0, 0, NULL } }; @@ -43819,8 +44392,8 @@ dissect_nr_rrc_T_measResult_RLF_Report_EUTRA_r16(tvbuff_t *tvb _U_, int offset _ static const per_sequence_t T_eutra_RLF_Report_r16_sequence[] = { - { &hf_nr_rrc_failedPCellId_EUTRA, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_CGI_InfoEUTRALogging }, - { &hf_nr_rrc_measResult_RLF_Report_EUTRA_r16, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_T_measResult_RLF_Report_EUTRA_r16 }, + { &hf_nr_rrc_failedPCellId_EUTRA, ASN1_EXTENSION_ROOT , ASN1_NOT_OPTIONAL, dissect_nr_rrc_CGI_InfoEUTRALogging }, + { &hf_nr_rrc_measResult_RLF_Report_EUTRA_r16, ASN1_EXTENSION_ROOT , ASN1_NOT_OPTIONAL, dissect_nr_rrc_T_measResult_RLF_Report_EUTRA_r16 }, { NULL, 0, 0, NULL } }; @@ -43855,16 +44428,16 @@ dissect_nr_rrc_RLF_Report_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *act } -static const per_sequence_t T_pci_arfcn_r16_02_sequence[] = { +static const per_sequence_t T_pci_arfcn_r16_03_sequence[] = { { &hf_nr_rrc_physCellId_r16, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_PhysCellId }, { &hf_nr_rrc_carrierFreq_r16_01, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_ARFCN_ValueNR }, { NULL, 0, 0, NULL } }; static int -dissect_nr_rrc_T_pci_arfcn_r16_02(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { +dissect_nr_rrc_T_pci_arfcn_r16_03(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { offset = dissect_per_sequence(tvb, offset, actx, tree, hf_index, - ett_nr_rrc_T_pci_arfcn_r16_02, T_pci_arfcn_r16_02_sequence); + ett_nr_rrc_T_pci_arfcn_r16_03, T_pci_arfcn_r16_03_sequence); return offset; } @@ -43878,7 +44451,7 @@ static const value_string nr_rrc_T_nr_CellId_r16_vals[] = { static const per_choice_t T_nr_CellId_r16_choice[] = { { 0, &hf_nr_rrc_cgi_Info_01 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_CGI_Info_Logging_r16 }, - { 1, &hf_nr_rrc_pci_arfcn_r16_02, ASN1_NO_EXTENSIONS , dissect_nr_rrc_T_pci_arfcn_r16_02 }, + { 1, &hf_nr_rrc_pci_arfcn_r16_03, ASN1_NO_EXTENSIONS , dissect_nr_rrc_T_pci_arfcn_r16_03 }, { 0, NULL, 0, NULL } }; @@ -43892,16 +44465,16 @@ dissect_nr_rrc_T_nr_CellId_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *ac } -static const per_sequence_t T_pci_arfcn_r16_03_sequence[] = { +static const per_sequence_t T_pci_arfcn_r16_04_sequence[] = { { &hf_nr_rrc_physCellId_r16_01, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_EUTRA_PhysCellId }, { &hf_nr_rrc_carrierFreq_r16_02, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_ARFCN_ValueEUTRA }, { NULL, 0, 0, NULL } }; static int -dissect_nr_rrc_T_pci_arfcn_r16_03(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { +dissect_nr_rrc_T_pci_arfcn_r16_04(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { offset = dissect_per_sequence(tvb, offset, actx, tree, hf_index, - ett_nr_rrc_T_pci_arfcn_r16_03, T_pci_arfcn_r16_03_sequence); + ett_nr_rrc_T_pci_arfcn_r16_04, T_pci_arfcn_r16_04_sequence); return offset; } @@ -43915,7 +44488,7 @@ static const value_string nr_rrc_T_eutra_CellId_r16_vals[] = { static const per_choice_t T_eutra_CellId_r16_choice[] = { { 0, &hf_nr_rrc_cellGlobalId_r16_02, ASN1_NO_EXTENSIONS , dissect_nr_rrc_CGI_InfoEUTRA }, - { 1, &hf_nr_rrc_pci_arfcn_r16_03, ASN1_NO_EXTENSIONS , dissect_nr_rrc_T_pci_arfcn_r16_03 }, + { 1, &hf_nr_rrc_pci_arfcn_r16_04, ASN1_NO_EXTENSIONS , dissect_nr_rrc_T_pci_arfcn_r16_04 }, { 0, NULL, 0, NULL } }; @@ -44011,7 +44584,7 @@ static const per_sequence_t UEInformationResponse_r16_IEs_sequence[] = { { &hf_nr_rrc_rlf_Report_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_RLF_Report_r16 }, { &hf_nr_rrc_mobilityHistoryReport_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_MobilityHistoryReport_r16 }, { &hf_nr_rrc_lateNonCriticalExtension, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_OCTET_STRING }, - { &hf_nr_rrc_nonCriticalExtension_77, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_nonCriticalExtension_43 }, + { &hf_nr_rrc_nonCriticalExtension_79, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_nonCriticalExtension_43 }, { NULL, 0, 0, NULL } }; @@ -44357,7 +44930,7 @@ static const per_sequence_t SidelinkUEInformationNR_r16_IEs_sequence[] = { { &hf_nr_rrc_sl_TxResourceReqList_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_SL_TxResourceReqList_r16 }, { &hf_nr_rrc_sl_FailureList_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_SL_FailureList_r16 }, { &hf_nr_rrc_lateNonCriticalExtension, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_OCTET_STRING }, - { &hf_nr_rrc_nonCriticalExtension_68, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_nonCriticalExtension_37 }, + { &hf_nr_rrc_nonCriticalExtension_70, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_nonCriticalExtension_37 }, { NULL, 0, 0, NULL } }; @@ -44455,7 +45028,7 @@ dissect_nr_rrc_T_nonCriticalExtension_46(tvbuff_t *tvb _U_, int offset _U_, asn1 static const per_sequence_t ULInformationTransferIRAT_r16_IEs_sequence[] = { { &hf_nr_rrc_ul_DCCH_MessageEUTRA_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_ul_DCCH_MessageEUTRA_r16 }, { &hf_nr_rrc_lateNonCriticalExtension, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_OCTET_STRING }, - { &hf_nr_rrc_nonCriticalExtension_80, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_nonCriticalExtension_46 }, + { &hf_nr_rrc_nonCriticalExtension_82, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_nonCriticalExtension_46 }, { NULL, 0, 0, NULL } }; @@ -44545,7 +45118,7 @@ dissect_nr_rrc_ULInformationTransferIRAT_r16(tvbuff_t *tvb _U_, int offset _U_, } -static const per_sequence_t IAB_IPAddressNumReq_r16_sequence[] = { +static const per_sequence_t IAB_IP_AddressNumReq_r16_sequence[] = { { &hf_nr_rrc_all_Traffic_NumReq_r16, ASN1_EXTENSION_ROOT , ASN1_OPTIONAL , dissect_nr_rrc_INTEGER_1_8 }, { &hf_nr_rrc_f1_C_Traffic_NumReq_r16, ASN1_EXTENSION_ROOT , ASN1_OPTIONAL , dissect_nr_rrc_INTEGER_1_8 }, { &hf_nr_rrc_f1_U_Traffic_NumReq_r16, ASN1_EXTENSION_ROOT , ASN1_OPTIONAL , dissect_nr_rrc_INTEGER_1_8 }, @@ -44554,9 +45127,9 @@ static const per_sequence_t IAB_IPAddressNumReq_r16_sequence[] = { }; static int -dissect_nr_rrc_IAB_IPAddressNumReq_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { +dissect_nr_rrc_IAB_IP_AddressNumReq_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { offset = dissect_per_sequence(tvb, offset, actx, tree, hf_index, - ett_nr_rrc_IAB_IPAddressNumReq_r16, IAB_IPAddressNumReq_r16_sequence); + ett_nr_rrc_IAB_IP_AddressNumReq_r16, IAB_IP_AddressNumReq_r16_sequence); return offset; } @@ -44622,7 +45195,7 @@ dissect_nr_rrc_T_non_F1_Traffic_PrefixReq_r16(tvbuff_t *tvb _U_, int offset _U_, } -static const per_sequence_t IAB_IPAddressPrefixReq_r16_sequence[] = { +static const per_sequence_t IAB_IP_AddressPrefixReq_r16_sequence[] = { { &hf_nr_rrc_all_Traffic_PrefixReq_r16, ASN1_EXTENSION_ROOT , ASN1_OPTIONAL , dissect_nr_rrc_T_all_Traffic_PrefixReq_r16 }, { &hf_nr_rrc_f1_C_Traffic_PrefixReq_r16, ASN1_EXTENSION_ROOT , ASN1_OPTIONAL , dissect_nr_rrc_T_f1_C_Traffic_PrefixReq_r16 }, { &hf_nr_rrc_f1_U_Traffic_PrefixReq_r16, ASN1_EXTENSION_ROOT , ASN1_OPTIONAL , dissect_nr_rrc_T_f1_U_Traffic_PrefixReq_r16 }, @@ -44631,9 +45204,9 @@ static const per_sequence_t IAB_IPAddressPrefixReq_r16_sequence[] = { }; static int -dissect_nr_rrc_IAB_IPAddressPrefixReq_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { +dissect_nr_rrc_IAB_IP_AddressPrefixReq_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { offset = dissect_per_sequence(tvb, offset, actx, tree, hf_index, - ett_nr_rrc_IAB_IPAddressPrefixReq_r16, IAB_IPAddressPrefixReq_r16_sequence); + ett_nr_rrc_IAB_IP_AddressPrefixReq_r16, IAB_IP_AddressPrefixReq_r16_sequence); return offset; } @@ -44646,8 +45219,8 @@ static const value_string nr_rrc_T_iab_IPv6_AddressReq_r16_vals[] = { }; static const per_choice_t T_iab_IPv6_AddressReq_r16_choice[] = { - { 0, &hf_nr_rrc_iab_IPv6_AddressNumReq_r16, ASN1_EXTENSION_ROOT , dissect_nr_rrc_IAB_IPAddressNumReq_r16 }, - { 1, &hf_nr_rrc_iab_IPv6_AddressPrefixReq_r16, ASN1_EXTENSION_ROOT , dissect_nr_rrc_IAB_IPAddressPrefixReq_r16 }, + { 0, &hf_nr_rrc_iab_IPv6_AddressNumReq_r16, ASN1_EXTENSION_ROOT , dissect_nr_rrc_IAB_IP_AddressNumReq_r16 }, + { 1, &hf_nr_rrc_iab_IPv6_AddressPrefixReq_r16, ASN1_EXTENSION_ROOT , dissect_nr_rrc_IAB_IP_AddressPrefixReq_r16 }, { 0, NULL, 0, NULL } }; @@ -44662,7 +45235,7 @@ dissect_nr_rrc_T_iab_IPv6_AddressReq_r16(tvbuff_t *tvb _U_, int offset _U_, asn1 static const per_sequence_t T_iab_IP_Request_r16_sequence[] = { - { &hf_nr_rrc_iab_IPv4_AddressNumReq_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_IAB_IPAddressNumReq_r16 }, + { &hf_nr_rrc_iab_IPv4_AddressNumReq_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_IAB_IP_AddressNumReq_r16 }, { &hf_nr_rrc_iab_IPv6_AddressReq_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_iab_IPv6_AddressReq_r16 }, { NULL, 0, 0, NULL } }; @@ -44761,22 +45334,22 @@ dissect_nr_rrc_T_iab_IP_Report_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t } -static const value_string nr_rrc_T_ip_InfoType_vals[] = { +static const value_string nr_rrc_T_ip_InfoType_r16_vals[] = { { 0, "iab-IP-Request-r16" }, { 1, "iab-IP-Report-r16" }, { 0, NULL } }; -static const per_choice_t T_ip_InfoType_choice[] = { +static const per_choice_t T_ip_InfoType_r16_choice[] = { { 0, &hf_nr_rrc_iab_IP_Request_r16, ASN1_EXTENSION_ROOT , dissect_nr_rrc_T_iab_IP_Request_r16 }, { 1, &hf_nr_rrc_iab_IP_Report_r16, ASN1_EXTENSION_ROOT , dissect_nr_rrc_T_iab_IP_Report_r16 }, { 0, NULL, 0, NULL } }; static int -dissect_nr_rrc_T_ip_InfoType(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { +dissect_nr_rrc_T_ip_InfoType_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { offset = dissect_per_choice(tvb, offset, actx, tree, hf_index, - ett_nr_rrc_T_ip_InfoType, T_ip_InfoType_choice, + ett_nr_rrc_T_ip_InfoType_r16, T_ip_InfoType_r16_choice, NULL); return offset; @@ -44797,9 +45370,9 @@ dissect_nr_rrc_T_nonCriticalExtension_14(tvbuff_t *tvb _U_, int offset _U_, asn1 static const per_sequence_t IABOtherInformation_r16_IEs_sequence[] = { - { &hf_nr_rrc_ip_InfoType , ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_T_ip_InfoType }, + { &hf_nr_rrc_ip_InfoType_r16, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_T_ip_InfoType_r16 }, { &hf_nr_rrc_lateNonCriticalExtension, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_OCTET_STRING }, - { &hf_nr_rrc_nonCriticalExtension_27, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_nonCriticalExtension_14 }, + { &hf_nr_rrc_nonCriticalExtension_29, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_nonCriticalExtension_14 }, { NULL, 0, 0, NULL } }; @@ -45086,14 +45659,14 @@ dissect_nr_rrc_T_type1_MultiPanel_r16_01(tvbuff_t *tvb _U_, int offset _U_, asn1 } -static const value_string nr_rrc_T_type2_r16_01_vals[] = { +static const value_string nr_rrc_T_type2_r16_02_vals[] = { { 0, "true" }, { 0, NULL } }; static int -dissect_nr_rrc_T_type2_r16_01(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { +dissect_nr_rrc_T_type2_r16_02(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, 1, NULL, FALSE, 0, NULL); @@ -45119,7 +45692,7 @@ dissect_nr_rrc_T_type2_PortSelection_r16_01(tvbuff_t *tvb _U_, int offset _U_, a static const per_sequence_t T_codebookTypeRequest_r16_sequence[] = { { &hf_nr_rrc_type1_SinglePanel_r16_01, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_type1_SinglePanel_r16_01 }, { &hf_nr_rrc_type1_MultiPanel_r16_01, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_type1_MultiPanel_r16_01 }, - { &hf_nr_rrc_type2_r16_01 , ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_type2_r16_01 }, + { &hf_nr_rrc_type2_r16_02 , ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_type2_r16_02 }, { &hf_nr_rrc_type2_PortSelection_r16_01, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_type2_PortSelection_r16_01 }, { NULL, 0, 0, NULL } }; @@ -45207,7 +45780,7 @@ dissect_nr_rrc_T_nonCriticalExtension_40(tvbuff_t *tvb _U_, int offset _U_, asn1 static const per_sequence_t UECapabilityEnquiry_v1610_IEs_sequence[] = { { &hf_nr_rrc_rrc_SegAllowed_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_rrc_SegAllowed_r16 }, - { &hf_nr_rrc_nonCriticalExtension_74, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_nonCriticalExtension_40 }, + { &hf_nr_rrc_nonCriticalExtension_76, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_nonCriticalExtension_40 }, { NULL, 0, 0, NULL } }; @@ -45222,7 +45795,7 @@ dissect_nr_rrc_UECapabilityEnquiry_v1610_IEs(tvbuff_t *tvb _U_, int offset _U_, static const per_sequence_t UECapabilityEnquiry_v1560_IEs_sequence[] = { { &hf_nr_rrc_capabilityRequestFilterCommon, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_UE_CapabilityRequestFilterCommon }, - { &hf_nr_rrc_nonCriticalExtension_73, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_UECapabilityEnquiry_v1610_IEs }, + { &hf_nr_rrc_nonCriticalExtension_75, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_UECapabilityEnquiry_v1610_IEs }, { NULL, 0, 0, NULL } }; @@ -45723,7 +46296,7 @@ dissect_nr_rrc_BetaOffsets(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _ static int dissect_nr_rrc_BH_LogicalChannelIdentity_Ext_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { offset = dissect_per_constrained_integer(tvb, offset, actx, tree, hf_index, - 33U, maxLC_ID_Iab_r16, NULL, FALSE); + 320U, maxLC_ID_Iab_r16, NULL, FALSE); return offset; } @@ -46694,44 +47267,6 @@ dissect_nr_rrc_SEQUENCE_SIZE_1_10_OF_SearchSpaceExt_r16(tvbuff_t *tvb _U_, int o static int -dissect_nr_rrc_INTEGER_1_80(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { - offset = dissect_per_constrained_integer(tvb, offset, actx, tree, hf_index, - 1U, 80U, NULL, FALSE); - - return offset; -} - - -static const per_sequence_t CellGroupForSwitching_r16_sequence_of[1] = { - { &hf_nr_rrc_CellGroupForSwitching_r16_item, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_ServCellIndex }, -}; - -static int -dissect_nr_rrc_CellGroupForSwitching_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { - offset = dissect_per_constrained_sequence_of(tvb, offset, actx, tree, hf_index, - ett_nr_rrc_CellGroupForSwitching_r16, CellGroupForSwitching_r16_sequence_of, - 1, 16, FALSE); - - return offset; -} - - -static const per_sequence_t SEQUENCE_SIZE_1_4_OF_CellGroupForSwitching_r16_sequence_of[1] = { - { &hf_nr_rrc_cellGroupsForSwitchingList_r16_item, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_CellGroupForSwitching_r16 }, -}; - -static int -dissect_nr_rrc_SEQUENCE_SIZE_1_4_OF_CellGroupForSwitching_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { - offset = dissect_per_constrained_sequence_of(tvb, offset, actx, tree, hf_index, - ett_nr_rrc_SEQUENCE_SIZE_1_4_OF_CellGroupForSwitching_r16, SEQUENCE_SIZE_1_4_OF_CellGroupForSwitching_r16_sequence_of, - 1, 4, FALSE); - - return offset; -} - - - -static int dissect_nr_rrc_INTEGER_0_maxCI_DCI_PayloadSize_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { offset = dissect_per_constrained_integer(tvb, offset, actx, tree, hf_index, 0U, maxCI_DCI_PayloadSize_r16, NULL, FALSE); @@ -46947,6 +47482,34 @@ dissect_nr_rrc_T_monitoringCapabilityConfig_r16(tvbuff_t *tvb _U_, int offset _U } +static const per_sequence_t CellGroupForSwitch_r16_sequence_of[1] = { + { &hf_nr_rrc_CellGroupForSwitch_r16_item, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_ServCellIndex }, +}; + +static int +dissect_nr_rrc_CellGroupForSwitch_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_constrained_sequence_of(tvb, offset, actx, tree, hf_index, + ett_nr_rrc_CellGroupForSwitch_r16, CellGroupForSwitch_r16_sequence_of, + 1, 16, FALSE); + + return offset; +} + + +static const per_sequence_t SEQUENCE_SIZE_1_4_OF_CellGroupForSwitch_r16_sequence_of[1] = { + { &hf_nr_rrc_cellGroupsForSwitchList_r16_item, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_CellGroupForSwitch_r16 }, +}; + +static int +dissect_nr_rrc_SEQUENCE_SIZE_1_4_OF_CellGroupForSwitch_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_constrained_sequence_of(tvb, offset, actx, tree, hf_index, + ett_nr_rrc_SEQUENCE_SIZE_1_4_OF_CellGroupForSwitch_r16, SEQUENCE_SIZE_1_4_OF_CellGroupForSwitch_r16_sequence_of, + 1, 4, FALSE); + + return offset; +} + + static int dissect_nr_rrc_INTEGER_10_52(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { @@ -46957,15 +47520,28 @@ dissect_nr_rrc_INTEGER_10_52(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx } +static const per_sequence_t SearchSpaceSwitchConfig_r16_sequence[] = { + { &hf_nr_rrc_cellGroupsForSwitchList_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_SEQUENCE_SIZE_1_4_OF_CellGroupForSwitch_r16 }, + { &hf_nr_rrc_searchSpaceSwitchDelay_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_INTEGER_10_52 }, + { NULL, 0, 0, NULL } +}; + +static int +dissect_nr_rrc_SearchSpaceSwitchConfig_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_sequence(tvb, offset, actx, tree, hf_index, + ett_nr_rrc_SearchSpaceSwitchConfig_r16, SearchSpaceSwitchConfig_r16_sequence); + + return offset; +} + + static const per_sequence_t PDCCH_Config_eag_1_sequence[] = { { &hf_nr_rrc_controlResourceSetToAddModList2_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_SEQUENCE_SIZE_1_2_OF_ControlResourceSet }, { &hf_nr_rrc_controlResourceSetToReleaseList_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_SEQUENCE_SIZE_1_5_OF_ControlResourceSetId_r16 }, { &hf_nr_rrc_searchSpacesToAddModListExt_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_SEQUENCE_SIZE_1_10_OF_SearchSpaceExt_r16 }, - { &hf_nr_rrc_searchSpaceSwitchingTimer_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_INTEGER_1_80 }, - { &hf_nr_rrc_cellGroupsForSwitchingList_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_SEQUENCE_SIZE_1_4_OF_CellGroupForSwitching_r16 }, { &hf_nr_rrc_uplinkCancellation_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_uplinkCancellation_r16 }, { &hf_nr_rrc_monitoringCapabilityConfig_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_monitoringCapabilityConfig_r16 }, - { &hf_nr_rrc_searchSpaceSwitchingDelay_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_INTEGER_10_52 }, + { &hf_nr_rrc_searchSpaceSwitchConfig_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_SearchSpaceSwitchConfig_r16 }, { NULL, 0, 0, NULL } }; @@ -48277,14 +48853,14 @@ dissect_nr_rrc_T_minimumSchedulingOffsetK0_r16(tvbuff_t *tvb _U_, int offset _U_ } -static const value_string nr_rrc_T_antennaPortsFieldPresenceForDCI_Format1_2_r16_vals[] = { +static const value_string nr_rrc_T_antennaPortsFieldPresenceDCI_1_2_r16_vals[] = { { 0, "enabled" }, { 0, NULL } }; static int -dissect_nr_rrc_T_antennaPortsFieldPresenceForDCI_Format1_2_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { +dissect_nr_rrc_T_antennaPortsFieldPresenceDCI_1_2_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, 1, NULL, FALSE, 0, NULL); @@ -48292,58 +48868,58 @@ dissect_nr_rrc_T_antennaPortsFieldPresenceForDCI_Format1_2_r16(tvbuff_t *tvb _U_ } -static const value_string nr_rrc_T_dmrs_DownlinkForPDSCH_MappingTypeA_ForDCI_Format1_2_r16_vals[] = { +static const value_string nr_rrc_T_dmrs_DownlinkForPDSCH_MappingTypeA_DCI_1_2_r16_vals[] = { { 0, "release" }, { 1, "setup" }, { 0, NULL } }; -static const per_choice_t T_dmrs_DownlinkForPDSCH_MappingTypeA_ForDCI_Format1_2_r16_choice[] = { +static const per_choice_t T_dmrs_DownlinkForPDSCH_MappingTypeA_DCI_1_2_r16_choice[] = { { 0, &hf_nr_rrc_release , ASN1_NO_EXTENSIONS , dissect_nr_rrc_NULL }, { 1, &hf_nr_rrc_setup_59 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_DMRS_DownlinkConfig }, { 0, NULL, 0, NULL } }; static int -dissect_nr_rrc_T_dmrs_DownlinkForPDSCH_MappingTypeA_ForDCI_Format1_2_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { +dissect_nr_rrc_T_dmrs_DownlinkForPDSCH_MappingTypeA_DCI_1_2_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { offset = dissect_per_choice(tvb, offset, actx, tree, hf_index, - ett_nr_rrc_T_dmrs_DownlinkForPDSCH_MappingTypeA_ForDCI_Format1_2_r16, T_dmrs_DownlinkForPDSCH_MappingTypeA_ForDCI_Format1_2_r16_choice, + ett_nr_rrc_T_dmrs_DownlinkForPDSCH_MappingTypeA_DCI_1_2_r16, T_dmrs_DownlinkForPDSCH_MappingTypeA_DCI_1_2_r16_choice, NULL); return offset; } -static const value_string nr_rrc_T_dmrs_DownlinkForPDSCH_MappingTypeB_ForDCI_Format1_2_r16_vals[] = { +static const value_string nr_rrc_T_dmrs_DownlinkForPDSCH_MappingTypeB_DCI_1_2_r16_vals[] = { { 0, "release" }, { 1, "setup" }, { 0, NULL } }; -static const per_choice_t T_dmrs_DownlinkForPDSCH_MappingTypeB_ForDCI_Format1_2_r16_choice[] = { +static const per_choice_t T_dmrs_DownlinkForPDSCH_MappingTypeB_DCI_1_2_r16_choice[] = { { 0, &hf_nr_rrc_release , ASN1_NO_EXTENSIONS , dissect_nr_rrc_NULL }, { 1, &hf_nr_rrc_setup_59 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_DMRS_DownlinkConfig }, { 0, NULL, 0, NULL } }; static int -dissect_nr_rrc_T_dmrs_DownlinkForPDSCH_MappingTypeB_ForDCI_Format1_2_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { +dissect_nr_rrc_T_dmrs_DownlinkForPDSCH_MappingTypeB_DCI_1_2_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { offset = dissect_per_choice(tvb, offset, actx, tree, hf_index, - ett_nr_rrc_T_dmrs_DownlinkForPDSCH_MappingTypeB_ForDCI_Format1_2_r16, T_dmrs_DownlinkForPDSCH_MappingTypeB_ForDCI_Format1_2_r16_choice, + ett_nr_rrc_T_dmrs_DownlinkForPDSCH_MappingTypeB_DCI_1_2_r16, T_dmrs_DownlinkForPDSCH_MappingTypeB_DCI_1_2_r16_choice, NULL); return offset; } -static const value_string nr_rrc_T_dmrs_SequenceInitializationForDCI_Format1_2_r16_vals[] = { +static const value_string nr_rrc_T_dmrs_SequenceInitializationDCI_1_2_r16_vals[] = { { 0, "enabled" }, { 0, NULL } }; static int -dissect_nr_rrc_T_dmrs_SequenceInitializationForDCI_Format1_2_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { +dissect_nr_rrc_T_dmrs_SequenceInitializationDCI_1_2_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, 1, NULL, FALSE, 0, NULL); @@ -48351,7 +48927,7 @@ dissect_nr_rrc_T_dmrs_SequenceInitializationForDCI_Format1_2_r16(tvbuff_t *tvb _ } -static const value_string nr_rrc_T_mcs_TableForDCI_Format1_2_r16_vals[] = { +static const value_string nr_rrc_T_mcs_TableDCI_1_2_r16_vals[] = { { 0, "qam256" }, { 1, "qam64LowSE" }, { 0, NULL } @@ -48359,7 +48935,7 @@ static const value_string nr_rrc_T_mcs_TableForDCI_Format1_2_r16_vals[] = { static int -dissect_nr_rrc_T_mcs_TableForDCI_Format1_2_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { +dissect_nr_rrc_T_mcs_TableDCI_1_2_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, 2, NULL, FALSE, 0, NULL); @@ -48436,22 +49012,22 @@ dissect_nr_rrc_PDSCH_TimeDomainResourceAllocationList_r16(tvbuff_t *tvb _U_, int } -static const value_string nr_rrc_T_pdsch_TimeDomainAllocationListForDCI_Format1_2_r16_vals[] = { +static const value_string nr_rrc_T_pdsch_TimeDomainAllocationListDCI_1_2_r16_vals[] = { { 0, "release" }, { 1, "setup" }, { 0, NULL } }; -static const per_choice_t T_pdsch_TimeDomainAllocationListForDCI_Format1_2_r16_choice[] = { +static const per_choice_t T_pdsch_TimeDomainAllocationListDCI_1_2_r16_choice[] = { { 0, &hf_nr_rrc_release , ASN1_NO_EXTENSIONS , dissect_nr_rrc_NULL }, { 1, &hf_nr_rrc_setup_64 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_PDSCH_TimeDomainResourceAllocationList_r16 }, { 0, NULL, 0, NULL } }; static int -dissect_nr_rrc_T_pdsch_TimeDomainAllocationListForDCI_Format1_2_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { +dissect_nr_rrc_T_pdsch_TimeDomainAllocationListDCI_1_2_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { offset = dissect_per_choice(tvb, offset, actx, tree, hf_index, - ett_nr_rrc_T_pdsch_TimeDomainAllocationListForDCI_Format1_2_r16, T_pdsch_TimeDomainAllocationListForDCI_Format1_2_r16_choice, + ett_nr_rrc_T_pdsch_TimeDomainAllocationListDCI_1_2_r16, T_pdsch_TimeDomainAllocationListDCI_1_2_r16_choice, NULL); return offset; @@ -48537,36 +49113,36 @@ dissect_nr_rrc_T_dynamicBundling_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx } -static const value_string nr_rrc_T_prb_BundlingTypeForDCI_Format1_2_r16_vals[] = { +static const value_string nr_rrc_T_prb_BundlingTypeDCI_1_2_r16_vals[] = { { 0, "staticBundling-r16" }, { 1, "dynamicBundling-r16" }, { 0, NULL } }; -static const per_choice_t T_prb_BundlingTypeForDCI_Format1_2_r16_choice[] = { +static const per_choice_t T_prb_BundlingTypeDCI_1_2_r16_choice[] = { { 0, &hf_nr_rrc_staticBundling_r16, ASN1_NO_EXTENSIONS , dissect_nr_rrc_T_staticBundling_r16 }, { 1, &hf_nr_rrc_dynamicBundling_r16, ASN1_NO_EXTENSIONS , dissect_nr_rrc_T_dynamicBundling_r16 }, { 0, NULL, 0, NULL } }; static int -dissect_nr_rrc_T_prb_BundlingTypeForDCI_Format1_2_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { +dissect_nr_rrc_T_prb_BundlingTypeDCI_1_2_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { offset = dissect_per_choice(tvb, offset, actx, tree, hf_index, - ett_nr_rrc_T_prb_BundlingTypeForDCI_Format1_2_r16, T_prb_BundlingTypeForDCI_Format1_2_r16_choice, + ett_nr_rrc_T_prb_BundlingTypeDCI_1_2_r16, T_prb_BundlingTypeDCI_1_2_r16_choice, NULL); return offset; } -static const value_string nr_rrc_T_priorityIndicatorForDCI_Format1_2_r16_vals[] = { +static const value_string nr_rrc_T_priorityIndicatorDCI_1_2_r16_vals[] = { { 0, "enabled" }, { 0, NULL } }; static int -dissect_nr_rrc_T_priorityIndicatorForDCI_Format1_2_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { +dissect_nr_rrc_T_priorityIndicatorDCI_1_2_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, 1, NULL, FALSE, 0, NULL); @@ -48574,7 +49150,7 @@ dissect_nr_rrc_T_priorityIndicatorForDCI_Format1_2_r16(tvbuff_t *tvb _U_, int of } -static const value_string nr_rrc_T_resourceAllocationType1GranularityForDCI_Format1_2_r16_vals[] = { +static const value_string nr_rrc_T_resourceAllocationType1GranularityDCI_1_2_r16_vals[] = { { 0, "n2" }, { 1, "n4" }, { 2, "n8" }, @@ -48584,7 +49160,7 @@ static const value_string nr_rrc_T_resourceAllocationType1GranularityForDCI_Form static int -dissect_nr_rrc_T_resourceAllocationType1GranularityForDCI_Format1_2_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { +dissect_nr_rrc_T_resourceAllocationType1GranularityDCI_1_2_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, 4, NULL, FALSE, 0, NULL); @@ -48592,7 +49168,7 @@ dissect_nr_rrc_T_resourceAllocationType1GranularityForDCI_Format1_2_r16(tvbuff_t } -static const value_string nr_rrc_T_vrb_ToPRB_InterleaverForDCI_Format1_2_r16_vals[] = { +static const value_string nr_rrc_T_vrb_ToPRB_InterleaverDCI_1_2_r16_vals[] = { { 0, "n2" }, { 1, "n4" }, { 0, NULL } @@ -48600,7 +49176,7 @@ static const value_string nr_rrc_T_vrb_ToPRB_InterleaverForDCI_Format1_2_r16_val static int -dissect_nr_rrc_T_vrb_ToPRB_InterleaverForDCI_Format1_2_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { +dissect_nr_rrc_T_vrb_ToPRB_InterleaverDCI_1_2_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, 2, NULL, FALSE, 0, NULL); @@ -48608,14 +49184,14 @@ dissect_nr_rrc_T_vrb_ToPRB_InterleaverForDCI_Format1_2_r16(tvbuff_t *tvb _U_, in } -static const value_string nr_rrc_T_referenceOfSLIVForDCI_Format1_2_r16_vals[] = { +static const value_string nr_rrc_T_referenceOfSLIVDCI_1_2_r16_vals[] = { { 0, "enabled" }, { 0, NULL } }; static int -dissect_nr_rrc_T_referenceOfSLIVForDCI_Format1_2_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { +dissect_nr_rrc_T_referenceOfSLIVDCI_1_2_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, 1, NULL, FALSE, 0, NULL); @@ -48623,7 +49199,7 @@ dissect_nr_rrc_T_referenceOfSLIVForDCI_Format1_2_r16(tvbuff_t *tvb _U_, int offs } -static const value_string nr_rrc_T_resourceAllocationForDCI_Format1_2_r16_vals[] = { +static const value_string nr_rrc_T_resourceAllocationDCI_1_2_r16_vals[] = { { 0, "resourceAllocationType0" }, { 1, "resourceAllocationType1" }, { 2, "dynamicSwitch" }, @@ -48632,7 +49208,7 @@ static const value_string nr_rrc_T_resourceAllocationForDCI_Format1_2_r16_vals[] static int -dissect_nr_rrc_T_resourceAllocationForDCI_Format1_2_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { +dissect_nr_rrc_T_resourceAllocationDCI_1_2_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, 3, NULL, FALSE, 0, NULL); @@ -48640,14 +49216,14 @@ dissect_nr_rrc_T_resourceAllocationForDCI_Format1_2_r16(tvbuff_t *tvb _U_, int o } -static const value_string nr_rrc_T_priorityIndicatorForDCI_Format1_1_r16_vals[] = { +static const value_string nr_rrc_T_priorityIndicatorDCI_1_1_r16_vals[] = { { 0, "enabled" }, { 0, NULL } }; static int -dissect_nr_rrc_T_priorityIndicatorForDCI_Format1_1_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { +dissect_nr_rrc_T_priorityIndicatorDCI_1_1_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, 1, NULL, FALSE, 0, NULL); @@ -48717,7 +49293,7 @@ static const value_string nr_rrc_T_fdm_TDM_r16_vals[] = { static const per_choice_t T_fdm_TDM_r16_choice[] = { { 0, &hf_nr_rrc_release , ASN1_NO_EXTENSIONS , dissect_nr_rrc_NULL }, - { 1, &hf_nr_rrc_setup_93 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_FDM_TDM_r16 }, + { 1, &hf_nr_rrc_setup_94 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_FDM_TDM_r16 }, { 0, NULL, 0, NULL } }; @@ -48770,7 +49346,7 @@ static const value_string nr_rrc_T_slotBased_r16_vals[] = { static const per_choice_t T_slotBased_r16_choice[] = { { 0, &hf_nr_rrc_release , ASN1_NO_EXTENSIONS , dissect_nr_rrc_NULL }, - { 1, &hf_nr_rrc_setup_94 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_SlotBased_r16 }, + { 1, &hf_nr_rrc_setup_95 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_SlotBased_r16 }, { 0, NULL, 0, NULL } }; @@ -48831,25 +49407,25 @@ dissect_nr_rrc_T_repetitionSchemeConfig_r16(tvbuff_t *tvb _U_, int offset _U_, a static const per_sequence_t PDSCH_Config_eag_1_sequence[] = { { &hf_nr_rrc_maxMIMO_Layers_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_maxMIMO_Layers_r16 }, { &hf_nr_rrc_minimumSchedulingOffsetK0_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_minimumSchedulingOffsetK0_r16 }, - { &hf_nr_rrc_antennaPortsFieldPresenceForDCI_Format1_2_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_antennaPortsFieldPresenceForDCI_Format1_2_r16 }, - { &hf_nr_rrc_aperiodicZP_CSI_RS_ResourceSetsToAddModListForDCI_Format1_2_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_SEQUENCE_SIZE_1_maxNrofZP_CSI_RS_ResourceSets_OF_ZP_CSI_RS_ResourceSet }, - { &hf_nr_rrc_aperiodicZP_CSI_RS_ResourceSetsToReleaseListForDCI_Format1_2_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_SEQUENCE_SIZE_1_maxNrofZP_CSI_RS_ResourceSets_OF_ZP_CSI_RS_ResourceSetId }, - { &hf_nr_rrc_dmrs_DownlinkForPDSCH_MappingTypeA_ForDCI_Format1_2_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_dmrs_DownlinkForPDSCH_MappingTypeA_ForDCI_Format1_2_r16 }, - { &hf_nr_rrc_dmrs_DownlinkForPDSCH_MappingTypeB_ForDCI_Format1_2_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_dmrs_DownlinkForPDSCH_MappingTypeB_ForDCI_Format1_2_r16 }, - { &hf_nr_rrc_dmrs_SequenceInitializationForDCI_Format1_2_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_dmrs_SequenceInitializationForDCI_Format1_2_r16 }, - { &hf_nr_rrc_harq_ProcessNumberSizeForDCI_Format1_2_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_INTEGER_0_4 }, - { &hf_nr_rrc_mcs_TableForDCI_Format1_2_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_mcs_TableForDCI_Format1_2_r16 }, - { &hf_nr_rrc_numberOfBitsForRV_ForDCI_Format1_2_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_INTEGER_0_2 }, - { &hf_nr_rrc_pdsch_TimeDomainAllocationListForDCI_Format1_2_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_pdsch_TimeDomainAllocationListForDCI_Format1_2_r16 }, - { &hf_nr_rrc_prb_BundlingTypeForDCI_Format1_2_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_prb_BundlingTypeForDCI_Format1_2_r16 }, - { &hf_nr_rrc_priorityIndicatorForDCI_Format1_2_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_priorityIndicatorForDCI_Format1_2_r16 }, - { &hf_nr_rrc_rateMatchPatternGroup1ForDCI_Format1_2_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_RateMatchPatternGroup }, - { &hf_nr_rrc_rateMatchPatternGroup2ForDCI_Format1_2_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_RateMatchPatternGroup }, - { &hf_nr_rrc_resourceAllocationType1GranularityForDCI_Format1_2_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_resourceAllocationType1GranularityForDCI_Format1_2_r16 }, - { &hf_nr_rrc_vrb_ToPRB_InterleaverForDCI_Format1_2_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_vrb_ToPRB_InterleaverForDCI_Format1_2_r16 }, - { &hf_nr_rrc_referenceOfSLIVForDCI_Format1_2_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_referenceOfSLIVForDCI_Format1_2_r16 }, - { &hf_nr_rrc_resourceAllocationForDCI_Format1_2_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_resourceAllocationForDCI_Format1_2_r16 }, - { &hf_nr_rrc_priorityIndicatorForDCI_Format1_1_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_priorityIndicatorForDCI_Format1_1_r16 }, + { &hf_nr_rrc_antennaPortsFieldPresenceDCI_1_2_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_antennaPortsFieldPresenceDCI_1_2_r16 }, + { &hf_nr_rrc_aperiodicZP_CSI_RS_ResourceSetsToAddModListDCI_1_2_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_SEQUENCE_SIZE_1_maxNrofZP_CSI_RS_ResourceSets_OF_ZP_CSI_RS_ResourceSet }, + { &hf_nr_rrc_aperiodicZP_CSI_RS_ResourceSetsToReleaseListDCI_1_2_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_SEQUENCE_SIZE_1_maxNrofZP_CSI_RS_ResourceSets_OF_ZP_CSI_RS_ResourceSetId }, + { &hf_nr_rrc_dmrs_DownlinkForPDSCH_MappingTypeA_DCI_1_2_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_dmrs_DownlinkForPDSCH_MappingTypeA_DCI_1_2_r16 }, + { &hf_nr_rrc_dmrs_DownlinkForPDSCH_MappingTypeB_DCI_1_2_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_dmrs_DownlinkForPDSCH_MappingTypeB_DCI_1_2_r16 }, + { &hf_nr_rrc_dmrs_SequenceInitializationDCI_1_2_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_dmrs_SequenceInitializationDCI_1_2_r16 }, + { &hf_nr_rrc_harq_ProcessNumberSizeDCI_1_2_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_INTEGER_0_4 }, + { &hf_nr_rrc_mcs_TableDCI_1_2_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_mcs_TableDCI_1_2_r16 }, + { &hf_nr_rrc_numberOfBitsForRV_DCI_1_2_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_INTEGER_0_2 }, + { &hf_nr_rrc_pdsch_TimeDomainAllocationListDCI_1_2_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_pdsch_TimeDomainAllocationListDCI_1_2_r16 }, + { &hf_nr_rrc_prb_BundlingTypeDCI_1_2_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_prb_BundlingTypeDCI_1_2_r16 }, + { &hf_nr_rrc_priorityIndicatorDCI_1_2_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_priorityIndicatorDCI_1_2_r16 }, + { &hf_nr_rrc_rateMatchPatternGroup1DCI_1_2_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_RateMatchPatternGroup }, + { &hf_nr_rrc_rateMatchPatternGroup2DCI_1_2_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_RateMatchPatternGroup }, + { &hf_nr_rrc_resourceAllocationType1GranularityDCI_1_2_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_resourceAllocationType1GranularityDCI_1_2_r16 }, + { &hf_nr_rrc_vrb_ToPRB_InterleaverDCI_1_2_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_vrb_ToPRB_InterleaverDCI_1_2_r16 }, + { &hf_nr_rrc_referenceOfSLIVDCI_1_2_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_referenceOfSLIVDCI_1_2_r16 }, + { &hf_nr_rrc_resourceAllocationDCI_1_2_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_resourceAllocationDCI_1_2_r16 }, + { &hf_nr_rrc_priorityIndicatorDCI_1_1_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_priorityIndicatorDCI_1_1_r16 }, { &hf_nr_rrc_dataScramblingIdentityPDSCH2_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_INTEGER_0_1023 }, { &hf_nr_rrc_pdsch_TimeDomainAllocationList_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_pdsch_TimeDomainAllocationList_r16 }, { &hf_nr_rrc_repetitionSchemeConfig_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_repetitionSchemeConfig_r16 }, @@ -49864,7 +50440,7 @@ static const value_string nr_rrc_T_format1_vals[] = { static const per_choice_t T_format1_choice[] = { { 0, &hf_nr_rrc_release , ASN1_NO_EXTENSIONS , dissect_nr_rrc_NULL }, - { 1, &hf_nr_rrc_setup_75 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_PUCCH_FormatConfig }, + { 1, &hf_nr_rrc_setup_76 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_PUCCH_FormatConfig }, { 0, NULL, 0, NULL } }; @@ -49886,7 +50462,7 @@ static const value_string nr_rrc_T_format2_vals[] = { static const per_choice_t T_format2_choice[] = { { 0, &hf_nr_rrc_release , ASN1_NO_EXTENSIONS , dissect_nr_rrc_NULL }, - { 1, &hf_nr_rrc_setup_75 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_PUCCH_FormatConfig }, + { 1, &hf_nr_rrc_setup_76 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_PUCCH_FormatConfig }, { 0, NULL, 0, NULL } }; @@ -49908,7 +50484,7 @@ static const value_string nr_rrc_T_format3_vals[] = { static const per_choice_t T_format3_choice[] = { { 0, &hf_nr_rrc_release , ASN1_NO_EXTENSIONS , dissect_nr_rrc_NULL }, - { 1, &hf_nr_rrc_setup_75 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_PUCCH_FormatConfig }, + { 1, &hf_nr_rrc_setup_76 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_PUCCH_FormatConfig }, { 0, NULL, 0, NULL } }; @@ -49930,7 +50506,7 @@ static const value_string nr_rrc_T_format4_vals[] = { static const per_choice_t T_format4_choice[] = { { 0, &hf_nr_rrc_release , ASN1_NO_EXTENSIONS , dissect_nr_rrc_NULL }, - { 1, &hf_nr_rrc_setup_75 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_PUCCH_FormatConfig }, + { 1, &hf_nr_rrc_setup_76 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_PUCCH_FormatConfig }, { 0, NULL, 0, NULL } }; @@ -50373,7 +50949,7 @@ static const value_string nr_rrc_T_pathlossReferenceRSs_v1610_vals[] = { static const per_choice_t T_pathlossReferenceRSs_v1610_choice[] = { { 0, &hf_nr_rrc_release , ASN1_NO_EXTENSIONS , dissect_nr_rrc_NULL }, - { 1, &hf_nr_rrc_setup_80 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_PathlossReferenceRSs_v1610 }, + { 1, &hf_nr_rrc_setup_81 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_PathlossReferenceRSs_v1610 }, { 0, NULL, 0, NULL } }; @@ -50591,7 +51167,7 @@ static const value_string nr_rrc_T_dl_DataToUL_ACK_r16_vals[] = { static const per_choice_t T_dl_DataToUL_ACK_r16_choice[] = { { 0, &hf_nr_rrc_release , ASN1_NO_EXTENSIONS , dissect_nr_rrc_NULL }, - { 1, &hf_nr_rrc_setup_76 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_DL_DataToUL_ACK_r16 }, + { 1, &hf_nr_rrc_setup_77 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_DL_DataToUL_ACK_r16 }, { 0, NULL, 0, NULL } }; @@ -50605,36 +51181,36 @@ dissect_nr_rrc_T_dl_DataToUL_ACK_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx } -static const per_sequence_t UL_AccessConfigListForDCI_Format1_1_r16_sequence_of[1] = { - { &hf_nr_rrc_UL_AccessConfigListForDCI_Format1_1_r16_item, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_INTEGER_0_15 }, +static const per_sequence_t UL_AccessConfigListDCI_1_1_r16_sequence_of[1] = { + { &hf_nr_rrc_UL_AccessConfigListDCI_1_1_r16_item, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_INTEGER_0_15 }, }; static int -dissect_nr_rrc_UL_AccessConfigListForDCI_Format1_1_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { +dissect_nr_rrc_UL_AccessConfigListDCI_1_1_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { offset = dissect_per_constrained_sequence_of(tvb, offset, actx, tree, hf_index, - ett_nr_rrc_UL_AccessConfigListForDCI_Format1_1_r16, UL_AccessConfigListForDCI_Format1_1_r16_sequence_of, + ett_nr_rrc_UL_AccessConfigListDCI_1_1_r16, UL_AccessConfigListDCI_1_1_r16_sequence_of, 1, 16, FALSE); return offset; } -static const value_string nr_rrc_T_ul_AccessConfigListForDCI_Format_1_1_r16_vals[] = { +static const value_string nr_rrc_T_ul_AccessConfigListDCI_1_1_r16_vals[] = { { 0, "release" }, { 1, "setup" }, { 0, NULL } }; -static const per_choice_t T_ul_AccessConfigListForDCI_Format_1_1_r16_choice[] = { +static const per_choice_t T_ul_AccessConfigListDCI_1_1_r16_choice[] = { { 0, &hf_nr_rrc_release , ASN1_NO_EXTENSIONS , dissect_nr_rrc_NULL }, - { 1, &hf_nr_rrc_setup_77 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_UL_AccessConfigListForDCI_Format1_1_r16 }, + { 1, &hf_nr_rrc_setup_78 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_UL_AccessConfigListDCI_1_1_r16 }, { 0, NULL, 0, NULL } }; static int -dissect_nr_rrc_T_ul_AccessConfigListForDCI_Format_1_1_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { +dissect_nr_rrc_T_ul_AccessConfigListDCI_1_1_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { offset = dissect_per_choice(tvb, offset, actx, tree, hf_index, - ett_nr_rrc_T_ul_AccessConfigListForDCI_Format_1_1_r16, T_ul_AccessConfigListForDCI_Format_1_1_r16_choice, + ett_nr_rrc_T_ul_AccessConfigListDCI_1_1_r16, T_ul_AccessConfigListDCI_1_1_r16_choice, NULL); return offset; @@ -50695,36 +51271,36 @@ dissect_nr_rrc_T_subslotLengthForPUCCH_r16(tvbuff_t *tvb _U_, int offset _U_, as } -static const per_sequence_t DL_DataToUL_ACK_ForDCI_Format1_2_r16_sequence_of[1] = { - { &hf_nr_rrc_DL_DataToUL_ACK_ForDCI_Format1_2_r16_item, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_INTEGER_0_15 }, +static const per_sequence_t DL_DataToUL_ACK_DCI_1_2_r16_sequence_of[1] = { + { &hf_nr_rrc_DL_DataToUL_ACK_DCI_1_2_r16_item, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_INTEGER_0_15 }, }; static int -dissect_nr_rrc_DL_DataToUL_ACK_ForDCI_Format1_2_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { +dissect_nr_rrc_DL_DataToUL_ACK_DCI_1_2_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { offset = dissect_per_constrained_sequence_of(tvb, offset, actx, tree, hf_index, - ett_nr_rrc_DL_DataToUL_ACK_ForDCI_Format1_2_r16, DL_DataToUL_ACK_ForDCI_Format1_2_r16_sequence_of, + ett_nr_rrc_DL_DataToUL_ACK_DCI_1_2_r16, DL_DataToUL_ACK_DCI_1_2_r16_sequence_of, 1, 8, FALSE); return offset; } -static const value_string nr_rrc_T_dl_DataToUL_ACK_ForDCI_Format1_2_r16_vals[] = { +static const value_string nr_rrc_T_dl_DataToUL_ACK_DCI_1_2_r16_vals[] = { { 0, "release" }, { 1, "setup" }, { 0, NULL } }; -static const per_choice_t T_dl_DataToUL_ACK_ForDCI_Format1_2_r16_choice[] = { +static const per_choice_t T_dl_DataToUL_ACK_DCI_1_2_r16_choice[] = { { 0, &hf_nr_rrc_release , ASN1_NO_EXTENSIONS , dissect_nr_rrc_NULL }, - { 1, &hf_nr_rrc_setup_78 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_DL_DataToUL_ACK_ForDCI_Format1_2_r16 }, + { 1, &hf_nr_rrc_setup_79 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_DL_DataToUL_ACK_DCI_1_2_r16 }, { 0, NULL, 0, NULL } }; static int -dissect_nr_rrc_T_dl_DataToUL_ACK_ForDCI_Format1_2_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { +dissect_nr_rrc_T_dl_DataToUL_ACK_DCI_1_2_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { offset = dissect_per_choice(tvb, offset, actx, tree, hf_index, - ett_nr_rrc_T_dl_DataToUL_ACK_ForDCI_Format1_2_r16, T_dl_DataToUL_ACK_ForDCI_Format1_2_r16_choice, + ett_nr_rrc_T_dl_DataToUL_ACK_DCI_1_2_r16, T_dl_DataToUL_ACK_DCI_1_2_r16_choice, NULL); return offset; @@ -50941,7 +51517,7 @@ static const value_string nr_rrc_T_sps_PUCCH_AN_List_r16_vals[] = { static const per_choice_t T_sps_PUCCH_AN_List_r16_choice[] = { { 0, &hf_nr_rrc_release , ASN1_NO_EXTENSIONS , dissect_nr_rrc_NULL }, - { 1, &hf_nr_rrc_setup_79 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_SPS_PUCCH_AN_List_r16 }, + { 1, &hf_nr_rrc_setup_80 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_SPS_PUCCH_AN_List_r16 }, { 0, NULL, 0, NULL } }; @@ -51002,10 +51578,10 @@ dissect_nr_rrc_SEQUENCE_SIZE_1_maxNrofSR_Resources_OF_SchedulingRequestResourceC static const per_sequence_t PUCCH_Config_eag_1_sequence[] = { { &hf_nr_rrc_resourceToAddModListExt_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_SEQUENCE_SIZE_1_maxNrofPUCCH_Resources_OF_PUCCH_ResourceExt_r16 }, { &hf_nr_rrc_dl_DataToUL_ACK_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_dl_DataToUL_ACK_r16 }, - { &hf_nr_rrc_ul_AccessConfigListForDCI_Format_1_1_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_ul_AccessConfigListForDCI_Format_1_1_r16 }, + { &hf_nr_rrc_ul_AccessConfigListDCI_1_1_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_ul_AccessConfigListDCI_1_1_r16 }, { &hf_nr_rrc_subslotLengthForPUCCH_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_subslotLengthForPUCCH_r16 }, - { &hf_nr_rrc_dl_DataToUL_ACK_ForDCI_Format1_2_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_dl_DataToUL_ACK_ForDCI_Format1_2_r16 }, - { &hf_nr_rrc_numberOfBitsForPUCCH_ResourceIndicatorForDCI_Format1_2_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_INTEGER_0_3 }, + { &hf_nr_rrc_dl_DataToUL_ACK_DCI_1_2_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_dl_DataToUL_ACK_DCI_1_2_r16 }, + { &hf_nr_rrc_numberOfBitsForPUCCH_ResourceIndicatorDCI_1_2_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_INTEGER_0_3 }, { &hf_nr_rrc_dmrs_UplinkTransformPrecodingPUCCH_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_dmrs_UplinkTransformPrecodingPUCCH_r16 }, { &hf_nr_rrc_spatialRelationInfoToAddModList2_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_SEQUENCE_SIZE_1_maxNrofSpatialRelationInfosDiff_r16_OF_PUCCH_SpatialRelationInfo }, { &hf_nr_rrc_spatialRelationInfoToReleaseList2_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_SEQUENCE_SIZE_1_maxNrofSpatialRelationInfosDiff_r16_OF_PUCCH_SpatialRelationInfoId }, @@ -51496,7 +52072,7 @@ static const value_string nr_rrc_T_dmrs_UplinkForPUSCH_MappingTypeA_vals[] = { static const per_choice_t T_dmrs_UplinkForPUSCH_MappingTypeA_choice[] = { { 0, &hf_nr_rrc_release , ASN1_NO_EXTENSIONS , dissect_nr_rrc_NULL }, - { 1, &hf_nr_rrc_setup_81 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_DMRS_UplinkConfig }, + { 1, &hf_nr_rrc_setup_82 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_DMRS_UplinkConfig }, { 0, NULL, 0, NULL } }; @@ -51518,7 +52094,7 @@ static const value_string nr_rrc_T_dmrs_UplinkForPUSCH_MappingTypeB_vals[] = { static const per_choice_t T_dmrs_UplinkForPUSCH_MappingTypeB_choice[] = { { 0, &hf_nr_rrc_release , ASN1_NO_EXTENSIONS , dissect_nr_rrc_NULL }, - { 1, &hf_nr_rrc_setup_81 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_DMRS_UplinkConfig }, + { 1, &hf_nr_rrc_setup_82 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_DMRS_UplinkConfig }, { 0, NULL, 0, NULL } }; @@ -51851,7 +52427,7 @@ static const value_string nr_rrc_T_pusch_TimeDomainAllocationList_vals[] = { static const per_choice_t T_pusch_TimeDomainAllocationList_choice[] = { { 0, &hf_nr_rrc_release , ASN1_NO_EXTENSIONS , dissect_nr_rrc_NULL }, - { 1, &hf_nr_rrc_setup_82 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_PUSCH_TimeDomainResourceAllocationList }, + { 1, &hf_nr_rrc_setup_83 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_PUSCH_TimeDomainResourceAllocationList }, { 0, NULL, 0, NULL } }; @@ -52039,7 +52615,7 @@ static const value_string nr_rrc_T_uci_OnPUSCH_01_vals[] = { static const per_choice_t T_uci_OnPUSCH_01_choice[] = { { 0, &hf_nr_rrc_release , ASN1_NO_EXTENSIONS , dissect_nr_rrc_NULL }, - { 1, &hf_nr_rrc_setup_83 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_UCI_OnPUSCH }, + { 1, &hf_nr_rrc_setup_84 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_UCI_OnPUSCH }, { 0, NULL, 0, NULL } }; @@ -52100,7 +52676,7 @@ static const value_string nr_rrc_T_minimumSchedulingOffsetK2_r16_vals[] = { static const per_choice_t T_minimumSchedulingOffsetK2_r16_choice[] = { { 0, &hf_nr_rrc_release , ASN1_NO_EXTENSIONS , dissect_nr_rrc_NULL }, - { 1, &hf_nr_rrc_setup_84 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_MinSchedulingOffsetK2_Values_r16 }, + { 1, &hf_nr_rrc_setup_85 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_MinSchedulingOffsetK2_Values_r16 }, { 0, NULL, 0, NULL } }; @@ -52114,50 +52690,50 @@ dissect_nr_rrc_T_minimumSchedulingOffsetK2_r16(tvbuff_t *tvb _U_, int offset _U_ } -static const per_sequence_t UL_AccessConfigListForDCI_Format0_1_r16_sequence_of[1] = { - { &hf_nr_rrc_UL_AccessConfigListForDCI_Format0_1_r16_item, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_INTEGER_0_63 }, +static const per_sequence_t UL_AccessConfigListDCI_0_1_r16_sequence_of[1] = { + { &hf_nr_rrc_UL_AccessConfigListDCI_0_1_r16_item, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_INTEGER_0_63 }, }; static int -dissect_nr_rrc_UL_AccessConfigListForDCI_Format0_1_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { +dissect_nr_rrc_UL_AccessConfigListDCI_0_1_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { offset = dissect_per_constrained_sequence_of(tvb, offset, actx, tree, hf_index, - ett_nr_rrc_UL_AccessConfigListForDCI_Format0_1_r16, UL_AccessConfigListForDCI_Format0_1_r16_sequence_of, + ett_nr_rrc_UL_AccessConfigListDCI_0_1_r16, UL_AccessConfigListDCI_0_1_r16_sequence_of, 1, 64, FALSE); return offset; } -static const value_string nr_rrc_T_ul_AccessConfigListForDCI_Format0_1_r16_vals[] = { +static const value_string nr_rrc_T_ul_AccessConfigListDCI_0_1_r16_vals[] = { { 0, "release" }, { 1, "setup" }, { 0, NULL } }; -static const per_choice_t T_ul_AccessConfigListForDCI_Format0_1_r16_choice[] = { +static const per_choice_t T_ul_AccessConfigListDCI_0_1_r16_choice[] = { { 0, &hf_nr_rrc_release , ASN1_NO_EXTENSIONS , dissect_nr_rrc_NULL }, - { 1, &hf_nr_rrc_setup_85 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_UL_AccessConfigListForDCI_Format0_1_r16 }, + { 1, &hf_nr_rrc_setup_86 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_UL_AccessConfigListDCI_0_1_r16 }, { 0, NULL, 0, NULL } }; static int -dissect_nr_rrc_T_ul_AccessConfigListForDCI_Format0_1_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { +dissect_nr_rrc_T_ul_AccessConfigListDCI_0_1_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { offset = dissect_per_choice(tvb, offset, actx, tree, hf_index, - ett_nr_rrc_T_ul_AccessConfigListForDCI_Format0_1_r16, T_ul_AccessConfigListForDCI_Format0_1_r16_choice, + ett_nr_rrc_T_ul_AccessConfigListDCI_0_1_r16, T_ul_AccessConfigListDCI_0_1_r16_choice, NULL); return offset; } -static const value_string nr_rrc_T_dmrs_SequenceInitializationForDCI_Format0_2_r16_vals[] = { +static const value_string nr_rrc_T_dmrs_SequenceInitializationDCI_0_2_r16_vals[] = { { 0, "enabled" }, { 0, NULL } }; static int -dissect_nr_rrc_T_dmrs_SequenceInitializationForDCI_Format0_2_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { +dissect_nr_rrc_T_dmrs_SequenceInitializationDCI_0_2_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, 1, NULL, FALSE, 0, NULL); @@ -52165,14 +52741,14 @@ dissect_nr_rrc_T_dmrs_SequenceInitializationForDCI_Format0_2_r16(tvbuff_t *tvb _ } -static const value_string nr_rrc_T_antennaPortsFieldPresenceForDCI_Format0_2_r16_vals[] = { +static const value_string nr_rrc_T_antennaPortsFieldPresenceDCI_0_2_r16_vals[] = { { 0, "enabled" }, { 0, NULL } }; static int -dissect_nr_rrc_T_antennaPortsFieldPresenceForDCI_Format0_2_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { +dissect_nr_rrc_T_antennaPortsFieldPresenceDCI_0_2_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, 1, NULL, FALSE, 0, NULL); @@ -52180,44 +52756,44 @@ dissect_nr_rrc_T_antennaPortsFieldPresenceForDCI_Format0_2_r16(tvbuff_t *tvb _U_ } -static const value_string nr_rrc_T_dmrs_UplinkForPUSCH_MappingTypeA_ForDCI_Format0_2_r16_vals[] = { +static const value_string nr_rrc_T_dmrs_UplinkForPUSCH_MappingTypeA_DCI_0_2_r16_vals[] = { { 0, "release" }, { 1, "setup" }, { 0, NULL } }; -static const per_choice_t T_dmrs_UplinkForPUSCH_MappingTypeA_ForDCI_Format0_2_r16_choice[] = { +static const per_choice_t T_dmrs_UplinkForPUSCH_MappingTypeA_DCI_0_2_r16_choice[] = { { 0, &hf_nr_rrc_release , ASN1_NO_EXTENSIONS , dissect_nr_rrc_NULL }, - { 1, &hf_nr_rrc_setup_81 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_DMRS_UplinkConfig }, + { 1, &hf_nr_rrc_setup_82 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_DMRS_UplinkConfig }, { 0, NULL, 0, NULL } }; static int -dissect_nr_rrc_T_dmrs_UplinkForPUSCH_MappingTypeA_ForDCI_Format0_2_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { +dissect_nr_rrc_T_dmrs_UplinkForPUSCH_MappingTypeA_DCI_0_2_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { offset = dissect_per_choice(tvb, offset, actx, tree, hf_index, - ett_nr_rrc_T_dmrs_UplinkForPUSCH_MappingTypeA_ForDCI_Format0_2_r16, T_dmrs_UplinkForPUSCH_MappingTypeA_ForDCI_Format0_2_r16_choice, + ett_nr_rrc_T_dmrs_UplinkForPUSCH_MappingTypeA_DCI_0_2_r16, T_dmrs_UplinkForPUSCH_MappingTypeA_DCI_0_2_r16_choice, NULL); return offset; } -static const value_string nr_rrc_T_dmrs_UplinkForPUSCH_MappingTypeB_ForDCI_Format0_2_r16_vals[] = { +static const value_string nr_rrc_T_dmrs_UplinkForPUSCH_MappingTypeB_DCI_0_2_r16_vals[] = { { 0, "release" }, { 1, "setup" }, { 0, NULL } }; -static const per_choice_t T_dmrs_UplinkForPUSCH_MappingTypeB_ForDCI_Format0_2_r16_choice[] = { +static const per_choice_t T_dmrs_UplinkForPUSCH_MappingTypeB_DCI_0_2_r16_choice[] = { { 0, &hf_nr_rrc_release , ASN1_NO_EXTENSIONS , dissect_nr_rrc_NULL }, - { 1, &hf_nr_rrc_setup_81 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_DMRS_UplinkConfig }, + { 1, &hf_nr_rrc_setup_82 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_DMRS_UplinkConfig }, { 0, NULL, 0, NULL } }; static int -dissect_nr_rrc_T_dmrs_UplinkForPUSCH_MappingTypeB_ForDCI_Format0_2_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { +dissect_nr_rrc_T_dmrs_UplinkForPUSCH_MappingTypeB_DCI_0_2_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { offset = dissect_per_choice(tvb, offset, actx, tree, hf_index, - ett_nr_rrc_T_dmrs_UplinkForPUSCH_MappingTypeB_ForDCI_Format0_2_r16, T_dmrs_UplinkForPUSCH_MappingTypeB_ForDCI_Format0_2_r16_choice, + ett_nr_rrc_T_dmrs_UplinkForPUSCH_MappingTypeB_DCI_0_2_r16, T_dmrs_UplinkForPUSCH_MappingTypeB_DCI_0_2_r16_choice, NULL); return offset; @@ -52256,65 +52832,65 @@ dissect_nr_rrc_T_pusch_RepTypeB(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *a } -static const value_string nr_rrc_T_frequencyHoppingForDCI_Format0_2_r16_vals[] = { +static const value_string nr_rrc_T_frequencyHoppingDCI_0_2_r16_vals[] = { { 0, "pusch-RepTypeA" }, { 1, "pusch-RepTypeB" }, { 0, NULL } }; -static const per_choice_t T_frequencyHoppingForDCI_Format0_2_r16_choice[] = { +static const per_choice_t T_frequencyHoppingDCI_0_2_r16_choice[] = { { 0, &hf_nr_rrc_pusch_RepTypeA, ASN1_NO_EXTENSIONS , dissect_nr_rrc_T_pusch_RepTypeA }, { 1, &hf_nr_rrc_pusch_RepTypeB, ASN1_NO_EXTENSIONS , dissect_nr_rrc_T_pusch_RepTypeB }, { 0, NULL, 0, NULL } }; static int -dissect_nr_rrc_T_frequencyHoppingForDCI_Format0_2_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { +dissect_nr_rrc_T_frequencyHoppingDCI_0_2_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { offset = dissect_per_choice(tvb, offset, actx, tree, hf_index, - ett_nr_rrc_T_frequencyHoppingForDCI_Format0_2_r16, T_frequencyHoppingForDCI_Format0_2_r16_choice, + ett_nr_rrc_T_frequencyHoppingDCI_0_2_r16, T_frequencyHoppingDCI_0_2_r16_choice, NULL); return offset; } -static const per_sequence_t FrequencyHoppingOffsetListsForDCI_Format0_2_r16_sequence_of[1] = { - { &hf_nr_rrc_FrequencyHoppingOffsetListsForDCI_Format0_2_r16_item, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_INTEGER_1_maxNrofPhysicalResourceBlocks_1 }, +static const per_sequence_t FrequencyHoppingOffsetListsDCI_0_2_r16_sequence_of[1] = { + { &hf_nr_rrc_FrequencyHoppingOffsetListsDCI_0_2_r16_item, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_INTEGER_1_maxNrofPhysicalResourceBlocks_1 }, }; static int -dissect_nr_rrc_FrequencyHoppingOffsetListsForDCI_Format0_2_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { +dissect_nr_rrc_FrequencyHoppingOffsetListsDCI_0_2_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { offset = dissect_per_constrained_sequence_of(tvb, offset, actx, tree, hf_index, - ett_nr_rrc_FrequencyHoppingOffsetListsForDCI_Format0_2_r16, FrequencyHoppingOffsetListsForDCI_Format0_2_r16_sequence_of, + ett_nr_rrc_FrequencyHoppingOffsetListsDCI_0_2_r16, FrequencyHoppingOffsetListsDCI_0_2_r16_sequence_of, 1, 4, FALSE); return offset; } -static const value_string nr_rrc_T_frequencyHoppingOffsetListsForDCI_Format0_2_r16_vals[] = { +static const value_string nr_rrc_T_frequencyHoppingOffsetListsDCI_0_2_r16_vals[] = { { 0, "release" }, { 1, "setup" }, { 0, NULL } }; -static const per_choice_t T_frequencyHoppingOffsetListsForDCI_Format0_2_r16_choice[] = { +static const per_choice_t T_frequencyHoppingOffsetListsDCI_0_2_r16_choice[] = { { 0, &hf_nr_rrc_release , ASN1_NO_EXTENSIONS , dissect_nr_rrc_NULL }, - { 1, &hf_nr_rrc_setup_86 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_FrequencyHoppingOffsetListsForDCI_Format0_2_r16 }, + { 1, &hf_nr_rrc_setup_87 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_FrequencyHoppingOffsetListsDCI_0_2_r16 }, { 0, NULL, 0, NULL } }; static int -dissect_nr_rrc_T_frequencyHoppingOffsetListsForDCI_Format0_2_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { +dissect_nr_rrc_T_frequencyHoppingOffsetListsDCI_0_2_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { offset = dissect_per_choice(tvb, offset, actx, tree, hf_index, - ett_nr_rrc_T_frequencyHoppingOffsetListsForDCI_Format0_2_r16, T_frequencyHoppingOffsetListsForDCI_Format0_2_r16_choice, + ett_nr_rrc_T_frequencyHoppingOffsetListsDCI_0_2_r16, T_frequencyHoppingOffsetListsDCI_0_2_r16_choice, NULL); return offset; } -static const value_string nr_rrc_T_codebookSubsetForDCI_Format0_2_r16_vals[] = { +static const value_string nr_rrc_T_codebookSubsetDCI_0_2_r16_vals[] = { { 0, "fullyAndPartialAndNonCoherent" }, { 1, "partialAndNonCoherent" }, { 2, "nonCoherent" }, @@ -52323,7 +52899,7 @@ static const value_string nr_rrc_T_codebookSubsetForDCI_Format0_2_r16_vals[] = { static int -dissect_nr_rrc_T_codebookSubsetForDCI_Format0_2_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { +dissect_nr_rrc_T_codebookSubsetDCI_0_2_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, 3, NULL, FALSE, 0, NULL); @@ -52331,14 +52907,14 @@ dissect_nr_rrc_T_codebookSubsetForDCI_Format0_2_r16(tvbuff_t *tvb _U_, int offse } -static const value_string nr_rrc_T_invalidSymbolPatternIndicatorForDCI_Format0_2_r16_vals[] = { +static const value_string nr_rrc_T_invalidSymbolPatternIndicatorDCI_0_2_r16_vals[] = { { 0, "enabled" }, { 0, NULL } }; static int -dissect_nr_rrc_T_invalidSymbolPatternIndicatorForDCI_Format0_2_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { +dissect_nr_rrc_T_invalidSymbolPatternIndicatorDCI_0_2_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, 1, NULL, FALSE, 0, NULL); @@ -52346,7 +52922,7 @@ dissect_nr_rrc_T_invalidSymbolPatternIndicatorForDCI_Format0_2_r16(tvbuff_t *tvb } -static const value_string nr_rrc_T_mcs_TableForDCI_Format0_2_r16_vals[] = { +static const value_string nr_rrc_T_mcs_TableDCI_0_2_r16_vals[] = { { 0, "qam256" }, { 1, "qam64LowSE" }, { 0, NULL } @@ -52354,7 +52930,7 @@ static const value_string nr_rrc_T_mcs_TableForDCI_Format0_2_r16_vals[] = { static int -dissect_nr_rrc_T_mcs_TableForDCI_Format0_2_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { +dissect_nr_rrc_T_mcs_TableDCI_0_2_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, 2, NULL, FALSE, 0, NULL); @@ -52362,7 +52938,7 @@ dissect_nr_rrc_T_mcs_TableForDCI_Format0_2_r16(tvbuff_t *tvb _U_, int offset _U_ } -static const value_string nr_rrc_T_mcs_TableTransformPrecoderForDCI_Format0_2_r16_vals[] = { +static const value_string nr_rrc_T_mcs_TableTransformPrecoderDCI_0_2_r16_vals[] = { { 0, "qam256" }, { 1, "qam64LowSE" }, { 0, NULL } @@ -52370,7 +52946,7 @@ static const value_string nr_rrc_T_mcs_TableTransformPrecoderForDCI_Format0_2_r1 static int -dissect_nr_rrc_T_mcs_TableTransformPrecoderForDCI_Format0_2_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { +dissect_nr_rrc_T_mcs_TableTransformPrecoderDCI_0_2_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, 2, NULL, FALSE, 0, NULL); @@ -52378,14 +52954,14 @@ dissect_nr_rrc_T_mcs_TableTransformPrecoderForDCI_Format0_2_r16(tvbuff_t *tvb _U } -static const value_string nr_rrc_T_priorityIndicatorForDCI_Format0_2_r16_vals[] = { +static const value_string nr_rrc_T_priorityIndicatorDCI_0_2_r16_vals[] = { { 0, "enabled" }, { 0, NULL } }; static int -dissect_nr_rrc_T_priorityIndicatorForDCI_Format0_2_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { +dissect_nr_rrc_T_priorityIndicatorDCI_0_2_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, 1, NULL, FALSE, 0, NULL); @@ -52393,7 +52969,7 @@ dissect_nr_rrc_T_priorityIndicatorForDCI_Format0_2_r16(tvbuff_t *tvb _U_, int of } -static const value_string nr_rrc_T_pusch_RepTypeIndicatorForDCI_Format0_2_r16_vals[] = { +static const value_string nr_rrc_T_pusch_RepTypeIndicatorDCI_0_2_r16_vals[] = { { 0, "pusch-RepTypeA" }, { 1, "pusch-RepTypeB" }, { 0, NULL } @@ -52401,7 +52977,7 @@ static const value_string nr_rrc_T_pusch_RepTypeIndicatorForDCI_Format0_2_r16_va static int -dissect_nr_rrc_T_pusch_RepTypeIndicatorForDCI_Format0_2_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { +dissect_nr_rrc_T_pusch_RepTypeIndicatorDCI_0_2_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, 2, NULL, FALSE, 0, NULL); @@ -52409,7 +52985,7 @@ dissect_nr_rrc_T_pusch_RepTypeIndicatorForDCI_Format0_2_r16(tvbuff_t *tvb _U_, i } -static const value_string nr_rrc_T_resourceAllocationForDCI_Format0_2_r16_vals[] = { +static const value_string nr_rrc_T_resourceAllocationDCI_0_2_r16_vals[] = { { 0, "resourceAllocationType0" }, { 1, "resourceAllocationType1" }, { 2, "dynamicSwitch" }, @@ -52418,7 +52994,7 @@ static const value_string nr_rrc_T_resourceAllocationForDCI_Format0_2_r16_vals[] static int -dissect_nr_rrc_T_resourceAllocationForDCI_Format0_2_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { +dissect_nr_rrc_T_resourceAllocationDCI_0_2_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, 3, NULL, FALSE, 0, NULL); @@ -52426,7 +53002,7 @@ dissect_nr_rrc_T_resourceAllocationForDCI_Format0_2_r16(tvbuff_t *tvb _U_, int o } -static const value_string nr_rrc_T_resourceAllocationType1GranularityForDCI_Format0_2_r16_vals[] = { +static const value_string nr_rrc_T_resourceAllocationType1GranularityDCI_0_2_r16_vals[] = { { 0, "n2" }, { 1, "n4" }, { 2, "n8" }, @@ -52436,7 +53012,7 @@ static const value_string nr_rrc_T_resourceAllocationType1GranularityForDCI_Form static int -dissect_nr_rrc_T_resourceAllocationType1GranularityForDCI_Format0_2_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { +dissect_nr_rrc_T_resourceAllocationType1GranularityDCI_0_2_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, 4, NULL, FALSE, 0, NULL); @@ -52458,51 +53034,51 @@ dissect_nr_rrc_SEQUENCE_SIZE_2_OF_BetaOffsets(tvbuff_t *tvb _U_, int offset _U_, } -static const value_string nr_rrc_T_dynamicForDCI_Format0_2_r16_vals[] = { +static const value_string nr_rrc_T_dynamicDCI_0_2_r16_vals[] = { { 0, "oneBit-r16" }, { 1, "twoBits-r16" }, { 0, NULL } }; -static const per_choice_t T_dynamicForDCI_Format0_2_r16_choice[] = { +static const per_choice_t T_dynamicDCI_0_2_r16_choice[] = { { 0, &hf_nr_rrc_oneBit_r16 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_SEQUENCE_SIZE_2_OF_BetaOffsets }, { 1, &hf_nr_rrc_twoBits_r16 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_SEQUENCE_SIZE_4_OF_BetaOffsets }, { 0, NULL, 0, NULL } }; static int -dissect_nr_rrc_T_dynamicForDCI_Format0_2_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { +dissect_nr_rrc_T_dynamicDCI_0_2_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { offset = dissect_per_choice(tvb, offset, actx, tree, hf_index, - ett_nr_rrc_T_dynamicForDCI_Format0_2_r16, T_dynamicForDCI_Format0_2_r16_choice, + ett_nr_rrc_T_dynamicDCI_0_2_r16, T_dynamicDCI_0_2_r16_choice, NULL); return offset; } -static const value_string nr_rrc_T_betaOffsetsForDCI_Format0_2_r16_vals[] = { - { 0, "dynamicForDCI-Format0-2-r16" }, - { 1, "semiStaticForDCI-Format0-2-r16" }, +static const value_string nr_rrc_T_betaOffsetsDCI_0_2_r16_vals[] = { + { 0, "dynamicDCI-0-2-r16" }, + { 1, "semiStaticDCI-0-2-r16" }, { 0, NULL } }; -static const per_choice_t T_betaOffsetsForDCI_Format0_2_r16_choice[] = { - { 0, &hf_nr_rrc_dynamicForDCI_Format0_2_r16, ASN1_NO_EXTENSIONS , dissect_nr_rrc_T_dynamicForDCI_Format0_2_r16 }, - { 1, &hf_nr_rrc_semiStaticForDCI_Format0_2_r16, ASN1_NO_EXTENSIONS , dissect_nr_rrc_BetaOffsets }, +static const per_choice_t T_betaOffsetsDCI_0_2_r16_choice[] = { + { 0, &hf_nr_rrc_dynamicDCI_0_2_r16, ASN1_NO_EXTENSIONS , dissect_nr_rrc_T_dynamicDCI_0_2_r16 }, + { 1, &hf_nr_rrc_semiStaticDCI_0_2_r16, ASN1_NO_EXTENSIONS , dissect_nr_rrc_BetaOffsets }, { 0, NULL, 0, NULL } }; static int -dissect_nr_rrc_T_betaOffsetsForDCI_Format0_2_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { +dissect_nr_rrc_T_betaOffsetsDCI_0_2_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { offset = dissect_per_choice(tvb, offset, actx, tree, hf_index, - ett_nr_rrc_T_betaOffsetsForDCI_Format0_2_r16, T_betaOffsetsForDCI_Format0_2_r16_choice, + ett_nr_rrc_T_betaOffsetsDCI_0_2_r16, T_betaOffsetsDCI_0_2_r16_choice, NULL); return offset; } -static const value_string nr_rrc_T_scalingForDCI_Format0_2_r16_vals[] = { +static const value_string nr_rrc_T_scalingDCI_0_2_r16_vals[] = { { 0, "f0p5" }, { 1, "f0p65" }, { 2, "f0p8" }, @@ -52512,7 +53088,7 @@ static const value_string nr_rrc_T_scalingForDCI_Format0_2_r16_vals[] = { static int -dissect_nr_rrc_T_scalingForDCI_Format0_2_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { +dissect_nr_rrc_T_scalingDCI_0_2_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, 4, NULL, FALSE, 0, NULL); @@ -52520,51 +53096,51 @@ dissect_nr_rrc_T_scalingForDCI_Format0_2_r16(tvbuff_t *tvb _U_, int offset _U_, } -static const per_sequence_t UCI_OnPUSCH_ForDCI_Format0_2_r16_sequence[] = { - { &hf_nr_rrc_betaOffsetsForDCI_Format0_2_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_betaOffsetsForDCI_Format0_2_r16 }, - { &hf_nr_rrc_scalingForDCI_Format0_2_r16, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_T_scalingForDCI_Format0_2_r16 }, +static const per_sequence_t UCI_OnPUSCH_DCI_0_2_r16_sequence[] = { + { &hf_nr_rrc_betaOffsetsDCI_0_2_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_betaOffsetsDCI_0_2_r16 }, + { &hf_nr_rrc_scalingDCI_0_2_r16, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_T_scalingDCI_0_2_r16 }, { NULL, 0, 0, NULL } }; static int -dissect_nr_rrc_UCI_OnPUSCH_ForDCI_Format0_2_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { +dissect_nr_rrc_UCI_OnPUSCH_DCI_0_2_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { offset = dissect_per_sequence(tvb, offset, actx, tree, hf_index, - ett_nr_rrc_UCI_OnPUSCH_ForDCI_Format0_2_r16, UCI_OnPUSCH_ForDCI_Format0_2_r16_sequence); + ett_nr_rrc_UCI_OnPUSCH_DCI_0_2_r16, UCI_OnPUSCH_DCI_0_2_r16_sequence); return offset; } -static const per_sequence_t UCI_OnPUSCH_ListForDCI_Format0_2_r16_sequence_of[1] = { - { &hf_nr_rrc_UCI_OnPUSCH_ListForDCI_Format0_2_r16_item, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_UCI_OnPUSCH_ForDCI_Format0_2_r16 }, +static const per_sequence_t UCI_OnPUSCH_ListDCI_0_2_r16_sequence_of[1] = { + { &hf_nr_rrc_UCI_OnPUSCH_ListDCI_0_2_r16_item, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_UCI_OnPUSCH_DCI_0_2_r16 }, }; static int -dissect_nr_rrc_UCI_OnPUSCH_ListForDCI_Format0_2_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { +dissect_nr_rrc_UCI_OnPUSCH_ListDCI_0_2_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { offset = dissect_per_constrained_sequence_of(tvb, offset, actx, tree, hf_index, - ett_nr_rrc_UCI_OnPUSCH_ListForDCI_Format0_2_r16, UCI_OnPUSCH_ListForDCI_Format0_2_r16_sequence_of, + ett_nr_rrc_UCI_OnPUSCH_ListDCI_0_2_r16, UCI_OnPUSCH_ListDCI_0_2_r16_sequence_of, 1, 2, FALSE); return offset; } -static const value_string nr_rrc_T_uci_OnPUSCH_ListForDCI_Format0_2_r16_vals[] = { +static const value_string nr_rrc_T_uci_OnPUSCH_ListDCI_0_2_r16_vals[] = { { 0, "release" }, { 1, "setup" }, { 0, NULL } }; -static const per_choice_t T_uci_OnPUSCH_ListForDCI_Format0_2_r16_choice[] = { +static const per_choice_t T_uci_OnPUSCH_ListDCI_0_2_r16_choice[] = { { 0, &hf_nr_rrc_release , ASN1_NO_EXTENSIONS , dissect_nr_rrc_NULL }, - { 1, &hf_nr_rrc_setup_87 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_UCI_OnPUSCH_ListForDCI_Format0_2_r16 }, + { 1, &hf_nr_rrc_setup_88 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_UCI_OnPUSCH_ListDCI_0_2_r16 }, { 0, NULL, 0, NULL } }; static int -dissect_nr_rrc_T_uci_OnPUSCH_ListForDCI_Format0_2_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { +dissect_nr_rrc_T_uci_OnPUSCH_ListDCI_0_2_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { offset = dissect_per_choice(tvb, offset, actx, tree, hf_index, - ett_nr_rrc_T_uci_OnPUSCH_ListForDCI_Format0_2_r16, T_uci_OnPUSCH_ListForDCI_Format0_2_r16_choice, + ett_nr_rrc_T_uci_OnPUSCH_ListDCI_0_2_r16, T_uci_OnPUSCH_ListDCI_0_2_r16_choice, NULL); return offset; @@ -52670,58 +53246,58 @@ dissect_nr_rrc_PUSCH_TimeDomainResourceAllocationList_r16(tvbuff_t *tvb _U_, int } -static const value_string nr_rrc_T_pusch_TimeDomainAllocationListForDCI_Format0_2_r16_vals[] = { +static const value_string nr_rrc_T_pusch_TimeDomainAllocationListDCI_0_2_r16_vals[] = { { 0, "release" }, { 1, "setup" }, { 0, NULL } }; -static const per_choice_t T_pusch_TimeDomainAllocationListForDCI_Format0_2_r16_choice[] = { +static const per_choice_t T_pusch_TimeDomainAllocationListDCI_0_2_r16_choice[] = { { 0, &hf_nr_rrc_release , ASN1_NO_EXTENSIONS , dissect_nr_rrc_NULL }, - { 1, &hf_nr_rrc_setup_88 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_PUSCH_TimeDomainResourceAllocationList_r16 }, + { 1, &hf_nr_rrc_setup_89 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_PUSCH_TimeDomainResourceAllocationList_r16 }, { 0, NULL, 0, NULL } }; static int -dissect_nr_rrc_T_pusch_TimeDomainAllocationListForDCI_Format0_2_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { +dissect_nr_rrc_T_pusch_TimeDomainAllocationListDCI_0_2_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { offset = dissect_per_choice(tvb, offset, actx, tree, hf_index, - ett_nr_rrc_T_pusch_TimeDomainAllocationListForDCI_Format0_2_r16, T_pusch_TimeDomainAllocationListForDCI_Format0_2_r16_choice, + ett_nr_rrc_T_pusch_TimeDomainAllocationListDCI_0_2_r16, T_pusch_TimeDomainAllocationListDCI_0_2_r16_choice, NULL); return offset; } -static const value_string nr_rrc_T_pusch_TimeDomainAllocationListForDCI_Format0_1_r16_vals[] = { +static const value_string nr_rrc_T_pusch_TimeDomainAllocationListDCI_0_1_r16_vals[] = { { 0, "release" }, { 1, "setup" }, { 0, NULL } }; -static const per_choice_t T_pusch_TimeDomainAllocationListForDCI_Format0_1_r16_choice[] = { +static const per_choice_t T_pusch_TimeDomainAllocationListDCI_0_1_r16_choice[] = { { 0, &hf_nr_rrc_release , ASN1_NO_EXTENSIONS , dissect_nr_rrc_NULL }, - { 1, &hf_nr_rrc_setup_88 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_PUSCH_TimeDomainResourceAllocationList_r16 }, + { 1, &hf_nr_rrc_setup_89 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_PUSCH_TimeDomainResourceAllocationList_r16 }, { 0, NULL, 0, NULL } }; static int -dissect_nr_rrc_T_pusch_TimeDomainAllocationListForDCI_Format0_1_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { +dissect_nr_rrc_T_pusch_TimeDomainAllocationListDCI_0_1_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { offset = dissect_per_choice(tvb, offset, actx, tree, hf_index, - ett_nr_rrc_T_pusch_TimeDomainAllocationListForDCI_Format0_1_r16, T_pusch_TimeDomainAllocationListForDCI_Format0_1_r16_choice, + ett_nr_rrc_T_pusch_TimeDomainAllocationListDCI_0_1_r16, T_pusch_TimeDomainAllocationListDCI_0_1_r16_choice, NULL); return offset; } -static const value_string nr_rrc_T_invalidSymbolPatternIndicatorForDCI_Format0_1_r16_vals[] = { +static const value_string nr_rrc_T_invalidSymbolPatternIndicatorDCI_0_1_r16_vals[] = { { 0, "enabled" }, { 0, NULL } }; static int -dissect_nr_rrc_T_invalidSymbolPatternIndicatorForDCI_Format0_1_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { +dissect_nr_rrc_T_invalidSymbolPatternIndicatorDCI_0_1_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, 1, NULL, FALSE, 0, NULL); @@ -52729,14 +53305,14 @@ dissect_nr_rrc_T_invalidSymbolPatternIndicatorForDCI_Format0_1_r16(tvbuff_t *tvb } -static const value_string nr_rrc_T_priorityIndicatorForDCI_Format0_1_r16_vals[] = { +static const value_string nr_rrc_T_priorityIndicatorDCI_0_1_r16_vals[] = { { 0, "enabled" }, { 0, NULL } }; static int -dissect_nr_rrc_T_priorityIndicatorForDCI_Format0_1_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { +dissect_nr_rrc_T_priorityIndicatorDCI_0_1_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, 1, NULL, FALSE, 0, NULL); @@ -52744,7 +53320,7 @@ dissect_nr_rrc_T_priorityIndicatorForDCI_Format0_1_r16(tvbuff_t *tvb _U_, int of } -static const value_string nr_rrc_T_pusch_RepTypeIndicatorForDCI_Format0_1_r16_vals[] = { +static const value_string nr_rrc_T_pusch_RepTypeIndicatorDCI_0_1_r16_vals[] = { { 0, "pusch-RepTypeA" }, { 1, "pusch-RepTypeB" }, { 0, NULL } @@ -52752,7 +53328,7 @@ static const value_string nr_rrc_T_pusch_RepTypeIndicatorForDCI_Format0_1_r16_va static int -dissect_nr_rrc_T_pusch_RepTypeIndicatorForDCI_Format0_1_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { +dissect_nr_rrc_T_pusch_RepTypeIndicatorDCI_0_1_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, 2, NULL, FALSE, 0, NULL); @@ -52760,7 +53336,7 @@ dissect_nr_rrc_T_pusch_RepTypeIndicatorForDCI_Format0_1_r16(tvbuff_t *tvb _U_, i } -static const value_string nr_rrc_T_frequencyHoppingForDCI_Format0_1_r16_vals[] = { +static const value_string nr_rrc_T_frequencyHoppingDCI_0_1_r16_vals[] = { { 0, "interRepetition" }, { 1, "interSlot" }, { 0, NULL } @@ -52768,7 +53344,7 @@ static const value_string nr_rrc_T_frequencyHoppingForDCI_Format0_1_r16_vals[] = static int -dissect_nr_rrc_T_frequencyHoppingForDCI_Format0_1_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { +dissect_nr_rrc_T_frequencyHoppingDCI_0_1_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, 2, NULL, FALSE, 0, NULL); @@ -52776,36 +53352,36 @@ dissect_nr_rrc_T_frequencyHoppingForDCI_Format0_1_r16(tvbuff_t *tvb _U_, int off } -static const per_sequence_t UCI_OnPUSCH_ListForDCI_Format0_1_r16_sequence_of[1] = { - { &hf_nr_rrc_UCI_OnPUSCH_ListForDCI_Format0_1_r16_item, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_UCI_OnPUSCH }, +static const per_sequence_t UCI_OnPUSCH_ListDCI_0_1_r16_sequence_of[1] = { + { &hf_nr_rrc_UCI_OnPUSCH_ListDCI_0_1_r16_item, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_UCI_OnPUSCH }, }; static int -dissect_nr_rrc_UCI_OnPUSCH_ListForDCI_Format0_1_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { +dissect_nr_rrc_UCI_OnPUSCH_ListDCI_0_1_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { offset = dissect_per_constrained_sequence_of(tvb, offset, actx, tree, hf_index, - ett_nr_rrc_UCI_OnPUSCH_ListForDCI_Format0_1_r16, UCI_OnPUSCH_ListForDCI_Format0_1_r16_sequence_of, + ett_nr_rrc_UCI_OnPUSCH_ListDCI_0_1_r16, UCI_OnPUSCH_ListDCI_0_1_r16_sequence_of, 1, 2, FALSE); return offset; } -static const value_string nr_rrc_T_uci_OnPUSCH_ListForDCI_Format0_1_r16_vals[] = { +static const value_string nr_rrc_T_uci_OnPUSCH_ListDCI_0_1_r16_vals[] = { { 0, "release" }, { 1, "setup" }, { 0, NULL } }; -static const per_choice_t T_uci_OnPUSCH_ListForDCI_Format0_1_r16_choice[] = { +static const per_choice_t T_uci_OnPUSCH_ListDCI_0_1_r16_choice[] = { { 0, &hf_nr_rrc_release , ASN1_NO_EXTENSIONS , dissect_nr_rrc_NULL }, - { 1, &hf_nr_rrc_setup_89 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_UCI_OnPUSCH_ListForDCI_Format0_1_r16 }, + { 1, &hf_nr_rrc_setup_90 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_UCI_OnPUSCH_ListDCI_0_1_r16 }, { 0, NULL, 0, NULL } }; static int -dissect_nr_rrc_T_uci_OnPUSCH_ListForDCI_Format0_1_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { +dissect_nr_rrc_T_uci_OnPUSCH_ListDCI_0_1_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { offset = dissect_per_choice(tvb, offset, actx, tree, hf_index, - ett_nr_rrc_T_uci_OnPUSCH_ListForDCI_Format0_1_r16, T_uci_OnPUSCH_ListForDCI_Format0_1_r16_choice, + ett_nr_rrc_T_uci_OnPUSCH_ListDCI_0_1_r16, T_uci_OnPUSCH_ListDCI_0_1_r16_choice, NULL); return offset; @@ -53020,8 +53596,8 @@ dissect_nr_rrc_SEQUENCE_SIZE_1_maxNrofSRI_PUSCH_Mappings_OF_P0_PUSCH_Set_r16(tvb static const per_sequence_t T_olpc_ParameterSet_sequence[] = { - { &hf_nr_rrc_olpc_ParameterSetForDCI_Format0_1_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_INTEGER_1_2 }, - { &hf_nr_rrc_olpc_ParameterSetForDCI_Format0_2_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_INTEGER_1_2 }, + { &hf_nr_rrc_olpc_ParameterSetDCI_0_1_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_INTEGER_1_2 }, + { &hf_nr_rrc_olpc_ParameterSetDCI_0_2_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_INTEGER_1_2 }, { NULL, 0, 0, NULL } }; @@ -53059,7 +53635,7 @@ static const value_string nr_rrc_T_pusch_PowerControl_v1610_vals[] = { static const per_choice_t T_pusch_PowerControl_v1610_choice[] = { { 0, &hf_nr_rrc_release , ASN1_NO_EXTENSIONS , dissect_nr_rrc_NULL }, - { 1, &hf_nr_rrc_setup_90 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_PUSCH_PowerControl_v1610 }, + { 1, &hf_nr_rrc_setup_91 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_PUSCH_PowerControl_v1610 }, { 0, NULL, 0, NULL } }; @@ -53098,7 +53674,7 @@ static const value_string nr_rrc_T_pusch_TimeDomainAllocationListForMultiPUSCH_r static const per_choice_t T_pusch_TimeDomainAllocationListForMultiPUSCH_r16_choice[] = { { 0, &hf_nr_rrc_release , ASN1_NO_EXTENSIONS , dissect_nr_rrc_NULL }, - { 1, &hf_nr_rrc_setup_88 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_PUSCH_TimeDomainResourceAllocationList_r16 }, + { 1, &hf_nr_rrc_setup_89 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_PUSCH_TimeDomainResourceAllocationList_r16 }, { 0, NULL, 0, NULL } }; @@ -53114,32 +53690,32 @@ dissect_nr_rrc_T_pusch_TimeDomainAllocationListForMultiPUSCH_r16(tvbuff_t *tvb _ static const per_sequence_t PUSCH_Config_eag_1_sequence[] = { { &hf_nr_rrc_minimumSchedulingOffsetK2_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_minimumSchedulingOffsetK2_r16 }, - { &hf_nr_rrc_ul_AccessConfigListForDCI_Format0_1_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_ul_AccessConfigListForDCI_Format0_1_r16 }, - { &hf_nr_rrc_harq_ProcessNumberSizeForDCI_Format0_2_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_INTEGER_0_4 }, - { &hf_nr_rrc_dmrs_SequenceInitializationForDCI_Format0_2_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_dmrs_SequenceInitializationForDCI_Format0_2_r16 }, - { &hf_nr_rrc_numberOfBitsForRV_ForDCI_Format0_2_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_INTEGER_0_2 }, - { &hf_nr_rrc_antennaPortsFieldPresenceForDCI_Format0_2_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_antennaPortsFieldPresenceForDCI_Format0_2_r16 }, - { &hf_nr_rrc_dmrs_UplinkForPUSCH_MappingTypeA_ForDCI_Format0_2_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_dmrs_UplinkForPUSCH_MappingTypeA_ForDCI_Format0_2_r16 }, - { &hf_nr_rrc_dmrs_UplinkForPUSCH_MappingTypeB_ForDCI_Format0_2_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_dmrs_UplinkForPUSCH_MappingTypeB_ForDCI_Format0_2_r16 }, - { &hf_nr_rrc_frequencyHoppingForDCI_Format0_2_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_frequencyHoppingForDCI_Format0_2_r16 }, - { &hf_nr_rrc_frequencyHoppingOffsetListsForDCI_Format0_2_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_frequencyHoppingOffsetListsForDCI_Format0_2_r16 }, - { &hf_nr_rrc_codebookSubsetForDCI_Format0_2_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_codebookSubsetForDCI_Format0_2_r16 }, - { &hf_nr_rrc_invalidSymbolPatternIndicatorForDCI_Format0_2_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_invalidSymbolPatternIndicatorForDCI_Format0_2_r16 }, - { &hf_nr_rrc_maxRankForDCI_Format0_2_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_INTEGER_1_4 }, - { &hf_nr_rrc_mcs_TableForDCI_Format0_2_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_mcs_TableForDCI_Format0_2_r16 }, - { &hf_nr_rrc_mcs_TableTransformPrecoderForDCI_Format0_2_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_mcs_TableTransformPrecoderForDCI_Format0_2_r16 }, - { &hf_nr_rrc_priorityIndicatorForDCI_Format0_2_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_priorityIndicatorForDCI_Format0_2_r16 }, - { &hf_nr_rrc_pusch_RepTypeIndicatorForDCI_Format0_2_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_pusch_RepTypeIndicatorForDCI_Format0_2_r16 }, - { &hf_nr_rrc_resourceAllocationForDCI_Format0_2_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_resourceAllocationForDCI_Format0_2_r16 }, - { &hf_nr_rrc_resourceAllocationType1GranularityForDCI_Format0_2_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_resourceAllocationType1GranularityForDCI_Format0_2_r16 }, - { &hf_nr_rrc_uci_OnPUSCH_ListForDCI_Format0_2_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_uci_OnPUSCH_ListForDCI_Format0_2_r16 }, - { &hf_nr_rrc_pusch_TimeDomainAllocationListForDCI_Format0_2_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_pusch_TimeDomainAllocationListForDCI_Format0_2_r16 }, - { &hf_nr_rrc_pusch_TimeDomainAllocationListForDCI_Format0_1_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_pusch_TimeDomainAllocationListForDCI_Format0_1_r16 }, - { &hf_nr_rrc_invalidSymbolPatternIndicatorForDCI_Format0_1_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_invalidSymbolPatternIndicatorForDCI_Format0_1_r16 }, - { &hf_nr_rrc_priorityIndicatorForDCI_Format0_1_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_priorityIndicatorForDCI_Format0_1_r16 }, - { &hf_nr_rrc_pusch_RepTypeIndicatorForDCI_Format0_1_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_pusch_RepTypeIndicatorForDCI_Format0_1_r16 }, - { &hf_nr_rrc_frequencyHoppingForDCI_Format0_1_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_frequencyHoppingForDCI_Format0_1_r16 }, - { &hf_nr_rrc_uci_OnPUSCH_ListForDCI_Format0_1_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_uci_OnPUSCH_ListForDCI_Format0_1_r16 }, + { &hf_nr_rrc_ul_AccessConfigListDCI_0_1_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_ul_AccessConfigListDCI_0_1_r16 }, + { &hf_nr_rrc_harq_ProcessNumberSizeDCI_0_2_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_INTEGER_0_4 }, + { &hf_nr_rrc_dmrs_SequenceInitializationDCI_0_2_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_dmrs_SequenceInitializationDCI_0_2_r16 }, + { &hf_nr_rrc_numberOfBitsForRV_DCI_0_2_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_INTEGER_0_2 }, + { &hf_nr_rrc_antennaPortsFieldPresenceDCI_0_2_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_antennaPortsFieldPresenceDCI_0_2_r16 }, + { &hf_nr_rrc_dmrs_UplinkForPUSCH_MappingTypeA_DCI_0_2_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_dmrs_UplinkForPUSCH_MappingTypeA_DCI_0_2_r16 }, + { &hf_nr_rrc_dmrs_UplinkForPUSCH_MappingTypeB_DCI_0_2_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_dmrs_UplinkForPUSCH_MappingTypeB_DCI_0_2_r16 }, + { &hf_nr_rrc_frequencyHoppingDCI_0_2_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_frequencyHoppingDCI_0_2_r16 }, + { &hf_nr_rrc_frequencyHoppingOffsetListsDCI_0_2_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_frequencyHoppingOffsetListsDCI_0_2_r16 }, + { &hf_nr_rrc_codebookSubsetDCI_0_2_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_codebookSubsetDCI_0_2_r16 }, + { &hf_nr_rrc_invalidSymbolPatternIndicatorDCI_0_2_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_invalidSymbolPatternIndicatorDCI_0_2_r16 }, + { &hf_nr_rrc_maxRankDCI_0_2_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_INTEGER_1_4 }, + { &hf_nr_rrc_mcs_TableDCI_0_2_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_mcs_TableDCI_0_2_r16 }, + { &hf_nr_rrc_mcs_TableTransformPrecoderDCI_0_2_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_mcs_TableTransformPrecoderDCI_0_2_r16 }, + { &hf_nr_rrc_priorityIndicatorDCI_0_2_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_priorityIndicatorDCI_0_2_r16 }, + { &hf_nr_rrc_pusch_RepTypeIndicatorDCI_0_2_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_pusch_RepTypeIndicatorDCI_0_2_r16 }, + { &hf_nr_rrc_resourceAllocationDCI_0_2_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_resourceAllocationDCI_0_2_r16 }, + { &hf_nr_rrc_resourceAllocationType1GranularityDCI_0_2_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_resourceAllocationType1GranularityDCI_0_2_r16 }, + { &hf_nr_rrc_uci_OnPUSCH_ListDCI_0_2_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_uci_OnPUSCH_ListDCI_0_2_r16 }, + { &hf_nr_rrc_pusch_TimeDomainAllocationListDCI_0_2_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_pusch_TimeDomainAllocationListDCI_0_2_r16 }, + { &hf_nr_rrc_pusch_TimeDomainAllocationListDCI_0_1_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_pusch_TimeDomainAllocationListDCI_0_1_r16 }, + { &hf_nr_rrc_invalidSymbolPatternIndicatorDCI_0_1_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_invalidSymbolPatternIndicatorDCI_0_1_r16 }, + { &hf_nr_rrc_priorityIndicatorDCI_0_1_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_priorityIndicatorDCI_0_1_r16 }, + { &hf_nr_rrc_pusch_RepTypeIndicatorDCI_0_1_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_pusch_RepTypeIndicatorDCI_0_1_r16 }, + { &hf_nr_rrc_frequencyHoppingDCI_0_1_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_frequencyHoppingDCI_0_1_r16 }, + { &hf_nr_rrc_uci_OnPUSCH_ListDCI_0_1_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_uci_OnPUSCH_ListDCI_0_1_r16 }, { &hf_nr_rrc_invalidSymbolPattern_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_InvalidSymbolPattern_r16 }, { &hf_nr_rrc_pusch_PowerControl_v1610, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_pusch_PowerControl_v1610 }, { &hf_nr_rrc_ul_FullPowerTransmission_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_ul_FullPowerTransmission_r16 }, @@ -54142,7 +54718,7 @@ static const value_string nr_rrc_T_pathlossReferenceRSList_r16_vals[] = { static const per_choice_t T_pathlossReferenceRSList_r16_choice[] = { { 0, &hf_nr_rrc_release , ASN1_NO_EXTENSIONS , dissect_nr_rrc_NULL }, - { 1, &hf_nr_rrc_setup_108 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_PathlossReferenceRSList_r16 }, + { 1, &hf_nr_rrc_setup_109 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_PathlossReferenceRSList_r16 }, { 0, NULL, 0, NULL } }; @@ -54969,10 +55545,10 @@ dissect_nr_rrc_SEQUENCE_SIZE_1_maxNrofSRS_PosResources_r16_OF_SRS_PosResource_r1 static const per_sequence_t SRS_Config_eag_1_sequence[] = { - { &hf_nr_rrc_srs_RequestForDCI_Format1_2_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_INTEGER_1_2 }, - { &hf_nr_rrc_srs_RequestForDCI_Format0_2_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_INTEGER_1_2 }, - { &hf_nr_rrc_srs_ResourceSetToAddModListForDCI_Format0_2_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_SEQUENCE_SIZE_1_maxNrofSRS_ResourceSets_OF_SRS_ResourceSet }, - { &hf_nr_rrc_srs_ResourceSetToReleaseListForDCI_Format0_2_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_SEQUENCE_SIZE_1_maxNrofSRS_ResourceSets_OF_SRS_ResourceSetId }, + { &hf_nr_rrc_srs_RequestDCI_1_2_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_INTEGER_1_2 }, + { &hf_nr_rrc_srs_RequestDCI_0_2_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_INTEGER_1_2 }, + { &hf_nr_rrc_srs_ResourceSetToAddModListDCI_0_2_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_SEQUENCE_SIZE_1_maxNrofSRS_ResourceSets_OF_SRS_ResourceSet }, + { &hf_nr_rrc_srs_ResourceSetToReleaseListDCI_0_2_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_SEQUENCE_SIZE_1_maxNrofSRS_ResourceSets_OF_SRS_ResourceSetId }, { &hf_nr_rrc_srs_PosResourceSetToReleaseList_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_SEQUENCE_SIZE_1_maxNrofSRS_PosResourceSets_r16_OF_SRS_PosResourceSetId_r16 }, { &hf_nr_rrc_srs_PosResourceSetToAddModList_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_SEQUENCE_SIZE_1_maxNrofSRS_PosResourceSets_r16_OF_SRS_PosResourceSet_r16 }, { &hf_nr_rrc_srs_PosResourceToReleaseList_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_SEQUENCE_SIZE_1_maxNrofSRS_PosResources_r16_OF_SRS_PosResourceId_r16 }, @@ -55754,6 +56330,96 @@ dissect_nr_rrc_T_phr_ModeOtherCG(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t * } +static const value_string nr_rrc_T_mpe_ProhibitTimer_r16_vals[] = { + { 0, "sf0" }, + { 1, "sf10" }, + { 2, "sf20" }, + { 3, "sf50" }, + { 4, "sf100" }, + { 5, "sf200" }, + { 6, "sf500" }, + { 7, "sf1000" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_mpe_ProhibitTimer_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 8, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const value_string nr_rrc_T_mpe_Threshold_r16_vals[] = { + { 0, "dB3" }, + { 1, "dB6" }, + { 2, "dB9" }, + { 3, "dB12" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_mpe_Threshold_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 4, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const per_sequence_t MPE_Config_FR2_r16_sequence[] = { + { &hf_nr_rrc_mpe_ProhibitTimer_r16, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_T_mpe_ProhibitTimer_r16 }, + { &hf_nr_rrc_mpe_Threshold_r16, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_T_mpe_Threshold_r16 }, + { NULL, 0, 0, NULL } +}; + +static int +dissect_nr_rrc_MPE_Config_FR2_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_sequence(tvb, offset, actx, tree, hf_index, + ett_nr_rrc_MPE_Config_FR2_r16, MPE_Config_FR2_r16_sequence); + + return offset; +} + + +static const value_string nr_rrc_T_mpe_Reporting_FR2_r16_vals[] = { + { 0, "release" }, + { 1, "setup" }, + { 0, NULL } +}; + +static const per_choice_t T_mpe_Reporting_FR2_r16_choice[] = { + { 0, &hf_nr_rrc_release , ASN1_NO_EXTENSIONS , dissect_nr_rrc_NULL }, + { 1, &hf_nr_rrc_setup_68 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_MPE_Config_FR2_r16 }, + { 0, NULL, 0, NULL } +}; + +static int +dissect_nr_rrc_T_mpe_Reporting_FR2_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_choice(tvb, offset, actx, tree, hf_index, + ett_nr_rrc_T_mpe_Reporting_FR2_r16, T_mpe_Reporting_FR2_r16_choice, + NULL); + + return offset; +} + + +static const per_sequence_t PHR_Config_eag_1_sequence[] = { + { &hf_nr_rrc_mpe_Reporting_FR2_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_mpe_Reporting_FR2_r16 }, + { NULL, 0, 0, NULL } +}; + +static int +dissect_nr_rrc_PHR_Config_eag_1(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_sequence_eag(tvb, offset, actx, tree, PHR_Config_eag_1_sequence); + + return offset; +} + + static const per_sequence_t PHR_Config_sequence[] = { { &hf_nr_rrc_phr_PeriodicTimer, ASN1_EXTENSION_ROOT , ASN1_NOT_OPTIONAL, dissect_nr_rrc_T_phr_PeriodicTimer }, { &hf_nr_rrc_phr_ProhibitTimer, ASN1_EXTENSION_ROOT , ASN1_NOT_OPTIONAL, dissect_nr_rrc_T_phr_ProhibitTimer }, @@ -55762,6 +56428,7 @@ static const per_sequence_t PHR_Config_sequence[] = { { &hf_nr_rrc_dummy_03 , ASN1_EXTENSION_ROOT , ASN1_NOT_OPTIONAL, dissect_nr_rrc_BOOLEAN }, { &hf_nr_rrc_phr_Type2OtherCell, ASN1_EXTENSION_ROOT , ASN1_NOT_OPTIONAL, dissect_nr_rrc_BOOLEAN }, { &hf_nr_rrc_phr_ModeOtherCG, ASN1_EXTENSION_ROOT , ASN1_NOT_OPTIONAL, dissect_nr_rrc_T_phr_ModeOtherCG }, + { &dummy_hf_nr_rrc_eag_field, ASN1_NOT_EXTENSION_ROOT, ASN1_NOT_OPTIONAL, dissect_nr_rrc_PHR_Config_eag_1 }, { NULL, 0, 0, NULL } }; @@ -56139,7 +56806,7 @@ static const value_string nr_rrc_T_cs_RNTI_vals[] = { static const per_choice_t T_cs_RNTI_choice[] = { { 0, &hf_nr_rrc_release , ASN1_NO_EXTENSIONS , dissect_nr_rrc_NULL }, - { 1, &hf_nr_rrc_setup_68 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_RNTI_Value }, + { 1, &hf_nr_rrc_setup_69 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_RNTI_Value }, { 0, NULL, 0, NULL } }; @@ -56216,7 +56883,7 @@ static const value_string nr_rrc_T_pdcch_BlindDetection_vals[] = { static const per_choice_t T_pdcch_BlindDetection_choice[] = { { 0, &hf_nr_rrc_release , ASN1_NO_EXTENSIONS , dissect_nr_rrc_NULL }, - { 1, &hf_nr_rrc_setup_69 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_PDCCH_BlindDetection }, + { 1, &hf_nr_rrc_setup_70 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_PDCCH_BlindDetection }, { 0, NULL, 0, NULL } }; @@ -56346,7 +57013,7 @@ static const value_string nr_rrc_T_dcp_Config_r16_vals[] = { static const per_choice_t T_dcp_Config_r16_choice[] = { { 0, &hf_nr_rrc_release , ASN1_NO_EXTENSIONS , dissect_nr_rrc_NULL }, - { 1, &hf_nr_rrc_setup_70 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_DCP_Config_r16 }, + { 1, &hf_nr_rrc_setup_71 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_DCP_Config_r16 }, { 0, NULL, 0, NULL } }; @@ -56360,37 +57027,39 @@ dissect_nr_rrc_T_dcp_Config_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *a } -static const value_string nr_rrc_T_harq_ACK_SpatialBundlingPUCCH_secondaryPUCCH_group_r16_vals[] = { - { 0, "true" }, +static const value_string nr_rrc_T_harq_ACK_SpatialBundlingPUCCH_secondaryPUCCHgroup_r16_vals[] = { + { 0, "enabled" }, + { 1, "disabled" }, { 0, NULL } }; static int -dissect_nr_rrc_T_harq_ACK_SpatialBundlingPUCCH_secondaryPUCCH_group_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { +dissect_nr_rrc_T_harq_ACK_SpatialBundlingPUCCH_secondaryPUCCHgroup_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, - 1, NULL, FALSE, 0, NULL); + 2, NULL, FALSE, 0, NULL); return offset; } -static const value_string nr_rrc_T_harq_ACK_SpatialBundlingPUSCH_secondaryPUCCH_group_r16_vals[] = { - { 0, "true" }, +static const value_string nr_rrc_T_harq_ACK_SpatialBundlingPUSCH_secondaryPUCCHgroup_r16_vals[] = { + { 0, "enabled" }, + { 1, "disabled" }, { 0, NULL } }; static int -dissect_nr_rrc_T_harq_ACK_SpatialBundlingPUSCH_secondaryPUCCH_group_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { +dissect_nr_rrc_T_harq_ACK_SpatialBundlingPUSCH_secondaryPUCCHgroup_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, - 1, NULL, FALSE, 0, NULL); + 2, NULL, FALSE, 0, NULL); return offset; } -static const value_string nr_rrc_T_pdsch_HARQ_ACK_Codebook_secondaryPUCCH_group_r16_vals[] = { +static const value_string nr_rrc_T_pdsch_HARQ_ACK_Codebook_secondaryPUCCHgroup_r16_vals[] = { { 0, "semiStatic" }, { 1, "dynamic" }, { 0, NULL } @@ -56398,7 +57067,7 @@ static const value_string nr_rrc_T_pdsch_HARQ_ACK_Codebook_secondaryPUCCH_group_ static int -dissect_nr_rrc_T_pdsch_HARQ_ACK_Codebook_secondaryPUCCH_group_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { +dissect_nr_rrc_T_pdsch_HARQ_ACK_Codebook_secondaryPUCCHgroup_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, 2, NULL, FALSE, 0, NULL); @@ -56530,14 +57199,14 @@ dissect_nr_rrc_T_pdsch_HARQ_ACK_OneShotFeedbackCBG_r16(tvbuff_t *tvb _U_, int of } -static const value_string nr_rrc_T_downlinkAssignmentIndexForDCI_Format0_2_r16_vals[] = { +static const value_string nr_rrc_T_downlinkAssignmentIndexDCI_0_2_r16_vals[] = { { 0, "enabled" }, { 0, NULL } }; static int -dissect_nr_rrc_T_downlinkAssignmentIndexForDCI_Format0_2_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { +dissect_nr_rrc_T_downlinkAssignmentIndexDCI_0_2_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, 1, NULL, FALSE, 0, NULL); @@ -56545,7 +57214,7 @@ dissect_nr_rrc_T_downlinkAssignmentIndexForDCI_Format0_2_r16(tvbuff_t *tvb _U_, } -static const value_string nr_rrc_T_downlinkAssignmentIndexForDCI_Format1_2_r16_vals[] = { +static const value_string nr_rrc_T_downlinkAssignmentIndexDCI_1_2_r16_vals[] = { { 0, "n1" }, { 1, "n2" }, { 2, "n4" }, @@ -56554,7 +57223,7 @@ static const value_string nr_rrc_T_downlinkAssignmentIndexForDCI_Format1_2_r16_v static int -dissect_nr_rrc_T_downlinkAssignmentIndexForDCI_Format1_2_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { +dissect_nr_rrc_T_downlinkAssignmentIndexDCI_1_2_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, 3, NULL, FALSE, 0, NULL); @@ -56600,7 +57269,7 @@ static const value_string nr_rrc_T_pdsch_HARQ_ACK_CodebookList_r16_vals[] = { static const per_choice_t T_pdsch_HARQ_ACK_CodebookList_r16_choice[] = { { 0, &hf_nr_rrc_release , ASN1_NO_EXTENSIONS , dissect_nr_rrc_NULL }, - { 1, &hf_nr_rrc_setup_71 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_PDSCH_HARQ_ACK_CodebookList_r16 }, + { 1, &hf_nr_rrc_setup_72 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_PDSCH_HARQ_ACK_CodebookList_r16 }, { 0, NULL, 0, NULL } }; @@ -56653,7 +57322,7 @@ static const value_string nr_rrc_T_pdcch_BlindDetectionCA_CombIndicator_r16_vals static const per_choice_t T_pdcch_BlindDetectionCA_CombIndicator_r16_choice[] = { { 0, &hf_nr_rrc_release , ASN1_NO_EXTENSIONS , dissect_nr_rrc_NULL }, - { 1, &hf_nr_rrc_setup_72 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_PDCCH_BlindDetectionCA_CombIndicator_r16 }, + { 1, &hf_nr_rrc_setup_73 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_PDCCH_BlindDetectionCA_CombIndicator_r16 }, { 0, NULL, 0, NULL } }; @@ -56685,7 +57354,7 @@ static const value_string nr_rrc_T_pdcch_BlindDetection2_r16_vals[] = { static const per_choice_t T_pdcch_BlindDetection2_r16_choice[] = { { 0, &hf_nr_rrc_release , ASN1_NO_EXTENSIONS , dissect_nr_rrc_NULL }, - { 1, &hf_nr_rrc_setup_73 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_PDCCH_BlindDetection2_r16 }, + { 1, &hf_nr_rrc_setup_74 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_PDCCH_BlindDetection2_r16 }, { 0, NULL, 0, NULL } }; @@ -56717,7 +57386,7 @@ static const value_string nr_rrc_T_pdcch_BlindDetection3_r16_vals[] = { static const per_choice_t T_pdcch_BlindDetection3_r16_choice[] = { { 0, &hf_nr_rrc_release , ASN1_NO_EXTENSIONS , dissect_nr_rrc_NULL }, - { 1, &hf_nr_rrc_setup_74 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_PDCCH_BlindDetection3_r16 }, + { 1, &hf_nr_rrc_setup_75 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_PDCCH_BlindDetection3_r16 }, { 0, NULL, 0, NULL } }; @@ -56748,9 +57417,9 @@ dissect_nr_rrc_T_bdFactorR_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *ac static const per_sequence_t PhysicalCellGroupConfig_eag_4_sequence[] = { { &hf_nr_rrc_dcp_Config_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_dcp_Config_r16 }, - { &hf_nr_rrc_harq_ACK_SpatialBundlingPUCCH_secondaryPUCCH_group_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_harq_ACK_SpatialBundlingPUCCH_secondaryPUCCH_group_r16 }, - { &hf_nr_rrc_harq_ACK_SpatialBundlingPUSCH_secondaryPUCCH_group_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_harq_ACK_SpatialBundlingPUSCH_secondaryPUCCH_group_r16 }, - { &hf_nr_rrc_pdsch_HARQ_ACK_Codebook_secondaryPUCCH_group_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_pdsch_HARQ_ACK_Codebook_secondaryPUCCH_group_r16 }, + { &hf_nr_rrc_harq_ACK_SpatialBundlingPUCCH_secondaryPUCCHgroup_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_harq_ACK_SpatialBundlingPUCCH_secondaryPUCCHgroup_r16 }, + { &hf_nr_rrc_harq_ACK_SpatialBundlingPUSCH_secondaryPUCCHgroup_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_harq_ACK_SpatialBundlingPUSCH_secondaryPUCCHgroup_r16 }, + { &hf_nr_rrc_pdsch_HARQ_ACK_Codebook_secondaryPUCCHgroup_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_pdsch_HARQ_ACK_Codebook_secondaryPUCCHgroup_r16 }, { &hf_nr_rrc_p_NR_FR2_r16 , ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_P_Max }, { &hf_nr_rrc_p_UE_FR2_r16 , ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_P_Max }, { &hf_nr_rrc_nrdc_PCmode_FR1_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_nrdc_PCmode_FR1_r16 }, @@ -56761,8 +57430,8 @@ static const per_sequence_t PhysicalCellGroupConfig_eag_4_sequence[] = { { &hf_nr_rrc_pdsch_HARQ_ACK_OneShotFeedback_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_pdsch_HARQ_ACK_OneShotFeedback_r16 }, { &hf_nr_rrc_pdsch_HARQ_ACK_OneShotFeedbackNDI_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_pdsch_HARQ_ACK_OneShotFeedbackNDI_r16 }, { &hf_nr_rrc_pdsch_HARQ_ACK_OneShotFeedbackCBG_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_pdsch_HARQ_ACK_OneShotFeedbackCBG_r16 }, - { &hf_nr_rrc_downlinkAssignmentIndexForDCI_Format0_2_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_downlinkAssignmentIndexForDCI_Format0_2_r16 }, - { &hf_nr_rrc_downlinkAssignmentIndexForDCI_Format1_2_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_downlinkAssignmentIndexForDCI_Format1_2_r16 }, + { &hf_nr_rrc_downlinkAssignmentIndexDCI_0_2_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_downlinkAssignmentIndexDCI_0_2_r16 }, + { &hf_nr_rrc_downlinkAssignmentIndexDCI_1_2_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_downlinkAssignmentIndexDCI_1_2_r16 }, { &hf_nr_rrc_pdsch_HARQ_ACK_CodebookList_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_pdsch_HARQ_ACK_CodebookList_r16 }, { &hf_nr_rrc_ackNackFeedbackMode_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_ackNackFeedbackMode_r16 }, { &hf_nr_rrc_pdcch_BlindDetectionCA_CombIndicator_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_pdcch_BlindDetectionCA_CombIndicator_r16 }, @@ -57157,7 +57826,7 @@ static const value_string nr_rrc_T_lte_CRS_ToMatchAround_01_vals[] = { static const per_choice_t T_lte_CRS_ToMatchAround_01_choice[] = { { 0, &hf_nr_rrc_release , ASN1_NO_EXTENSIONS , dissect_nr_rrc_NULL }, - { 1, &hf_nr_rrc_setup_99 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_RateMatchPatternLTE_CRS }, + { 1, &hf_nr_rrc_setup_100 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_RateMatchPatternLTE_CRS }, { 0, NULL, 0, NULL } }; @@ -58118,7 +58787,7 @@ static const value_string nr_rrc_T_codeBlockGroupTransmission_01_vals[] = { static const per_choice_t T_codeBlockGroupTransmission_01_choice[] = { { 0, &hf_nr_rrc_release , ASN1_NO_EXTENSIONS , dissect_nr_rrc_NULL }, - { 1, &hf_nr_rrc_setup_91 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_PUSCH_CodeBlockGroupTransmission }, + { 1, &hf_nr_rrc_setup_92 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_PUSCH_CodeBlockGroupTransmission }, { 0, NULL, 0, NULL } }; @@ -58180,7 +58849,7 @@ dissect_nr_rrc_PUSCH_ServingCellConfig_eag_1(tvbuff_t *tvb _U_, int offset _U_, static int -dissect_nr_rrc_MaxMIMO_LayersForDCI_Format0_2_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { +dissect_nr_rrc_MaxMIMO_LayersDCI_0_2_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { offset = dissect_per_constrained_integer(tvb, offset, actx, tree, hf_index, 1U, 4U, NULL, FALSE); @@ -58188,22 +58857,22 @@ dissect_nr_rrc_MaxMIMO_LayersForDCI_Format0_2_r16(tvbuff_t *tvb _U_, int offset } -static const value_string nr_rrc_T_maxMIMO_LayersForDCI_Format0_2_r16_vals[] = { +static const value_string nr_rrc_T_maxMIMO_LayersDCI_0_2_r16_vals[] = { { 0, "release" }, { 1, "setup" }, { 0, NULL } }; -static const per_choice_t T_maxMIMO_LayersForDCI_Format0_2_r16_choice[] = { +static const per_choice_t T_maxMIMO_LayersDCI_0_2_r16_choice[] = { { 0, &hf_nr_rrc_release , ASN1_NO_EXTENSIONS , dissect_nr_rrc_NULL }, - { 1, &hf_nr_rrc_setup_92 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_MaxMIMO_LayersForDCI_Format0_2_r16 }, + { 1, &hf_nr_rrc_setup_93 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_MaxMIMO_LayersDCI_0_2_r16 }, { 0, NULL, 0, NULL } }; static int -dissect_nr_rrc_T_maxMIMO_LayersForDCI_Format0_2_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { +dissect_nr_rrc_T_maxMIMO_LayersDCI_0_2_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { offset = dissect_per_choice(tvb, offset, actx, tree, hf_index, - ett_nr_rrc_T_maxMIMO_LayersForDCI_Format0_2_r16, T_maxMIMO_LayersForDCI_Format0_2_r16_choice, + ett_nr_rrc_T_maxMIMO_LayersDCI_0_2_r16, T_maxMIMO_LayersDCI_0_2_r16_choice, NULL); return offset; @@ -58211,7 +58880,7 @@ dissect_nr_rrc_T_maxMIMO_LayersForDCI_Format0_2_r16(tvbuff_t *tvb _U_, int offse static const per_sequence_t PUSCH_ServingCellConfig_eag_2_sequence[] = { - { &hf_nr_rrc_maxMIMO_LayersForDCI_Format0_2_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_maxMIMO_LayersForDCI_Format0_2_r16 }, + { &hf_nr_rrc_maxMIMO_LayersDCI_0_2_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_maxMIMO_LayersDCI_0_2_r16 }, { NULL, 0, 0, NULL } }; @@ -58249,7 +58918,7 @@ static const value_string nr_rrc_T_pusch_ServingCellConfig_vals[] = { static const per_choice_t T_pusch_ServingCellConfig_choice[] = { { 0, &hf_nr_rrc_release , ASN1_NO_EXTENSIONS , dissect_nr_rrc_NULL }, - { 1, &hf_nr_rrc_setup_103 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_PUSCH_ServingCellConfig }, + { 1, &hf_nr_rrc_setup_104 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_PUSCH_ServingCellConfig }, { 0, NULL, 0, NULL } }; @@ -58397,7 +59066,7 @@ static const value_string nr_rrc_T_carrierSwitching_vals[] = { static const per_choice_t T_carrierSwitching_choice[] = { { 0, &hf_nr_rrc_release , ASN1_NO_EXTENSIONS , dissect_nr_rrc_NULL }, - { 1, &hf_nr_rrc_setup_104 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_SRS_CarrierSwitching }, + { 1, &hf_nr_rrc_setup_105 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_SRS_CarrierSwitching }, { 0, NULL, 0, NULL } }; @@ -58425,14 +59094,14 @@ dissect_nr_rrc_UplinkConfig_eag_1(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t } -static const value_string nr_rrc_T_enablePLRS_UpdateForPUSCH_SRS_r16_vals[] = { +static const value_string nr_rrc_T_enablePL_RS_UpdateForPUSCH_SRS_r16_vals[] = { { 0, "enabled" }, { 0, NULL } }; static int -dissect_nr_rrc_T_enablePLRS_UpdateForPUSCH_SRS_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { +dissect_nr_rrc_T_enablePL_RS_UpdateForPUSCH_SRS_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, 1, NULL, FALSE, 0, NULL); @@ -58440,14 +59109,14 @@ dissect_nr_rrc_T_enablePLRS_UpdateForPUSCH_SRS_r16(tvbuff_t *tvb _U_, int offset } -static const value_string nr_rrc_T_enableDefaultBeamPL_ForPUSCH0_r16_vals[] = { +static const value_string nr_rrc_T_enableDefaultBeamPL_ForPUSCH0_0_r16_vals[] = { { 0, "enabled" }, { 0, NULL } }; static int -dissect_nr_rrc_T_enableDefaultBeamPL_ForPUSCH0_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { +dissect_nr_rrc_T_enableDefaultBeamPL_ForPUSCH0_0_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, 1, NULL, FALSE, 0, NULL); @@ -58524,7 +59193,7 @@ static const value_string nr_rrc_T_uplinkTxSwitching_r16_vals[] = { static const per_choice_t T_uplinkTxSwitching_r16_choice[] = { { 0, &hf_nr_rrc_release , ASN1_NO_EXTENSIONS , dissect_nr_rrc_NULL }, - { 1, &hf_nr_rrc_setup_105 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_UplinkTxSwitching_r16 }, + { 1, &hf_nr_rrc_setup_106 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_UplinkTxSwitching_r16 }, { 0, NULL, 0, NULL } }; @@ -58538,12 +59207,28 @@ dissect_nr_rrc_T_uplinkTxSwitching_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_c } +static const value_string nr_rrc_T_mpr_PowerBoost_FR2_r16_vals[] = { + { 0, "true" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_mpr_PowerBoost_FR2_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 1, NULL, FALSE, 0, NULL); + + return offset; +} + + static const per_sequence_t UplinkConfig_eag_2_sequence[] = { - { &hf_nr_rrc_enablePLRS_UpdateForPUSCH_SRS_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_enablePLRS_UpdateForPUSCH_SRS_r16 }, - { &hf_nr_rrc_enableDefaultBeamPL_ForPUSCH0_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_enableDefaultBeamPL_ForPUSCH0_r16 }, + { &hf_nr_rrc_enablePL_RS_UpdateForPUSCH_SRS_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_enablePL_RS_UpdateForPUSCH_SRS_r16 }, + { &hf_nr_rrc_enableDefaultBeamPL_ForPUSCH0_0_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_enableDefaultBeamPL_ForPUSCH0_0_r16 }, { &hf_nr_rrc_enableDefaultBeamPL_ForPUCCH_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_enableDefaultBeamPL_ForPUCCH_r16 }, { &hf_nr_rrc_enableDefaultBeamPL_ForSRS_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_enableDefaultBeamPL_ForSRS_r16 }, { &hf_nr_rrc_uplinkTxSwitching_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_uplinkTxSwitching_r16 }, + { &hf_nr_rrc_mpr_PowerBoost_FR2_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_mpr_PowerBoost_FR2_r16 }, { NULL, 0, 0, NULL } }; @@ -58769,7 +59454,7 @@ dissect_nr_rrc_SearchSpaceSwitchTrigger_r16(tvbuff_t *tvb _U_, int offset _U_, a static const per_sequence_t SEQUENCE_SIZE_1_4_OF_SearchSpaceSwitchTrigger_r16_sequence_of[1] = { - { &hf_nr_rrc_searchSpaceSwitchTriggerToAddModList_r16_item, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_SearchSpaceSwitchTrigger_r16 }, + { &hf_nr_rrc_switchTriggerToAddModList_r16_item, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_SearchSpaceSwitchTrigger_r16 }, }; static int @@ -58783,7 +59468,7 @@ dissect_nr_rrc_SEQUENCE_SIZE_1_4_OF_SearchSpaceSwitchTrigger_r16(tvbuff_t *tvb _ static const per_sequence_t SEQUENCE_SIZE_1_4_OF_ServCellIndex_sequence_of[1] = { - { &hf_nr_rrc_searchSpaceSwitchTriggerToReleaseList_r16_item, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_ServCellIndex }, + { &hf_nr_rrc_switchTriggerToReleaseList_r16_item, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_ServCellIndex }, }; static int @@ -58854,8 +59539,8 @@ dissect_nr_rrc_SEQUENCE_SIZE_1_maxNrofAggregatedCellsPerCellGroup_OF_CO_Duration static const per_sequence_t SlotFormatIndicator_eag_1_sequence[] = { { &hf_nr_rrc_availableRB_SetsToAddModList_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_SEQUENCE_SIZE_1_maxNrofAggregatedCellsPerCellGroup_OF_AvailableRB_SetsPerCell_r16 }, { &hf_nr_rrc_availableRB_SetsToRelease_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_SEQUENCE_SIZE_1_maxNrofAggregatedCellsPerCellGroup_OF_ServCellIndex }, - { &hf_nr_rrc_searchSpaceSwitchTriggerToAddModList_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_SEQUENCE_SIZE_1_4_OF_SearchSpaceSwitchTrigger_r16 }, - { &hf_nr_rrc_searchSpaceSwitchTriggerToReleaseList_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_SEQUENCE_SIZE_1_4_OF_ServCellIndex }, + { &hf_nr_rrc_switchTriggerToAddModList_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_SEQUENCE_SIZE_1_4_OF_SearchSpaceSwitchTrigger_r16 }, + { &hf_nr_rrc_switchTriggerToReleaseList_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_SEQUENCE_SIZE_1_4_OF_ServCellIndex }, { &hf_nr_rrc_co_DurationsPerCellToAddModList_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_SEQUENCE_SIZE_1_maxNrofAggregatedCellsPerCellGroup_OF_CO_DurationsPerCell_r16 }, { &hf_nr_rrc_co_DurationsPerCellToReleaseList_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_SEQUENCE_SIZE_1_maxNrofAggregatedCellsPerCellGroup_OF_ServCellIndex }, { NULL, 0, 0, NULL } @@ -58931,9 +59616,19 @@ dissect_nr_rrc_T_availabilityIndicator_r16(tvbuff_t *tvb _U_, int offset _U_, as } + +static int +dissect_nr_rrc_INTEGER_1_80(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_constrained_integer(tvb, offset, actx, tree, hf_index, + 1U, 80U, NULL, FALSE); + + return offset; +} + + static const per_sequence_t PDCCH_ServingCellConfig_eag_1_sequence[] = { { &hf_nr_rrc_availabilityIndicator_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_availabilityIndicator_r16 }, - { &hf_nr_rrc_searchSpaceSwitchingTimer_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_INTEGER_1_80 }, + { &hf_nr_rrc_searchSpaceSwitchTimer_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_INTEGER_1_80 }, { NULL, 0, 0, NULL } }; @@ -58968,7 +59663,7 @@ static const value_string nr_rrc_T_pdcch_ServingCellConfig_vals[] = { static const per_choice_t T_pdcch_ServingCellConfig_choice[] = { { 0, &hf_nr_rrc_release , ASN1_NO_EXTENSIONS , dissect_nr_rrc_NULL }, - { 1, &hf_nr_rrc_setup_96 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_PDCCH_ServingCellConfig }, + { 1, &hf_nr_rrc_setup_97 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_PDCCH_ServingCellConfig }, { 0, NULL, 0, NULL } }; @@ -59164,7 +59859,7 @@ static const value_string nr_rrc_T_pdsch_ServingCellConfig_vals[] = { static const per_choice_t T_pdsch_ServingCellConfig_choice[] = { { 0, &hf_nr_rrc_release , ASN1_NO_EXTENSIONS , dissect_nr_rrc_NULL }, - { 1, &hf_nr_rrc_setup_97 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_PDSCH_ServingCellConfig }, + { 1, &hf_nr_rrc_setup_98 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_PDSCH_ServingCellConfig }, { 0, NULL, 0, NULL } }; @@ -61149,28 +61844,28 @@ dissect_nr_rrc_CSI_ReportConfig_eag_1(tvbuff_t *tvb _U_, int offset _U_, asn1_ct } -static const per_sequence_t T_reportSlotOffsetListForDCI_Format0_2_r16_sequence_of[1] = { - { &hf_nr_rrc_reportSlotOffsetListForDCI_Format0_2_r16_item, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_INTEGER_0_32 }, +static const per_sequence_t T_reportSlotOffsetListDCI_0_2_r16_sequence_of[1] = { + { &hf_nr_rrc_reportSlotOffsetListDCI_0_2_r16_item, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_INTEGER_0_32 }, }; static int -dissect_nr_rrc_T_reportSlotOffsetListForDCI_Format0_2_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { +dissect_nr_rrc_T_reportSlotOffsetListDCI_0_2_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { offset = dissect_per_constrained_sequence_of(tvb, offset, actx, tree, hf_index, - ett_nr_rrc_T_reportSlotOffsetListForDCI_Format0_2_r16, T_reportSlotOffsetListForDCI_Format0_2_r16_sequence_of, + ett_nr_rrc_T_reportSlotOffsetListDCI_0_2_r16, T_reportSlotOffsetListDCI_0_2_r16_sequence_of, 1, maxNrofUL_Allocations_r16, FALSE); return offset; } -static const per_sequence_t T_reportSlotOffsetListForDCI_Format0_1_r16_sequence_of[1] = { - { &hf_nr_rrc_reportSlotOffsetListForDCI_Format0_1_r16_item, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_INTEGER_0_32 }, +static const per_sequence_t T_reportSlotOffsetListDCI_0_1_r16_sequence_of[1] = { + { &hf_nr_rrc_reportSlotOffsetListDCI_0_1_r16_item, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_INTEGER_0_32 }, }; static int -dissect_nr_rrc_T_reportSlotOffsetListForDCI_Format0_1_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { +dissect_nr_rrc_T_reportSlotOffsetListDCI_0_1_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { offset = dissect_per_constrained_sequence_of(tvb, offset, actx, tree, hf_index, - ett_nr_rrc_T_reportSlotOffsetListForDCI_Format0_1_r16, T_reportSlotOffsetListForDCI_Format0_1_r16_sequence_of, + ett_nr_rrc_T_reportSlotOffsetListDCI_0_1_r16, T_reportSlotOffsetListDCI_0_1_r16_sequence_of, 1, maxNrofUL_Allocations_r16, FALSE); return offset; @@ -61178,8 +61873,8 @@ dissect_nr_rrc_T_reportSlotOffsetListForDCI_Format0_1_r16(tvbuff_t *tvb _U_, int static const per_sequence_t T_semiPersistentOnPUSCH_v1610_sequence[] = { - { &hf_nr_rrc_reportSlotOffsetListForDCI_Format0_2_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_reportSlotOffsetListForDCI_Format0_2_r16 }, - { &hf_nr_rrc_reportSlotOffsetListForDCI_Format0_1_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_reportSlotOffsetListForDCI_Format0_1_r16 }, + { &hf_nr_rrc_reportSlotOffsetListDCI_0_2_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_reportSlotOffsetListDCI_0_2_r16 }, + { &hf_nr_rrc_reportSlotOffsetListDCI_0_1_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_reportSlotOffsetListDCI_0_1_r16 }, { NULL, 0, 0, NULL } }; @@ -61192,28 +61887,28 @@ dissect_nr_rrc_T_semiPersistentOnPUSCH_v1610(tvbuff_t *tvb _U_, int offset _U_, } -static const per_sequence_t T_reportSlotOffsetListForDCI_Format0_2_r16_01_sequence_of[1] = { - { &hf_nr_rrc_reportSlotOffsetListForDCI_Format0_2_r16_item, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_INTEGER_0_32 }, +static const per_sequence_t T_reportSlotOffsetListDCI_0_2_r16_01_sequence_of[1] = { + { &hf_nr_rrc_reportSlotOffsetListDCI_0_2_r16_item, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_INTEGER_0_32 }, }; static int -dissect_nr_rrc_T_reportSlotOffsetListForDCI_Format0_2_r16_01(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { +dissect_nr_rrc_T_reportSlotOffsetListDCI_0_2_r16_01(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { offset = dissect_per_constrained_sequence_of(tvb, offset, actx, tree, hf_index, - ett_nr_rrc_T_reportSlotOffsetListForDCI_Format0_2_r16_01, T_reportSlotOffsetListForDCI_Format0_2_r16_01_sequence_of, + ett_nr_rrc_T_reportSlotOffsetListDCI_0_2_r16_01, T_reportSlotOffsetListDCI_0_2_r16_01_sequence_of, 1, maxNrofUL_Allocations_r16, FALSE); return offset; } -static const per_sequence_t T_reportSlotOffsetListForDCI_Format0_1_r16_01_sequence_of[1] = { - { &hf_nr_rrc_reportSlotOffsetListForDCI_Format0_1_r16_item, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_INTEGER_0_32 }, +static const per_sequence_t T_reportSlotOffsetListDCI_0_1_r16_01_sequence_of[1] = { + { &hf_nr_rrc_reportSlotOffsetListDCI_0_1_r16_item, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_INTEGER_0_32 }, }; static int -dissect_nr_rrc_T_reportSlotOffsetListForDCI_Format0_1_r16_01(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { +dissect_nr_rrc_T_reportSlotOffsetListDCI_0_1_r16_01(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { offset = dissect_per_constrained_sequence_of(tvb, offset, actx, tree, hf_index, - ett_nr_rrc_T_reportSlotOffsetListForDCI_Format0_1_r16_01, T_reportSlotOffsetListForDCI_Format0_1_r16_01_sequence_of, + ett_nr_rrc_T_reportSlotOffsetListDCI_0_1_r16_01, T_reportSlotOffsetListDCI_0_1_r16_01_sequence_of, 1, maxNrofUL_Allocations_r16, FALSE); return offset; @@ -61221,8 +61916,8 @@ dissect_nr_rrc_T_reportSlotOffsetListForDCI_Format0_1_r16_01(tvbuff_t *tvb _U_, static const per_sequence_t T_aperiodic_v1610_sequence[] = { - { &hf_nr_rrc_reportSlotOffsetListForDCI_Format0_2_r16_01, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_reportSlotOffsetListForDCI_Format0_2_r16_01 }, - { &hf_nr_rrc_reportSlotOffsetListForDCI_Format0_1_r16_01, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_reportSlotOffsetListForDCI_Format0_1_r16_01 }, + { &hf_nr_rrc_reportSlotOffsetListDCI_0_2_r16_01, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_reportSlotOffsetListDCI_0_2_r16_01 }, + { &hf_nr_rrc_reportSlotOffsetListDCI_0_1_r16_01, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_reportSlotOffsetListDCI_0_1_r16_01 }, { NULL, 0, 0, NULL } }; @@ -61709,7 +62404,7 @@ dissect_nr_rrc_T_semiPersistentOnPUSCH_TriggerStateList(tvbuff_t *tvb _U_, int o static const per_sequence_t CSI_MeasConfig_eag_1_sequence[] = { - { &hf_nr_rrc_reportTriggerSizeForDCI_Format0_2_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_INTEGER_0_6 }, + { &hf_nr_rrc_reportTriggerSizeDCI_0_2_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_INTEGER_0_6 }, { NULL, 0, 0, NULL } }; @@ -61760,7 +62455,7 @@ static const value_string nr_rrc_T_csi_MeasConfig_vals[] = { static const per_choice_t T_csi_MeasConfig_choice[] = { { 0, &hf_nr_rrc_release , ASN1_NO_EXTENSIONS , dissect_nr_rrc_NULL }, - { 1, &hf_nr_rrc_setup_98 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_CSI_MeasConfig }, + { 1, &hf_nr_rrc_setup_99 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_CSI_MeasConfig }, { 0, NULL, 0, NULL } }; @@ -61855,23 +62550,39 @@ dissect_nr_rrc_T_schedulingCellInfo(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_ } -static const per_sequence_t T_carrierIndicatorSize_sequence[] = { - { &hf_nr_rrc_carrierIndicatorSizeForDCI_Format1_2_r16, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_INTEGER_0_3 }, - { &hf_nr_rrc_carrierIndicatorSizeForDCI_Format0_2_r16, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_INTEGER_0_3 }, +static const per_sequence_t T_carrierIndicatorSize_r16_sequence[] = { + { &hf_nr_rrc_carrierIndicatorSizeDCI_1_2_r16, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_INTEGER_0_3 }, + { &hf_nr_rrc_carrierIndicatorSizeDCI_0_2_r16, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_INTEGER_0_3 }, { NULL, 0, 0, NULL } }; static int -dissect_nr_rrc_T_carrierIndicatorSize(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { +dissect_nr_rrc_T_carrierIndicatorSize_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { offset = dissect_per_sequence(tvb, offset, actx, tree, hf_index, - ett_nr_rrc_T_carrierIndicatorSize, T_carrierIndicatorSize_sequence); + ett_nr_rrc_T_carrierIndicatorSize_r16, T_carrierIndicatorSize_r16_sequence); + + return offset; +} + + +static const value_string nr_rrc_T_enableDefaultBeamForCCS_r16_vals[] = { + { 0, "enabled" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_enableDefaultBeamForCCS_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 1, NULL, FALSE, 0, NULL); return offset; } static const per_sequence_t CrossCarrierSchedulingConfig_eag_1_sequence[] = { - { &hf_nr_rrc_carrierIndicatorSize, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_carrierIndicatorSize }, + { &hf_nr_rrc_carrierIndicatorSize_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_carrierIndicatorSize_r16 }, + { &hf_nr_rrc_enableDefaultBeamForCCS_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_enableDefaultBeamForCCS_r16 }, { NULL, 0, 0, NULL } }; @@ -61937,7 +62648,7 @@ static const value_string nr_rrc_T_lte_CRS_ToMatchAround_vals[] = { static const per_choice_t T_lte_CRS_ToMatchAround_choice[] = { { 0, &hf_nr_rrc_release , ASN1_NO_EXTENSIONS , dissect_nr_rrc_NULL }, - { 1, &hf_nr_rrc_setup_99 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_RateMatchPatternLTE_CRS }, + { 1, &hf_nr_rrc_setup_100 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_RateMatchPatternLTE_CRS }, { 0, NULL, 0, NULL } }; @@ -62115,7 +62826,7 @@ static const value_string nr_rrc_T_withinActiveTimeConfig_r16_vals[] = { static const per_choice_t T_withinActiveTimeConfig_r16_choice[] = { { 0, &hf_nr_rrc_release , ASN1_NO_EXTENSIONS , dissect_nr_rrc_NULL }, - { 1, &hf_nr_rrc_setup_106 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_WithinActiveTimeConfig_r16 }, + { 1, &hf_nr_rrc_setup_107 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_WithinActiveTimeConfig_r16 }, { 0, NULL, 0, NULL } }; @@ -62152,7 +62863,7 @@ static const value_string nr_rrc_T_outsideActiveTimeConfig_r16_vals[] = { static const per_choice_t T_outsideActiveTimeConfig_r16_choice[] = { { 0, &hf_nr_rrc_release , ASN1_NO_EXTENSIONS , dissect_nr_rrc_NULL }, - { 1, &hf_nr_rrc_setup_107 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_OutsideActiveTimeConfig_r16 }, + { 1, &hf_nr_rrc_setup_108 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_OutsideActiveTimeConfig_r16 }, { 0, NULL, 0, NULL } }; @@ -62190,7 +62901,7 @@ static const value_string nr_rrc_T_dormantBWP_Config_r16_vals[] = { static const per_choice_t T_dormantBWP_Config_r16_choice[] = { { 0, &hf_nr_rrc_release , ASN1_NO_EXTENSIONS , dissect_nr_rrc_NULL }, - { 1, &hf_nr_rrc_setup_100 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_DormantBWP_Config_r16 }, + { 1, &hf_nr_rrc_setup_101 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_DormantBWP_Config_r16 }, { 0, NULL, 0, NULL } }; @@ -62330,7 +63041,7 @@ static const value_string nr_rrc_T_channelAccessConfig_r16_vals[] = { static const per_choice_t T_channelAccessConfig_r16_choice[] = { { 0, &hf_nr_rrc_release , ASN1_NO_EXTENSIONS , dissect_nr_rrc_NULL }, - { 1, &hf_nr_rrc_setup_101 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_ChannelAccessConfig_r16 }, + { 1, &hf_nr_rrc_setup_102 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_ChannelAccessConfig_r16 }, { 0, NULL, 0, NULL } }; @@ -62369,20 +63080,49 @@ dissect_nr_rrc_GuardBand_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx } -static const per_sequence_t IntraCellGuardBands_r16_sequence_of[1] = { - { &hf_nr_rrc_IntraCellGuardBands_r16_item, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_GuardBand_r16 }, +static const per_sequence_t SEQUENCE_SIZE_1_4_OF_GuardBand_r16_sequence_of[1] = { + { &hf_nr_rrc_intraCellGuardBands_r16_item, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_GuardBand_r16 }, }; static int -dissect_nr_rrc_IntraCellGuardBands_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { +dissect_nr_rrc_SEQUENCE_SIZE_1_4_OF_GuardBand_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { offset = dissect_per_constrained_sequence_of(tvb, offset, actx, tree, hf_index, - ett_nr_rrc_IntraCellGuardBands_r16, IntraCellGuardBands_r16_sequence_of, + ett_nr_rrc_SEQUENCE_SIZE_1_4_OF_GuardBand_r16, SEQUENCE_SIZE_1_4_OF_GuardBand_r16_sequence_of, 1, 4, FALSE); return offset; } +static const per_sequence_t IntraCellGuardBandsPerSCS_r16_sequence[] = { + { &hf_nr_rrc_guardBandSCS_r16, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_SubcarrierSpacing }, + { &hf_nr_rrc_intraCellGuardBands_r16, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_SEQUENCE_SIZE_1_4_OF_GuardBand_r16 }, + { NULL, 0, 0, NULL } +}; + +static int +dissect_nr_rrc_IntraCellGuardBandsPerSCS_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_sequence(tvb, offset, actx, tree, hf_index, + ett_nr_rrc_IntraCellGuardBandsPerSCS_r16, IntraCellGuardBandsPerSCS_r16_sequence); + + return offset; +} + + +static const per_sequence_t SEQUENCE_SIZE_1_maxSCSs_OF_IntraCellGuardBandsPerSCS_r16_sequence_of[1] = { + { &hf_nr_rrc_intraCellGuardBandsDL_List_r16_item, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_IntraCellGuardBandsPerSCS_r16 }, +}; + +static int +dissect_nr_rrc_SEQUENCE_SIZE_1_maxSCSs_OF_IntraCellGuardBandsPerSCS_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_constrained_sequence_of(tvb, offset, actx, tree, hf_index, + ett_nr_rrc_SEQUENCE_SIZE_1_maxSCSs_OF_IntraCellGuardBandsPerSCS_r16, SEQUENCE_SIZE_1_maxSCSs_OF_IntraCellGuardBandsPerSCS_r16_sequence_of, + 1, maxSCSs, FALSE); + + return offset; +} + + static const value_string nr_rrc_T_csi_RS_ValidationWith_DCI_r16_vals[] = { { 0, "enabled" }, { 0, NULL } @@ -62420,7 +63160,7 @@ static const value_string nr_rrc_T_lte_CRS_PatternList1_r16_vals[] = { static const per_choice_t T_lte_CRS_PatternList1_r16_choice[] = { { 0, &hf_nr_rrc_release , ASN1_NO_EXTENSIONS , dissect_nr_rrc_NULL }, - { 1, &hf_nr_rrc_setup_102 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_LTE_CRS_PatternList_r16 }, + { 1, &hf_nr_rrc_setup_103 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_LTE_CRS_PatternList_r16 }, { 0, NULL, 0, NULL } }; @@ -62442,7 +63182,7 @@ static const value_string nr_rrc_T_lte_CRS_PatternList2_r16_vals[] = { static const per_choice_t T_lte_CRS_PatternList2_r16_choice[] = { { 0, &hf_nr_rrc_release , ASN1_NO_EXTENSIONS , dissect_nr_rrc_NULL }, - { 1, &hf_nr_rrc_setup_102 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_LTE_CRS_PatternList_r16 }, + { 1, &hf_nr_rrc_setup_103 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_LTE_CRS_PatternList_r16 }, { 0, NULL, 0, NULL } }; @@ -62471,14 +63211,14 @@ dissect_nr_rrc_T_crs_RateMatch_PerCORESETPoolIndex_r16(tvbuff_t *tvb _U_, int of } -static const value_string nr_rrc_T_enableTwoDefaultTCIStates_r16_vals[] = { +static const value_string nr_rrc_T_enableTwoDefaultTCI_States_r16_vals[] = { { 0, "enabled" }, { 0, NULL } }; static int -dissect_nr_rrc_T_enableTwoDefaultTCIStates_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { +dissect_nr_rrc_T_enableTwoDefaultTCI_States_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, 1, NULL, FALSE, 0, NULL); @@ -62486,14 +63226,14 @@ dissect_nr_rrc_T_enableTwoDefaultTCIStates_r16(tvbuff_t *tvb _U_, int offset _U_ } -static const value_string nr_rrc_T_enableDefaultTCIStatePerCoresetPoolIndex_r16_vals[] = { +static const value_string nr_rrc_T_enableDefaultTCI_StatePerCoresetPoolIndex_r16_vals[] = { { 0, "enabled" }, { 0, NULL } }; static int -dissect_nr_rrc_T_enableDefaultTCIStatePerCoresetPoolIndex_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { +dissect_nr_rrc_T_enableDefaultTCI_StatePerCoresetPoolIndex_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, 1, NULL, FALSE, 0, NULL); @@ -62548,18 +63288,18 @@ dissect_nr_rrc_T_cbg_TxDiffTBsProcessingType2_r16(tvbuff_t *tvb _U_, int offset static const per_sequence_t ServingCellConfig_eag_2_sequence[] = { { &hf_nr_rrc_supplementaryUplinkRelease, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_supplementaryUplinkRelease }, - { &hf_nr_rrc_tdd_UL_DL_ConfigurationDedicated_iab_mt_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_TDD_UL_DL_ConfigDedicated_IAB_MT_r16 }, + { &hf_nr_rrc_tdd_UL_DL_ConfigurationDedicated_IAB_MT_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_TDD_UL_DL_ConfigDedicated_IAB_MT_r16 }, { &hf_nr_rrc_dormantBWP_Config_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_dormantBWP_Config_r16 }, { &hf_nr_rrc_ca_SlotOffset_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_ca_SlotOffset_r16 }, { &hf_nr_rrc_channelAccessConfig_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_channelAccessConfig_r16 }, - { &hf_nr_rrc_intraCellGuardBandsUL_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_IntraCellGuardBands_r16 }, - { &hf_nr_rrc_intraCellGuardBandsDL_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_IntraCellGuardBands_r16 }, + { &hf_nr_rrc_intraCellGuardBandsDL_List_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_SEQUENCE_SIZE_1_maxSCSs_OF_IntraCellGuardBandsPerSCS_r16 }, + { &hf_nr_rrc_intraCellGuardBandsUL_List_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_SEQUENCE_SIZE_1_maxSCSs_OF_IntraCellGuardBandsPerSCS_r16 }, { &hf_nr_rrc_csi_RS_ValidationWith_DCI_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_csi_RS_ValidationWith_DCI_r16 }, { &hf_nr_rrc_lte_CRS_PatternList1_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_lte_CRS_PatternList1_r16 }, { &hf_nr_rrc_lte_CRS_PatternList2_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_lte_CRS_PatternList2_r16 }, { &hf_nr_rrc_crs_RateMatch_PerCORESETPoolIndex_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_crs_RateMatch_PerCORESETPoolIndex_r16 }, - { &hf_nr_rrc_enableTwoDefaultTCIStates_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_enableTwoDefaultTCIStates_r16 }, - { &hf_nr_rrc_enableDefaultTCIStatePerCoresetPoolIndex_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_enableDefaultTCIStatePerCoresetPoolIndex_r16 }, + { &hf_nr_rrc_enableTwoDefaultTCI_States_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_enableTwoDefaultTCI_States_r16 }, + { &hf_nr_rrc_enableDefaultTCI_StatePerCoresetPoolIndex_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_enableDefaultTCI_StatePerCoresetPoolIndex_r16 }, { &hf_nr_rrc_enableBeamSwitchTiming_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_enableBeamSwitchTiming_r16 }, { &hf_nr_rrc_cbg_TxDiffTBsProcessingType1_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_cbg_TxDiffTBsProcessingType1_r16 }, { &hf_nr_rrc_cbg_TxDiffTBsProcessingType2_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_cbg_TxDiffTBsProcessingType2_r16 }, @@ -62841,6 +63581,21 @@ dissect_nr_rrc_T_uplinkTxSwitchingOption_r16(tvbuff_t *tvb _U_, int offset _U_, } +static const value_string nr_rrc_T_uplinkTxSwitchingPowerBoosting_r16_vals[] = { + { 0, "enabled" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_uplinkTxSwitchingPowerBoosting_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 1, NULL, FALSE, 0, NULL); + + return offset; +} + + static const per_sequence_t CellGroupConfig_eag_2_sequence[] = { { &hf_nr_rrc_bap_Address_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_BIT_STRING_SIZE_10 }, { &hf_nr_rrc_bh_RLC_ChannelToAddModList_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_SEQUENCE_SIZE_1_maxBH_RLC_ChannelID_r16_OF_BH_RLC_ChannelConfig_r16 }, @@ -62851,6 +63606,7 @@ static const per_sequence_t CellGroupConfig_eag_2_sequence[] = { { &hf_nr_rrc_simultaneousSpatial_UpdatedList1_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_SEQUENCE_SIZE_1_maxNrofServingCellsTCI_r16_OF_ServCellIndex }, { &hf_nr_rrc_simultaneousSpatial_UpdatedList2_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_SEQUENCE_SIZE_1_maxNrofServingCellsTCI_r16_OF_ServCellIndex }, { &hf_nr_rrc_uplinkTxSwitchingOption_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_uplinkTxSwitchingOption_r16 }, + { &hf_nr_rrc_uplinkTxSwitchingPowerBoosting_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_uplinkTxSwitchingPowerBoosting_r16 }, { NULL, 0, 0, NULL } }; @@ -63479,193 +64235,6 @@ dissect_nr_rrc_MRDC_Parameters_eag_1(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx } -static const value_string nr_rrc_T_eutra_TDD_Config0_r16_vals[] = { - { 0, "n20" }, - { 1, "n40" }, - { 2, "n50" }, - { 3, "n60" }, - { 4, "n70" }, - { 5, "n80" }, - { 6, "n90" }, - { 7, "n100" }, - { 0, NULL } -}; - - -static int -dissect_nr_rrc_T_eutra_TDD_Config0_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { - offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, - 8, NULL, FALSE, 0, NULL); - - return offset; -} - - -static const value_string nr_rrc_T_eutra_TDD_Config1_r16_vals[] = { - { 0, "n20" }, - { 1, "n40" }, - { 2, "n50" }, - { 3, "n60" }, - { 4, "n70" }, - { 5, "n80" }, - { 6, "n90" }, - { 7, "n100" }, - { 0, NULL } -}; - - -static int -dissect_nr_rrc_T_eutra_TDD_Config1_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { - offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, - 8, NULL, FALSE, 0, NULL); - - return offset; -} - - -static const value_string nr_rrc_T_eutra_TDD_Config2_r16_vals[] = { - { 0, "n20" }, - { 1, "n40" }, - { 2, "n50" }, - { 3, "n60" }, - { 4, "n70" }, - { 5, "n80" }, - { 6, "n90" }, - { 7, "n100" }, - { 0, NULL } -}; - - -static int -dissect_nr_rrc_T_eutra_TDD_Config2_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { - offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, - 8, NULL, FALSE, 0, NULL); - - return offset; -} - - -static const value_string nr_rrc_T_eutra_TDD_Config3_r16_vals[] = { - { 0, "n20" }, - { 1, "n40" }, - { 2, "n50" }, - { 3, "n60" }, - { 4, "n70" }, - { 5, "n80" }, - { 6, "n90" }, - { 7, "n100" }, - { 0, NULL } -}; - - -static int -dissect_nr_rrc_T_eutra_TDD_Config3_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { - offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, - 8, NULL, FALSE, 0, NULL); - - return offset; -} - - -static const value_string nr_rrc_T_eutra_TDD_Config4_r16_vals[] = { - { 0, "n20" }, - { 1, "n40" }, - { 2, "n50" }, - { 3, "n60" }, - { 4, "n70" }, - { 5, "n80" }, - { 6, "n90" }, - { 7, "n100" }, - { 0, NULL } -}; - - -static int -dissect_nr_rrc_T_eutra_TDD_Config4_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { - offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, - 8, NULL, FALSE, 0, NULL); - - return offset; -} - - -static const value_string nr_rrc_T_eutra_TDD_Config5_r16_vals[] = { - { 0, "n20" }, - { 1, "n40" }, - { 2, "n50" }, - { 3, "n60" }, - { 4, "n70" }, - { 5, "n80" }, - { 6, "n90" }, - { 7, "n100" }, - { 0, NULL } -}; - - -static int -dissect_nr_rrc_T_eutra_TDD_Config5_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { - offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, - 8, NULL, FALSE, 0, NULL); - - return offset; -} - - -static const value_string nr_rrc_T_eutra_TDD_Config6_r16_vals[] = { - { 0, "n20" }, - { 1, "n40" }, - { 2, "n50" }, - { 3, "n60" }, - { 4, "n70" }, - { 5, "n80" }, - { 6, "n90" }, - { 7, "n100" }, - { 0, NULL } -}; - - -static int -dissect_nr_rrc_T_eutra_TDD_Config6_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { - offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, - 8, NULL, FALSE, 0, NULL); - - return offset; -} - - -static const per_sequence_t T_maxUplinkDutyCycle_interBandENDC_TDD_PC2_r16_sequence[] = { - { &hf_nr_rrc_eutra_TDD_Config0_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_eutra_TDD_Config0_r16 }, - { &hf_nr_rrc_eutra_TDD_Config1_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_eutra_TDD_Config1_r16 }, - { &hf_nr_rrc_eutra_TDD_Config2_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_eutra_TDD_Config2_r16 }, - { &hf_nr_rrc_eutra_TDD_Config3_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_eutra_TDD_Config3_r16 }, - { &hf_nr_rrc_eutra_TDD_Config4_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_eutra_TDD_Config4_r16 }, - { &hf_nr_rrc_eutra_TDD_Config5_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_eutra_TDD_Config5_r16 }, - { &hf_nr_rrc_eutra_TDD_Config6_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_eutra_TDD_Config6_r16 }, - { NULL, 0, 0, NULL } -}; - -static int -dissect_nr_rrc_T_maxUplinkDutyCycle_interBandENDC_TDD_PC2_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { - offset = dissect_per_sequence(tvb, offset, actx, tree, hf_index, - ett_nr_rrc_T_maxUplinkDutyCycle_interBandENDC_TDD_PC2_r16, T_maxUplinkDutyCycle_interBandENDC_TDD_PC2_r16_sequence); - - return offset; -} - - -static const per_sequence_t MRDC_Parameters_eag_2_sequence[] = { - { &hf_nr_rrc_maxUplinkDutyCycle_interBandENDC_TDD_PC2_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_maxUplinkDutyCycle_interBandENDC_TDD_PC2_r16 }, - { NULL, 0, 0, NULL } -}; - -static int -dissect_nr_rrc_MRDC_Parameters_eag_2(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { - offset = dissect_per_sequence_eag(tvb, offset, actx, tree, MRDC_Parameters_eag_2_sequence); - - return offset; -} - - static const per_sequence_t MRDC_Parameters_sequence[] = { { &hf_nr_rrc_singleUL_Transmission, ASN1_EXTENSION_ROOT , ASN1_OPTIONAL , dissect_nr_rrc_T_singleUL_Transmission }, { &hf_nr_rrc_dynamicPowerSharingENDC, ASN1_EXTENSION_ROOT , ASN1_OPTIONAL , dissect_nr_rrc_T_dynamicPowerSharingENDC }, @@ -63675,7 +64244,6 @@ static const per_sequence_t MRDC_Parameters_sequence[] = { { &hf_nr_rrc_simultaneousRxTxInterBandENDC, ASN1_EXTENSION_ROOT , ASN1_OPTIONAL , dissect_nr_rrc_T_simultaneousRxTxInterBandENDC }, { &hf_nr_rrc_asyncIntraBandENDC, ASN1_EXTENSION_ROOT , ASN1_OPTIONAL , dissect_nr_rrc_T_asyncIntraBandENDC }, { &dummy_hf_nr_rrc_eag_field, ASN1_NOT_EXTENSION_ROOT, ASN1_NOT_OPTIONAL, dissect_nr_rrc_MRDC_Parameters_eag_1 }, - { &dummy_hf_nr_rrc_eag_field, ASN1_NOT_EXTENSION_ROOT, ASN1_NOT_OPTIONAL, dissect_nr_rrc_MRDC_Parameters_eag_2 }, { NULL, 0, 0, NULL } }; @@ -64475,14 +65043,42 @@ dissect_nr_rrc_T_srs_TxSwitch_v1610(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_ } -static const value_string nr_rrc_T_intraFreqDiffSCS_DAPS_r16_vals[] = { +static const per_sequence_t BandParameters_v1610_sequence[] = { + { &hf_nr_rrc_srs_TxSwitch_v1610, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_srs_TxSwitch_v1610 }, + { NULL, 0, 0, NULL } +}; + +static int +dissect_nr_rrc_BandParameters_v1610(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_sequence(tvb, offset, actx, tree, hf_index, + ett_nr_rrc_BandParameters_v1610, BandParameters_v1610_sequence); + + return offset; +} + + +static const per_sequence_t SEQUENCE_SIZE_1_maxSimultaneousBands_OF_BandParameters_v1610_sequence_of[1] = { + { &hf_nr_rrc_bandList_v1610_item, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_BandParameters_v1610 }, +}; + +static int +dissect_nr_rrc_SEQUENCE_SIZE_1_maxSimultaneousBands_OF_BandParameters_v1610(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_constrained_sequence_of(tvb, offset, actx, tree, hf_index, + ett_nr_rrc_SEQUENCE_SIZE_1_maxSimultaneousBands_OF_BandParameters_v1610, SEQUENCE_SIZE_1_maxSimultaneousBands_OF_BandParameters_v1610_sequence_of, + 1, maxSimultaneousBands, FALSE); + + return offset; +} + + +static const value_string nr_rrc_T_parallelTxMsgA_SRS_PUCCH_PUSCH_r16_vals[] = { { 0, "supported" }, { 0, NULL } }; static int -dissect_nr_rrc_T_intraFreqDiffSCS_DAPS_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { +dissect_nr_rrc_T_parallelTxMsgA_SRS_PUCCH_PUSCH_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, 1, NULL, FALSE, 0, NULL); @@ -64490,14 +65086,14 @@ dissect_nr_rrc_T_intraFreqDiffSCS_DAPS_r16(tvbuff_t *tvb _U_, int offset _U_, as } -static const value_string nr_rrc_T_intraFreqDAPS_r16_vals[] = { +static const value_string nr_rrc_T_msgA_SUL_r16_vals[] = { { 0, "supported" }, { 0, NULL } }; static int -dissect_nr_rrc_T_intraFreqDAPS_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { +dissect_nr_rrc_T_msgA_SUL_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, 1, NULL, FALSE, 0, NULL); @@ -64505,14 +65101,14 @@ dissect_nr_rrc_T_intraFreqDAPS_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t } -static const value_string nr_rrc_T_intraFreqAsyncDAPS_r16_vals[] = { +static const value_string nr_rrc_T_jointSearchSpaceGroupSwitchingAcrossCells_r16_vals[] = { { 0, "supported" }, { 0, NULL } }; static int -dissect_nr_rrc_T_intraFreqAsyncDAPS_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { +dissect_nr_rrc_T_jointSearchSpaceGroupSwitchingAcrossCells_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, 1, NULL, FALSE, 0, NULL); @@ -64520,14 +65116,14 @@ dissect_nr_rrc_T_intraFreqAsyncDAPS_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ } -static const value_string nr_rrc_T_intraFreqMultiUL_TransmissionDAPS_r16_vals[] = { +static const value_string nr_rrc_T_half_DuplexTDD_CA_SameSCS_r16_vals[] = { { 0, "supported" }, { 0, NULL } }; static int -dissect_nr_rrc_T_intraFreqMultiUL_TransmissionDAPS_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { +dissect_nr_rrc_T_half_DuplexTDD_CA_SameSCS_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, 1, NULL, FALSE, 0, NULL); @@ -64535,14 +65131,14 @@ dissect_nr_rrc_T_intraFreqMultiUL_TransmissionDAPS_r16(tvbuff_t *tvb _U_, int of } -static const value_string nr_rrc_T_intraFreqTwoTAGs_DAPS_r16_vals[] = { +static const value_string nr_rrc_T_scellDormancyWithinActiveTime_r16_vals[] = { { 0, "supported" }, { 0, NULL } }; static int -dissect_nr_rrc_T_intraFreqTwoTAGs_DAPS_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { +dissect_nr_rrc_T_scellDormancyWithinActiveTime_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, 1, NULL, FALSE, 0, NULL); @@ -64550,14 +65146,14 @@ dissect_nr_rrc_T_intraFreqTwoTAGs_DAPS_r16(tvbuff_t *tvb _U_, int offset _U_, as } -static const value_string nr_rrc_T_intraFreqSemiStaticPowerSharingDAPS_Mode1_r16_vals[] = { +static const value_string nr_rrc_T_scellDormancyOutsideActiveTime_r16_vals[] = { { 0, "supported" }, { 0, NULL } }; static int -dissect_nr_rrc_T_intraFreqSemiStaticPowerSharingDAPS_Mode1_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { +dissect_nr_rrc_T_scellDormancyOutsideActiveTime_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, 1, NULL, FALSE, 0, NULL); @@ -64565,30 +65161,32 @@ dissect_nr_rrc_T_intraFreqSemiStaticPowerSharingDAPS_Mode1_r16(tvbuff_t *tvb _U_ } -static const value_string nr_rrc_T_intraFreqSemiStaticPowerSharingDAPS_Mode2_r16_vals[] = { - { 0, "supported" }, +static const value_string nr_rrc_T_crossCarrierA_CSI_trigDiffSCS_r16_vals[] = { + { 0, "higherA-CSI-SCS" }, + { 1, "lowerA-CSI-SCS" }, + { 2, "both" }, { 0, NULL } }; static int -dissect_nr_rrc_T_intraFreqSemiStaticPowerSharingDAPS_Mode2_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { +dissect_nr_rrc_T_crossCarrierA_CSI_trigDiffSCS_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, - 1, NULL, FALSE, 0, NULL); + 3, NULL, FALSE, 0, NULL); return offset; } -static const value_string nr_rrc_T_intraFreqDynamicPowersharingDAPS_r16_vals[] = { - { 0, "short" }, - { 1, "long" }, +static const value_string nr_rrc_T_defaultQCL_CrossCarrierA_CSI_Trig_r16_vals[] = { + { 0, "diffOnly" }, + { 1, "both" }, { 0, NULL } }; static int -dissect_nr_rrc_T_intraFreqDynamicPowersharingDAPS_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { +dissect_nr_rrc_T_defaultQCL_CrossCarrierA_CSI_Trig_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, 2, NULL, FALSE, 0, NULL); @@ -64596,64 +65194,59 @@ dissect_nr_rrc_T_intraFreqDynamicPowersharingDAPS_r16(tvbuff_t *tvb _U_, int off } -static const per_sequence_t T_intraFreqDAPS_Parameters_r16_sequence[] = { - { &hf_nr_rrc_intraFreqDiffSCS_DAPS_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_intraFreqDiffSCS_DAPS_r16 }, - { &hf_nr_rrc_intraFreqDAPS_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_intraFreqDAPS_r16 }, - { &hf_nr_rrc_intraFreqAsyncDAPS_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_intraFreqAsyncDAPS_r16 }, - { &hf_nr_rrc_intraFreqMultiUL_TransmissionDAPS_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_intraFreqMultiUL_TransmissionDAPS_r16 }, - { &hf_nr_rrc_intraFreqTwoTAGs_DAPS_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_intraFreqTwoTAGs_DAPS_r16 }, - { &hf_nr_rrc_intraFreqSemiStaticPowerSharingDAPS_Mode1_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_intraFreqSemiStaticPowerSharingDAPS_Mode1_r16 }, - { &hf_nr_rrc_intraFreqSemiStaticPowerSharingDAPS_Mode2_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_intraFreqSemiStaticPowerSharingDAPS_Mode2_r16 }, - { &hf_nr_rrc_intraFreqDynamicPowersharingDAPS_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_intraFreqDynamicPowersharingDAPS_r16 }, - { NULL, 0, 0, NULL } +static const value_string nr_rrc_T_interCA_NonAlignedFrame_r16_vals[] = { + { 0, "supported" }, + { 0, NULL } }; + static int -dissect_nr_rrc_T_intraFreqDAPS_Parameters_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { - offset = dissect_per_sequence(tvb, offset, actx, tree, hf_index, - ett_nr_rrc_T_intraFreqDAPS_Parameters_r16, T_intraFreqDAPS_Parameters_r16_sequence); +dissect_nr_rrc_T_interCA_NonAlignedFrame_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 1, NULL, FALSE, 0, NULL); return offset; } -static const per_sequence_t BandParameters_v1610_sequence[] = { - { &hf_nr_rrc_srs_TxSwitch_v1610, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_srs_TxSwitch_v1610 }, - { &hf_nr_rrc_intraFreqDAPS_Parameters_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_intraFreqDAPS_Parameters_r16 }, - { NULL, 0, 0, NULL } +static const value_string nr_rrc_T_simul_SRS_Trans_BC_r16_vals[] = { + { 0, "n2" }, + { 0, NULL } }; + static int -dissect_nr_rrc_BandParameters_v1610(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { - offset = dissect_per_sequence(tvb, offset, actx, tree, hf_index, - ett_nr_rrc_BandParameters_v1610, BandParameters_v1610_sequence); +dissect_nr_rrc_T_simul_SRS_Trans_BC_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 1, NULL, FALSE, 0, NULL); return offset; } -static const per_sequence_t SEQUENCE_SIZE_1_maxSimultaneousBands_OF_BandParameters_v1610_sequence_of[1] = { - { &hf_nr_rrc_bandList_v1610_item, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_BandParameters_v1610 }, +static const value_string nr_rrc_T_interFreqAsyncDAPS_r16_vals[] = { + { 0, "supported" }, + { 0, NULL } }; + static int -dissect_nr_rrc_SEQUENCE_SIZE_1_maxSimultaneousBands_OF_BandParameters_v1610(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { - offset = dissect_per_constrained_sequence_of(tvb, offset, actx, tree, hf_index, - ett_nr_rrc_SEQUENCE_SIZE_1_maxSimultaneousBands_OF_BandParameters_v1610, SEQUENCE_SIZE_1_maxSimultaneousBands_OF_BandParameters_v1610_sequence_of, - 1, maxSimultaneousBands, FALSE); +dissect_nr_rrc_T_interFreqAsyncDAPS_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 1, NULL, FALSE, 0, NULL); return offset; } -static const value_string nr_rrc_T_parallelTxMsgA_SRS_PUCCH_PUSCH_r16_vals[] = { +static const value_string nr_rrc_T_interFreqDiffSCS_DAPS_r16_vals[] = { { 0, "supported" }, { 0, NULL } }; static int -dissect_nr_rrc_T_parallelTxMsgA_SRS_PUCCH_PUSCH_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { +dissect_nr_rrc_T_interFreqDiffSCS_DAPS_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, 1, NULL, FALSE, 0, NULL); @@ -64661,14 +65254,14 @@ dissect_nr_rrc_T_parallelTxMsgA_SRS_PUCCH_PUSCH_r16(tvbuff_t *tvb _U_, int offse } -static const value_string nr_rrc_T_msgA_SUL_r16_vals[] = { +static const value_string nr_rrc_T_interFreqMultiUL_TransmissionDAPS_r16_vals[] = { { 0, "supported" }, { 0, NULL } }; static int -dissect_nr_rrc_T_msgA_SUL_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { +dissect_nr_rrc_T_interFreqMultiUL_TransmissionDAPS_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, 1, NULL, FALSE, 0, NULL); @@ -64676,14 +65269,14 @@ dissect_nr_rrc_T_msgA_SUL_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *act } -static const value_string nr_rrc_T_jointSearchSpaceGroupSwitchingAcrossCells_r16_vals[] = { +static const value_string nr_rrc_T_interFreqSemiStaticPowerSharingDAPS_Mode1_r16_vals[] = { { 0, "supported" }, { 0, NULL } }; static int -dissect_nr_rrc_T_jointSearchSpaceGroupSwitchingAcrossCells_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { +dissect_nr_rrc_T_interFreqSemiStaticPowerSharingDAPS_Mode1_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, 1, NULL, FALSE, 0, NULL); @@ -64691,14 +65284,14 @@ dissect_nr_rrc_T_jointSearchSpaceGroupSwitchingAcrossCells_r16(tvbuff_t *tvb _U_ } -static const value_string nr_rrc_T_half_DuplexTDD_CA_SameSCS_r16_vals[] = { +static const value_string nr_rrc_T_interFreqSemiStaticPowerSharingDAPS_Mode2_r16_vals[] = { { 0, "supported" }, { 0, NULL } }; static int -dissect_nr_rrc_T_half_DuplexTDD_CA_SameSCS_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { +dissect_nr_rrc_T_interFreqSemiStaticPowerSharingDAPS_Mode2_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, 1, NULL, FALSE, 0, NULL); @@ -64706,29 +65299,30 @@ dissect_nr_rrc_T_half_DuplexTDD_CA_SameSCS_r16(tvbuff_t *tvb _U_, int offset _U_ } -static const value_string nr_rrc_T_scellDormancyWithinActiveTime_r16_vals[] = { - { 0, "supported" }, +static const value_string nr_rrc_T_interFreqDynamicPowerSharingDAPS_r16_vals[] = { + { 0, "short" }, + { 1, "long" }, { 0, NULL } }; static int -dissect_nr_rrc_T_scellDormancyWithinActiveTime_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { +dissect_nr_rrc_T_interFreqDynamicPowerSharingDAPS_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, - 1, NULL, FALSE, 0, NULL); + 2, NULL, FALSE, 0, NULL); return offset; } -static const value_string nr_rrc_T_scellDormancyOutsideActiveTime_r16_vals[] = { +static const value_string nr_rrc_T_interFreqUL_TransCancellationDAPS_r16_vals[] = { { 0, "supported" }, { 0, NULL } }; static int -dissect_nr_rrc_T_scellDormancyOutsideActiveTime_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { +dissect_nr_rrc_T_interFreqUL_TransCancellationDAPS_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, 1, NULL, FALSE, 0, NULL); @@ -64736,167 +65330,284 @@ dissect_nr_rrc_T_scellDormancyOutsideActiveTime_r16(tvbuff_t *tvb _U_, int offse } -static const value_string nr_rrc_T_crossCarrierA_CSI_trigDiffSCS_r16_vals[] = { - { 0, "higherA-CSI-SCS" }, - { 1, "lowerA-CSI-SCS" }, - { 2, "both" }, - { 0, NULL } +static const per_sequence_t T_interFreqDAPS_r16_sequence[] = { + { &hf_nr_rrc_interFreqAsyncDAPS_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_interFreqAsyncDAPS_r16 }, + { &hf_nr_rrc_interFreqDiffSCS_DAPS_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_interFreqDiffSCS_DAPS_r16 }, + { &hf_nr_rrc_interFreqMultiUL_TransmissionDAPS_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_interFreqMultiUL_TransmissionDAPS_r16 }, + { &hf_nr_rrc_interFreqSemiStaticPowerSharingDAPS_Mode1_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_interFreqSemiStaticPowerSharingDAPS_Mode1_r16 }, + { &hf_nr_rrc_interFreqSemiStaticPowerSharingDAPS_Mode2_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_interFreqSemiStaticPowerSharingDAPS_Mode2_r16 }, + { &hf_nr_rrc_interFreqDynamicPowerSharingDAPS_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_interFreqDynamicPowerSharingDAPS_r16 }, + { &hf_nr_rrc_interFreqUL_TransCancellationDAPS_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_interFreqUL_TransCancellationDAPS_r16 }, + { NULL, 0, 0, NULL } }; +static int +dissect_nr_rrc_T_interFreqDAPS_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_sequence(tvb, offset, actx, tree, hf_index, + ett_nr_rrc_T_interFreqDAPS_r16, T_interFreqDAPS_r16_sequence); + + return offset; +} + + static int -dissect_nr_rrc_T_crossCarrierA_CSI_trigDiffSCS_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { - offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, - 3, NULL, FALSE, 0, NULL); +dissect_nr_rrc_INTEGER_0_maxNrofCSI_RS_ResourcesAlt_1_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_constrained_integer(tvb, offset, actx, tree, hf_index, + 0U, maxNrofCSI_RS_ResourcesAlt_1_r16, NULL, FALSE); return offset; } -static const value_string nr_rrc_T_defaultQCL_CrossCarrierA_CSI_Trig_r16_vals[] = { - { 0, "supported" }, - { 0, NULL } +static const per_sequence_t T_type1_SinglePanel_r16_sequence_of[1] = { + { &hf_nr_rrc_type1_SinglePanel_r16_item, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_INTEGER_0_maxNrofCSI_RS_ResourcesAlt_1_r16 }, }; +static int +dissect_nr_rrc_T_type1_SinglePanel_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_constrained_sequence_of(tvb, offset, actx, tree, hf_index, + ett_nr_rrc_T_type1_SinglePanel_r16, T_type1_SinglePanel_r16_sequence_of, + 1, maxNrofCSI_RS_Resources, FALSE); + + return offset; +} + + +static const per_sequence_t T_type1_MultiPanel_r16_sequence_of[1] = { + { &hf_nr_rrc_type1_MultiPanel_r16_item, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_INTEGER_0_maxNrofCSI_RS_ResourcesAlt_1_r16 }, +}; static int -dissect_nr_rrc_T_defaultQCL_CrossCarrierA_CSI_Trig_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { - offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, - 1, NULL, FALSE, 0, NULL); +dissect_nr_rrc_T_type1_MultiPanel_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_constrained_sequence_of(tvb, offset, actx, tree, hf_index, + ett_nr_rrc_T_type1_MultiPanel_r16, T_type1_MultiPanel_r16_sequence_of, + 1, maxNrofCSI_RS_Resources, FALSE); return offset; } -static const value_string nr_rrc_T_interCA_NonAlignedFrame_r16_vals[] = { - { 0, "supported" }, - { 0, NULL } +static const per_sequence_t T_type2_r16_sequence_of[1] = { + { &hf_nr_rrc_type2_r16_item, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_INTEGER_0_maxNrofCSI_RS_ResourcesAlt_1_r16 }, }; +static int +dissect_nr_rrc_T_type2_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_constrained_sequence_of(tvb, offset, actx, tree, hf_index, + ett_nr_rrc_T_type2_r16, T_type2_r16_sequence_of, + 1, maxNrofCSI_RS_Resources, FALSE); + + return offset; +} + + +static const per_sequence_t T_type2_PortSelection_r16_sequence_of[1] = { + { &hf_nr_rrc_type2_PortSelection_r16_item, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_INTEGER_0_maxNrofCSI_RS_ResourcesAlt_1_r16 }, +}; static int -dissect_nr_rrc_T_interCA_NonAlignedFrame_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { - offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, - 1, NULL, FALSE, 0, NULL); +dissect_nr_rrc_T_type2_PortSelection_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_constrained_sequence_of(tvb, offset, actx, tree, hf_index, + ett_nr_rrc_T_type2_PortSelection_r16, T_type2_PortSelection_r16_sequence_of, + 1, maxNrofCSI_RS_Resources, FALSE); return offset; } -static const value_string nr_rrc_T_asyncDAPS_r16_vals[] = { - { 0, "supported" }, - { 0, NULL } +static const per_sequence_t T_supportedCSI_RS_ResourceListAlt_r16_sequence[] = { + { &hf_nr_rrc_type1_SinglePanel_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_type1_SinglePanel_r16 }, + { &hf_nr_rrc_type1_MultiPanel_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_type1_MultiPanel_r16 }, + { &hf_nr_rrc_type2_r16 , ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_type2_r16 }, + { &hf_nr_rrc_type2_PortSelection_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_type2_PortSelection_r16 }, + { NULL, 0, 0, NULL } }; +static int +dissect_nr_rrc_T_supportedCSI_RS_ResourceListAlt_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_sequence(tvb, offset, actx, tree, hf_index, + ett_nr_rrc_T_supportedCSI_RS_ResourceListAlt_r16, T_supportedCSI_RS_ResourceListAlt_r16_sequence); + + return offset; +} + + +static const per_sequence_t CodebookParameters_v1610_sequence[] = { + { &hf_nr_rrc_supportedCSI_RS_ResourceListAlt_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_supportedCSI_RS_ResourceListAlt_r16 }, + { NULL, 0, 0, NULL } +}; static int -dissect_nr_rrc_T_asyncDAPS_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { - offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, - 1, NULL, FALSE, 0, NULL); +dissect_nr_rrc_CodebookParameters_v1610(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_sequence(tvb, offset, actx, tree, hf_index, + ett_nr_rrc_CodebookParameters_v1610, CodebookParameters_v1610_sequence); return offset; } -static const value_string nr_rrc_T_interFreqDAPS_r16_vals[] = { - { 0, "supported" }, + +static int +dissect_nr_rrc_INTEGER_2_16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_constrained_integer(tvb, offset, actx, tree, hf_index, + 2U, 16U, NULL, FALSE); + + return offset; +} + + +static const value_string nr_rrc_T_supportedSpanArrangement_r16_vals[] = { + { 0, "alignedOnly" }, + { 1, "alignedAndNonAligned" }, { 0, NULL } }; static int -dissect_nr_rrc_T_interFreqDAPS_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { +dissect_nr_rrc_T_supportedSpanArrangement_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, - 1, NULL, FALSE, 0, NULL); + 2, NULL, FALSE, 0, NULL); return offset; } -static const value_string nr_rrc_T_interFreqDiffSCS_DAPS_r16_vals[] = { - { 0, "supported" }, +static const per_sequence_t T_pdcch_MonitoringCA_r16_sequence[] = { + { &hf_nr_rrc_maxNumberOfMonitoringCC_r16, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_INTEGER_2_16 }, + { &hf_nr_rrc_supportedSpanArrangement_r16, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_T_supportedSpanArrangement_r16 }, + { NULL, 0, 0, NULL } +}; + +static int +dissect_nr_rrc_T_pdcch_MonitoringCA_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_sequence(tvb, offset, actx, tree, hf_index, + ett_nr_rrc_T_pdcch_MonitoringCA_r16, T_pdcch_MonitoringCA_r16_sequence); + + return offset; +} + + +static const value_string nr_rrc_T_supportedSpanArrangement_r16_01_vals[] = { + { 0, "alignedOnly" }, + { 1, "alignedAndNonAligned" }, { 0, NULL } }; static int -dissect_nr_rrc_T_interFreqDiffSCS_DAPS_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { +dissect_nr_rrc_T_supportedSpanArrangement_r16_01(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, - 1, NULL, FALSE, 0, NULL); + 2, NULL, FALSE, 0, NULL); return offset; } -static const value_string nr_rrc_T_multiUL_TransmissionDAPS_r16_vals[] = { - { 0, "supported" }, - { 0, NULL } +static const per_sequence_t T_pdcch_BlindDetectionCA_Mixed_r16_sequence[] = { + { &hf_nr_rrc_pdcch_BlindDetectionCA1_r16, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_INTEGER_1_15 }, + { &hf_nr_rrc_pdcch_BlindDetectionCA2_r16, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_INTEGER_1_15 }, + { &hf_nr_rrc_supportedSpanArrangement_r16_01, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_T_supportedSpanArrangement_r16_01 }, + { NULL, 0, 0, NULL } }; +static int +dissect_nr_rrc_T_pdcch_BlindDetectionCA_Mixed_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_sequence(tvb, offset, actx, tree, hf_index, + ett_nr_rrc_T_pdcch_BlindDetectionCA_Mixed_r16, T_pdcch_BlindDetectionCA_Mixed_r16_sequence); + + return offset; +} + + +static const per_sequence_t T_pdcch_BlindDetectionMCG_UE_Mixed_r16_sequence[] = { + { &hf_nr_rrc_pdcch_BlindDetectionMCG_UE1_r16, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_INTEGER_0_15 }, + { &hf_nr_rrc_pdcch_BlindDetectionMCG_UE2_r16, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_INTEGER_0_15 }, + { NULL, 0, 0, NULL } +}; static int -dissect_nr_rrc_T_multiUL_TransmissionDAPS_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { - offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, - 1, NULL, FALSE, 0, NULL); +dissect_nr_rrc_T_pdcch_BlindDetectionMCG_UE_Mixed_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_sequence(tvb, offset, actx, tree, hf_index, + ett_nr_rrc_T_pdcch_BlindDetectionMCG_UE_Mixed_r16, T_pdcch_BlindDetectionMCG_UE_Mixed_r16_sequence); return offset; } -static const value_string nr_rrc_T_semiStaticPowerSharingDAPS_Mode1_r16_vals[] = { - { 0, "supported" }, +static const per_sequence_t T_pdcch_BlindDetectionSCG_UE_Mixed_r16_sequence[] = { + { &hf_nr_rrc_pdcch_BlindDetectionSCG_UE1_r16, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_INTEGER_0_15 }, + { &hf_nr_rrc_pdcch_BlindDetectionSCG_UE2_r16, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_INTEGER_0_15 }, + { NULL, 0, 0, NULL } +}; + +static int +dissect_nr_rrc_T_pdcch_BlindDetectionSCG_UE_Mixed_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_sequence(tvb, offset, actx, tree, hf_index, + ett_nr_rrc_T_pdcch_BlindDetectionSCG_UE_Mixed_r16, T_pdcch_BlindDetectionSCG_UE_Mixed_r16_sequence); + + return offset; +} + + +static const value_string nr_rrc_T_crossCarrierSchedulingDL_DiffSCS_r16_vals[] = { + { 0, "low-to-high" }, + { 1, "high-to-low" }, + { 2, "both" }, { 0, NULL } }; static int -dissect_nr_rrc_T_semiStaticPowerSharingDAPS_Mode1_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { +dissect_nr_rrc_T_crossCarrierSchedulingDL_DiffSCS_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, - 1, NULL, FALSE, 0, NULL); + 3, NULL, FALSE, 0, NULL); return offset; } -static const value_string nr_rrc_T_semiStaticPowerSharingDAPS_Mode2_r16_vals[] = { - { 0, "supported" }, +static const value_string nr_rrc_T_crossCarrierSchedulingDefaultQCL_r16_vals[] = { + { 0, "diff-only" }, + { 1, "both" }, { 0, NULL } }; static int -dissect_nr_rrc_T_semiStaticPowerSharingDAPS_Mode2_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { +dissect_nr_rrc_T_crossCarrierSchedulingDefaultQCL_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, - 1, NULL, FALSE, 0, NULL); + 2, NULL, FALSE, 0, NULL); return offset; } -static const value_string nr_rrc_T_dynamicPowersharingDAPS_r16_vals[] = { - { 0, "short" }, - { 1, "long" }, +static const value_string nr_rrc_T_crossCarrierSchedulingUL_DiffSCS_r16_vals[] = { + { 0, "low-to-high" }, + { 1, "high-to-low" }, + { 2, "both" }, { 0, NULL } }; static int -dissect_nr_rrc_T_dynamicPowersharingDAPS_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { +dissect_nr_rrc_T_crossCarrierSchedulingUL_DiffSCS_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, - 2, NULL, FALSE, 0, NULL); + 3, NULL, FALSE, 0, NULL); return offset; } -static const value_string nr_rrc_T_ul_TransCancellationDAPS_r16_vals[] = { - { 0, "supported" }, +static const value_string nr_rrc_T_simul_SRS_MIMO_Trans_BC_r16_vals[] = { + { 0, "n2" }, { 0, NULL } }; static int -dissect_nr_rrc_T_ul_TransCancellationDAPS_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { +dissect_nr_rrc_T_simul_SRS_MIMO_Trans_BC_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, 1, NULL, FALSE, 0, NULL); @@ -64904,119 +65615,297 @@ dissect_nr_rrc_T_ul_TransCancellationDAPS_r16(tvbuff_t *tvb _U_, int offset _U_, } -static const per_sequence_t T_daps_Parameters_r16_sequence[] = { - { &hf_nr_rrc_asyncDAPS_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_asyncDAPS_r16 }, - { &hf_nr_rrc_interFreqDAPS_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_interFreqDAPS_r16 }, - { &hf_nr_rrc_interFreqDiffSCS_DAPS_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_interFreqDiffSCS_DAPS_r16 }, - { &hf_nr_rrc_multiUL_TransmissionDAPS_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_multiUL_TransmissionDAPS_r16 }, - { &hf_nr_rrc_semiStaticPowerSharingDAPS_Mode1_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_semiStaticPowerSharingDAPS_Mode1_r16 }, - { &hf_nr_rrc_semiStaticPowerSharingDAPS_Mode2_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_semiStaticPowerSharingDAPS_Mode2_r16 }, - { &hf_nr_rrc_dynamicPowersharingDAPS_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_dynamicPowersharingDAPS_r16 }, - { &hf_nr_rrc_ul_TransCancellationDAPS_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_ul_TransCancellationDAPS_r16 }, +static const per_sequence_t T_etype2R1_r16_01_sequence_of[1] = { + { &hf_nr_rrc_etype2R1_r16_item, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_INTEGER_0_maxNrofCSI_RS_ResourcesAlt_1_r16 }, +}; + +static int +dissect_nr_rrc_T_etype2R1_r16_01(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_constrained_sequence_of(tvb, offset, actx, tree, hf_index, + ett_nr_rrc_T_etype2R1_r16_01, T_etype2R1_r16_01_sequence_of, + 1, maxNrofCSI_RS_ResourcesExt_r16, FALSE); + + return offset; +} + + +static const per_sequence_t T_etype2R2_r16_01_sequence_of[1] = { + { &hf_nr_rrc_etype2R2_r16_item, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_INTEGER_0_maxNrofCSI_RS_ResourcesAlt_1_r16 }, +}; + +static int +dissect_nr_rrc_T_etype2R2_r16_01(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_constrained_sequence_of(tvb, offset, actx, tree, hf_index, + ett_nr_rrc_T_etype2R2_r16_01, T_etype2R2_r16_01_sequence_of, + 1, maxNrofCSI_RS_ResourcesExt_r16, FALSE); + + return offset; +} + + +static const per_sequence_t T_etype2R1_PortSelection_r16_01_sequence_of[1] = { + { &hf_nr_rrc_etype2R1_PortSelection_r16_item, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_INTEGER_0_maxNrofCSI_RS_ResourcesAlt_1_r16 }, +}; + +static int +dissect_nr_rrc_T_etype2R1_PortSelection_r16_01(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_constrained_sequence_of(tvb, offset, actx, tree, hf_index, + ett_nr_rrc_T_etype2R1_PortSelection_r16_01, T_etype2R1_PortSelection_r16_01_sequence_of, + 1, maxNrofCSI_RS_ResourcesExt_r16, FALSE); + + return offset; +} + + +static const per_sequence_t T_etype2R2_PortSelection_r16_01_sequence_of[1] = { + { &hf_nr_rrc_etype2R2_PortSelection_r16_item, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_INTEGER_0_maxNrofCSI_RS_ResourcesAlt_1_r16 }, +}; + +static int +dissect_nr_rrc_T_etype2R2_PortSelection_r16_01(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_constrained_sequence_of(tvb, offset, actx, tree, hf_index, + ett_nr_rrc_T_etype2R2_PortSelection_r16_01, T_etype2R2_PortSelection_r16_01_sequence_of, + 1, maxNrofCSI_RS_ResourcesExt_r16, FALSE); + + return offset; +} + + +static const per_sequence_t CodebookParametersAdditionPerBC_r16_sequence[] = { + { &hf_nr_rrc_etype2R1_r16_01, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_etype2R1_r16_01 }, + { &hf_nr_rrc_etype2R2_r16_01, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_etype2R2_r16_01 }, + { &hf_nr_rrc_etype2R1_PortSelection_r16_01, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_etype2R1_PortSelection_r16_01 }, + { &hf_nr_rrc_etype2R2_PortSelection_r16_01, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_etype2R2_PortSelection_r16_01 }, { NULL, 0, 0, NULL } }; static int -dissect_nr_rrc_T_daps_Parameters_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { +dissect_nr_rrc_CodebookParametersAdditionPerBC_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { offset = dissect_per_sequence(tvb, offset, actx, tree, hf_index, - ett_nr_rrc_T_daps_Parameters_r16, T_daps_Parameters_r16_sequence); + ett_nr_rrc_CodebookParametersAdditionPerBC_r16, CodebookParametersAdditionPerBC_r16_sequence); return offset; } +static const per_sequence_t T_type1SP_Type2_null_r16_01_sequence_of[1] = { + { &hf_nr_rrc_type1SP_Type2_null_r16_item, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_INTEGER_0_maxNrofCSI_RS_ResourcesAlt_1_r16 }, +}; static int -dissect_nr_rrc_INTEGER_0_maxNrofCSI_RS_ResourcesAlt_1_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { - offset = dissect_per_constrained_integer(tvb, offset, actx, tree, hf_index, - 0U, maxNrofCSI_RS_ResourcesAlt_1_r16, NULL, FALSE); +dissect_nr_rrc_T_type1SP_Type2_null_r16_01(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_constrained_sequence_of(tvb, offset, actx, tree, hf_index, + ett_nr_rrc_T_type1SP_Type2_null_r16_01, T_type1SP_Type2_null_r16_01_sequence_of, + 1, maxNrofCSI_RS_ResourcesExt_r16, FALSE); return offset; } -static const per_sequence_t T_type1_SinglePanel_r16_sequence_of[1] = { - { &hf_nr_rrc_type1_SinglePanel_r16_item, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_INTEGER_0_maxNrofCSI_RS_ResourcesAlt_1_r16 }, +static const per_sequence_t T_type1SP_Type2PS_null_r16_01_sequence_of[1] = { + { &hf_nr_rrc_type1SP_Type2PS_null_r16_item, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_INTEGER_0_maxNrofCSI_RS_ResourcesAlt_1_r16 }, }; static int -dissect_nr_rrc_T_type1_SinglePanel_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { +dissect_nr_rrc_T_type1SP_Type2PS_null_r16_01(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { offset = dissect_per_constrained_sequence_of(tvb, offset, actx, tree, hf_index, - ett_nr_rrc_T_type1_SinglePanel_r16, T_type1_SinglePanel_r16_sequence_of, - 1, maxNrofCSI_RS_Resources, FALSE); + ett_nr_rrc_T_type1SP_Type2PS_null_r16_01, T_type1SP_Type2PS_null_r16_01_sequence_of, + 1, maxNrofCSI_RS_ResourcesExt_r16, FALSE); return offset; } -static const per_sequence_t T_type1_MultiPanel_r16_sequence_of[1] = { - { &hf_nr_rrc_type1_MultiPanel_r16_item, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_INTEGER_0_maxNrofCSI_RS_ResourcesAlt_1_r16 }, +static const per_sequence_t T_type1SP_eType2R1_null_r16_01_sequence_of[1] = { + { &hf_nr_rrc_type1SP_eType2R1_null_r16_item, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_INTEGER_0_maxNrofCSI_RS_ResourcesAlt_1_r16 }, }; static int -dissect_nr_rrc_T_type1_MultiPanel_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { +dissect_nr_rrc_T_type1SP_eType2R1_null_r16_01(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { offset = dissect_per_constrained_sequence_of(tvb, offset, actx, tree, hf_index, - ett_nr_rrc_T_type1_MultiPanel_r16, T_type1_MultiPanel_r16_sequence_of, - 1, maxNrofCSI_RS_Resources, FALSE); + ett_nr_rrc_T_type1SP_eType2R1_null_r16_01, T_type1SP_eType2R1_null_r16_01_sequence_of, + 1, maxNrofCSI_RS_ResourcesExt_r16, FALSE); return offset; } -static const per_sequence_t T_type2_r16_sequence_of[1] = { - { &hf_nr_rrc_type2_r16_item, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_INTEGER_0_maxNrofCSI_RS_ResourcesAlt_1_r16 }, +static const per_sequence_t T_type1SP_eType2R2_null_r16_01_sequence_of[1] = { + { &hf_nr_rrc_type1SP_eType2R2_null_r16_item, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_INTEGER_0_maxNrofCSI_RS_ResourcesAlt_1_r16 }, }; static int -dissect_nr_rrc_T_type2_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { +dissect_nr_rrc_T_type1SP_eType2R2_null_r16_01(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { offset = dissect_per_constrained_sequence_of(tvb, offset, actx, tree, hf_index, - ett_nr_rrc_T_type2_r16, T_type2_r16_sequence_of, - 1, maxNrofCSI_RS_Resources, FALSE); + ett_nr_rrc_T_type1SP_eType2R2_null_r16_01, T_type1SP_eType2R2_null_r16_01_sequence_of, + 1, maxNrofCSI_RS_ResourcesExt_r16, FALSE); return offset; } -static const per_sequence_t T_type2_PortSelection_r16_sequence_of[1] = { - { &hf_nr_rrc_type2_PortSelection_r16_item, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_INTEGER_0_maxNrofCSI_RS_ResourcesAlt_1_r16 }, +static const per_sequence_t T_type1SP_eType2R1PS_null_r16_01_sequence_of[1] = { + { &hf_nr_rrc_type1SP_eType2R1PS_null_r16_item, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_INTEGER_0_maxNrofCSI_RS_ResourcesAlt_1_r16 }, }; static int -dissect_nr_rrc_T_type2_PortSelection_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { +dissect_nr_rrc_T_type1SP_eType2R1PS_null_r16_01(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { offset = dissect_per_constrained_sequence_of(tvb, offset, actx, tree, hf_index, - ett_nr_rrc_T_type2_PortSelection_r16, T_type2_PortSelection_r16_sequence_of, - 1, maxNrofCSI_RS_Resources, FALSE); + ett_nr_rrc_T_type1SP_eType2R1PS_null_r16_01, T_type1SP_eType2R1PS_null_r16_01_sequence_of, + 1, maxNrofCSI_RS_ResourcesExt_r16, FALSE); return offset; } -static const per_sequence_t T_supportedCSI_RS_ResourceListAlt_r16_sequence[] = { - { &hf_nr_rrc_type1_SinglePanel_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_type1_SinglePanel_r16 }, - { &hf_nr_rrc_type1_MultiPanel_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_type1_MultiPanel_r16 }, - { &hf_nr_rrc_type2_r16 , ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_type2_r16 }, - { &hf_nr_rrc_type2_PortSelection_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_type2_PortSelection_r16 }, - { NULL, 0, 0, NULL } +static const per_sequence_t T_type1SP_eType2R2PS_null_r16_01_sequence_of[1] = { + { &hf_nr_rrc_type1SP_eType2R2PS_null_r16_item, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_INTEGER_0_maxNrofCSI_RS_ResourcesAlt_1_r16 }, }; static int -dissect_nr_rrc_T_supportedCSI_RS_ResourceListAlt_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { - offset = dissect_per_sequence(tvb, offset, actx, tree, hf_index, - ett_nr_rrc_T_supportedCSI_RS_ResourceListAlt_r16, T_supportedCSI_RS_ResourceListAlt_r16_sequence); +dissect_nr_rrc_T_type1SP_eType2R2PS_null_r16_01(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_constrained_sequence_of(tvb, offset, actx, tree, hf_index, + ett_nr_rrc_T_type1SP_eType2R2PS_null_r16_01, T_type1SP_eType2R2PS_null_r16_01_sequence_of, + 1, maxNrofCSI_RS_ResourcesExt_r16, FALSE); return offset; } -static const per_sequence_t CodebookParameters_v1610_sequence[] = { - { &hf_nr_rrc_supportedCSI_RS_ResourceListAlt_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_supportedCSI_RS_ResourceListAlt_r16 }, +static const per_sequence_t T_type1SP_Type2_Type2PS_r16_01_sequence_of[1] = { + { &hf_nr_rrc_type1SP_Type2_Type2PS_r16_item, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_INTEGER_0_maxNrofCSI_RS_ResourcesAlt_1_r16 }, +}; + +static int +dissect_nr_rrc_T_type1SP_Type2_Type2PS_r16_01(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_constrained_sequence_of(tvb, offset, actx, tree, hf_index, + ett_nr_rrc_T_type1SP_Type2_Type2PS_r16_01, T_type1SP_Type2_Type2PS_r16_01_sequence_of, + 1, maxNrofCSI_RS_ResourcesExt_r16, FALSE); + + return offset; +} + + +static const per_sequence_t T_type1MP_Type2_null_r16_01_sequence_of[1] = { + { &hf_nr_rrc_type1MP_Type2_null_r16_item, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_INTEGER_0_maxNrofCSI_RS_ResourcesAlt_1_r16 }, +}; + +static int +dissect_nr_rrc_T_type1MP_Type2_null_r16_01(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_constrained_sequence_of(tvb, offset, actx, tree, hf_index, + ett_nr_rrc_T_type1MP_Type2_null_r16_01, T_type1MP_Type2_null_r16_01_sequence_of, + 1, maxNrofCSI_RS_ResourcesExt_r16, FALSE); + + return offset; +} + + +static const per_sequence_t T_type1MP_Type2PS_null_r16_01_sequence_of[1] = { + { &hf_nr_rrc_type1MP_Type2PS_null_r16_item, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_INTEGER_0_maxNrofCSI_RS_ResourcesAlt_1_r16 }, +}; + +static int +dissect_nr_rrc_T_type1MP_Type2PS_null_r16_01(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_constrained_sequence_of(tvb, offset, actx, tree, hf_index, + ett_nr_rrc_T_type1MP_Type2PS_null_r16_01, T_type1MP_Type2PS_null_r16_01_sequence_of, + 1, maxNrofCSI_RS_ResourcesExt_r16, FALSE); + + return offset; +} + + +static const per_sequence_t T_type1MP_eType2R1_null_r16_01_sequence_of[1] = { + { &hf_nr_rrc_type1MP_eType2R1_null_r16_item, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_INTEGER_0_maxNrofCSI_RS_ResourcesAlt_1_r16 }, +}; + +static int +dissect_nr_rrc_T_type1MP_eType2R1_null_r16_01(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_constrained_sequence_of(tvb, offset, actx, tree, hf_index, + ett_nr_rrc_T_type1MP_eType2R1_null_r16_01, T_type1MP_eType2R1_null_r16_01_sequence_of, + 1, maxNrofCSI_RS_ResourcesExt_r16, FALSE); + + return offset; +} + + +static const per_sequence_t T_type1MP_eType2R2_null_r16_01_sequence_of[1] = { + { &hf_nr_rrc_type1MP_eType2R2_null_r16_item, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_INTEGER_0_maxNrofCSI_RS_ResourcesAlt_1_r16 }, +}; + +static int +dissect_nr_rrc_T_type1MP_eType2R2_null_r16_01(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_constrained_sequence_of(tvb, offset, actx, tree, hf_index, + ett_nr_rrc_T_type1MP_eType2R2_null_r16_01, T_type1MP_eType2R2_null_r16_01_sequence_of, + 1, maxNrofCSI_RS_ResourcesExt_r16, FALSE); + + return offset; +} + + +static const per_sequence_t T_type1MP_eType2R1PS_null_r16_01_sequence_of[1] = { + { &hf_nr_rrc_type1MP_eType2R1PS_null_r16_item, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_INTEGER_0_maxNrofCSI_RS_ResourcesAlt_1_r16 }, +}; + +static int +dissect_nr_rrc_T_type1MP_eType2R1PS_null_r16_01(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_constrained_sequence_of(tvb, offset, actx, tree, hf_index, + ett_nr_rrc_T_type1MP_eType2R1PS_null_r16_01, T_type1MP_eType2R1PS_null_r16_01_sequence_of, + 1, maxNrofCSI_RS_ResourcesExt_r16, FALSE); + + return offset; +} + + +static const per_sequence_t T_type1MP_eType2R2PS_null_r16_01_sequence_of[1] = { + { &hf_nr_rrc_type1MP_eType2R2PS_null_r16_item, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_INTEGER_0_maxNrofCSI_RS_ResourcesAlt_1_r16 }, +}; + +static int +dissect_nr_rrc_T_type1MP_eType2R2PS_null_r16_01(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_constrained_sequence_of(tvb, offset, actx, tree, hf_index, + ett_nr_rrc_T_type1MP_eType2R2PS_null_r16_01, T_type1MP_eType2R2PS_null_r16_01_sequence_of, + 1, maxNrofCSI_RS_ResourcesExt_r16, FALSE); + + return offset; +} + + +static const per_sequence_t T_type1MP_Type2_Type2PS_r16_01_sequence_of[1] = { + { &hf_nr_rrc_type1MP_Type2_Type2PS_r16_item, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_INTEGER_0_maxNrofCSI_RS_ResourcesAlt_1_r16 }, +}; + +static int +dissect_nr_rrc_T_type1MP_Type2_Type2PS_r16_01(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_constrained_sequence_of(tvb, offset, actx, tree, hf_index, + ett_nr_rrc_T_type1MP_Type2_Type2PS_r16_01, T_type1MP_Type2_Type2PS_r16_01_sequence_of, + 1, maxNrofCSI_RS_ResourcesExt_r16, FALSE); + + return offset; +} + + +static const per_sequence_t CodebookComboParametersAdditionPerBC_r16_sequence[] = { + { &hf_nr_rrc_type1SP_Type2_null_r16_01, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_type1SP_Type2_null_r16_01 }, + { &hf_nr_rrc_type1SP_Type2PS_null_r16_01, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_type1SP_Type2PS_null_r16_01 }, + { &hf_nr_rrc_type1SP_eType2R1_null_r16_01, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_type1SP_eType2R1_null_r16_01 }, + { &hf_nr_rrc_type1SP_eType2R2_null_r16_01, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_type1SP_eType2R2_null_r16_01 }, + { &hf_nr_rrc_type1SP_eType2R1PS_null_r16_01, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_type1SP_eType2R1PS_null_r16_01 }, + { &hf_nr_rrc_type1SP_eType2R2PS_null_r16_01, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_type1SP_eType2R2PS_null_r16_01 }, + { &hf_nr_rrc_type1SP_Type2_Type2PS_r16_01, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_type1SP_Type2_Type2PS_r16_01 }, + { &hf_nr_rrc_type1MP_Type2_null_r16_01, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_type1MP_Type2_null_r16_01 }, + { &hf_nr_rrc_type1MP_Type2PS_null_r16_01, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_type1MP_Type2PS_null_r16_01 }, + { &hf_nr_rrc_type1MP_eType2R1_null_r16_01, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_type1MP_eType2R1_null_r16_01 }, + { &hf_nr_rrc_type1MP_eType2R2_null_r16_01, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_type1MP_eType2R2_null_r16_01 }, + { &hf_nr_rrc_type1MP_eType2R1PS_null_r16_01, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_type1MP_eType2R1PS_null_r16_01 }, + { &hf_nr_rrc_type1MP_eType2R2PS_null_r16_01, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_type1MP_eType2R2PS_null_r16_01 }, + { &hf_nr_rrc_type1MP_Type2_Type2PS_r16_01, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_type1MP_Type2_Type2PS_r16_01 }, { NULL, 0, 0, NULL } }; static int -dissect_nr_rrc_CodebookParameters_v1610(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { +dissect_nr_rrc_CodebookComboParametersAdditionPerBC_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { offset = dissect_per_sequence(tvb, offset, actx, tree, hf_index, - ett_nr_rrc_CodebookParameters_v1610, CodebookParameters_v1610_sequence); + ett_nr_rrc_CodebookComboParametersAdditionPerBC_r16, CodebookComboParametersAdditionPerBC_r16_sequence); return offset; } @@ -65032,9 +65921,22 @@ static const per_sequence_t CA_ParametersNR_v1610_sequence[] = { { &hf_nr_rrc_crossCarrierA_CSI_trigDiffSCS_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_crossCarrierA_CSI_trigDiffSCS_r16 }, { &hf_nr_rrc_defaultQCL_CrossCarrierA_CSI_Trig_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_defaultQCL_CrossCarrierA_CSI_Trig_r16 }, { &hf_nr_rrc_interCA_NonAlignedFrame_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_interCA_NonAlignedFrame_r16 }, - { &hf_nr_rrc_simul_SRS_Trans_InterBandCA_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_INTEGER_1_2 }, - { &hf_nr_rrc_daps_Parameters_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_daps_Parameters_r16 }, + { &hf_nr_rrc_simul_SRS_Trans_BC_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_simul_SRS_Trans_BC_r16 }, + { &hf_nr_rrc_interFreqDAPS_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_interFreqDAPS_r16 }, { &hf_nr_rrc_codebookParametersPerBC_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_CodebookParameters_v1610 }, + { &hf_nr_rrc_blindDetectFactor_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_INTEGER_1_2 }, + { &hf_nr_rrc_pdcch_MonitoringCA_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_pdcch_MonitoringCA_r16 }, + { &hf_nr_rrc_pdcch_BlindDetectionCA_Mixed_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_pdcch_BlindDetectionCA_Mixed_r16 }, + { &hf_nr_rrc_pdcch_BlindDetectionMCG_UE_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_INTEGER_1_14 }, + { &hf_nr_rrc_pdcch_BlindDetectionSCG_UE_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_INTEGER_1_14 }, + { &hf_nr_rrc_pdcch_BlindDetectionMCG_UE_Mixed_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_pdcch_BlindDetectionMCG_UE_Mixed_r16 }, + { &hf_nr_rrc_pdcch_BlindDetectionSCG_UE_Mixed_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_pdcch_BlindDetectionSCG_UE_Mixed_r16 }, + { &hf_nr_rrc_crossCarrierSchedulingDL_DiffSCS_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_crossCarrierSchedulingDL_DiffSCS_r16 }, + { &hf_nr_rrc_crossCarrierSchedulingDefaultQCL_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_crossCarrierSchedulingDefaultQCL_r16 }, + { &hf_nr_rrc_crossCarrierSchedulingUL_DiffSCS_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_crossCarrierSchedulingUL_DiffSCS_r16 }, + { &hf_nr_rrc_simul_SRS_MIMO_Trans_BC_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_simul_SRS_MIMO_Trans_BC_r16 }, + { &hf_nr_rrc_codebookParametersAdditionPerBC_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_CodebookParametersAdditionPerBC_r16 }, + { &hf_nr_rrc_codebookComboParametersAdditionPerBC_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_CodebookComboParametersAdditionPerBC_r16 }, { NULL, 0, 0, NULL } }; @@ -65093,10 +65995,26 @@ dissect_nr_rrc_T_intraFR_NR_DC_DynamicPwrSharing_r16(tvbuff_t *tvb _U_, int offs } +static const value_string nr_rrc_T_asyncNRDC_r16_vals[] = { + { 0, "supported" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_asyncNRDC_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 1, NULL, FALSE, 0, NULL); + + return offset; +} + + static const per_sequence_t CA_ParametersNRDC_v1610_sequence[] = { { &hf_nr_rrc_intraFR_NR_DC_PwrSharingMode1_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_intraFR_NR_DC_PwrSharingMode1_r16 }, { &hf_nr_rrc_intraFR_NR_DC_PwrSharingMode2_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_intraFR_NR_DC_PwrSharingMode2_r16 }, { &hf_nr_rrc_intraFR_NR_DC_DynamicPwrSharing_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_intraFR_NR_DC_DynamicPwrSharing_r16 }, + { &hf_nr_rrc_asyncNRDC_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_asyncNRDC_r16 }, { NULL, 0, 0, NULL } }; @@ -65124,11 +66042,284 @@ dissect_nr_rrc_T_powerClass_v1610(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t } +static const value_string nr_rrc_T_powerClassNRPart_r16_vals[] = { + { 0, "pc1" }, + { 1, "pc2" }, + { 2, "pc3" }, + { 3, "pc5" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_powerClassNRPart_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 4, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const value_string nr_rrc_T_eutra_TDD_Config0_r16_vals[] = { + { 0, "n20" }, + { 1, "n40" }, + { 2, "n50" }, + { 3, "n60" }, + { 4, "n70" }, + { 5, "n80" }, + { 6, "n90" }, + { 7, "n100" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_eutra_TDD_Config0_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 8, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const value_string nr_rrc_T_eutra_TDD_Config1_r16_vals[] = { + { 0, "n20" }, + { 1, "n40" }, + { 2, "n50" }, + { 3, "n60" }, + { 4, "n70" }, + { 5, "n80" }, + { 6, "n90" }, + { 7, "n100" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_eutra_TDD_Config1_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 8, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const value_string nr_rrc_T_eutra_TDD_Config2_r16_vals[] = { + { 0, "n20" }, + { 1, "n40" }, + { 2, "n50" }, + { 3, "n60" }, + { 4, "n70" }, + { 5, "n80" }, + { 6, "n90" }, + { 7, "n100" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_eutra_TDD_Config2_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 8, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const value_string nr_rrc_T_eutra_TDD_Config3_r16_vals[] = { + { 0, "n20" }, + { 1, "n40" }, + { 2, "n50" }, + { 3, "n60" }, + { 4, "n70" }, + { 5, "n80" }, + { 6, "n90" }, + { 7, "n100" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_eutra_TDD_Config3_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 8, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const value_string nr_rrc_T_eutra_TDD_Config4_r16_vals[] = { + { 0, "n20" }, + { 1, "n40" }, + { 2, "n50" }, + { 3, "n60" }, + { 4, "n70" }, + { 5, "n80" }, + { 6, "n90" }, + { 7, "n100" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_eutra_TDD_Config4_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 8, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const value_string nr_rrc_T_eutra_TDD_Config5_r16_vals[] = { + { 0, "n20" }, + { 1, "n40" }, + { 2, "n50" }, + { 3, "n60" }, + { 4, "n70" }, + { 5, "n80" }, + { 6, "n90" }, + { 7, "n100" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_eutra_TDD_Config5_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 8, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const value_string nr_rrc_T_eutra_TDD_Config6_r16_vals[] = { + { 0, "n20" }, + { 1, "n40" }, + { 2, "n50" }, + { 3, "n60" }, + { 4, "n70" }, + { 5, "n80" }, + { 6, "n90" }, + { 7, "n100" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_eutra_TDD_Config6_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 8, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const per_sequence_t T_maxUplinkDutyCycle_interBandENDC_TDD_PC2_r16_sequence[] = { + { &hf_nr_rrc_eutra_TDD_Config0_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_eutra_TDD_Config0_r16 }, + { &hf_nr_rrc_eutra_TDD_Config1_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_eutra_TDD_Config1_r16 }, + { &hf_nr_rrc_eutra_TDD_Config2_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_eutra_TDD_Config2_r16 }, + { &hf_nr_rrc_eutra_TDD_Config3_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_eutra_TDD_Config3_r16 }, + { &hf_nr_rrc_eutra_TDD_Config4_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_eutra_TDD_Config4_r16 }, + { &hf_nr_rrc_eutra_TDD_Config5_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_eutra_TDD_Config5_r16 }, + { &hf_nr_rrc_eutra_TDD_Config6_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_eutra_TDD_Config6_r16 }, + { NULL, 0, 0, NULL } +}; + +static int +dissect_nr_rrc_T_maxUplinkDutyCycle_interBandENDC_TDD_PC2_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_sequence(tvb, offset, actx, tree, hf_index, + ett_nr_rrc_T_maxUplinkDutyCycle_interBandENDC_TDD_PC2_r16, T_maxUplinkDutyCycle_interBandENDC_TDD_PC2_r16_sequence); + + return offset; +} + + +static const value_string nr_rrc_T_tdm_restrictionTDD_endc_r16_vals[] = { + { 0, "supported" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_tdm_restrictionTDD_endc_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 1, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const value_string nr_rrc_T_tdm_restrictionFDD_endc_r16_vals[] = { + { 0, "supported" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_tdm_restrictionFDD_endc_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 1, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const value_string nr_rrc_T_singleUL_HARQ_offsetTDD_PCell_r16_vals[] = { + { 0, "supported" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_singleUL_HARQ_offsetTDD_PCell_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 1, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const value_string nr_rrc_T_tdm_restrictionDualTX_FDD_endc_r16_vals[] = { + { 0, "supported" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_tdm_restrictionDualTX_FDD_endc_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 1, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const per_sequence_t MRDC_Parameters_v1620_sequence[] = { + { &hf_nr_rrc_maxUplinkDutyCycle_interBandENDC_TDD_PC2_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_maxUplinkDutyCycle_interBandENDC_TDD_PC2_r16 }, + { &hf_nr_rrc_tdm_restrictionTDD_endc_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_tdm_restrictionTDD_endc_r16 }, + { &hf_nr_rrc_tdm_restrictionFDD_endc_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_tdm_restrictionFDD_endc_r16 }, + { &hf_nr_rrc_singleUL_HARQ_offsetTDD_PCell_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_singleUL_HARQ_offsetTDD_PCell_r16 }, + { &hf_nr_rrc_tdm_restrictionDualTX_FDD_endc_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_tdm_restrictionDualTX_FDD_endc_r16 }, + { NULL, 0, 0, NULL } +}; + +static int +dissect_nr_rrc_MRDC_Parameters_v1620(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_sequence(tvb, offset, actx, tree, hf_index, + ett_nr_rrc_MRDC_Parameters_v1620, MRDC_Parameters_v1620_sequence); + + return offset; +} + + static const per_sequence_t BandCombination_v1610_sequence[] = { { &hf_nr_rrc_bandList_v1610, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_SEQUENCE_SIZE_1_maxSimultaneousBands_OF_BandParameters_v1610 }, { &hf_nr_rrc_ca_ParametersNR_v1610, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_CA_ParametersNR_v1610 }, { &hf_nr_rrc_ca_ParametersNRDC_v1610, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_CA_ParametersNRDC_v1610 }, { &hf_nr_rrc_powerClass_v1610, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_powerClass_v1610 }, + { &hf_nr_rrc_powerClassNRPart_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_powerClassNRPart_r16 }, + { &hf_nr_rrc_featureSetCombinationDAPS_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_FeatureSetCombinationId }, + { &hf_nr_rrc_mrdc_Parameters_v1620, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_MRDC_Parameters_v1620 }, { NULL, 0, 0, NULL } }; @@ -65240,6 +66431,21 @@ dissect_nr_rrc_T_uplinkTxSwitching_OptionSupport_r16(tvbuff_t *tvb _U_, int offs } +static const value_string nr_rrc_T_uplinkTxSwitching_PowerBoosting_r16_vals[] = { + { 0, "supported" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_uplinkTxSwitching_PowerBoosting_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 1, NULL, FALSE, 0, NULL); + + return offset; +} + + static const per_sequence_t BandCombination_UplinkTxSwitch_r16_sequence[] = { { &hf_nr_rrc_bandCombination_r16, ASN1_EXTENSION_ROOT , ASN1_NOT_OPTIONAL, dissect_nr_rrc_BandCombination }, { &hf_nr_rrc_bandCombination_v1540, ASN1_EXTENSION_ROOT , ASN1_OPTIONAL , dissect_nr_rrc_BandCombination_v1540 }, @@ -65250,6 +66456,7 @@ static const per_sequence_t BandCombination_UplinkTxSwitch_r16_sequence[] = { { &hf_nr_rrc_bandCombination_v1610, ASN1_EXTENSION_ROOT , ASN1_OPTIONAL , dissect_nr_rrc_BandCombination_v1610 }, { &hf_nr_rrc_supportedBandPairListNR_r16, ASN1_EXTENSION_ROOT , ASN1_NOT_OPTIONAL, dissect_nr_rrc_SEQUENCE_SIZE_1_maxULTxSwitchingBandPairs_OF_ULTxSwitchingBandPair_r16 }, { &hf_nr_rrc_uplinkTxSwitching_OptionSupport_r16, ASN1_EXTENSION_ROOT , ASN1_OPTIONAL , dissect_nr_rrc_T_uplinkTxSwitching_OptionSupport_r16 }, + { &hf_nr_rrc_uplinkTxSwitching_PowerBoosting_r16, ASN1_EXTENSION_ROOT , ASN1_OPTIONAL , dissect_nr_rrc_T_uplinkTxSwitching_PowerBoosting_r16 }, { NULL, 0, 0, NULL } }; @@ -65290,85 +66497,6 @@ dissect_nr_rrc_BandParametersSidelink_r16(tvbuff_t *tvb _U_, int offset _U_, asn } -static const per_sequence_t BandCombinationParametersSidelink_r16_sequence_of[1] = { - { &hf_nr_rrc_BandCombinationParametersSidelink_r16_item, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_BandParametersSidelink_r16 }, -}; - -static int -dissect_nr_rrc_BandCombinationParametersSidelink_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { - offset = dissect_per_constrained_sequence_of(tvb, offset, actx, tree, hf_index, - ett_nr_rrc_BandCombinationParametersSidelink_r16, BandCombinationParametersSidelink_r16_sequence_of, - 1, maxSimultaneousBands, FALSE); - - return offset; -} - - -static const per_sequence_t SupportedBandCombinationListSidelink_r16_sequence_of[1] = { - { &hf_nr_rrc_SupportedBandCombinationListSidelink_r16_item, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_BandCombinationParametersSidelink_r16 }, -}; - -static int -dissect_nr_rrc_SupportedBandCombinationListSidelink_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { - offset = dissect_per_constrained_sequence_of(tvb, offset, actx, tree, hf_index, - ett_nr_rrc_SupportedBandCombinationListSidelink_r16, SupportedBandCombinationListSidelink_r16_sequence_of, - 1, maxBandComb, FALSE); - - return offset; -} - - - -static int -dissect_nr_rrc_T_bandCombinationListEUTRA1_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { - tvbuff_t *band_comb_list_tvb = NULL; - offset = dissect_per_octet_string(tvb, offset, actx, tree, hf_index, - NO_BOUND, NO_BOUND, FALSE, &band_comb_list_tvb); - - if (band_comb_list_tvb) { - proto_tree *subtree; - subtree = proto_item_add_subtree(actx->created_item, ett_nr_rrc_bandCombinationListEUTRA1_r16); - dissect_lte_rrc_V2X_SupportedBandCombination_r14_PDU(band_comb_list_tvb, actx->pinfo, subtree, NULL); - } - - - return offset; -} - - - -static int -dissect_nr_rrc_T_bandCombinationListEUTRA2_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { - tvbuff_t *band_comb_list_tvb = NULL; - offset = dissect_per_octet_string(tvb, offset, actx, tree, hf_index, - NO_BOUND, NO_BOUND, FALSE, &band_comb_list_tvb); - - if (band_comb_list_tvb) { - proto_tree *subtree; - subtree = proto_item_add_subtree(actx->created_item, ett_nr_rrc_bandCombinationListEUTRA2_r16); - dissect_lte_rrc_V2X_SupportedBandCombination_v1530_PDU(band_comb_list_tvb, actx->pinfo, subtree, NULL); - } - - - return offset; -} - - -static const per_sequence_t SupportedBandCombinationListSidelinkEUTRA_r16_sequence[] = { - { &hf_nr_rrc_bandCombinationListEUTRA1_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_bandCombinationListEUTRA1_r16 }, - { &hf_nr_rrc_bandCombinationListEUTRA2_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_bandCombinationListEUTRA2_r16 }, - { NULL, 0, 0, NULL } -}; - -static int -dissect_nr_rrc_SupportedBandCombinationListSidelinkEUTRA_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { - offset = dissect_per_sequence(tvb, offset, actx, tree, hf_index, - ett_nr_rrc_SupportedBandCombinationListSidelinkEUTRA_r16, SupportedBandCombinationListSidelinkEUTRA_r16_sequence); - - return offset; -} - - static int dissect_nr_rrc_T_bandParametersSidelinkEUTRA1_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { @@ -65470,36 +66598,20 @@ dissect_nr_rrc_BandCombinationParametersSidelinkEUTRA_NR_r16(tvbuff_t *tvb _U_, } -static const per_sequence_t SupportedBandCombinationListSidelinkEUTRA_NR_r16_sequence_of[1] = { - { &hf_nr_rrc_SupportedBandCombinationListSidelinkEUTRA_NR_r16_item, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_BandCombinationParametersSidelinkEUTRA_NR_r16 }, +static const per_sequence_t BandCombinationListSidelinkEUTRA_NR_r16_sequence_of[1] = { + { &hf_nr_rrc_BandCombinationListSidelinkEUTRA_NR_r16_item, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_BandCombinationParametersSidelinkEUTRA_NR_r16 }, }; static int -dissect_nr_rrc_SupportedBandCombinationListSidelinkEUTRA_NR_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { +dissect_nr_rrc_BandCombinationListSidelinkEUTRA_NR_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { offset = dissect_per_constrained_sequence_of(tvb, offset, actx, tree, hf_index, - ett_nr_rrc_SupportedBandCombinationListSidelinkEUTRA_NR_r16, SupportedBandCombinationListSidelinkEUTRA_NR_r16_sequence_of, + ett_nr_rrc_BandCombinationListSidelinkEUTRA_NR_r16, BandCombinationListSidelinkEUTRA_NR_r16_sequence_of, 1, maxBandComb, FALSE); return offset; } -static const per_sequence_t BandCombinationListSidelink_r16_sequence[] = { - { &hf_nr_rrc_supportedBandCombinationListSidelink_r16, ASN1_EXTENSION_ROOT , ASN1_OPTIONAL , dissect_nr_rrc_SupportedBandCombinationListSidelink_r16 }, - { &hf_nr_rrc_supportedBandCombinationListSidelinkEUTRA_r16, ASN1_EXTENSION_ROOT , ASN1_OPTIONAL , dissect_nr_rrc_SupportedBandCombinationListSidelinkEUTRA_r16 }, - { &hf_nr_rrc_supportedBandCombinationListSidelinkEUTRA_NR_r16, ASN1_EXTENSION_ROOT , ASN1_OPTIONAL , dissect_nr_rrc_SupportedBandCombinationListSidelinkEUTRA_NR_r16 }, - { NULL, 0, 0, NULL } -}; - -static int -dissect_nr_rrc_BandCombinationListSidelink_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { - offset = dissect_per_sequence(tvb, offset, actx, tree, hf_index, - ett_nr_rrc_BandCombinationListSidelink_r16, BandCombinationListSidelink_r16_sequence); - - return offset; -} - - static const value_string nr_rrc_T_fr1fdd_FR1TDD_CA_SpCellOnFR1FDD_vals[] = { { 0, "supported" }, { 0, NULL } @@ -65901,6 +67013,646 @@ dissect_nr_rrc_CodebookParameters(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t } +static const per_sequence_t T_supportedCSI_RS_ResourceListAdd_r16_sequence_of[1] = { + { &hf_nr_rrc_supportedCSI_RS_ResourceListAdd_r16_item, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_INTEGER_0_maxNrofCSI_RS_ResourcesAlt_1_r16 }, +}; + +static int +dissect_nr_rrc_T_supportedCSI_RS_ResourceListAdd_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_constrained_sequence_of(tvb, offset, actx, tree, hf_index, + ett_nr_rrc_T_supportedCSI_RS_ResourceListAdd_r16, T_supportedCSI_RS_ResourceListAdd_r16_sequence_of, + 1, maxNrofCSI_RS_ResourcesExt_r16, FALSE); + + return offset; +} + + +static const per_sequence_t T_etype2R1_r16_sequence[] = { + { &hf_nr_rrc_supportedCSI_RS_ResourceListAdd_r16, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_T_supportedCSI_RS_ResourceListAdd_r16 }, + { NULL, 0, 0, NULL } +}; + +static int +dissect_nr_rrc_T_etype2R1_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_sequence(tvb, offset, actx, tree, hf_index, + ett_nr_rrc_T_etype2R1_r16, T_etype2R1_r16_sequence); + + return offset; +} + + +static const per_sequence_t T_supportedCSI_RS_ResourceListAdd_r16_01_sequence_of[1] = { + { &hf_nr_rrc_supportedCSI_RS_ResourceListAdd_r16_item, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_INTEGER_0_maxNrofCSI_RS_ResourcesAlt_1_r16 }, +}; + +static int +dissect_nr_rrc_T_supportedCSI_RS_ResourceListAdd_r16_01(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_constrained_sequence_of(tvb, offset, actx, tree, hf_index, + ett_nr_rrc_T_supportedCSI_RS_ResourceListAdd_r16_01, T_supportedCSI_RS_ResourceListAdd_r16_01_sequence_of, + 1, maxNrofCSI_RS_ResourcesExt_r16, FALSE); + + return offset; +} + + +static const per_sequence_t T_etype2R2_r16_sequence[] = { + { &hf_nr_rrc_supportedCSI_RS_ResourceListAdd_r16_01, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_T_supportedCSI_RS_ResourceListAdd_r16_01 }, + { NULL, 0, 0, NULL } +}; + +static int +dissect_nr_rrc_T_etype2R2_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_sequence(tvb, offset, actx, tree, hf_index, + ett_nr_rrc_T_etype2R2_r16, T_etype2R2_r16_sequence); + + return offset; +} + + +static const value_string nr_rrc_T_paramComb7_8_r16_vals[] = { + { 0, "supported" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_paramComb7_8_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 1, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const value_string nr_rrc_T_rank3_4_r16_vals[] = { + { 0, "supported" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_rank3_4_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 1, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const value_string nr_rrc_T_softAmpRestriction_r16_vals[] = { + { 0, "supported" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_softAmpRestriction_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 1, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const per_sequence_t T_etype2_r16_sequence[] = { + { &hf_nr_rrc_etype2R1_r16 , ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_T_etype2R1_r16 }, + { &hf_nr_rrc_etype2R2_r16 , ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_etype2R2_r16 }, + { &hf_nr_rrc_paramComb7_8_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_paramComb7_8_r16 }, + { &hf_nr_rrc_rank3_4_r16 , ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_rank3_4_r16 }, + { &hf_nr_rrc_softAmpRestriction_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_softAmpRestriction_r16 }, + { NULL, 0, 0, NULL } +}; + +static int +dissect_nr_rrc_T_etype2_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_sequence(tvb, offset, actx, tree, hf_index, + ett_nr_rrc_T_etype2_r16, T_etype2_r16_sequence); + + return offset; +} + + +static const per_sequence_t T_supportedCSI_RS_ResourceListAdd_r16_02_sequence_of[1] = { + { &hf_nr_rrc_supportedCSI_RS_ResourceListAdd_r16_item, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_INTEGER_0_maxNrofCSI_RS_ResourcesAlt_1_r16 }, +}; + +static int +dissect_nr_rrc_T_supportedCSI_RS_ResourceListAdd_r16_02(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_constrained_sequence_of(tvb, offset, actx, tree, hf_index, + ett_nr_rrc_T_supportedCSI_RS_ResourceListAdd_r16_02, T_supportedCSI_RS_ResourceListAdd_r16_02_sequence_of, + 1, maxNrofCSI_RS_ResourcesExt_r16, FALSE); + + return offset; +} + + +static const per_sequence_t T_etype2R1_PortSelection_r16_sequence[] = { + { &hf_nr_rrc_supportedCSI_RS_ResourceListAdd_r16_02, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_T_supportedCSI_RS_ResourceListAdd_r16_02 }, + { NULL, 0, 0, NULL } +}; + +static int +dissect_nr_rrc_T_etype2R1_PortSelection_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_sequence(tvb, offset, actx, tree, hf_index, + ett_nr_rrc_T_etype2R1_PortSelection_r16, T_etype2R1_PortSelection_r16_sequence); + + return offset; +} + + +static const per_sequence_t T_supportedCSI_RS_ResourceListAdd_r16_03_sequence_of[1] = { + { &hf_nr_rrc_supportedCSI_RS_ResourceListAdd_r16_item, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_INTEGER_0_maxNrofCSI_RS_ResourcesAlt_1_r16 }, +}; + +static int +dissect_nr_rrc_T_supportedCSI_RS_ResourceListAdd_r16_03(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_constrained_sequence_of(tvb, offset, actx, tree, hf_index, + ett_nr_rrc_T_supportedCSI_RS_ResourceListAdd_r16_03, T_supportedCSI_RS_ResourceListAdd_r16_03_sequence_of, + 1, maxNrofCSI_RS_ResourcesExt_r16, FALSE); + + return offset; +} + + +static const per_sequence_t T_etype2R2_PortSelection_r16_sequence[] = { + { &hf_nr_rrc_supportedCSI_RS_ResourceListAdd_r16_03, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_T_supportedCSI_RS_ResourceListAdd_r16_03 }, + { NULL, 0, 0, NULL } +}; + +static int +dissect_nr_rrc_T_etype2R2_PortSelection_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_sequence(tvb, offset, actx, tree, hf_index, + ett_nr_rrc_T_etype2R2_PortSelection_r16, T_etype2R2_PortSelection_r16_sequence); + + return offset; +} + + +static const value_string nr_rrc_T_rank3_4_r16_01_vals[] = { + { 0, "supported" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_rank3_4_r16_01(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 1, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const per_sequence_t T_etype2_PS_r16_sequence[] = { + { &hf_nr_rrc_etype2R1_PortSelection_r16, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_T_etype2R1_PortSelection_r16 }, + { &hf_nr_rrc_etype2R2_PortSelection_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_etype2R2_PortSelection_r16 }, + { &hf_nr_rrc_rank3_4_r16_01, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_rank3_4_r16_01 }, + { NULL, 0, 0, NULL } +}; + +static int +dissect_nr_rrc_T_etype2_PS_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_sequence(tvb, offset, actx, tree, hf_index, + ett_nr_rrc_T_etype2_PS_r16, T_etype2_PS_r16_sequence); + + return offset; +} + + +static const per_sequence_t CodebookParametersAddition_r16_sequence[] = { + { &hf_nr_rrc_etype2_r16 , ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_etype2_r16 }, + { &hf_nr_rrc_etype2_PS_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_etype2_PS_r16 }, + { NULL, 0, 0, NULL } +}; + +static int +dissect_nr_rrc_CodebookParametersAddition_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_sequence(tvb, offset, actx, tree, hf_index, + ett_nr_rrc_CodebookParametersAddition_r16, CodebookParametersAddition_r16_sequence); + + return offset; +} + + +static const per_sequence_t T_supportedCSI_RS_ResourceListAdd_r16_04_sequence_of[1] = { + { &hf_nr_rrc_supportedCSI_RS_ResourceListAdd_r16_item, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_INTEGER_0_maxNrofCSI_RS_ResourcesAlt_1_r16 }, +}; + +static int +dissect_nr_rrc_T_supportedCSI_RS_ResourceListAdd_r16_04(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_constrained_sequence_of(tvb, offset, actx, tree, hf_index, + ett_nr_rrc_T_supportedCSI_RS_ResourceListAdd_r16_04, T_supportedCSI_RS_ResourceListAdd_r16_04_sequence_of, + 1, maxNrofCSI_RS_ResourcesExt_r16, FALSE); + + return offset; +} + + +static const per_sequence_t T_type1SP_Type2_null_r16_sequence[] = { + { &hf_nr_rrc_supportedCSI_RS_ResourceListAdd_r16_04, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_T_supportedCSI_RS_ResourceListAdd_r16_04 }, + { NULL, 0, 0, NULL } +}; + +static int +dissect_nr_rrc_T_type1SP_Type2_null_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_sequence(tvb, offset, actx, tree, hf_index, + ett_nr_rrc_T_type1SP_Type2_null_r16, T_type1SP_Type2_null_r16_sequence); + + return offset; +} + + +static const per_sequence_t T_supportedCSI_RS_ResourceListAdd_r16_05_sequence_of[1] = { + { &hf_nr_rrc_supportedCSI_RS_ResourceListAdd_r16_item, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_INTEGER_0_maxNrofCSI_RS_ResourcesAlt_1_r16 }, +}; + +static int +dissect_nr_rrc_T_supportedCSI_RS_ResourceListAdd_r16_05(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_constrained_sequence_of(tvb, offset, actx, tree, hf_index, + ett_nr_rrc_T_supportedCSI_RS_ResourceListAdd_r16_05, T_supportedCSI_RS_ResourceListAdd_r16_05_sequence_of, + 1, maxNrofCSI_RS_ResourcesExt_r16, FALSE); + + return offset; +} + + +static const per_sequence_t T_type1SP_Type2PS_null_r16_sequence[] = { + { &hf_nr_rrc_supportedCSI_RS_ResourceListAdd_r16_05, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_T_supportedCSI_RS_ResourceListAdd_r16_05 }, + { NULL, 0, 0, NULL } +}; + +static int +dissect_nr_rrc_T_type1SP_Type2PS_null_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_sequence(tvb, offset, actx, tree, hf_index, + ett_nr_rrc_T_type1SP_Type2PS_null_r16, T_type1SP_Type2PS_null_r16_sequence); + + return offset; +} + + +static const per_sequence_t T_supportedCSI_RS_ResourceListAdd_r16_06_sequence_of[1] = { + { &hf_nr_rrc_supportedCSI_RS_ResourceListAdd_r16_item, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_INTEGER_0_maxNrofCSI_RS_ResourcesAlt_1_r16 }, +}; + +static int +dissect_nr_rrc_T_supportedCSI_RS_ResourceListAdd_r16_06(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_constrained_sequence_of(tvb, offset, actx, tree, hf_index, + ett_nr_rrc_T_supportedCSI_RS_ResourceListAdd_r16_06, T_supportedCSI_RS_ResourceListAdd_r16_06_sequence_of, + 1, maxNrofCSI_RS_ResourcesExt_r16, FALSE); + + return offset; +} + + +static const per_sequence_t T_type1SP_eType2R1_null_r16_sequence[] = { + { &hf_nr_rrc_supportedCSI_RS_ResourceListAdd_r16_06, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_T_supportedCSI_RS_ResourceListAdd_r16_06 }, + { NULL, 0, 0, NULL } +}; + +static int +dissect_nr_rrc_T_type1SP_eType2R1_null_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_sequence(tvb, offset, actx, tree, hf_index, + ett_nr_rrc_T_type1SP_eType2R1_null_r16, T_type1SP_eType2R1_null_r16_sequence); + + return offset; +} + + +static const per_sequence_t T_supportedCSI_RS_ResourceListAdd_r16_07_sequence_of[1] = { + { &hf_nr_rrc_supportedCSI_RS_ResourceListAdd_r16_item, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_INTEGER_0_maxNrofCSI_RS_ResourcesAlt_1_r16 }, +}; + +static int +dissect_nr_rrc_T_supportedCSI_RS_ResourceListAdd_r16_07(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_constrained_sequence_of(tvb, offset, actx, tree, hf_index, + ett_nr_rrc_T_supportedCSI_RS_ResourceListAdd_r16_07, T_supportedCSI_RS_ResourceListAdd_r16_07_sequence_of, + 1, maxNrofCSI_RS_ResourcesExt_r16, FALSE); + + return offset; +} + + +static const per_sequence_t T_type1SP_eType2R2_null_r16_sequence[] = { + { &hf_nr_rrc_supportedCSI_RS_ResourceListAdd_r16_07, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_T_supportedCSI_RS_ResourceListAdd_r16_07 }, + { NULL, 0, 0, NULL } +}; + +static int +dissect_nr_rrc_T_type1SP_eType2R2_null_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_sequence(tvb, offset, actx, tree, hf_index, + ett_nr_rrc_T_type1SP_eType2R2_null_r16, T_type1SP_eType2R2_null_r16_sequence); + + return offset; +} + + +static const per_sequence_t T_supportedCSI_RS_ResourceListAdd_r16_08_sequence_of[1] = { + { &hf_nr_rrc_supportedCSI_RS_ResourceListAdd_r16_item, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_INTEGER_0_maxNrofCSI_RS_ResourcesAlt_1_r16 }, +}; + +static int +dissect_nr_rrc_T_supportedCSI_RS_ResourceListAdd_r16_08(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_constrained_sequence_of(tvb, offset, actx, tree, hf_index, + ett_nr_rrc_T_supportedCSI_RS_ResourceListAdd_r16_08, T_supportedCSI_RS_ResourceListAdd_r16_08_sequence_of, + 1, maxNrofCSI_RS_ResourcesExt_r16, FALSE); + + return offset; +} + + +static const per_sequence_t T_type1SP_eType2R1PS_null_r16_sequence[] = { + { &hf_nr_rrc_supportedCSI_RS_ResourceListAdd_r16_08, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_T_supportedCSI_RS_ResourceListAdd_r16_08 }, + { NULL, 0, 0, NULL } +}; + +static int +dissect_nr_rrc_T_type1SP_eType2R1PS_null_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_sequence(tvb, offset, actx, tree, hf_index, + ett_nr_rrc_T_type1SP_eType2R1PS_null_r16, T_type1SP_eType2R1PS_null_r16_sequence); + + return offset; +} + + +static const per_sequence_t T_supportedCSI_RS_ResourceListAdd_r16_09_sequence_of[1] = { + { &hf_nr_rrc_supportedCSI_RS_ResourceListAdd_r16_item, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_INTEGER_0_maxNrofCSI_RS_ResourcesAlt_1_r16 }, +}; + +static int +dissect_nr_rrc_T_supportedCSI_RS_ResourceListAdd_r16_09(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_constrained_sequence_of(tvb, offset, actx, tree, hf_index, + ett_nr_rrc_T_supportedCSI_RS_ResourceListAdd_r16_09, T_supportedCSI_RS_ResourceListAdd_r16_09_sequence_of, + 1, maxNrofCSI_RS_ResourcesExt_r16, FALSE); + + return offset; +} + + +static const per_sequence_t T_type1SP_eType2R2PS_null_r16_sequence[] = { + { &hf_nr_rrc_supportedCSI_RS_ResourceListAdd_r16_09, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_T_supportedCSI_RS_ResourceListAdd_r16_09 }, + { NULL, 0, 0, NULL } +}; + +static int +dissect_nr_rrc_T_type1SP_eType2R2PS_null_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_sequence(tvb, offset, actx, tree, hf_index, + ett_nr_rrc_T_type1SP_eType2R2PS_null_r16, T_type1SP_eType2R2PS_null_r16_sequence); + + return offset; +} + + +static const per_sequence_t T_supportedCSI_RS_ResourceListAdd_r16_10_sequence_of[1] = { + { &hf_nr_rrc_supportedCSI_RS_ResourceListAdd_r16_item, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_INTEGER_0_maxNrofCSI_RS_ResourcesAlt_1_r16 }, +}; + +static int +dissect_nr_rrc_T_supportedCSI_RS_ResourceListAdd_r16_10(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_constrained_sequence_of(tvb, offset, actx, tree, hf_index, + ett_nr_rrc_T_supportedCSI_RS_ResourceListAdd_r16_10, T_supportedCSI_RS_ResourceListAdd_r16_10_sequence_of, + 1, maxNrofCSI_RS_ResourcesExt_r16, FALSE); + + return offset; +} + + +static const per_sequence_t T_type1SP_Type2_Type2PS_r16_sequence[] = { + { &hf_nr_rrc_supportedCSI_RS_ResourceListAdd_r16_10, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_T_supportedCSI_RS_ResourceListAdd_r16_10 }, + { NULL, 0, 0, NULL } +}; + +static int +dissect_nr_rrc_T_type1SP_Type2_Type2PS_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_sequence(tvb, offset, actx, tree, hf_index, + ett_nr_rrc_T_type1SP_Type2_Type2PS_r16, T_type1SP_Type2_Type2PS_r16_sequence); + + return offset; +} + + +static const per_sequence_t T_supportedCSI_RS_ResourceListAdd_r16_11_sequence_of[1] = { + { &hf_nr_rrc_supportedCSI_RS_ResourceListAdd_r16_item, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_INTEGER_0_maxNrofCSI_RS_ResourcesAlt_1_r16 }, +}; + +static int +dissect_nr_rrc_T_supportedCSI_RS_ResourceListAdd_r16_11(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_constrained_sequence_of(tvb, offset, actx, tree, hf_index, + ett_nr_rrc_T_supportedCSI_RS_ResourceListAdd_r16_11, T_supportedCSI_RS_ResourceListAdd_r16_11_sequence_of, + 1, maxNrofCSI_RS_ResourcesExt_r16, FALSE); + + return offset; +} + + +static const per_sequence_t T_type1MP_Type2_null_r16_sequence[] = { + { &hf_nr_rrc_supportedCSI_RS_ResourceListAdd_r16_11, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_T_supportedCSI_RS_ResourceListAdd_r16_11 }, + { NULL, 0, 0, NULL } +}; + +static int +dissect_nr_rrc_T_type1MP_Type2_null_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_sequence(tvb, offset, actx, tree, hf_index, + ett_nr_rrc_T_type1MP_Type2_null_r16, T_type1MP_Type2_null_r16_sequence); + + return offset; +} + + +static const per_sequence_t T_supportedCSI_RS_ResourceListAdd_r16_12_sequence_of[1] = { + { &hf_nr_rrc_supportedCSI_RS_ResourceListAdd_r16_item, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_INTEGER_0_maxNrofCSI_RS_ResourcesAlt_1_r16 }, +}; + +static int +dissect_nr_rrc_T_supportedCSI_RS_ResourceListAdd_r16_12(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_constrained_sequence_of(tvb, offset, actx, tree, hf_index, + ett_nr_rrc_T_supportedCSI_RS_ResourceListAdd_r16_12, T_supportedCSI_RS_ResourceListAdd_r16_12_sequence_of, + 1, maxNrofCSI_RS_ResourcesExt_r16, FALSE); + + return offset; +} + + +static const per_sequence_t T_type1MP_Type2PS_null_r16_sequence[] = { + { &hf_nr_rrc_supportedCSI_RS_ResourceListAdd_r16_12, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_T_supportedCSI_RS_ResourceListAdd_r16_12 }, + { NULL, 0, 0, NULL } +}; + +static int +dissect_nr_rrc_T_type1MP_Type2PS_null_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_sequence(tvb, offset, actx, tree, hf_index, + ett_nr_rrc_T_type1MP_Type2PS_null_r16, T_type1MP_Type2PS_null_r16_sequence); + + return offset; +} + + +static const per_sequence_t T_supportedCSI_RS_ResourceListAdd_r16_13_sequence_of[1] = { + { &hf_nr_rrc_supportedCSI_RS_ResourceListAdd_r16_item, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_INTEGER_0_maxNrofCSI_RS_ResourcesAlt_1_r16 }, +}; + +static int +dissect_nr_rrc_T_supportedCSI_RS_ResourceListAdd_r16_13(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_constrained_sequence_of(tvb, offset, actx, tree, hf_index, + ett_nr_rrc_T_supportedCSI_RS_ResourceListAdd_r16_13, T_supportedCSI_RS_ResourceListAdd_r16_13_sequence_of, + 1, maxNrofCSI_RS_ResourcesExt_r16, FALSE); + + return offset; +} + + +static const per_sequence_t T_type1MP_eType2R1_null_r16_sequence[] = { + { &hf_nr_rrc_supportedCSI_RS_ResourceListAdd_r16_13, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_T_supportedCSI_RS_ResourceListAdd_r16_13 }, + { NULL, 0, 0, NULL } +}; + +static int +dissect_nr_rrc_T_type1MP_eType2R1_null_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_sequence(tvb, offset, actx, tree, hf_index, + ett_nr_rrc_T_type1MP_eType2R1_null_r16, T_type1MP_eType2R1_null_r16_sequence); + + return offset; +} + + +static const per_sequence_t T_supportedCSI_RS_ResourceListAdd_r16_14_sequence_of[1] = { + { &hf_nr_rrc_supportedCSI_RS_ResourceListAdd_r16_item, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_INTEGER_0_maxNrofCSI_RS_ResourcesAlt_1_r16 }, +}; + +static int +dissect_nr_rrc_T_supportedCSI_RS_ResourceListAdd_r16_14(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_constrained_sequence_of(tvb, offset, actx, tree, hf_index, + ett_nr_rrc_T_supportedCSI_RS_ResourceListAdd_r16_14, T_supportedCSI_RS_ResourceListAdd_r16_14_sequence_of, + 1, maxNrofCSI_RS_ResourcesExt_r16, FALSE); + + return offset; +} + + +static const per_sequence_t T_type1MP_eType2R2_null_r16_sequence[] = { + { &hf_nr_rrc_supportedCSI_RS_ResourceListAdd_r16_14, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_T_supportedCSI_RS_ResourceListAdd_r16_14 }, + { NULL, 0, 0, NULL } +}; + +static int +dissect_nr_rrc_T_type1MP_eType2R2_null_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_sequence(tvb, offset, actx, tree, hf_index, + ett_nr_rrc_T_type1MP_eType2R2_null_r16, T_type1MP_eType2R2_null_r16_sequence); + + return offset; +} + + +static const per_sequence_t T_supportedCSI_RS_ResourceListAdd_r16_15_sequence_of[1] = { + { &hf_nr_rrc_supportedCSI_RS_ResourceListAdd_r16_item, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_INTEGER_0_maxNrofCSI_RS_ResourcesAlt_1_r16 }, +}; + +static int +dissect_nr_rrc_T_supportedCSI_RS_ResourceListAdd_r16_15(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_constrained_sequence_of(tvb, offset, actx, tree, hf_index, + ett_nr_rrc_T_supportedCSI_RS_ResourceListAdd_r16_15, T_supportedCSI_RS_ResourceListAdd_r16_15_sequence_of, + 1, maxNrofCSI_RS_ResourcesExt_r16, FALSE); + + return offset; +} + + +static const per_sequence_t T_type1MP_eType2R1PS_null_r16_sequence[] = { + { &hf_nr_rrc_supportedCSI_RS_ResourceListAdd_r16_15, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_T_supportedCSI_RS_ResourceListAdd_r16_15 }, + { NULL, 0, 0, NULL } +}; + +static int +dissect_nr_rrc_T_type1MP_eType2R1PS_null_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_sequence(tvb, offset, actx, tree, hf_index, + ett_nr_rrc_T_type1MP_eType2R1PS_null_r16, T_type1MP_eType2R1PS_null_r16_sequence); + + return offset; +} + + +static const per_sequence_t T_supportedCSI_RS_ResourceListAdd_r16_16_sequence_of[1] = { + { &hf_nr_rrc_supportedCSI_RS_ResourceListAdd_r16_item, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_INTEGER_0_maxNrofCSI_RS_ResourcesAlt_1_r16 }, +}; + +static int +dissect_nr_rrc_T_supportedCSI_RS_ResourceListAdd_r16_16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_constrained_sequence_of(tvb, offset, actx, tree, hf_index, + ett_nr_rrc_T_supportedCSI_RS_ResourceListAdd_r16_16, T_supportedCSI_RS_ResourceListAdd_r16_16_sequence_of, + 1, maxNrofCSI_RS_ResourcesExt_r16, FALSE); + + return offset; +} + + +static const per_sequence_t T_type1MP_eType2R2PS_null_r16_sequence[] = { + { &hf_nr_rrc_supportedCSI_RS_ResourceListAdd_r16_16, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_T_supportedCSI_RS_ResourceListAdd_r16_16 }, + { NULL, 0, 0, NULL } +}; + +static int +dissect_nr_rrc_T_type1MP_eType2R2PS_null_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_sequence(tvb, offset, actx, tree, hf_index, + ett_nr_rrc_T_type1MP_eType2R2PS_null_r16, T_type1MP_eType2R2PS_null_r16_sequence); + + return offset; +} + + +static const per_sequence_t T_supportedCSI_RS_ResourceListAdd_r16_17_sequence_of[1] = { + { &hf_nr_rrc_supportedCSI_RS_ResourceListAdd_r16_item, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_INTEGER_0_maxNrofCSI_RS_ResourcesAlt_1_r16 }, +}; + +static int +dissect_nr_rrc_T_supportedCSI_RS_ResourceListAdd_r16_17(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_constrained_sequence_of(tvb, offset, actx, tree, hf_index, + ett_nr_rrc_T_supportedCSI_RS_ResourceListAdd_r16_17, T_supportedCSI_RS_ResourceListAdd_r16_17_sequence_of, + 1, maxNrofCSI_RS_ResourcesExt_r16, FALSE); + + return offset; +} + + +static const per_sequence_t T_type1MP_Type2_Type2PS_r16_sequence[] = { + { &hf_nr_rrc_supportedCSI_RS_ResourceListAdd_r16_17, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_T_supportedCSI_RS_ResourceListAdd_r16_17 }, + { NULL, 0, 0, NULL } +}; + +static int +dissect_nr_rrc_T_type1MP_Type2_Type2PS_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_sequence(tvb, offset, actx, tree, hf_index, + ett_nr_rrc_T_type1MP_Type2_Type2PS_r16, T_type1MP_Type2_Type2PS_r16_sequence); + + return offset; +} + + +static const per_sequence_t CodebookComboParametersAddition_r16_sequence[] = { + { &hf_nr_rrc_type1SP_Type2_null_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_type1SP_Type2_null_r16 }, + { &hf_nr_rrc_type1SP_Type2PS_null_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_type1SP_Type2PS_null_r16 }, + { &hf_nr_rrc_type1SP_eType2R1_null_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_type1SP_eType2R1_null_r16 }, + { &hf_nr_rrc_type1SP_eType2R2_null_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_type1SP_eType2R2_null_r16 }, + { &hf_nr_rrc_type1SP_eType2R1PS_null_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_type1SP_eType2R1PS_null_r16 }, + { &hf_nr_rrc_type1SP_eType2R2PS_null_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_type1SP_eType2R2PS_null_r16 }, + { &hf_nr_rrc_type1SP_Type2_Type2PS_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_type1SP_Type2_Type2PS_r16 }, + { &hf_nr_rrc_type1MP_Type2_null_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_type1MP_Type2_null_r16 }, + { &hf_nr_rrc_type1MP_Type2PS_null_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_type1MP_Type2PS_null_r16 }, + { &hf_nr_rrc_type1MP_eType2R1_null_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_type1MP_eType2R1_null_r16 }, + { &hf_nr_rrc_type1MP_eType2R2_null_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_type1MP_eType2R2_null_r16 }, + { &hf_nr_rrc_type1MP_eType2R1PS_null_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_type1MP_eType2R1PS_null_r16 }, + { &hf_nr_rrc_type1MP_eType2R2PS_null_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_type1MP_eType2R2PS_null_r16 }, + { &hf_nr_rrc_type1MP_Type2_Type2PS_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_type1MP_Type2_Type2PS_r16 }, + { NULL, 0, 0, NULL } +}; + +static int +dissect_nr_rrc_CodebookComboParametersAddition_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_sequence(tvb, offset, actx, tree, hf_index, + ett_nr_rrc_CodebookComboParametersAddition_r16, CodebookComboParametersAddition_r16_sequence); + + return offset; +} + + static const per_sequence_t CodebookVariantsList_r16_sequence_of[1] = { { &hf_nr_rrc_CodebookVariantsList_r16_item, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_SupportedCSI_RS_Resource }, }; @@ -66060,9 +67812,9 @@ dissect_nr_rrc_SEQUENCE_SIZE_1_maxNrofServingCells_OF_FeatureSetDownlinkPerCC_Id static const value_string nr_rrc_FreqSeparationClass_vals[] = { - { 0, "c1" }, - { 1, "c2" }, - { 2, "c3" }, + { 0, "mhz800" }, + { 1, "mhz1200" }, + { 2, "mhz1400" }, { 0, NULL } }; @@ -67309,7 +69061,7 @@ dissect_nr_rrc_FeatureSetDownlink_v15a0(tvbuff_t *tvb _U_, int offset _U_, asn1_ static const value_string nr_rrc_T_scs_15kHz_02_vals[] = { - { 0, "one-pdsch" }, + { 0, "one" }, { 1, "upto2" }, { 2, "upto4" }, { 3, "upto7" }, @@ -67327,7 +69079,7 @@ dissect_nr_rrc_T_scs_15kHz_02(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *act static const value_string nr_rrc_T_scs_30kHz_02_vals[] = { - { 0, "one-pdsch" }, + { 0, "one" }, { 1, "upto2" }, { 2, "upto4" }, { 3, "upto7" }, @@ -67345,7 +69097,7 @@ dissect_nr_rrc_T_scs_30kHz_02(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *act static const value_string nr_rrc_T_scs_60kHz_03_vals[] = { - { 0, "one-pdsch" }, + { 0, "one" }, { 1, "upto2" }, { 2, "upto4" }, { 3, "upto7" }, @@ -67363,7 +69115,7 @@ dissect_nr_rrc_T_scs_60kHz_03(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *act static const value_string nr_rrc_T_scs_120kHz_03_vals[] = { - { 0, "one-pdsch" }, + { 0, "one" }, { 1, "upto2" }, { 2, "upto4" }, { 3, "upto7" }, @@ -67380,7 +69132,7 @@ dissect_nr_rrc_T_scs_120kHz_03(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *ac } -static const per_sequence_t T_cbgPDSCH_ProcessingType1_DifferentTB_PerSlot_sequence[] = { +static const per_sequence_t T_cbgPDSCH_ProcessingType1_NumberOfTB_PerSlot_sequence[] = { { &hf_nr_rrc_scs_15kHz_03 , ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_scs_15kHz_02 }, { &hf_nr_rrc_scs_30kHz_03 , ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_scs_30kHz_02 }, { &hf_nr_rrc_scs_60kHz_04 , ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_scs_60kHz_03 }, @@ -67389,16 +69141,16 @@ static const per_sequence_t T_cbgPDSCH_ProcessingType1_DifferentTB_PerSlot_seque }; static int -dissect_nr_rrc_T_cbgPDSCH_ProcessingType1_DifferentTB_PerSlot(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { +dissect_nr_rrc_T_cbgPDSCH_ProcessingType1_NumberOfTB_PerSlot(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { offset = dissect_per_sequence(tvb, offset, actx, tree, hf_index, - ett_nr_rrc_T_cbgPDSCH_ProcessingType1_DifferentTB_PerSlot, T_cbgPDSCH_ProcessingType1_DifferentTB_PerSlot_sequence); + ett_nr_rrc_T_cbgPDSCH_ProcessingType1_NumberOfTB_PerSlot, T_cbgPDSCH_ProcessingType1_NumberOfTB_PerSlot_sequence); return offset; } static const value_string nr_rrc_T_scs_15kHz_03_vals[] = { - { 0, "one-pdsch" }, + { 0, "one" }, { 1, "upto2" }, { 2, "upto4" }, { 3, "upto7" }, @@ -67416,7 +69168,7 @@ dissect_nr_rrc_T_scs_15kHz_03(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *act static const value_string nr_rrc_T_scs_30kHz_03_vals[] = { - { 0, "one-pdsch" }, + { 0, "one" }, { 1, "upto2" }, { 2, "upto4" }, { 3, "upto7" }, @@ -67434,7 +69186,7 @@ dissect_nr_rrc_T_scs_30kHz_03(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *act static const value_string nr_rrc_T_scs_60kHz_04_vals[] = { - { 0, "one-pdsch" }, + { 0, "one" }, { 1, "upto2" }, { 2, "upto4" }, { 3, "upto7" }, @@ -67452,7 +69204,7 @@ dissect_nr_rrc_T_scs_60kHz_04(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *act static const value_string nr_rrc_T_scs_120kHz_04_vals[] = { - { 0, "one-pdsch" }, + { 0, "one" }, { 1, "upto2" }, { 2, "upto4" }, { 3, "upto7" }, @@ -67469,7 +69221,7 @@ dissect_nr_rrc_T_scs_120kHz_04(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *ac } -static const per_sequence_t T_cbgPDSCH_ProcessingType2_DifferentTB_PerSlot_sequence[] = { +static const per_sequence_t T_cbgPDSCH_ProcessingType2_NumberOfTB_PerSlot_sequence[] = { { &hf_nr_rrc_scs_15kHz_04 , ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_scs_15kHz_03 }, { &hf_nr_rrc_scs_30kHz_04 , ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_scs_30kHz_03 }, { &hf_nr_rrc_scs_60kHz_05 , ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_scs_60kHz_04 }, @@ -67478,17 +69230,360 @@ static const per_sequence_t T_cbgPDSCH_ProcessingType2_DifferentTB_PerSlot_seque }; static int -dissect_nr_rrc_T_cbgPDSCH_ProcessingType2_DifferentTB_PerSlot(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { +dissect_nr_rrc_T_cbgPDSCH_ProcessingType2_NumberOfTB_PerSlot(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_sequence(tvb, offset, actx, tree, hf_index, + ett_nr_rrc_T_cbgPDSCH_ProcessingType2_NumberOfTB_PerSlot, T_cbgPDSCH_ProcessingType2_NumberOfTB_PerSlot_sequence); + + return offset; +} + + +static const value_string nr_rrc_T_intraFreqDiffSCS_DAPS_r16_vals[] = { + { 0, "supported" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_intraFreqDiffSCS_DAPS_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 1, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const value_string nr_rrc_T_intraFreqAsyncDAPS_r16_vals[] = { + { 0, "supported" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_intraFreqAsyncDAPS_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 1, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const per_sequence_t T_intraFreqDAPS_r16_sequence[] = { + { &hf_nr_rrc_intraFreqDiffSCS_DAPS_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_intraFreqDiffSCS_DAPS_r16 }, + { &hf_nr_rrc_intraFreqAsyncDAPS_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_intraFreqAsyncDAPS_r16 }, + { NULL, 0, 0, NULL } +}; + +static int +dissect_nr_rrc_T_intraFreqDAPS_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_sequence(tvb, offset, actx, tree, hf_index, + ett_nr_rrc_T_intraFreqDAPS_r16, T_intraFreqDAPS_r16_sequence); + + return offset; +} + + +static const value_string nr_rrc_FreqSeparationClassDL_v1620_vals[] = { + { 0, "mhz1000" }, + { 1, "mhz1600" }, + { 2, "mhz1800" }, + { 3, "mhz2000" }, + { 4, "mhz2200" }, + { 5, "mhz2400" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_FreqSeparationClassDL_v1620(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 6, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const value_string nr_rrc_FreqSeparationClassDL_Only_r16_vals[] = { + { 0, "mhz200" }, + { 1, "mhz400" }, + { 2, "mhz600" }, + { 3, "mhz800" }, + { 4, "mhz1000" }, + { 5, "mhz1200" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_FreqSeparationClassDL_Only_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 6, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const value_string nr_rrc_T_period7span3_r16_vals[] = { + { 0, "supported" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_period7span3_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 1, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const value_string nr_rrc_T_period4span3_r16_vals[] = { + { 0, "supported" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_period4span3_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 1, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const value_string nr_rrc_T_period2span2_r16_vals[] = { + { 0, "supported" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_period2span2_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 1, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const per_sequence_t PDCCH_MonitoringOccasions_r16_sequence[] = { + { &hf_nr_rrc_period7span3_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_period7span3_r16 }, + { &hf_nr_rrc_period4span3_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_period4span3_r16 }, + { &hf_nr_rrc_period2span2_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_period2span2_r16 }, + { NULL, 0, 0, NULL } +}; + +static int +dissect_nr_rrc_PDCCH_MonitoringOccasions_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_sequence(tvb, offset, actx, tree, hf_index, + ett_nr_rrc_PDCCH_MonitoringOccasions_r16, PDCCH_MonitoringOccasions_r16_sequence); + + return offset; +} + + +static const per_sequence_t T_pdsch_ProcessingType1_r16_sequence[] = { + { &hf_nr_rrc_scs_15kHz_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_PDCCH_MonitoringOccasions_r16 }, + { &hf_nr_rrc_scs_30kHz_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_PDCCH_MonitoringOccasions_r16 }, + { NULL, 0, 0, NULL } +}; + +static int +dissect_nr_rrc_T_pdsch_ProcessingType1_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_sequence(tvb, offset, actx, tree, hf_index, + ett_nr_rrc_T_pdsch_ProcessingType1_r16, T_pdsch_ProcessingType1_r16_sequence); + + return offset; +} + + +static const per_sequence_t T_pdsch_ProcessingType2_r16_sequence[] = { + { &hf_nr_rrc_scs_15kHz_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_PDCCH_MonitoringOccasions_r16 }, + { &hf_nr_rrc_scs_30kHz_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_PDCCH_MonitoringOccasions_r16 }, + { NULL, 0, 0, NULL } +}; + +static int +dissect_nr_rrc_T_pdsch_ProcessingType2_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_sequence(tvb, offset, actx, tree, hf_index, + ett_nr_rrc_T_pdsch_ProcessingType2_r16, T_pdsch_ProcessingType2_r16_sequence); + + return offset; +} + + +static const per_sequence_t T_pdcch_Monitoring_r16_sequence[] = { + { &hf_nr_rrc_pdsch_ProcessingType1_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_pdsch_ProcessingType1_r16 }, + { &hf_nr_rrc_pdsch_ProcessingType2_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_pdsch_ProcessingType2_r16 }, + { NULL, 0, 0, NULL } +}; + +static int +dissect_nr_rrc_T_pdcch_Monitoring_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { offset = dissect_per_sequence(tvb, offset, actx, tree, hf_index, - ett_nr_rrc_T_cbgPDSCH_ProcessingType2_DifferentTB_PerSlot, T_cbgPDSCH_ProcessingType2_DifferentTB_PerSlot_sequence); + ett_nr_rrc_T_pdcch_Monitoring_r16, T_pdcch_Monitoring_r16_sequence); + + return offset; +} + + +static const value_string nr_rrc_T_pdcch_MonitoringMixed_r16_vals[] = { + { 0, "supported" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_pdcch_MonitoringMixed_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 1, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const value_string nr_rrc_T_scs_15kHz_120kHz_r16_vals[] = { + { 0, "n1" }, + { 1, "n2" }, + { 2, "n4" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_scs_15kHz_120kHz_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 3, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const value_string nr_rrc_T_scs_15kHz_60kHz_r16_vals[] = { + { 0, "n1" }, + { 1, "n2" }, + { 2, "n4" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_scs_15kHz_60kHz_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 3, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const value_string nr_rrc_T_scs_30kHz_120kHz_r16_vals[] = { + { 0, "n1" }, + { 1, "n2" }, + { 2, "n4" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_scs_30kHz_120kHz_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 3, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const value_string nr_rrc_T_scs_15kHz_30kHz_r16_vals[] = { + { 0, "n2" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_scs_15kHz_30kHz_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 1, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const value_string nr_rrc_T_scs_30kHz_60kHz_r16_vals[] = { + { 0, "n2" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_scs_30kHz_60kHz_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 1, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const value_string nr_rrc_T_scs_60kHz_120kHz_r16_vals[] = { + { 0, "n2" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_scs_60kHz_120kHz_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 1, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const per_sequence_t T_crossCarrierSchedulingProcessing_DiffSCS_r16_sequence[] = { + { &hf_nr_rrc_scs_15kHz_120kHz_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_scs_15kHz_120kHz_r16 }, + { &hf_nr_rrc_scs_15kHz_60kHz_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_scs_15kHz_60kHz_r16 }, + { &hf_nr_rrc_scs_30kHz_120kHz_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_scs_30kHz_120kHz_r16 }, + { &hf_nr_rrc_scs_15kHz_30kHz_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_scs_15kHz_30kHz_r16 }, + { &hf_nr_rrc_scs_30kHz_60kHz_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_scs_30kHz_60kHz_r16 }, + { &hf_nr_rrc_scs_60kHz_120kHz_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_scs_60kHz_120kHz_r16 }, + { NULL, 0, 0, NULL } +}; + +static int +dissect_nr_rrc_T_crossCarrierSchedulingProcessing_DiffSCS_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_sequence(tvb, offset, actx, tree, hf_index, + ett_nr_rrc_T_crossCarrierSchedulingProcessing_DiffSCS_r16, T_crossCarrierSchedulingProcessing_DiffSCS_r16_sequence); + + return offset; +} + + +static const value_string nr_rrc_T_singleDCI_SDM_scheme_r16_vals[] = { + { 0, "supported" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_singleDCI_SDM_scheme_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 1, NULL, FALSE, 0, NULL); return offset; } static const per_sequence_t FeatureSetDownlink_v1610_sequence[] = { - { &hf_nr_rrc_cbgPDSCH_ProcessingType1_DifferentTB_PerSlot, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_cbgPDSCH_ProcessingType1_DifferentTB_PerSlot }, - { &hf_nr_rrc_cbgPDSCH_ProcessingType2_DifferentTB_PerSlot, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_cbgPDSCH_ProcessingType2_DifferentTB_PerSlot }, + { &hf_nr_rrc_cbgPDSCH_ProcessingType1_NumberOfTB_PerSlot, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_cbgPDSCH_ProcessingType1_NumberOfTB_PerSlot }, + { &hf_nr_rrc_cbgPDSCH_ProcessingType2_NumberOfTB_PerSlot, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_cbgPDSCH_ProcessingType2_NumberOfTB_PerSlot }, + { &hf_nr_rrc_intraFreqDAPS_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_intraFreqDAPS_r16 }, + { &hf_nr_rrc_intraBandFreqSeparationDL_v1620, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_FreqSeparationClassDL_v1620 }, + { &hf_nr_rrc_intraBandFreqSeparationDL_Only_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_FreqSeparationClassDL_Only_r16 }, + { &hf_nr_rrc_pdcch_Monitoring_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_pdcch_Monitoring_r16 }, + { &hf_nr_rrc_pdcch_MonitoringMixed_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_pdcch_MonitoringMixed_r16 }, + { &hf_nr_rrc_crossCarrierSchedulingProcessing_DiffSCS_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_crossCarrierSchedulingProcessing_DiffSCS_r16 }, + { &hf_nr_rrc_singleDCI_SDM_scheme_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_singleDCI_SDM_scheme_r16 }, { NULL, 0, 0, NULL } }; @@ -67619,6 +69714,89 @@ dissect_nr_rrc_FeatureSetDownlinkPerCC(tvbuff_t *tvb _U_, int offset _U_, asn1_c } +static const value_string nr_rrc_T_maxNumberCORESET_r16_vals[] = { + { 0, "n2" }, + { 1, "n3" }, + { 2, "n4" }, + { 3, "n5" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_maxNumberCORESET_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 4, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const value_string nr_rrc_T_maxNumberUnicastPDSCH_PerPool_r16_vals[] = { + { 0, "n1" }, + { 1, "n2" }, + { 2, "n3" }, + { 3, "n4" }, + { 4, "n7" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_maxNumberUnicastPDSCH_PerPool_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 5, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const per_sequence_t MultiDCI_MultiTRP_r16_sequence[] = { + { &hf_nr_rrc_maxNumberCORESET_r16, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_T_maxNumberCORESET_r16 }, + { &hf_nr_rrc_maxNumberCORESETPerPoolIndex_r16, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_INTEGER_1_3 }, + { &hf_nr_rrc_maxNumberUnicastPDSCH_PerPool_r16, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_T_maxNumberUnicastPDSCH_PerPool_r16 }, + { NULL, 0, 0, NULL } +}; + +static int +dissect_nr_rrc_MultiDCI_MultiTRP_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_sequence(tvb, offset, actx, tree, hf_index, + ett_nr_rrc_MultiDCI_MultiTRP_r16, MultiDCI_MultiTRP_r16_sequence); + + return offset; +} + + +static const value_string nr_rrc_T_supportFDM_SchemeB_r16_vals[] = { + { 0, "supported" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_supportFDM_SchemeB_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 1, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const per_sequence_t FeatureSetDownlinkPerCC_v1620_sequence[] = { + { &hf_nr_rrc_multiDCI_MultiTRP_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_MultiDCI_MultiTRP_r16 }, + { &hf_nr_rrc_supportFDM_SchemeB_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_supportFDM_SchemeB_r16 }, + { NULL, 0, 0, NULL } +}; + +static int +dissect_nr_rrc_FeatureSetDownlinkPerCC_v1620(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_sequence(tvb, offset, actx, tree, hf_index, + ett_nr_rrc_FeatureSetDownlinkPerCC_v1620, FeatureSetDownlinkPerCC_v1620_sequence); + + return offset; +} + + static const per_sequence_t SEQUENCE_SIZE_1_maxDownlinkFeatureSets_OF_FeatureSetDownlink_sequence_of[1] = { { &hf_nr_rrc_featureSetsDownlink_item, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_FeatureSetDownlink }, }; @@ -68778,6 +70956,638 @@ dissect_nr_rrc_SRS_AllPosResources_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_c } +static const value_string nr_rrc_T_intraFreqMultiUL_TransmissionDAPS_r16_vals[] = { + { 0, "supported" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_intraFreqMultiUL_TransmissionDAPS_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 1, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const value_string nr_rrc_T_intraFreqTwoTAGs_DAPS_r16_vals[] = { + { 0, "supported" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_intraFreqTwoTAGs_DAPS_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 1, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const value_string nr_rrc_T_intraFreqSemiStaticPowerSharingDAPS_Mode1_r16_vals[] = { + { 0, "supported" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_intraFreqSemiStaticPowerSharingDAPS_Mode1_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 1, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const value_string nr_rrc_T_intraFreqSemiStaticPowerSharingDAPS_Mode2_r16_vals[] = { + { 0, "supported" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_intraFreqSemiStaticPowerSharingDAPS_Mode2_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 1, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const value_string nr_rrc_T_intraFreqDynamicPowerSharingDAPS_r16_vals[] = { + { 0, "short" }, + { 1, "long" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_intraFreqDynamicPowerSharingDAPS_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 2, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const per_sequence_t T_intraFreqDAPS_UL_r16_sequence[] = { + { &hf_nr_rrc_intraFreqMultiUL_TransmissionDAPS_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_intraFreqMultiUL_TransmissionDAPS_r16 }, + { &hf_nr_rrc_intraFreqTwoTAGs_DAPS_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_intraFreqTwoTAGs_DAPS_r16 }, + { &hf_nr_rrc_intraFreqSemiStaticPowerSharingDAPS_Mode1_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_intraFreqSemiStaticPowerSharingDAPS_Mode1_r16 }, + { &hf_nr_rrc_intraFreqSemiStaticPowerSharingDAPS_Mode2_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_intraFreqSemiStaticPowerSharingDAPS_Mode2_r16 }, + { &hf_nr_rrc_intraFreqDynamicPowerSharingDAPS_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_intraFreqDynamicPowerSharingDAPS_r16 }, + { NULL, 0, 0, NULL } +}; + +static int +dissect_nr_rrc_T_intraFreqDAPS_UL_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_sequence(tvb, offset, actx, tree, hf_index, + ett_nr_rrc_T_intraFreqDAPS_UL_r16, T_intraFreqDAPS_UL_r16_sequence); + + return offset; +} + + +static const value_string nr_rrc_FreqSeparationClassUL_v1620_vals[] = { + { 0, "mhz1000" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_FreqSeparationClassUL_v1620(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 1, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const value_string nr_rrc_T_sub_SlotConfig_NCP_r16_vals[] = { + { 0, "set1" }, + { 1, "set2" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_sub_SlotConfig_NCP_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 2, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const value_string nr_rrc_T_sub_SlotConfig_ECP_r16_vals[] = { + { 0, "set1" }, + { 1, "set2" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_sub_SlotConfig_ECP_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 2, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const per_sequence_t T_multiPUCCH_r16_sequence[] = { + { &hf_nr_rrc_sub_SlotConfig_NCP_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_sub_SlotConfig_NCP_r16 }, + { &hf_nr_rrc_sub_SlotConfig_ECP_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_sub_SlotConfig_ECP_r16 }, + { NULL, 0, 0, NULL } +}; + +static int +dissect_nr_rrc_T_multiPUCCH_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_sequence(tvb, offset, actx, tree, hf_index, + ett_nr_rrc_T_multiPUCCH_r16, T_multiPUCCH_r16_sequence); + + return offset; +} + + +static const value_string nr_rrc_T_twoPUCCH_Type1_r16_vals[] = { + { 0, "supported" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_twoPUCCH_Type1_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 1, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const value_string nr_rrc_T_twoPUCCH_Type2_r16_vals[] = { + { 0, "supported" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_twoPUCCH_Type2_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 1, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const value_string nr_rrc_T_twoPUCCH_Type3_r16_vals[] = { + { 0, "supported" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_twoPUCCH_Type3_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 1, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const value_string nr_rrc_T_twoPUCCH_Type4_r16_vals[] = { + { 0, "supported" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_twoPUCCH_Type4_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 1, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const value_string nr_rrc_T_mux_SR_HARQ_ACK_r16_vals[] = { + { 0, "supported" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_mux_SR_HARQ_ACK_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 1, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const value_string nr_rrc_T_twoHARQ_ACK_Codebook_type1_r16_vals[] = { + { 0, "supported" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_twoHARQ_ACK_Codebook_type1_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 1, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const value_string nr_rrc_T_twoHARQ_ACK_Codebook_type2_r16_vals[] = { + { 0, "supported" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_twoHARQ_ACK_Codebook_type2_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 1, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const value_string nr_rrc_T_twoPUCCH_Type5_r16_vals[] = { + { 0, "supported" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_twoPUCCH_Type5_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 1, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const value_string nr_rrc_T_twoPUCCH_Type6_r16_vals[] = { + { 0, "supported" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_twoPUCCH_Type6_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 1, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const value_string nr_rrc_T_twoPUCCH_Type7_r16_vals[] = { + { 0, "supported" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_twoPUCCH_Type7_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 1, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const value_string nr_rrc_T_twoPUCCH_Type8_r16_vals[] = { + { 0, "supported" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_twoPUCCH_Type8_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 1, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const value_string nr_rrc_T_twoPUCCH_Type9_r16_vals[] = { + { 0, "supported" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_twoPUCCH_Type9_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 1, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const value_string nr_rrc_T_twoPUCCH_Type10_r16_vals[] = { + { 0, "supported" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_twoPUCCH_Type10_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 1, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const value_string nr_rrc_T_twoPUCCH_Type11_r16_vals[] = { + { 0, "supported" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_twoPUCCH_Type11_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 1, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const value_string nr_rrc_T_pusch_PreparationLowPriority_r16_vals[] = { + { 0, "sym0" }, + { 1, "sym1" }, + { 2, "sym2" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_pusch_PreparationLowPriority_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 3, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const value_string nr_rrc_T_pusch_PreparationHighPriority_r16_vals[] = { + { 0, "sym0" }, + { 1, "sym1" }, + { 2, "sym2" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_pusch_PreparationHighPriority_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 3, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const per_sequence_t T_ul_IntraUE_Mux_r16_sequence[] = { + { &hf_nr_rrc_pusch_PreparationLowPriority_r16, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_T_pusch_PreparationLowPriority_r16 }, + { &hf_nr_rrc_pusch_PreparationHighPriority_r16, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_T_pusch_PreparationHighPriority_r16 }, + { NULL, 0, 0, NULL } +}; + +static int +dissect_nr_rrc_T_ul_IntraUE_Mux_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_sequence(tvb, offset, actx, tree, hf_index, + ett_nr_rrc_T_ul_IntraUE_Mux_r16, T_ul_IntraUE_Mux_r16_sequence); + + return offset; +} + + +static const value_string nr_rrc_T_ul_FullPwrMode_r16_vals[] = { + { 0, "supported" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_ul_FullPwrMode_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 1, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const value_string nr_rrc_T_scs_15kHz_120kHz_r16_01_vals[] = { + { 0, "n1" }, + { 1, "n2" }, + { 2, "n4" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_scs_15kHz_120kHz_r16_01(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 3, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const value_string nr_rrc_T_scs_15kHz_60kHz_r16_01_vals[] = { + { 0, "n1" }, + { 1, "n2" }, + { 2, "n4" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_scs_15kHz_60kHz_r16_01(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 3, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const value_string nr_rrc_T_scs_30kHz_120kHz_r16_01_vals[] = { + { 0, "n1" }, + { 1, "n2" }, + { 2, "n4" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_scs_30kHz_120kHz_r16_01(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 3, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const value_string nr_rrc_T_scs_15kHz_30kHz_r16_01_vals[] = { + { 0, "n2" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_scs_15kHz_30kHz_r16_01(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 1, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const value_string nr_rrc_T_scs_30kHz_60kHz_r16_01_vals[] = { + { 0, "n2" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_scs_30kHz_60kHz_r16_01(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 1, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const value_string nr_rrc_T_scs_60kHz_120kHz_r16_01_vals[] = { + { 0, "n2" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_scs_60kHz_120kHz_r16_01(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 1, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const per_sequence_t T_crossCarrierSchedulingProcessing_DiffSCS_r16_01_sequence[] = { + { &hf_nr_rrc_scs_15kHz_120kHz_r16_01, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_scs_15kHz_120kHz_r16_01 }, + { &hf_nr_rrc_scs_15kHz_60kHz_r16_01, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_scs_15kHz_60kHz_r16_01 }, + { &hf_nr_rrc_scs_30kHz_120kHz_r16_01, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_scs_30kHz_120kHz_r16_01 }, + { &hf_nr_rrc_scs_15kHz_30kHz_r16_01, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_scs_15kHz_30kHz_r16_01 }, + { &hf_nr_rrc_scs_30kHz_60kHz_r16_01, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_scs_30kHz_60kHz_r16_01 }, + { &hf_nr_rrc_scs_60kHz_120kHz_r16_01, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_scs_60kHz_120kHz_r16_01 }, + { NULL, 0, 0, NULL } +}; + +static int +dissect_nr_rrc_T_crossCarrierSchedulingProcessing_DiffSCS_r16_01(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_sequence(tvb, offset, actx, tree, hf_index, + ett_nr_rrc_T_crossCarrierSchedulingProcessing_DiffSCS_r16_01, T_crossCarrierSchedulingProcessing_DiffSCS_r16_01_sequence); + + return offset; +} + + +static const value_string nr_rrc_T_ul_FullPwrMode1_r16_vals[] = { + { 0, "supported" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_ul_FullPwrMode1_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 1, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const value_string nr_rrc_T_ul_FullPwrMode2_SRSConfig_diffNumSRSPorts_r16_vals[] = { + { 0, "p1-2" }, + { 1, "p1-4" }, + { 2, "p1-2-4" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_ul_FullPwrMode2_SRSConfig_diffNumSRSPorts_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 3, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const value_string nr_rrc_T_fourPortsNonCoherent_r16_vals[] = { + { 0, "g0" }, + { 1, "g1" }, + { 2, "g2" }, + { 3, "g3" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_fourPortsNonCoherent_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 4, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const value_string nr_rrc_T_fourPortsPartialCoherent_r16_vals[] = { + { 0, "g0" }, + { 1, "g1" }, + { 2, "g2" }, + { 3, "g3" }, + { 4, "g4" }, + { 5, "g5" }, + { 6, "g6" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_fourPortsPartialCoherent_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 7, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const per_sequence_t T_ul_FullPwrMode2_TPMIGroup_r16_sequence[] = { + { &hf_nr_rrc_twoPorts_r16 , ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_BIT_STRING_SIZE_2 }, + { &hf_nr_rrc_fourPortsNonCoherent_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_fourPortsNonCoherent_r16 }, + { &hf_nr_rrc_fourPortsPartialCoherent_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_fourPortsPartialCoherent_r16 }, + { NULL, 0, 0, NULL } +}; + +static int +dissect_nr_rrc_T_ul_FullPwrMode2_TPMIGroup_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_sequence(tvb, offset, actx, tree, hf_index, + ett_nr_rrc_T_ul_FullPwrMode2_TPMIGroup_r16, T_ul_FullPwrMode2_TPMIGroup_r16_sequence); + + return offset; +} + + static const per_sequence_t FeatureSetUplink_v1610_sequence[] = { { &hf_nr_rrc_pusch_RepetitionTypeB_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_pusch_RepetitionTypeB_r16 }, { &hf_nr_rrc_ul_CancellationSelfCarrier_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_ul_CancellationSelfCarrier_r16 }, @@ -68786,6 +71596,29 @@ static const per_sequence_t FeatureSetUplink_v1610_sequence[] = { { &hf_nr_rrc_cbgPUSCH_ProcessingType1_DifferentTB_PerSlot, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_cbgPUSCH_ProcessingType1_DifferentTB_PerSlot }, { &hf_nr_rrc_cbgPUSCH_ProcessingType2_DifferentTB_PerSlot, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_cbgPUSCH_ProcessingType2_DifferentTB_PerSlot }, { &hf_nr_rrc_supportedSRS_PosResources_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_SRS_AllPosResources_r16 }, + { &hf_nr_rrc_intraFreqDAPS_UL_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_intraFreqDAPS_UL_r16 }, + { &hf_nr_rrc_intraBandFreqSeparationUL_v1620, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_FreqSeparationClassUL_v1620 }, + { &hf_nr_rrc_multiPUCCH_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_multiPUCCH_r16 }, + { &hf_nr_rrc_twoPUCCH_Type1_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_twoPUCCH_Type1_r16 }, + { &hf_nr_rrc_twoPUCCH_Type2_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_twoPUCCH_Type2_r16 }, + { &hf_nr_rrc_twoPUCCH_Type3_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_twoPUCCH_Type3_r16 }, + { &hf_nr_rrc_twoPUCCH_Type4_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_twoPUCCH_Type4_r16 }, + { &hf_nr_rrc_mux_SR_HARQ_ACK_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_mux_SR_HARQ_ACK_r16 }, + { &hf_nr_rrc_twoHARQ_ACK_Codebook_type1_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_twoHARQ_ACK_Codebook_type1_r16 }, + { &hf_nr_rrc_twoHARQ_ACK_Codebook_type2_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_twoHARQ_ACK_Codebook_type2_r16 }, + { &hf_nr_rrc_twoPUCCH_Type5_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_twoPUCCH_Type5_r16 }, + { &hf_nr_rrc_twoPUCCH_Type6_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_twoPUCCH_Type6_r16 }, + { &hf_nr_rrc_twoPUCCH_Type7_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_twoPUCCH_Type7_r16 }, + { &hf_nr_rrc_twoPUCCH_Type8_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_twoPUCCH_Type8_r16 }, + { &hf_nr_rrc_twoPUCCH_Type9_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_twoPUCCH_Type9_r16 }, + { &hf_nr_rrc_twoPUCCH_Type10_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_twoPUCCH_Type10_r16 }, + { &hf_nr_rrc_twoPUCCH_Type11_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_twoPUCCH_Type11_r16 }, + { &hf_nr_rrc_ul_IntraUE_Mux_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_ul_IntraUE_Mux_r16 }, + { &hf_nr_rrc_ul_FullPwrMode_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_ul_FullPwrMode_r16 }, + { &hf_nr_rrc_crossCarrierSchedulingProcessing_DiffSCS_r16_01, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_crossCarrierSchedulingProcessing_DiffSCS_r16_01 }, + { &hf_nr_rrc_ul_FullPwrMode1_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_ul_FullPwrMode1_r16 }, + { &hf_nr_rrc_ul_FullPwrMode2_SRSConfig_diffNumSRSPorts_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_ul_FullPwrMode2_SRSConfig_diffNumSRSPorts_r16 }, + { &hf_nr_rrc_ul_FullPwrMode2_TPMIGroup_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_ul_FullPwrMode2_TPMIGroup_r16 }, { NULL, 0, 0, NULL } }; @@ -68812,9 +71645,24 @@ dissect_nr_rrc_SEQUENCE_SIZE_1_maxUplinkFeatureSets_OF_FeatureSetUplink_v1610(tv } +static const per_sequence_t SEQUENCE_SIZE_1_maxPerCC_FeatureSets_OF_FeatureSetDownlinkPerCC_v1620_sequence_of[1] = { + { &hf_nr_rrc_featureSetDownlinkPerCC_v1620_item, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_FeatureSetDownlinkPerCC_v1620 }, +}; + +static int +dissect_nr_rrc_SEQUENCE_SIZE_1_maxPerCC_FeatureSets_OF_FeatureSetDownlinkPerCC_v1620(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_constrained_sequence_of(tvb, offset, actx, tree, hf_index, + ett_nr_rrc_SEQUENCE_SIZE_1_maxPerCC_FeatureSets_OF_FeatureSetDownlinkPerCC_v1620, SEQUENCE_SIZE_1_maxPerCC_FeatureSets_OF_FeatureSetDownlinkPerCC_v1620_sequence_of, + 1, maxPerCC_FeatureSets, FALSE); + + return offset; +} + + static const per_sequence_t FeatureSets_eag_3_sequence[] = { { &hf_nr_rrc_featureSetsDownlink_v1610, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_SEQUENCE_SIZE_1_maxDownlinkFeatureSets_OF_FeatureSetDownlink_v1610 }, { &hf_nr_rrc_featureSetsUplink_v1610, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_SEQUENCE_SIZE_1_maxUplinkFeatureSets_OF_FeatureSetUplink_v1610 }, + { &hf_nr_rrc_featureSetDownlinkPerCC_v1620, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_SEQUENCE_SIZE_1_maxPerCC_FeatureSets_OF_FeatureSetDownlinkPerCC_v1620 }, { NULL, 0, 0, NULL } }; @@ -69521,21 +72369,6 @@ dissect_nr_rrc_T_recommendedBitRateMultiplier_r16(tvbuff_t *tvb _U_, int offset } -static const value_string nr_rrc_T_secondaryDRX_Group_vals[] = { - { 0, "supported" }, - { 0, NULL } -}; - - -static int -dissect_nr_rrc_T_secondaryDRX_Group(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { - offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, - 1, NULL, FALSE, 0, NULL); - - return offset; -} - - static const value_string nr_rrc_T_preEmptiveBSR_r16_vals[] = { { 0, "supported" }, { 0, NULL } @@ -69641,9 +72474,38 @@ dissect_nr_rrc_T_ul_LBT_FailureDetectionRecovery_r16(tvbuff_t *tvb _U_, int offs } +static const value_string nr_rrc_T_tdd_MPE_P_MPR_Reporting_r16_vals[] = { + { 0, "supported" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_tdd_MPE_P_MPR_Reporting_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 1, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const value_string nr_rrc_T_lcid_ExtensionIAB_r16_vals[] = { + { 0, "supported" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_lcid_ExtensionIAB_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 1, NULL, FALSE, 0, NULL); + + return offset; +} + + static const per_sequence_t MAC_ParametersCommon_eag_2_sequence[] = { { &hf_nr_rrc_recommendedBitRateMultiplier_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_recommendedBitRateMultiplier_r16 }, - { &hf_nr_rrc_secondaryDRX_Group, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_secondaryDRX_Group }, { &hf_nr_rrc_preEmptiveBSR_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_preEmptiveBSR_r16 }, { &hf_nr_rrc_autonomousTransmission_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_autonomousTransmission_r16 }, { &hf_nr_rrc_lch_PriorityBasedPrioritization_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_lch_PriorityBasedPrioritization_r16 }, @@ -69651,6 +72513,8 @@ static const per_sequence_t MAC_ParametersCommon_eag_2_sequence[] = { { &hf_nr_rrc_lch_ToGrantPriorityRestriction_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_lch_ToGrantPriorityRestriction_r16 }, { &hf_nr_rrc_singlePHR_P_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_singlePHR_P_r16 }, { &hf_nr_rrc_ul_LBT_FailureDetectionRecovery_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_ul_LBT_FailureDetectionRecovery_r16 }, + { &hf_nr_rrc_tdd_MPE_P_MPR_Reporting_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_tdd_MPE_P_MPR_Reporting_r16 }, + { &hf_nr_rrc_lcid_ExtensionIAB_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_lcid_ExtensionIAB_r16 }, { NULL, 0, 0, NULL } }; @@ -69770,6 +72634,34 @@ dissect_nr_rrc_T_multipleConfiguredGrants(tvbuff_t *tvb _U_, int offset _U_, asn } +static const value_string nr_rrc_T_secondaryDRX_Group_r16_vals[] = { + { 0, "supported" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_secondaryDRX_Group_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 1, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const per_sequence_t MAC_ParametersXDD_Diff_eag_1_sequence[] = { + { &hf_nr_rrc_secondaryDRX_Group_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_secondaryDRX_Group_r16 }, + { NULL, 0, 0, NULL } +}; + +static int +dissect_nr_rrc_MAC_ParametersXDD_Diff_eag_1(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_sequence_eag(tvb, offset, actx, tree, MAC_ParametersXDD_Diff_eag_1_sequence); + + return offset; +} + + static const per_sequence_t MAC_ParametersXDD_Diff_sequence[] = { { &hf_nr_rrc_skipUplinkTxDynamic_01, ASN1_EXTENSION_ROOT , ASN1_OPTIONAL , dissect_nr_rrc_T_skipUplinkTxDynamic }, { &hf_nr_rrc_logicalChannelSR_DelayTimer_01, ASN1_EXTENSION_ROOT , ASN1_OPTIONAL , dissect_nr_rrc_T_logicalChannelSR_DelayTimer_01 }, @@ -69777,6 +72669,7 @@ static const per_sequence_t MAC_ParametersXDD_Diff_sequence[] = { { &hf_nr_rrc_shortDRX_Cycle, ASN1_EXTENSION_ROOT , ASN1_OPTIONAL , dissect_nr_rrc_T_shortDRX_Cycle }, { &hf_nr_rrc_multipleSR_Configurations, ASN1_EXTENSION_ROOT , ASN1_OPTIONAL , dissect_nr_rrc_T_multipleSR_Configurations }, { &hf_nr_rrc_multipleConfiguredGrants, ASN1_EXTENSION_ROOT , ASN1_OPTIONAL , dissect_nr_rrc_T_multipleConfiguredGrants }, + { &dummy_hf_nr_rrc_eag_field, ASN1_NOT_EXTENSION_ROOT, ASN1_NOT_OPTIONAL, dissect_nr_rrc_MAC_ParametersXDD_Diff_eag_1 }, { NULL, 0, 0, NULL } }; @@ -69929,8 +72822,8 @@ dissect_nr_rrc_T_scs_120kHz_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *a static const per_sequence_t MinTimeGap_r16_sequence[] = { - { &hf_nr_rrc_scs_15kHz_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_scs_15kHz_r16 }, - { &hf_nr_rrc_scs_30kHz_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_scs_30kHz_r16 }, + { &hf_nr_rrc_scs_15kHz_r16_01, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_scs_15kHz_r16 }, + { &hf_nr_rrc_scs_30kHz_r16_01, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_scs_30kHz_r16 }, { &hf_nr_rrc_scs_60kHz_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_scs_60kHz_r16 }, { &hf_nr_rrc_scs_120kHz_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_scs_120kHz_r16 }, { NULL, 0, 0, NULL } @@ -69946,8 +72839,8 @@ dissect_nr_rrc_MinTimeGap_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *act static const per_sequence_t T_drx_Adaptation_r16_sequence[] = { - { &hf_nr_rrc_licensedBand_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_MinTimeGap_r16 }, - { &hf_nr_rrc_unlicensedBand_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_MinTimeGap_r16 }, + { &hf_nr_rrc_non_SharedSpectrumChAccess_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_MinTimeGap_r16 }, + { &hf_nr_rrc_sharedSpectrumChAccess_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_MinTimeGap_r16 }, { NULL, 0, 0, NULL } }; @@ -70511,6 +73404,66 @@ dissect_nr_rrc_T_idleInactive_ValidityArea_r16(tvbuff_t *tvb _U_, int offset _U_ } +static const value_string nr_rrc_T_eutra_AutonomousGaps_r16_vals[] = { + { 0, "supported" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_eutra_AutonomousGaps_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 1, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const value_string nr_rrc_T_eutra_AutonomousGaps_NEDC_r16_vals[] = { + { 0, "supported" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_eutra_AutonomousGaps_NEDC_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 1, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const value_string nr_rrc_T_eutra_AutonomousGaps_NRDC_r16_vals[] = { + { 0, "supported" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_eutra_AutonomousGaps_NRDC_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 1, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const value_string nr_rrc_T_pcellT312_r16_vals[] = { + { 0, "supported" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_pcellT312_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 1, NULL, FALSE, 0, NULL); + + return offset; +} + + static const per_sequence_t MeasAndMobParametersCommon_eag_5_sequence[] = { { &hf_nr_rrc_reportAddNeighMeasForPeriodic_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_reportAddNeighMeasForPeriodic_r16 }, { &hf_nr_rrc_condHandoverParametersCommon_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_condHandoverParametersCommon_r16 }, @@ -70525,6 +73478,11 @@ static const per_sequence_t MeasAndMobParametersCommon_eag_5_sequence[] = { { &hf_nr_rrc_nr_CGI_Reporting_NPN_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_nr_CGI_Reporting_NPN_r16 }, { &hf_nr_rrc_idleInactiveEUTRA_MeasReport_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_idleInactiveEUTRA_MeasReport_r16 }, { &hf_nr_rrc_idleInactive_ValidityArea_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_idleInactive_ValidityArea_r16 }, + { &hf_nr_rrc_eutra_AutonomousGaps_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_eutra_AutonomousGaps_r16 }, + { &hf_nr_rrc_eutra_AutonomousGaps_NEDC_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_eutra_AutonomousGaps_NEDC_r16 }, + { &hf_nr_rrc_eutra_AutonomousGaps_NRDC_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_eutra_AutonomousGaps_NRDC_r16 }, + { &hf_nr_rrc_pcellT312_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_pcellT312_r16 }, + { &hf_nr_rrc_supportedGapPattern_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_BIT_STRING_SIZE_2 }, { NULL, 0, 0, NULL } }; @@ -70691,202 +73649,6 @@ dissect_nr_rrc_MeasAndMobParametersXDD_Diff_eag_2(tvbuff_t *tvb _U_, int offset } -static const value_string nr_rrc_T_condHandover_r16_vals[] = { - { 0, "supported" }, - { 0, NULL } -}; - - -static int -dissect_nr_rrc_T_condHandover_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { - offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, - 1, NULL, FALSE, 0, NULL); - - return offset; -} - - -static const value_string nr_rrc_T_condHandoverFailure_r16_vals[] = { - { 0, "supported" }, - { 0, NULL } -}; - - -static int -dissect_nr_rrc_T_condHandoverFailure_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { - offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, - 1, NULL, FALSE, 0, NULL); - - return offset; -} - - -static const value_string nr_rrc_T_condHandoverTwoTriggerEvents_r16_vals[] = { - { 0, "supported" }, - { 0, NULL } -}; - - -static int -dissect_nr_rrc_T_condHandoverTwoTriggerEvents_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { - offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, - 1, NULL, FALSE, 0, NULL); - - return offset; -} - - -static const per_sequence_t T_condHandoverParametersXDD_Diff_r16_sequence[] = { - { &hf_nr_rrc_condHandover_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_condHandover_r16 }, - { &hf_nr_rrc_condHandoverFailure_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_condHandoverFailure_r16 }, - { &hf_nr_rrc_condHandoverTwoTriggerEvents_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_condHandoverTwoTriggerEvents_r16 }, - { NULL, 0, 0, NULL } -}; - -static int -dissect_nr_rrc_T_condHandoverParametersXDD_Diff_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { - offset = dissect_per_sequence(tvb, offset, actx, tree, hf_index, - ett_nr_rrc_T_condHandoverParametersXDD_Diff_r16, T_condHandoverParametersXDD_Diff_r16_sequence); - - return offset; -} - - -static const value_string nr_rrc_T_pcellT312_r16_vals[] = { - { 0, "supported" }, - { 0, NULL } -}; - - -static int -dissect_nr_rrc_T_pcellT312_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { - offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, - 1, NULL, FALSE, 0, NULL); - - return offset; -} - - -static const value_string nr_rrc_T_handoverIntraF_IAB_r16_vals[] = { - { 0, "supported" }, - { 0, NULL } -}; - - -static int -dissect_nr_rrc_T_handoverIntraF_IAB_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { - offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, - 1, NULL, FALSE, 0, NULL); - - return offset; -} - - -static const value_string nr_rrc_T_eutra_AutonomousGaps_r16_vals[] = { - { 0, "supported" }, - { 0, NULL } -}; - - -static int -dissect_nr_rrc_T_eutra_AutonomousGaps_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { - offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, - 1, NULL, FALSE, 0, NULL); - - return offset; -} - - -static const value_string nr_rrc_T_eutra_AutonomousGapsNEDC_r16_vals[] = { - { 0, "supported" }, - { 0, NULL } -}; - - -static int -dissect_nr_rrc_T_eutra_AutonomousGapsNEDC_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { - offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, - 1, NULL, FALSE, 0, NULL); - - return offset; -} - - -static const value_string nr_rrc_T_eutra_AutonomousGapsNRDC_r16_vals[] = { - { 0, "supported" }, - { 0, NULL } -}; - - -static int -dissect_nr_rrc_T_eutra_AutonomousGapsNRDC_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { - offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, - 1, NULL, FALSE, 0, NULL); - - return offset; -} - - -static const value_string nr_rrc_T_nr_AutonomousGaps_r16_vals[] = { - { 0, "supported" }, - { 0, NULL } -}; - - -static int -dissect_nr_rrc_T_nr_AutonomousGaps_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { - offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, - 1, NULL, FALSE, 0, NULL); - - return offset; -} - - -static const value_string nr_rrc_T_nr_AutonomousGaps_ENDC_r16_vals[] = { - { 0, "supported" }, - { 0, NULL } -}; - - -static int -dissect_nr_rrc_T_nr_AutonomousGaps_ENDC_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { - offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, - 1, NULL, FALSE, 0, NULL); - - return offset; -} - - -static const value_string nr_rrc_T_nr_AutonomousGapsNEDC_r16_vals[] = { - { 0, "supported" }, - { 0, NULL } -}; - - -static int -dissect_nr_rrc_T_nr_AutonomousGapsNEDC_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { - offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, - 1, NULL, FALSE, 0, NULL); - - return offset; -} - - -static const value_string nr_rrc_T_nr_AutonomousGapsNRDC_r16_vals[] = { - { 0, "supported" }, - { 0, NULL } -}; - - -static int -dissect_nr_rrc_T_nr_AutonomousGapsNRDC_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { - offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, - 1, NULL, FALSE, 0, NULL); - - return offset; -} - - static const value_string nr_rrc_T_handoverUTRA_FDD_r16_vals[] = { { 0, "supported" }, { 0, NULL } @@ -70903,16 +73665,6 @@ dissect_nr_rrc_T_handoverUTRA_FDD_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ct static const per_sequence_t MeasAndMobParametersXDD_Diff_eag_3_sequence[] = { - { &hf_nr_rrc_condHandoverParametersXDD_Diff_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_condHandoverParametersXDD_Diff_r16 }, - { &hf_nr_rrc_pcellT312_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_pcellT312_r16 }, - { &hf_nr_rrc_handoverIntraF_IAB_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_handoverIntraF_IAB_r16 }, - { &hf_nr_rrc_eutra_AutonomousGaps_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_eutra_AutonomousGaps_r16 }, - { &hf_nr_rrc_eutra_AutonomousGapsNEDC_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_eutra_AutonomousGapsNEDC_r16 }, - { &hf_nr_rrc_eutra_AutonomousGapsNRDC_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_eutra_AutonomousGapsNRDC_r16 }, - { &hf_nr_rrc_nr_AutonomousGaps_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_nr_AutonomousGaps_r16 }, - { &hf_nr_rrc_nr_AutonomousGaps_ENDC_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_nr_AutonomousGaps_ENDC_r16 }, - { &hf_nr_rrc_nr_AutonomousGapsNEDC_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_nr_AutonomousGapsNEDC_r16 }, - { &hf_nr_rrc_nr_AutonomousGapsNRDC_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_nr_AutonomousGapsNRDC_r16 }, { &hf_nr_rrc_handoverUTRA_FDD_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_handoverUTRA_FDD_r16 }, { NULL, 0, 0, NULL } }; @@ -71137,44 +73889,14 @@ dissect_nr_rrc_MeasAndMobParametersFRX_Diff_eag_3(tvbuff_t *tvb _U_, int offset } -static const value_string nr_rrc_T_nr_AutonomousGaps_r16_01_vals[] = { - { 0, "supported" }, - { 0, NULL } -}; - - -static int -dissect_nr_rrc_T_nr_AutonomousGaps_r16_01(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { - offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, - 1, NULL, FALSE, 0, NULL); - - return offset; -} - - -static const value_string nr_rrc_T_nr_AutonomousGaps_ENDC_r16_01_vals[] = { - { 0, "supported" }, - { 0, NULL } -}; - - -static int -dissect_nr_rrc_T_nr_AutonomousGaps_ENDC_r16_01(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { - offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, - 1, NULL, FALSE, 0, NULL); - - return offset; -} - - -static const value_string nr_rrc_T_handoverUTRA_FDD_r16_01_vals[] = { +static const value_string nr_rrc_T_nr_AutonomousGaps_r16_vals[] = { { 0, "supported" }, { 0, NULL } }; static int -dissect_nr_rrc_T_handoverUTRA_FDD_r16_01(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { +dissect_nr_rrc_T_nr_AutonomousGaps_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, 1, NULL, FALSE, 0, NULL); @@ -71182,14 +73904,14 @@ dissect_nr_rrc_T_handoverUTRA_FDD_r16_01(tvbuff_t *tvb _U_, int offset _U_, asn1 } -static const value_string nr_rrc_T_cli_RSSI_Meas_r16_vals[] = { +static const value_string nr_rrc_T_nr_AutonomousGaps_ENDC_r16_vals[] = { { 0, "supported" }, { 0, NULL } }; static int -dissect_nr_rrc_T_cli_RSSI_Meas_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { +dissect_nr_rrc_T_nr_AutonomousGaps_ENDC_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, 1, NULL, FALSE, 0, NULL); @@ -71197,14 +73919,14 @@ dissect_nr_rrc_T_cli_RSSI_Meas_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t } -static const value_string nr_rrc_T_cli_SRS_RSRP_Meas_r16_vals[] = { +static const value_string nr_rrc_T_nr_AutonomousGaps_NEDC_r16_vals[] = { { 0, "supported" }, { 0, NULL } }; static int -dissect_nr_rrc_T_cli_SRS_RSRP_Meas_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { +dissect_nr_rrc_T_nr_AutonomousGaps_NEDC_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, 1, NULL, FALSE, 0, NULL); @@ -71212,14 +73934,14 @@ dissect_nr_rrc_T_cli_SRS_RSRP_Meas_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_c } -static const value_string nr_rrc_T_condHandover_r16_01_vals[] = { +static const value_string nr_rrc_T_nr_AutonomousGaps_NRDC_r16_vals[] = { { 0, "supported" }, { 0, NULL } }; static int -dissect_nr_rrc_T_condHandover_r16_01(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { +dissect_nr_rrc_T_nr_AutonomousGaps_NRDC_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, 1, NULL, FALSE, 0, NULL); @@ -71227,14 +73949,14 @@ dissect_nr_rrc_T_condHandover_r16_01(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx } -static const value_string nr_rrc_T_condHandoverFailure_r16_01_vals[] = { +static const value_string nr_rrc_T_handoverUTRA_FDD_r16_01_vals[] = { { 0, "supported" }, { 0, NULL } }; static int -dissect_nr_rrc_T_condHandoverFailure_r16_01(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { +dissect_nr_rrc_T_handoverUTRA_FDD_r16_01(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, 1, NULL, FALSE, 0, NULL); @@ -71242,14 +73964,14 @@ dissect_nr_rrc_T_condHandoverFailure_r16_01(tvbuff_t *tvb _U_, int offset _U_, a } -static const value_string nr_rrc_T_condHandoverTwoTriggerEvents_r16_01_vals[] = { +static const value_string nr_rrc_T_cli_RSSI_Meas_r16_vals[] = { { 0, "supported" }, { 0, NULL } }; static int -dissect_nr_rrc_T_condHandoverTwoTriggerEvents_r16_01(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { +dissect_nr_rrc_T_cli_RSSI_Meas_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, 1, NULL, FALSE, 0, NULL); @@ -71257,30 +73979,14 @@ dissect_nr_rrc_T_condHandoverTwoTriggerEvents_r16_01(tvbuff_t *tvb _U_, int offs } -static const per_sequence_t T_condHandoverParametersFRX_Diff_r16_sequence[] = { - { &hf_nr_rrc_condHandover_r16_01, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_condHandover_r16_01 }, - { &hf_nr_rrc_condHandoverFailure_r16_01, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_condHandoverFailure_r16_01 }, - { &hf_nr_rrc_condHandoverTwoTriggerEvents_r16_01, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_condHandoverTwoTriggerEvents_r16_01 }, - { NULL, 0, 0, NULL } -}; - -static int -dissect_nr_rrc_T_condHandoverParametersFRX_Diff_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { - offset = dissect_per_sequence(tvb, offset, actx, tree, hf_index, - ett_nr_rrc_T_condHandoverParametersFRX_Diff_r16, T_condHandoverParametersFRX_Diff_r16_sequence); - - return offset; -} - - -static const value_string nr_rrc_T_pcellT312_r16_01_vals[] = { +static const value_string nr_rrc_T_cli_SRS_RSRP_Meas_r16_vals[] = { { 0, "supported" }, { 0, NULL } }; static int -dissect_nr_rrc_T_pcellT312_r16_01(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { +dissect_nr_rrc_T_cli_SRS_RSRP_Meas_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, 1, NULL, FALSE, 0, NULL); @@ -71318,14 +74024,14 @@ dissect_nr_rrc_T_simultaneousRxDataSSB_DiffNumerology_Inter_r16(tvbuff_t *tvb _U } -static const value_string nr_rrc_T_handoverIntraF_IAB_r16_01_vals[] = { +static const value_string nr_rrc_T_idleInactiveNR_MeasReport_r16_vals[] = { { 0, "supported" }, { 0, NULL } }; static int -dissect_nr_rrc_T_handoverIntraF_IAB_r16_01(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { +dissect_nr_rrc_T_idleInactiveNR_MeasReport_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, 1, NULL, FALSE, 0, NULL); @@ -71333,14 +74039,14 @@ dissect_nr_rrc_T_handoverIntraF_IAB_r16_01(tvbuff_t *tvb _U_, int offset _U_, as } -static const value_string nr_rrc_T_idleInactiveNR_MeasReport_r16_vals[] = { +static const value_string nr_rrc_T_idleInactiveNR_MeasBeamReport_r16_vals[] = { { 0, "supported" }, { 0, NULL } }; static int -dissect_nr_rrc_T_idleInactiveNR_MeasReport_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { +dissect_nr_rrc_T_idleInactiveNR_MeasBeamReport_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, 1, NULL, FALSE, 0, NULL); @@ -71349,17 +74055,17 @@ dissect_nr_rrc_T_idleInactiveNR_MeasReport_r16(tvbuff_t *tvb _U_, int offset _U_ static const per_sequence_t MeasAndMobParametersFRX_Diff_eag_4_sequence[] = { - { &hf_nr_rrc_nr_AutonomousGaps_r16_01, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_nr_AutonomousGaps_r16_01 }, - { &hf_nr_rrc_nr_AutonomousGaps_ENDC_r16_01, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_nr_AutonomousGaps_ENDC_r16_01 }, + { &hf_nr_rrc_nr_AutonomousGaps_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_nr_AutonomousGaps_r16 }, + { &hf_nr_rrc_nr_AutonomousGaps_ENDC_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_nr_AutonomousGaps_ENDC_r16 }, + { &hf_nr_rrc_nr_AutonomousGaps_NEDC_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_nr_AutonomousGaps_NEDC_r16 }, + { &hf_nr_rrc_nr_AutonomousGaps_NRDC_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_nr_AutonomousGaps_NRDC_r16 }, { &hf_nr_rrc_handoverUTRA_FDD_r16_01, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_handoverUTRA_FDD_r16_01 }, { &hf_nr_rrc_cli_RSSI_Meas_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_cli_RSSI_Meas_r16 }, { &hf_nr_rrc_cli_SRS_RSRP_Meas_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_cli_SRS_RSRP_Meas_r16 }, - { &hf_nr_rrc_condHandoverParametersFRX_Diff_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_condHandoverParametersFRX_Diff_r16 }, - { &hf_nr_rrc_pcellT312_r16_01, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_pcellT312_r16_01 }, { &hf_nr_rrc_interFrequencyMeas_Nogap_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_interFrequencyMeas_Nogap_r16 }, { &hf_nr_rrc_simultaneousRxDataSSB_DiffNumerology_Inter_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_simultaneousRxDataSSB_DiffNumerology_Inter_r16 }, - { &hf_nr_rrc_handoverIntraF_IAB_r16_01, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_handoverIntraF_IAB_r16_01 }, { &hf_nr_rrc_idleInactiveNR_MeasReport_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_idleInactiveNR_MeasReport_r16 }, + { &hf_nr_rrc_idleInactiveNR_MeasBeamReport_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_idleInactiveNR_MeasBeamReport_r16 }, { NULL, 0, 0, NULL } }; @@ -71616,65 +74322,6 @@ dissect_nr_rrc_T_condPSCellChangeParametersCommon_r16(tvbuff_t *tvb _U_, int off } -static const per_sequence_t MeasAndMobParametersMRDC_Common_v1610_sequence[] = { - { &hf_nr_rrc_condPSCellChangeParametersCommon_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_condPSCellChangeParametersCommon_r16 }, - { NULL, 0, 0, NULL } -}; - -static int -dissect_nr_rrc_MeasAndMobParametersMRDC_Common_v1610(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { - offset = dissect_per_sequence(tvb, offset, actx, tree, hf_index, - ett_nr_rrc_MeasAndMobParametersMRDC_Common_v1610, MeasAndMobParametersMRDC_Common_v1610_sequence); - - return offset; -} - - -static const value_string nr_rrc_T_condPSCellChange_r16_vals[] = { - { 0, "supported" }, - { 0, NULL } -}; - - -static int -dissect_nr_rrc_T_condPSCellChange_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { - offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, - 1, NULL, FALSE, 0, NULL); - - return offset; -} - - -static const value_string nr_rrc_T_condPSCellChangeTwoTriggerEvents_r16_vals[] = { - { 0, "supported" }, - { 0, NULL } -}; - - -static int -dissect_nr_rrc_T_condPSCellChangeTwoTriggerEvents_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { - offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, - 1, NULL, FALSE, 0, NULL); - - return offset; -} - - -static const per_sequence_t T_condPSCellChangeParametersXDD_Diff_r16_sequence[] = { - { &hf_nr_rrc_condPSCellChange_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_condPSCellChange_r16 }, - { &hf_nr_rrc_condPSCellChangeTwoTriggerEvents_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_condPSCellChangeTwoTriggerEvents_r16 }, - { NULL, 0, 0, NULL } -}; - -static int -dissect_nr_rrc_T_condPSCellChangeParametersXDD_Diff_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { - offset = dissect_per_sequence(tvb, offset, actx, tree, hf_index, - ett_nr_rrc_T_condPSCellChangeParametersXDD_Diff_r16, T_condPSCellChangeParametersXDD_Diff_r16_sequence); - - return offset; -} - - static const value_string nr_rrc_T_pscellT312_r16_vals[] = { { 0, "supported" }, { 0, NULL } @@ -71690,91 +74337,16 @@ dissect_nr_rrc_T_pscellT312_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *a } -static const per_sequence_t MeasAndMobParametersMRDC_XDD_Diff_v1610_sequence[] = { - { &hf_nr_rrc_condPSCellChangeParametersXDD_Diff_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_condPSCellChangeParametersXDD_Diff_r16 }, +static const per_sequence_t MeasAndMobParametersMRDC_Common_v1610_sequence[] = { + { &hf_nr_rrc_condPSCellChangeParametersCommon_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_condPSCellChangeParametersCommon_r16 }, { &hf_nr_rrc_pscellT312_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_pscellT312_r16 }, { NULL, 0, 0, NULL } }; static int -dissect_nr_rrc_MeasAndMobParametersMRDC_XDD_Diff_v1610(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { - offset = dissect_per_sequence(tvb, offset, actx, tree, hf_index, - ett_nr_rrc_MeasAndMobParametersMRDC_XDD_Diff_v1610, MeasAndMobParametersMRDC_XDD_Diff_v1610_sequence); - - return offset; -} - - -static const value_string nr_rrc_T_condPSCellChange_r16_01_vals[] = { - { 0, "supported" }, - { 0, NULL } -}; - - -static int -dissect_nr_rrc_T_condPSCellChange_r16_01(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { - offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, - 1, NULL, FALSE, 0, NULL); - - return offset; -} - - -static const value_string nr_rrc_T_condPSCellChangeTwoTriggerEvents_r16_01_vals[] = { - { 0, "supported" }, - { 0, NULL } -}; - - -static int -dissect_nr_rrc_T_condPSCellChangeTwoTriggerEvents_r16_01(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { - offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, - 1, NULL, FALSE, 0, NULL); - - return offset; -} - - -static const per_sequence_t T_condPSCellChangeParametersFRX_Diff_r16_sequence[] = { - { &hf_nr_rrc_condPSCellChange_r16_01, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_condPSCellChange_r16_01 }, - { &hf_nr_rrc_condPSCellChangeTwoTriggerEvents_r16_01, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_condPSCellChangeTwoTriggerEvents_r16_01 }, - { NULL, 0, 0, NULL } -}; - -static int -dissect_nr_rrc_T_condPSCellChangeParametersFRX_Diff_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { - offset = dissect_per_sequence(tvb, offset, actx, tree, hf_index, - ett_nr_rrc_T_condPSCellChangeParametersFRX_Diff_r16, T_condPSCellChangeParametersFRX_Diff_r16_sequence); - - return offset; -} - - -static const value_string nr_rrc_T_pscellT312_r16_01_vals[] = { - { 0, "supported" }, - { 0, NULL } -}; - - -static int -dissect_nr_rrc_T_pscellT312_r16_01(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { - offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, - 1, NULL, FALSE, 0, NULL); - - return offset; -} - - -static const per_sequence_t MeasAndMobParametersMRDC_FRX_Diff_v1610_sequence[] = { - { &hf_nr_rrc_condPSCellChangeParametersFRX_Diff_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_condPSCellChangeParametersFRX_Diff_r16 }, - { &hf_nr_rrc_pscellT312_r16_01, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_pscellT312_r16_01 }, - { NULL, 0, 0, NULL } -}; - -static int -dissect_nr_rrc_MeasAndMobParametersMRDC_FRX_Diff_v1610(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { +dissect_nr_rrc_MeasAndMobParametersMRDC_Common_v1610(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { offset = dissect_per_sequence(tvb, offset, actx, tree, hf_index, - ett_nr_rrc_MeasAndMobParametersMRDC_FRX_Diff_v1610, MeasAndMobParametersMRDC_FRX_Diff_v1610_sequence); + ett_nr_rrc_MeasAndMobParametersMRDC_Common_v1610, MeasAndMobParametersMRDC_Common_v1610_sequence); return offset; } @@ -71797,8 +74369,6 @@ dissect_nr_rrc_T_interNR_MeasEUTRA_IAB_r16(tvbuff_t *tvb _U_, int offset _U_, as static const per_sequence_t MeasAndMobParametersMRDC_v1610_sequence[] = { { &hf_nr_rrc_measAndMobParametersMRDC_Common_v1610, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_MeasAndMobParametersMRDC_Common_v1610 }, - { &hf_nr_rrc_measAndMobParametersMRDC_XDD_Diff_v1610, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_MeasAndMobParametersMRDC_XDD_Diff_v1610 }, - { &hf_nr_rrc_measAndMobParametersMRDC_FRX_Diff_v1610, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_MeasAndMobParametersMRDC_FRX_Diff_v1610 }, { &hf_nr_rrc_interNR_MeasEUTRA_IAB_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_interNR_MeasEUTRA_IAB_r16 }, { NULL, 0, 0, NULL } }; @@ -72887,9 +75457,771 @@ dissect_nr_rrc_T_defaultQCL_TwoTCI_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_c } +static const value_string nr_rrc_T_simul_SpatialRelationUpdatePUCCHResGroup_r16_vals[] = { + { 0, "supported" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_simul_SpatialRelationUpdatePUCCHResGroup_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 1, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const value_string nr_rrc_T_maxNumberSCellBFR_r16_vals[] = { + { 0, "n1" }, + { 1, "n2" }, + { 2, "n4" }, + { 3, "n8" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_maxNumberSCellBFR_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 4, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const value_string nr_rrc_T_simultaneousReceptionDiffTypeD_r16_vals[] = { + { 0, "supported" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_simultaneousReceptionDiffTypeD_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 1, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const value_string nr_rrc_T_maxNumberSSB_CSIRS_OneTx_CMR_r16_vals[] = { + { 0, "n8" }, + { 1, "n16" }, + { 2, "n32" }, + { 3, "n64" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_maxNumberSSB_CSIRS_OneTx_CMR_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 4, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const value_string nr_rrc_T_maxNumberCSI_IM_NZP_IMR_res_r16_vals[] = { + { 0, "n8" }, + { 1, "n16" }, + { 2, "n32" }, + { 3, "n64" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_maxNumberCSI_IM_NZP_IMR_res_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 4, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const value_string nr_rrc_T_maxNumberCSIRS_2Tx_res_r16_vals[] = { + { 0, "n0" }, + { 1, "n4" }, + { 2, "n8" }, + { 3, "n16" }, + { 4, "n32" }, + { 5, "n64" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_maxNumberCSIRS_2Tx_res_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 6, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const value_string nr_rrc_T_maxNumberSSB_CSIRS_res_r16_vals[] = { + { 0, "n8" }, + { 1, "n16" }, + { 2, "n32" }, + { 3, "n64" }, + { 4, "n128" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_maxNumberSSB_CSIRS_res_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 5, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const value_string nr_rrc_T_maxNumberCSI_IM_NZP_IMR_res_mem_r16_vals[] = { + { 0, "n8" }, + { 1, "n16" }, + { 2, "n32" }, + { 3, "n64" }, + { 4, "n128" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_maxNumberCSI_IM_NZP_IMR_res_mem_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 5, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const value_string nr_rrc_T_supportedCSI_RS_Density_CMR_r16_vals[] = { + { 0, "one" }, + { 1, "three" }, + { 2, "oneAndThree" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_supportedCSI_RS_Density_CMR_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 3, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const value_string nr_rrc_T_maxNumberAperiodicCSI_RS_Res_r16_vals[] = { + { 0, "n2" }, + { 1, "n4" }, + { 2, "n8" }, + { 3, "n16" }, + { 4, "n32" }, + { 5, "n64" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_maxNumberAperiodicCSI_RS_Res_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 6, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const value_string nr_rrc_T_supportedSNIR_meas_r16_vals[] = { + { 0, "ssbWithCSI-IM" }, + { 1, "ssbWithNZP-IMR" }, + { 2, "csirsWithNZP-IMR" }, + { 3, "csi-RSWithoutIMR" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_supportedSNIR_meas_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 4, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const per_sequence_t T_ssb_csirs_SINR_measurement_r16_sequence[] = { + { &hf_nr_rrc_maxNumberSSB_CSIRS_OneTx_CMR_r16, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_T_maxNumberSSB_CSIRS_OneTx_CMR_r16 }, + { &hf_nr_rrc_maxNumberCSI_IM_NZP_IMR_res_r16, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_T_maxNumberCSI_IM_NZP_IMR_res_r16 }, + { &hf_nr_rrc_maxNumberCSIRS_2Tx_res_r16, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_T_maxNumberCSIRS_2Tx_res_r16 }, + { &hf_nr_rrc_maxNumberSSB_CSIRS_res_r16, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_T_maxNumberSSB_CSIRS_res_r16 }, + { &hf_nr_rrc_maxNumberCSI_IM_NZP_IMR_res_mem_r16, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_T_maxNumberCSI_IM_NZP_IMR_res_mem_r16 }, + { &hf_nr_rrc_supportedCSI_RS_Density_CMR_r16, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_T_supportedCSI_RS_Density_CMR_r16 }, + { &hf_nr_rrc_maxNumberAperiodicCSI_RS_Res_r16, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_T_maxNumberAperiodicCSI_RS_Res_r16 }, + { &hf_nr_rrc_supportedSNIR_meas_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_supportedSNIR_meas_r16 }, + { NULL, 0, 0, NULL } +}; + +static int +dissect_nr_rrc_T_ssb_csirs_SINR_measurement_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_sequence(tvb, offset, actx, tree, hf_index, + ett_nr_rrc_T_ssb_csirs_SINR_measurement_r16, T_ssb_csirs_SINR_measurement_r16_sequence); + + return offset; +} + + +static const value_string nr_rrc_T_nonGroupSINR_reporting_r16_vals[] = { + { 0, "n1" }, + { 1, "n2" }, + { 2, "n4" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_nonGroupSINR_reporting_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 3, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const value_string nr_rrc_T_groupSINR_reporting_r16_vals[] = { + { 0, "supported" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_groupSINR_reporting_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 1, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const value_string nr_rrc_T_overlapPDSCHsInTimePartiallyFreq_r16_vals[] = { + { 0, "supported" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_overlapPDSCHsInTimePartiallyFreq_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 1, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const value_string nr_rrc_T_supportPDCCH_ToPDSCH_r16_vals[] = { + { 0, "supported" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_supportPDCCH_ToPDSCH_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 1, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const value_string nr_rrc_T_supportPDSCH_ToHARQ_ACK_r16_vals[] = { + { 0, "supported" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_supportPDSCH_ToHARQ_ACK_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 1, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const per_sequence_t T_outOfOrderOperationDL_r16_sequence[] = { + { &hf_nr_rrc_supportPDCCH_ToPDSCH_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_supportPDCCH_ToPDSCH_r16 }, + { &hf_nr_rrc_supportPDSCH_ToHARQ_ACK_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_supportPDSCH_ToHARQ_ACK_r16 }, + { NULL, 0, 0, NULL } +}; + +static int +dissect_nr_rrc_T_outOfOrderOperationDL_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_sequence(tvb, offset, actx, tree, hf_index, + ett_nr_rrc_T_outOfOrderOperationDL_r16, T_outOfOrderOperationDL_r16_sequence); + + return offset; +} + + +static const value_string nr_rrc_T_outOfOrderOperationUL_r16_vals[] = { + { 0, "supported" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_outOfOrderOperationUL_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 1, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const value_string nr_rrc_T_separateCRS_RateMatching_r16_vals[] = { + { 0, "supported" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_separateCRS_RateMatching_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 1, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const value_string nr_rrc_T_defaultQCL_PerCORESETPoolIndex_r16_vals[] = { + { 0, "supported" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_defaultQCL_PerCORESETPoolIndex_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 1, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const value_string nr_rrc_T_maxNumberPerCORESET_Pool_r16_vals[] = { + { 0, "n1" }, + { 1, "n2" }, + { 2, "n4" }, + { 3, "n8" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_maxNumberPerCORESET_Pool_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 4, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const value_string nr_rrc_T_maxTotalNumberAcrossCORESET_Pool_r16_vals[] = { + { 0, "n2" }, + { 1, "n4" }, + { 2, "n8" }, + { 3, "n16" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_maxTotalNumberAcrossCORESET_Pool_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 4, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const per_sequence_t T_maxNumberActivatedTCI_States_r16_sequence[] = { + { &hf_nr_rrc_maxNumberPerCORESET_Pool_r16, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_T_maxNumberPerCORESET_Pool_r16 }, + { &hf_nr_rrc_maxTotalNumberAcrossCORESET_Pool_r16, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_T_maxTotalNumberAcrossCORESET_Pool_r16 }, + { NULL, 0, 0, NULL } +}; + +static int +dissect_nr_rrc_T_maxNumberActivatedTCI_States_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_sequence(tvb, offset, actx, tree, hf_index, + ett_nr_rrc_T_maxNumberActivatedTCI_States_r16, T_maxNumberActivatedTCI_States_r16_sequence); + + return offset; +} + + +static const per_sequence_t T_multiDCI_multiTRP_Parameters_r16_sequence[] = { + { &hf_nr_rrc_overlapPDSCHsFullyFreqTime_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_INTEGER_1_2 }, + { &hf_nr_rrc_overlapPDSCHsInTimePartiallyFreq_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_overlapPDSCHsInTimePartiallyFreq_r16 }, + { &hf_nr_rrc_outOfOrderOperationDL_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_outOfOrderOperationDL_r16 }, + { &hf_nr_rrc_outOfOrderOperationUL_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_outOfOrderOperationUL_r16 }, + { &hf_nr_rrc_separateCRS_RateMatching_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_separateCRS_RateMatching_r16 }, + { &hf_nr_rrc_defaultQCL_PerCORESETPoolIndex_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_defaultQCL_PerCORESETPoolIndex_r16 }, + { &hf_nr_rrc_maxNumberActivatedTCI_States_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_maxNumberActivatedTCI_States_r16 }, + { NULL, 0, 0, NULL } +}; + +static int +dissect_nr_rrc_T_multiDCI_multiTRP_Parameters_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_sequence(tvb, offset, actx, tree, hf_index, + ett_nr_rrc_T_multiDCI_multiTRP_Parameters_r16, T_multiDCI_multiTRP_Parameters_r16_sequence); + + return offset; +} + + +static const value_string nr_rrc_T_supportNewDMRS_Port_r16_vals[] = { + { 0, "n0" }, + { 1, "n2" }, + { 2, "n3" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_supportNewDMRS_Port_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 3, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const value_string nr_rrc_T_supportTwoPortDL_PTRS_r16_vals[] = { + { 0, "supported" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_supportTwoPortDL_PTRS_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 1, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const per_sequence_t T_singleDCI_SDM_scheme_Parameters_r16_sequence[] = { + { &hf_nr_rrc_supportNewDMRS_Port_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_supportNewDMRS_Port_r16 }, + { &hf_nr_rrc_supportTwoPortDL_PTRS_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_supportTwoPortDL_PTRS_r16 }, + { NULL, 0, 0, NULL } +}; + +static int +dissect_nr_rrc_T_singleDCI_SDM_scheme_Parameters_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_sequence(tvb, offset, actx, tree, hf_index, + ett_nr_rrc_T_singleDCI_SDM_scheme_Parameters_r16, T_singleDCI_SDM_scheme_Parameters_r16_sequence); + + return offset; +} + + +static const value_string nr_rrc_T_supportFDM_SchemeA_r16_vals[] = { + { 0, "supported" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_supportFDM_SchemeA_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 1, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const value_string nr_rrc_T_supportCodeWordSoftCombining_r16_vals[] = { + { 0, "supported" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_supportCodeWordSoftCombining_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 1, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const value_string nr_rrc_T_supportTDM_SchemeA_r16_vals[] = { + { 0, "kb3" }, + { 1, "kb5" }, + { 2, "kb10" }, + { 3, "kb20" }, + { 4, "noRestriction" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_supportTDM_SchemeA_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 5, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const value_string nr_rrc_T_supportRepNumPDSCH_TDRA_r16_vals[] = { + { 0, "n2" }, + { 1, "n3" }, + { 2, "n4" }, + { 3, "n5" }, + { 4, "n6" }, + { 5, "n7" }, + { 6, "n8" }, + { 7, "n16" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_supportRepNumPDSCH_TDRA_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 8, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const value_string nr_rrc_T_maxTBS_Size_r16_vals[] = { + { 0, "kb3" }, + { 1, "kb5" }, + { 2, "kb10" }, + { 3, "kb20" }, + { 4, "noRestriction" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_maxTBS_Size_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 5, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const per_sequence_t T_supportInter_slotTDM_r16_sequence[] = { + { &hf_nr_rrc_supportRepNumPDSCH_TDRA_r16, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_T_supportRepNumPDSCH_TDRA_r16 }, + { &hf_nr_rrc_maxTBS_Size_r16, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_T_maxTBS_Size_r16 }, + { &hf_nr_rrc_maxNumberTCI_states_r16, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_INTEGER_1_2 }, + { NULL, 0, 0, NULL } +}; + +static int +dissect_nr_rrc_T_supportInter_slotTDM_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_sequence(tvb, offset, actx, tree, hf_index, + ett_nr_rrc_T_supportInter_slotTDM_r16, T_supportInter_slotTDM_r16_sequence); + + return offset; +} + + +static const value_string nr_rrc_T_lowPAPR_DMRS_PDSCH_r16_vals[] = { + { 0, "supported" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_lowPAPR_DMRS_PDSCH_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 1, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const value_string nr_rrc_T_lowPAPR_DMRS_PUSCHwithoutPrecoding_r16_vals[] = { + { 0, "supported" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_lowPAPR_DMRS_PUSCHwithoutPrecoding_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 1, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const value_string nr_rrc_T_lowPAPR_DMRS_PUCCH_r16_vals[] = { + { 0, "supported" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_lowPAPR_DMRS_PUCCH_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 1, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const value_string nr_rrc_T_lowPAPR_DMRS_PUSCHwithPrecoding_r16_vals[] = { + { 0, "supported" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_lowPAPR_DMRS_PUSCHwithPrecoding_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 1, NULL, FALSE, 0, NULL); + + return offset; +} + + + +static int +dissect_nr_rrc_INTEGER_5_8(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_constrained_integer(tvb, offset, actx, tree, hf_index, + 5U, 8U, NULL, FALSE); + + return offset; +} + + +static const per_sequence_t CSI_ReportFrameworkExt_r16_sequence[] = { + { &hf_nr_rrc_maxNumberAperiodicCSI_PerBWP_ForCSI_ReportExt_r16, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_INTEGER_5_8 }, + { NULL, 0, 0, NULL } +}; + +static int +dissect_nr_rrc_CSI_ReportFrameworkExt_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_sequence(tvb, offset, actx, tree, hf_index, + ett_nr_rrc_CSI_ReportFrameworkExt_r16, CSI_ReportFrameworkExt_r16_sequence); + + return offset; +} + + +static const value_string nr_rrc_T_beamCorrespondenceSSB_based_r16_vals[] = { + { 0, "supported" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_beamCorrespondenceSSB_based_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 1, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const value_string nr_rrc_T_beamCorrespondenceCSI_RS_based_r16_vals[] = { + { 0, "supported" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_beamCorrespondenceCSI_RS_based_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 1, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const value_string nr_rrc_T_scs_60kHz_r16_01_vals[] = { + { 0, "sym224" }, + { 1, "sym336" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_scs_60kHz_r16_01(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 2, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const value_string nr_rrc_T_scs_120kHz_r16_01_vals[] = { + { 0, "sym224" }, + { 1, "sym336" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_scs_120kHz_r16_01(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 2, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const per_sequence_t T_beamSwitchTiming_r16_sequence[] = { + { &hf_nr_rrc_scs_60kHz_r16_01, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_scs_60kHz_r16_01 }, + { &hf_nr_rrc_scs_120kHz_r16_01, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_scs_120kHz_r16_01 }, + { NULL, 0, 0, NULL } +}; + +static int +dissect_nr_rrc_T_beamSwitchTiming_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_sequence(tvb, offset, actx, tree, hf_index, + ett_nr_rrc_T_beamSwitchTiming_r16, T_beamSwitchTiming_r16_sequence); + + return offset; +} + + static const per_sequence_t MIMO_ParametersPerBand_eag_2_sequence[] = { { &hf_nr_rrc_defaultQCL_TwoTCI_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_defaultQCL_TwoTCI_r16 }, { &hf_nr_rrc_codebookParametersPerBand_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_CodebookParameters_v1610 }, + { &hf_nr_rrc_simul_SpatialRelationUpdatePUCCHResGroup_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_simul_SpatialRelationUpdatePUCCHResGroup_r16 }, + { &hf_nr_rrc_maxNumberSCellBFR_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_maxNumberSCellBFR_r16 }, + { &hf_nr_rrc_simultaneousReceptionDiffTypeD_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_simultaneousReceptionDiffTypeD_r16 }, + { &hf_nr_rrc_ssb_csirs_SINR_measurement_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_ssb_csirs_SINR_measurement_r16 }, + { &hf_nr_rrc_nonGroupSINR_reporting_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_nonGroupSINR_reporting_r16 }, + { &hf_nr_rrc_groupSINR_reporting_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_groupSINR_reporting_r16 }, + { &hf_nr_rrc_multiDCI_multiTRP_Parameters_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_multiDCI_multiTRP_Parameters_r16 }, + { &hf_nr_rrc_singleDCI_SDM_scheme_Parameters_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_singleDCI_SDM_scheme_Parameters_r16 }, + { &hf_nr_rrc_supportFDM_SchemeA_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_supportFDM_SchemeA_r16 }, + { &hf_nr_rrc_supportCodeWordSoftCombining_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_supportCodeWordSoftCombining_r16 }, + { &hf_nr_rrc_supportTDM_SchemeA_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_supportTDM_SchemeA_r16 }, + { &hf_nr_rrc_supportInter_slotTDM_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_supportInter_slotTDM_r16 }, + { &hf_nr_rrc_lowPAPR_DMRS_PDSCH_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_lowPAPR_DMRS_PDSCH_r16 }, + { &hf_nr_rrc_lowPAPR_DMRS_PUSCHwithoutPrecoding_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_lowPAPR_DMRS_PUSCHwithoutPrecoding_r16 }, + { &hf_nr_rrc_lowPAPR_DMRS_PUCCH_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_lowPAPR_DMRS_PUCCH_r16 }, + { &hf_nr_rrc_lowPAPR_DMRS_PUSCHwithPrecoding_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_lowPAPR_DMRS_PUSCHwithPrecoding_r16 }, + { &hf_nr_rrc_csi_ReportFrameworkExt_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_CSI_ReportFrameworkExt_r16 }, + { &hf_nr_rrc_codebookParametersAddition_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_CodebookParametersAddition_r16 }, + { &hf_nr_rrc_codebookComboParametersAddition_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_CodebookComboParametersAddition_r16 }, + { &hf_nr_rrc_beamCorrespondenceSSB_based_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_beamCorrespondenceSSB_based_r16 }, + { &hf_nr_rrc_beamCorrespondenceCSI_RS_based_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_beamCorrespondenceCSI_RS_based_r16 }, + { &hf_nr_rrc_beamSwitchTiming_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_beamSwitchTiming_r16 }, { NULL, 0, 0, NULL } }; @@ -74466,14 +77798,14 @@ dissect_nr_rrc_T_harqACK_CB_SpatialBundlingPUCCH_Group_r16(tvbuff_t *tvb _U_, in } -static const value_string nr_rrc_T_licensedBand_r16_vals[] = { +static const value_string nr_rrc_T_non_SharedSpectrumChAccess_r16_vals[] = { { 0, "supported" }, { 0, NULL } }; static int -dissect_nr_rrc_T_licensedBand_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { +dissect_nr_rrc_T_non_SharedSpectrumChAccess_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, 1, NULL, FALSE, 0, NULL); @@ -74481,14 +77813,14 @@ dissect_nr_rrc_T_licensedBand_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t } -static const value_string nr_rrc_T_unlicensedBand_r16_vals[] = { +static const value_string nr_rrc_T_sharedSpectrumChAccess_r16_vals[] = { { 0, "supported" }, { 0, NULL } }; static int -dissect_nr_rrc_T_unlicensedBand_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { +dissect_nr_rrc_T_sharedSpectrumChAccess_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, 1, NULL, FALSE, 0, NULL); @@ -74497,8 +77829,8 @@ dissect_nr_rrc_T_unlicensedBand_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_ static const per_sequence_t T_crossSlotScheduling_r16_sequence[] = { - { &hf_nr_rrc_licensedBand_r16_01, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_licensedBand_r16 }, - { &hf_nr_rrc_unlicensedBand_r16_01, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_unlicensedBand_r16 }, + { &hf_nr_rrc_non_SharedSpectrumChAccess_r16_01, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_non_SharedSpectrumChAccess_r16 }, + { &hf_nr_rrc_sharedSpectrumChAccess_r16_01, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_sharedSpectrumChAccess_r16 }, { NULL, 0, 0, NULL } }; @@ -74529,34 +77861,29 @@ dissect_nr_rrc_T_maxNumberSRS_PosPathLossEstimateAllServingCells_r16(tvbuff_t *t } -static const value_string nr_rrc_T_maxNumberSRS_PosSpatialRelationsAllServingCells_r16_vals[] = { - { 0, "n0" }, - { 1, "n1" }, - { 2, "n2" }, - { 3, "n4" }, - { 4, "n8" }, - { 5, "n16" }, +static const value_string nr_rrc_T_extendedCG_Periodicities_r16_vals[] = { + { 0, "supported" }, { 0, NULL } }; static int -dissect_nr_rrc_T_maxNumberSRS_PosSpatialRelationsAllServingCells_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { +dissect_nr_rrc_T_extendedCG_Periodicities_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, - 6, NULL, FALSE, 0, NULL); + 1, NULL, FALSE, 0, NULL); return offset; } -static const value_string nr_rrc_T_extendedCG_Periodicities_r16_vals[] = { +static const value_string nr_rrc_T_extendedSPS_Periodicities_r16_vals[] = { { 0, "supported" }, { 0, NULL } }; static int -dissect_nr_rrc_T_extendedCG_Periodicities_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { +dissect_nr_rrc_T_extendedSPS_Periodicities_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, 1, NULL, FALSE, 0, NULL); @@ -74564,14 +77891,219 @@ dissect_nr_rrc_T_extendedCG_Periodicities_r16(tvbuff_t *tvb _U_, int offset _U_, } -static const value_string nr_rrc_T_extendedSPS_Periodicities_r16_vals[] = { +static const value_string nr_rrc_T_sharedSpectrumChAccess_r16_01_vals[] = { { 0, "supported" }, { 0, NULL } }; static int -dissect_nr_rrc_T_extendedSPS_Periodicities_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { +dissect_nr_rrc_T_sharedSpectrumChAccess_r16_01(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 1, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const value_string nr_rrc_T_non_SharedSpectrumChAccess_r16_01_vals[] = { + { 0, "supported" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_non_SharedSpectrumChAccess_r16_01(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 1, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const per_sequence_t T_pusch_RepetitionTypeA_r16_sequence[] = { + { &hf_nr_rrc_sharedSpectrumChAccess_r16_02, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_sharedSpectrumChAccess_r16_01 }, + { &hf_nr_rrc_non_SharedSpectrumChAccess_r16_02, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_non_SharedSpectrumChAccess_r16_01 }, + { NULL, 0, 0, NULL } +}; + +static int +dissect_nr_rrc_T_pusch_RepetitionTypeA_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_sequence(tvb, offset, actx, tree, hf_index, + ett_nr_rrc_T_pusch_RepetitionTypeA_r16, T_pusch_RepetitionTypeA_r16_sequence); + + return offset; +} + + +static const value_string nr_rrc_T_dci_DL_PriorityIndicator_r16_vals[] = { + { 0, "supported" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_dci_DL_PriorityIndicator_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 1, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const value_string nr_rrc_T_dci_UL_PriorityIndicator_r16_vals[] = { + { 0, "supported" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_dci_UL_PriorityIndicator_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 1, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const value_string nr_rrc_T_maxNumberPathlossRS_Update_r16_vals[] = { + { 0, "n4" }, + { 1, "n8" }, + { 2, "n16" }, + { 3, "n32" }, + { 4, "n64" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_maxNumberPathlossRS_Update_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 5, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const value_string nr_rrc_T_type2_HARQ_ACK_Codebook_r16_vals[] = { + { 0, "supported" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_type2_HARQ_ACK_Codebook_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 1, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const value_string nr_rrc_T_maxNumberResWithinSlotAcrossCC_AcrossFR_r16_vals[] = { + { 0, "n2" }, + { 1, "n4" }, + { 2, "n8" }, + { 3, "n12" }, + { 4, "n16" }, + { 5, "n32" }, + { 6, "n64" }, + { 7, "n128" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_maxNumberResWithinSlotAcrossCC_AcrossFR_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 8, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const value_string nr_rrc_T_maxNumberResAcrossCC_AcrossFR_r16_vals[] = { + { 0, "n2" }, + { 1, "n4" }, + { 2, "n8" }, + { 3, "n12" }, + { 4, "n16" }, + { 5, "n32" }, + { 6, "n40" }, + { 7, "n48" }, + { 8, "n64" }, + { 9, "n72" }, + { 10, "n80" }, + { 11, "n96" }, + { 12, "n128" }, + { 13, "n256" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_maxNumberResAcrossCC_AcrossFR_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 14, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const per_sequence_t T_maxTotalResourcesForAcrossFreqRanges_r16_sequence[] = { + { &hf_nr_rrc_maxNumberResWithinSlotAcrossCC_AcrossFR_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_maxNumberResWithinSlotAcrossCC_AcrossFR_r16 }, + { &hf_nr_rrc_maxNumberResAcrossCC_AcrossFR_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_maxNumberResAcrossCC_AcrossFR_r16 }, + { NULL, 0, 0, NULL } +}; + +static int +dissect_nr_rrc_T_maxTotalResourcesForAcrossFreqRanges_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_sequence(tvb, offset, actx, tree, hf_index, + ett_nr_rrc_T_maxTotalResourcesForAcrossFreqRanges_r16, T_maxTotalResourcesForAcrossFreqRanges_r16_sequence); + + return offset; +} + + +static const value_string nr_rrc_T_maxNumberLongPUCCHs_r16_vals[] = { + { 0, "longAndLong" }, + { 1, "longAndShort" }, + { 2, "shortAndShort" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_maxNumberLongPUCCHs_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 3, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const per_sequence_t T_harqACK_separateMultiDCI_MultiTRP_r16_sequence[] = { + { &hf_nr_rrc_maxNumberLongPUCCHs_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_maxNumberLongPUCCHs_r16 }, + { NULL, 0, 0, NULL } +}; + +static int +dissect_nr_rrc_T_harqACK_separateMultiDCI_MultiTRP_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_sequence(tvb, offset, actx, tree, hf_index, + ett_nr_rrc_T_harqACK_separateMultiDCI_MultiTRP_r16, T_harqACK_separateMultiDCI_MultiTRP_r16_sequence); + + return offset; +} + + +static const value_string nr_rrc_T_harqACK_jointMultiDCI_MultiTRP_r16_vals[] = { + { 0, "supported" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_harqACK_jointMultiDCI_MultiTRP_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, 1, NULL, FALSE, 0, NULL); @@ -74579,6 +78111,62 @@ dissect_nr_rrc_T_extendedSPS_Periodicities_r16(tvbuff_t *tvb _U_, int offset _U_ } +static const value_string nr_rrc_T_type1_r16_vals[] = { + { 0, "us100" }, + { 1, "us200" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_type1_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 2, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const value_string nr_rrc_T_type2_r16_01_vals[] = { + { 0, "us200" }, + { 1, "us400" }, + { 2, "us800" }, + { 3, "us1000" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_type2_r16_01(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 4, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const value_string nr_rrc_T_bwp_SwitchingMultiCCs_r16_vals[] = { + { 0, "type1-r16" }, + { 1, "type2-r16" }, + { 0, NULL } +}; + +static const per_choice_t T_bwp_SwitchingMultiCCs_r16_choice[] = { + { 0, &hf_nr_rrc_type1_r16 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_T_type1_r16 }, + { 1, &hf_nr_rrc_type2_r16_01 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_T_type2_r16_01 }, + { 0, NULL, 0, NULL } +}; + +static int +dissect_nr_rrc_T_bwp_SwitchingMultiCCs_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_choice(tvb, offset, actx, tree, hf_index, + ett_nr_rrc_T_bwp_SwitchingMultiCCs_r16, T_bwp_SwitchingMultiCCs_r16_choice, + NULL); + + return offset; +} + + static const per_sequence_t Phy_ParametersCommon_eag_4_sequence[] = { { &hf_nr_rrc_twoStepRACH_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_twoStepRACH_r16 }, { &hf_nr_rrc_dci_Format1_2And0_2_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_dci_Format1_2And0_2_r16 }, @@ -74599,10 +78187,18 @@ static const per_sequence_t Phy_ParametersCommon_eag_4_sequence[] = { { &hf_nr_rrc_harqACK_CB_SpatialBundlingPUCCH_Group_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_harqACK_CB_SpatialBundlingPUCCH_Group_r16 }, { &hf_nr_rrc_crossSlotScheduling_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_crossSlotScheduling_r16 }, { &hf_nr_rrc_maxNumberSRS_PosPathLossEstimateAllServingCells_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_maxNumberSRS_PosPathLossEstimateAllServingCells_r16 }, - { &hf_nr_rrc_maxNumberSRS_PosSpatialRelationsAllServingCells_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_maxNumberSRS_PosSpatialRelationsAllServingCells_r16 }, { &hf_nr_rrc_extendedCG_Periodicities_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_extendedCG_Periodicities_r16 }, { &hf_nr_rrc_extendedSPS_Periodicities_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_extendedSPS_Periodicities_r16 }, { &hf_nr_rrc_codebookVariantsList_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_CodebookVariantsList_r16 }, + { &hf_nr_rrc_pusch_RepetitionTypeA_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_pusch_RepetitionTypeA_r16 }, + { &hf_nr_rrc_dci_DL_PriorityIndicator_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_dci_DL_PriorityIndicator_r16 }, + { &hf_nr_rrc_dci_UL_PriorityIndicator_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_dci_UL_PriorityIndicator_r16 }, + { &hf_nr_rrc_maxNumberPathlossRS_Update_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_maxNumberPathlossRS_Update_r16 }, + { &hf_nr_rrc_type2_HARQ_ACK_Codebook_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_type2_HARQ_ACK_Codebook_r16 }, + { &hf_nr_rrc_maxTotalResourcesForAcrossFreqRanges_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_maxTotalResourcesForAcrossFreqRanges_r16 }, + { &hf_nr_rrc_harqACK_separateMultiDCI_MultiTRP_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_harqACK_separateMultiDCI_MultiTRP_r16 }, + { &hf_nr_rrc_harqACK_jointMultiDCI_MultiTRP_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_harqACK_jointMultiDCI_MultiTRP_r16 }, + { &hf_nr_rrc_bwp_SwitchingMultiCCs_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_bwp_SwitchingMultiCCs_r16 }, { NULL, 0, 0, NULL } }; @@ -75621,14 +79217,14 @@ dissect_nr_rrc_T_simultaneousSpatialRelationMultipleCC_r16(tvbuff_t *tvb _U_, in } -static const value_string nr_rrc_T_defaultSpatialRelationPathlossRS_r16_vals[] = { +static const value_string nr_rrc_T_cli_RSSI_FDM_DL_r16_vals[] = { { 0, "supported" }, { 0, NULL } }; static int -dissect_nr_rrc_T_defaultSpatialRelationPathlossRS_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { +dissect_nr_rrc_T_cli_RSSI_FDM_DL_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, 1, NULL, FALSE, 0, NULL); @@ -75636,14 +79232,14 @@ dissect_nr_rrc_T_defaultSpatialRelationPathlossRS_r16(tvbuff_t *tvb _U_, int off } -static const value_string nr_rrc_T_spatialRelationUpdateAP_SRS_r16_vals[] = { +static const value_string nr_rrc_T_cli_SRS_RSRP_FDM_DL_r16_vals[] = { { 0, "supported" }, { 0, NULL } }; static int -dissect_nr_rrc_T_spatialRelationUpdateAP_SRS_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { +dissect_nr_rrc_T_cli_SRS_RSRP_FDM_DL_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, 1, NULL, FALSE, 0, NULL); @@ -75651,14 +79247,14 @@ dissect_nr_rrc_T_spatialRelationUpdateAP_SRS_r16(tvbuff_t *tvb _U_, int offset _ } -static const value_string nr_rrc_T_cli_RSSI_FDM_DL_r16_vals[] = { +static const value_string nr_rrc_T_maxLayersMIMO_Adaptation_r16_vals[] = { { 0, "supported" }, { 0, NULL } }; static int -dissect_nr_rrc_T_cli_RSSI_FDM_DL_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { +dissect_nr_rrc_T_maxLayersMIMO_Adaptation_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, 1, NULL, FALSE, 0, NULL); @@ -75666,14 +79262,14 @@ dissect_nr_rrc_T_cli_RSSI_FDM_DL_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx } -static const value_string nr_rrc_T_cli_SRS_RSRP_FDM_DL_r16_vals[] = { +static const value_string nr_rrc_T_aggregationFactorSPS_DL_r16_vals[] = { { 0, "supported" }, { 0, NULL } }; static int -dissect_nr_rrc_T_cli_SRS_RSRP_FDM_DL_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { +dissect_nr_rrc_T_aggregationFactorSPS_DL_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, 1, NULL, FALSE, 0, NULL); @@ -75681,16 +79277,66 @@ dissect_nr_rrc_T_cli_SRS_RSRP_FDM_DL_r16(tvbuff_t *tvb _U_, int offset _U_, asn1 } -static const value_string nr_rrc_T_maxLayersMIMO_Adaptation_r16_vals[] = { - { 0, "supported" }, +static const value_string nr_rrc_T_maxNumberResWithinSlotAcrossCC_OneFR_r16_vals[] = { + { 0, "n2" }, + { 1, "n4" }, + { 2, "n8" }, + { 3, "n12" }, + { 4, "n16" }, + { 5, "n32" }, + { 6, "n64" }, + { 7, "n128" }, { 0, NULL } }; static int -dissect_nr_rrc_T_maxLayersMIMO_Adaptation_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { +dissect_nr_rrc_T_maxNumberResWithinSlotAcrossCC_OneFR_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, - 1, NULL, FALSE, 0, NULL); + 8, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const value_string nr_rrc_T_maxNumberResAcrossCC_OneFR_r16_vals[] = { + { 0, "n2" }, + { 1, "n4" }, + { 2, "n8" }, + { 3, "n12" }, + { 4, "n16" }, + { 5, "n32" }, + { 6, "n40" }, + { 7, "n48" }, + { 8, "n64" }, + { 9, "n72" }, + { 10, "n80" }, + { 11, "n96" }, + { 12, "n128" }, + { 13, "n256" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_maxNumberResAcrossCC_OneFR_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 14, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const per_sequence_t T_maxTotalResourcesForOneFreqRange_r16_sequence[] = { + { &hf_nr_rrc_maxNumberResWithinSlotAcrossCC_OneFR_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_maxNumberResWithinSlotAcrossCC_OneFR_r16 }, + { &hf_nr_rrc_maxNumberResAcrossCC_OneFR_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_maxNumberResAcrossCC_OneFR_r16 }, + { NULL, 0, 0, NULL } +}; + +static int +dissect_nr_rrc_T_maxTotalResourcesForOneFreqRange_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_sequence(tvb, offset, actx, tree, hf_index, + ett_nr_rrc_T_maxTotalResourcesForOneFreqRange_r16, T_maxTotalResourcesForOneFreqRange_r16_sequence); return offset; } @@ -75701,11 +79347,12 @@ static const per_sequence_t Phy_ParametersFRX_Diff_eag_3_sequence[] = { { &hf_nr_rrc_enhancedPowerControl_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_enhancedPowerControl_r16 }, { &hf_nr_rrc_simultaneousTCI_ActMultipleCC_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_simultaneousTCI_ActMultipleCC_r16 }, { &hf_nr_rrc_simultaneousSpatialRelationMultipleCC_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_simultaneousSpatialRelationMultipleCC_r16 }, - { &hf_nr_rrc_defaultSpatialRelationPathlossRS_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_defaultSpatialRelationPathlossRS_r16 }, - { &hf_nr_rrc_spatialRelationUpdateAP_SRS_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_spatialRelationUpdateAP_SRS_r16 }, { &hf_nr_rrc_cli_RSSI_FDM_DL_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_cli_RSSI_FDM_DL_r16 }, { &hf_nr_rrc_cli_SRS_RSRP_FDM_DL_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_cli_SRS_RSRP_FDM_DL_r16 }, { &hf_nr_rrc_maxLayersMIMO_Adaptation_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_maxLayersMIMO_Adaptation_r16 }, + { &hf_nr_rrc_aggregationFactorSPS_DL_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_aggregationFactorSPS_DL_r16 }, + { &hf_nr_rrc_maxTotalResourcesForOneFreqRange_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_maxTotalResourcesForOneFreqRange_r16 }, + { &hf_nr_rrc_csi_ReportFrameworkExt_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_CSI_ReportFrameworkExt_r16 }, { NULL, 0, 0, NULL } }; @@ -75982,10 +79629,76 @@ dissect_nr_rrc_Phy_ParametersFR2_eag_1(tvbuff_t *tvb _U_, int offset _U_, asn1_c } +static const value_string nr_rrc_T_defaultSpatialRelationPathlossRS_r16_vals[] = { + { 0, "supported" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_defaultSpatialRelationPathlossRS_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 1, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const value_string nr_rrc_T_spatialRelationUpdateAP_SRS_r16_vals[] = { + { 0, "supported" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_spatialRelationUpdateAP_SRS_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 1, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const value_string nr_rrc_T_maxNumberSRS_PosSpatialRelationsAllServingCells_r16_vals[] = { + { 0, "n0" }, + { 1, "n1" }, + { 2, "n2" }, + { 3, "n4" }, + { 4, "n8" }, + { 5, "n16" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_maxNumberSRS_PosSpatialRelationsAllServingCells_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 6, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const per_sequence_t Phy_ParametersFR2_eag_2_sequence[] = { + { &hf_nr_rrc_defaultSpatialRelationPathlossRS_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_defaultSpatialRelationPathlossRS_r16 }, + { &hf_nr_rrc_spatialRelationUpdateAP_SRS_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_spatialRelationUpdateAP_SRS_r16 }, + { &hf_nr_rrc_maxNumberSRS_PosSpatialRelationsAllServingCells_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_maxNumberSRS_PosSpatialRelationsAllServingCells_r16 }, + { NULL, 0, 0, NULL } +}; + +static int +dissect_nr_rrc_Phy_ParametersFR2_eag_2(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_sequence_eag(tvb, offset, actx, tree, Phy_ParametersFR2_eag_2_sequence); + + return offset; +} + + static const per_sequence_t Phy_ParametersFR2_sequence[] = { { &hf_nr_rrc_dummy_12 , ASN1_EXTENSION_ROOT , ASN1_OPTIONAL , dissect_nr_rrc_T_dummy_08 }, { &hf_nr_rrc_pdsch_RE_MappingFR2_PerSymbol, ASN1_EXTENSION_ROOT , ASN1_OPTIONAL , dissect_nr_rrc_T_pdsch_RE_MappingFR2_PerSymbol }, { &dummy_hf_nr_rrc_eag_field, ASN1_NOT_EXTENSION_ROOT, ASN1_NOT_OPTIONAL, dissect_nr_rrc_Phy_ParametersFR2_eag_1 }, + { &dummy_hf_nr_rrc_eag_field, ASN1_NOT_EXTENSION_ROOT, ASN1_NOT_OPTIONAL, dissect_nr_rrc_Phy_ParametersFR2_eag_2 }, { NULL, 0, 0, NULL } }; @@ -76098,9 +79811,54 @@ dissect_nr_rrc_Phy_ParametersMRDC_eag_1(tvbuff_t *tvb _U_, int offset _U_, asn1_ } +static const value_string nr_rrc_T_tdd_PCellUL_TX_AllUL_Subframe_r16_vals[] = { + { 0, "supported" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_tdd_PCellUL_TX_AllUL_Subframe_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 1, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const value_string nr_rrc_T_fdd_PCellUL_TX_AllUL_Subframe_r16_vals[] = { + { 0, "supported" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_fdd_PCellUL_TX_AllUL_Subframe_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 1, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const per_sequence_t Phy_ParametersMRDC_eag_2_sequence[] = { + { &hf_nr_rrc_tdd_PCellUL_TX_AllUL_Subframe_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_tdd_PCellUL_TX_AllUL_Subframe_r16 }, + { &hf_nr_rrc_fdd_PCellUL_TX_AllUL_Subframe_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_fdd_PCellUL_TX_AllUL_Subframe_r16 }, + { NULL, 0, 0, NULL } +}; + +static int +dissect_nr_rrc_Phy_ParametersMRDC_eag_2(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_sequence_eag(tvb, offset, actx, tree, Phy_ParametersMRDC_eag_2_sequence); + + return offset; +} + + static const per_sequence_t Phy_ParametersMRDC_sequence[] = { { &hf_nr_rrc_naics_Capability_List, ASN1_EXTENSION_ROOT , ASN1_OPTIONAL , dissect_nr_rrc_SEQUENCE_SIZE_1_maxNrofNAICS_Entries_OF_NAICS_Capability_Entry }, { &dummy_hf_nr_rrc_eag_field, ASN1_NOT_EXTENSION_ROOT, ASN1_NOT_OPTIONAL, dissect_nr_rrc_Phy_ParametersMRDC_eag_1 }, + { &dummy_hf_nr_rrc_eag_field, ASN1_NOT_EXTENSION_ROOT, ASN1_NOT_OPTIONAL, dissect_nr_rrc_Phy_ParametersMRDC_eag_2 }, { NULL, 0, 0, NULL } }; @@ -76757,6 +80515,141 @@ dissect_nr_rrc_BandNR_eag_5(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx } +static const value_string nr_rrc_T_ul_DynamicChAccess_r16_vals[] = { + { 0, "supported" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_ul_DynamicChAccess_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 1, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const value_string nr_rrc_T_ul_Semi_StaticChAccess_r16_vals[] = { + { 0, "supported" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_ul_Semi_StaticChAccess_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 1, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const value_string nr_rrc_T_ssb_RRM_DynamicChAccess_r16_vals[] = { + { 0, "supported" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_ssb_RRM_DynamicChAccess_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 1, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const value_string nr_rrc_T_ssb_RRM_Semi_StaticChAccess_r16_vals[] = { + { 0, "supported" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_ssb_RRM_Semi_StaticChAccess_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 1, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const value_string nr_rrc_T_mib_Acquisition_r16_vals[] = { + { 0, "supported" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_mib_Acquisition_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 1, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const value_string nr_rrc_T_ssb_RLM_DynamicChAccess_r16_vals[] = { + { 0, "supported" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_ssb_RLM_DynamicChAccess_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 1, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const value_string nr_rrc_T_ssb_RLM_Semi_StaticChAccess_r16_vals[] = { + { 0, "supported" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_ssb_RLM_Semi_StaticChAccess_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 1, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const value_string nr_rrc_T_sib1_Acquisition_r16_vals[] = { + { 0, "supported" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_sib1_Acquisition_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 1, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const value_string nr_rrc_T_extendedRAR_Window_r16_vals[] = { + { 0, "supported" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_extendedRAR_Window_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 1, NULL, FALSE, 0, NULL); + + return offset; +} + + static const value_string nr_rrc_T_ssb_BFD_CBD_dynamicChannelAccess_r16_vals[] = { { 0, "supported" }, { 0, NULL } @@ -76802,6 +80695,21 @@ dissect_nr_rrc_T_csi_RS_BFD_CBD_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_ } +static const value_string nr_rrc_T_ul_ChannelBW_SCell_10mhz_r16_vals[] = { + { 0, "supported" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_ul_ChannelBW_SCell_10mhz_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 1, NULL, FALSE, 0, NULL); + + return offset; +} + + static const value_string nr_rrc_T_rssi_ChannelOccupancyReporting_r16_vals[] = { { 0, "supported" }, { 0, NULL } @@ -76877,6 +80785,51 @@ dissect_nr_rrc_T_configuredUL_Tx_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx } +static const value_string nr_rrc_T_prach_Wideband_r16_vals[] = { + { 0, "supported" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_prach_Wideband_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 1, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const value_string nr_rrc_T_dci_AvailableRB_Set_r16_vals[] = { + { 0, "supported" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_dci_AvailableRB_Set_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 1, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const value_string nr_rrc_T_dci_ChOccupancyDuration_r16_vals[] = { + { 0, "supported" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_dci_ChOccupancyDuration_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 1, NULL, FALSE, 0, NULL); + + return offset; +} + + static const value_string nr_rrc_T_typeB_PDSCH_length_r16_vals[] = { { 0, "supported" }, { 0, NULL } @@ -77012,14 +80965,29 @@ dissect_nr_rrc_T_csi_RS_RLM_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *a } -static const value_string nr_rrc_T_vcsi_RS_RRM_r16_vals[] = { +static const value_string nr_rrc_T_csi_RS_RRM_r16_vals[] = { + { 0, "supported" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_csi_RS_RRM_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 1, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const value_string nr_rrc_T_periodicAndSemi_PersistentCSI_RS_r16_vals[] = { { 0, "supported" }, { 0, NULL } }; static int -dissect_nr_rrc_T_vcsi_RS_RRM_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { +dissect_nr_rrc_T_periodicAndSemi_PersistentCSI_RS_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, 1, NULL, FALSE, 0, NULL); @@ -77102,6 +81070,36 @@ dissect_nr_rrc_T_configuredGrantWithReTx_r16(tvbuff_t *tvb _U_, int offset _U_, } +static const value_string nr_rrc_T_ed_Threshold_r16_vals[] = { + { 0, "supported" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_ed_Threshold_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 1, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const value_string nr_rrc_T_ul_DL_COT_Sharing_r16_vals[] = { + { 0, "supported" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_ul_DL_COT_Sharing_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 1, NULL, FALSE, 0, NULL); + + return offset; +} + + static const value_string nr_rrc_T_mux_CG_UCI_HARQ_ACK_r16_vals[] = { { 0, "supported" }, { 0, NULL } @@ -77132,16 +81130,29 @@ dissect_nr_rrc_T_cg_resourceConfig_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_c } -static const per_sequence_t UnlicensedParametersPerBand_r16_sequence[] = { +static const per_sequence_t SharedSpectrumChAccessParamsPerBand_r16_sequence[] = { + { &hf_nr_rrc_ul_DynamicChAccess_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_ul_DynamicChAccess_r16 }, + { &hf_nr_rrc_ul_Semi_StaticChAccess_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_ul_Semi_StaticChAccess_r16 }, + { &hf_nr_rrc_ssb_RRM_DynamicChAccess_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_ssb_RRM_DynamicChAccess_r16 }, + { &hf_nr_rrc_ssb_RRM_Semi_StaticChAccess_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_ssb_RRM_Semi_StaticChAccess_r16 }, + { &hf_nr_rrc_mib_Acquisition_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_mib_Acquisition_r16 }, + { &hf_nr_rrc_ssb_RLM_DynamicChAccess_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_ssb_RLM_DynamicChAccess_r16 }, + { &hf_nr_rrc_ssb_RLM_Semi_StaticChAccess_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_ssb_RLM_Semi_StaticChAccess_r16 }, + { &hf_nr_rrc_sib1_Acquisition_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_sib1_Acquisition_r16 }, + { &hf_nr_rrc_extendedRAR_Window_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_extendedRAR_Window_r16 }, { &hf_nr_rrc_ssb_BFD_CBD_dynamicChannelAccess_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_ssb_BFD_CBD_dynamicChannelAccess_r16 }, { &hf_nr_rrc_ssb_BFD_CBD_semi_staticChannelAccess_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_ssb_BFD_CBD_semi_staticChannelAccess_r16 }, { &hf_nr_rrc_csi_RS_BFD_CBD_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_csi_RS_BFD_CBD_r16 }, + { &hf_nr_rrc_ul_ChannelBW_SCell_10mhz_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_ul_ChannelBW_SCell_10mhz_r16 }, { &hf_nr_rrc_rssi_ChannelOccupancyReporting_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_rssi_ChannelOccupancyReporting_r16 }, { &hf_nr_rrc_srs_StartAnyOFDM_Symbol_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_srs_StartAnyOFDM_Symbol_r16 }, { &hf_nr_rrc_searchSpaceFreqMonitorLocation_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_INTEGER_1_5 }, { &hf_nr_rrc_coreset_RB_Offset_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_coreset_RB_Offset_r16 }, { &hf_nr_rrc_cgi_Acquisition_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_cgi_Acquisition_r16 }, { &hf_nr_rrc_configuredUL_Tx_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_configuredUL_Tx_r16 }, + { &hf_nr_rrc_prach_Wideband_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_prach_Wideband_r16 }, + { &hf_nr_rrc_dci_AvailableRB_Set_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_dci_AvailableRB_Set_r16 }, + { &hf_nr_rrc_dci_ChOccupancyDuration_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_dci_ChOccupancyDuration_r16 }, { &hf_nr_rrc_typeB_PDSCH_length_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_typeB_PDSCH_length_r16 }, { &hf_nr_rrc_searchSpaceSetGroupSwitchingwithDCI_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_searchSpaceSetGroupSwitchingwithDCI_r16 }, { &hf_nr_rrc_searchSpaceSetGroupSwitchingwithoutDCI_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_searchSpaceSetGroupSwitchingwithoutDCI_r16 }, @@ -77151,21 +81162,24 @@ static const per_sequence_t UnlicensedParametersPerBand_r16_sequence[] = { { &hf_nr_rrc_oneShotHARQ_feedback_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_oneShotHARQ_feedback_r16 }, { &hf_nr_rrc_multiPUSCH_UL_grant_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_multiPUSCH_UL_grant_r16 }, { &hf_nr_rrc_csi_RS_RLM_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_csi_RS_RLM_r16 }, - { &hf_nr_rrc_vcsi_RS_RRM_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_vcsi_RS_RRM_r16 }, + { &hf_nr_rrc_csi_RS_RRM_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_csi_RS_RRM_r16 }, + { &hf_nr_rrc_periodicAndSemi_PersistentCSI_RS_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_periodicAndSemi_PersistentCSI_RS_r16 }, { &hf_nr_rrc_pusch_PRB_interlace_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_pusch_PRB_interlace_r16 }, { &hf_nr_rrc_pucch_F0_F1_PRB_Interlace_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_pucch_F0_F1_PRB_Interlace_r16 }, { &hf_nr_rrc_occ_PRB_PF2_PF3_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_occ_PRB_PF2_PF3_r16 }, { &hf_nr_rrc_extCP_rangeCG_PUSCH_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_extCP_rangeCG_PUSCH_r16 }, { &hf_nr_rrc_configuredGrantWithReTx_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_configuredGrantWithReTx_r16 }, + { &hf_nr_rrc_ed_Threshold_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_ed_Threshold_r16 }, + { &hf_nr_rrc_ul_DL_COT_Sharing_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_ul_DL_COT_Sharing_r16 }, { &hf_nr_rrc_mux_CG_UCI_HARQ_ACK_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_mux_CG_UCI_HARQ_ACK_r16 }, { &hf_nr_rrc_cg_resourceConfig_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_cg_resourceConfig_r16 }, { NULL, 0, 0, NULL } }; static int -dissect_nr_rrc_UnlicensedParametersPerBand_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { +dissect_nr_rrc_SharedSpectrumChAccessParamsPerBand_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { offset = dissect_per_sequence(tvb, offset, actx, tree, hf_index, - ett_nr_rrc_UnlicensedParametersPerBand_r16, UnlicensedParametersPerBand_r16_sequence); + ett_nr_rrc_SharedSpectrumChAccessParamsPerBand_r16, SharedSpectrumChAccessParamsPerBand_r16_sequence); return offset; } @@ -77241,14 +81255,14 @@ dissect_nr_rrc_T_pdsch_MappingTypeB_Alt_r16(tvbuff_t *tvb _U_, int offset _U_, a } -static const value_string nr_rrc_T_oneShotPeriodicTRS_r16_vals[] = { +static const value_string nr_rrc_T_oneSlotPeriodicTRS_r16_vals[] = { { 0, "supported" }, { 0, NULL } }; static int -dissect_nr_rrc_T_oneShotPeriodicTRS_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { +dissect_nr_rrc_T_oneSlotPeriodicTRS_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, 1, NULL, FALSE, 0, NULL); @@ -77365,6 +81379,21 @@ dissect_nr_rrc_SpatialRelationsSRS_Pos_r16(tvbuff_t *tvb _U_, int offset _U_, as } +static const value_string nr_rrc_T_simulSRS_MIMO_TransWithinBand_r16_vals[] = { + { 0, "n2" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_simulSRS_MIMO_TransWithinBand_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 1, NULL, FALSE, 0, NULL); + + return offset; +} + + static const value_string nr_rrc_T_scs_15kHz_09_vals[] = { { 0, "supported" }, { 0, NULL } @@ -77651,20 +81680,258 @@ dissect_nr_rrc_T_ue_PowerClass_v1610(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx } +static const value_string nr_rrc_T_condHandover_r16_vals[] = { + { 0, "supported" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_condHandover_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 1, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const value_string nr_rrc_T_condHandoverFailure_r16_vals[] = { + { 0, "supported" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_condHandoverFailure_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 1, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const value_string nr_rrc_T_condHandoverTwoTriggerEvents_r16_vals[] = { + { 0, "supported" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_condHandoverTwoTriggerEvents_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 1, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const value_string nr_rrc_T_condPSCellChange_r16_vals[] = { + { 0, "supported" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_condPSCellChange_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 1, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const value_string nr_rrc_T_condPSCellChangeTwoTriggerEvents_r16_vals[] = { + { 0, "supported" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_condPSCellChangeTwoTriggerEvents_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 1, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const value_string nr_rrc_T_mpr_PowerBoost_FR2_r16_01_vals[] = { + { 0, "supported" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_mpr_PowerBoost_FR2_r16_01(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 1, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const value_string nr_rrc_T_maxNumberConfigsPerBWP_r16_vals[] = { + { 0, "n1" }, + { 1, "n2" }, + { 2, "n4" }, + { 3, "n8" }, + { 4, "n12" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_maxNumberConfigsPerBWP_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 5, NULL, FALSE, 0, NULL); + + return offset; +} + + + +static int +dissect_nr_rrc_INTEGER_2_32(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_constrained_integer(tvb, offset, actx, tree, hf_index, + 2U, 32U, NULL, FALSE); + + return offset; +} + + +static const per_sequence_t T_activeConfiguredGrant_r16_sequence[] = { + { &hf_nr_rrc_maxNumberConfigsPerBWP_r16, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_T_maxNumberConfigsPerBWP_r16 }, + { &hf_nr_rrc_maxNumberConfigsAllCC_r16, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_INTEGER_2_32 }, + { NULL, 0, 0, NULL } +}; + +static int +dissect_nr_rrc_T_activeConfiguredGrant_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_sequence(tvb, offset, actx, tree, hf_index, + ett_nr_rrc_T_activeConfiguredGrant_r16, T_activeConfiguredGrant_r16_sequence); + + return offset; +} + + +static const value_string nr_rrc_T_jointReleaseConfiguredGrantType2_r16_vals[] = { + { 0, "supported" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_jointReleaseConfiguredGrantType2_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 1, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const per_sequence_t T_sps_r16_sequence[] = { + { &hf_nr_rrc_maxNumberConfigsPerBWP_r16_01, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_INTEGER_1_8 }, + { &hf_nr_rrc_maxNumberConfigsAllCC_r16, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_INTEGER_2_32 }, + { NULL, 0, 0, NULL } +}; + +static int +dissect_nr_rrc_T_sps_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_sequence(tvb, offset, actx, tree, hf_index, + ett_nr_rrc_T_sps_r16, T_sps_r16_sequence); + + return offset; +} + + +static const value_string nr_rrc_T_jointReleaseSPS_r16_vals[] = { + { 0, "supported" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_jointReleaseSPS_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 1, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const value_string nr_rrc_T_simulSRS_TransWithinBand_r16_vals[] = { + { 0, "n2" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_simulSRS_TransWithinBand_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 1, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const value_string nr_rrc_T_trs_AdditionalBandwidth_r16_vals[] = { + { 0, "trs-AddBW-Set1" }, + { 1, "trs-AddBW-Set2" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_trs_AdditionalBandwidth_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 2, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const value_string nr_rrc_T_handoverIntraF_IAB_r16_vals[] = { + { 0, "supported" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_handoverIntraF_IAB_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 1, NULL, FALSE, 0, NULL); + + return offset; +} + + static const per_sequence_t BandNR_eag_6_sequence[] = { - { &hf_nr_rrc_unlicensedParametersPerBand_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_UnlicensedParametersPerBand_r16 }, + { &hf_nr_rrc_sharedSpectrumChAccessParamsPerBand_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_SharedSpectrumChAccessParamsPerBand_r16 }, { &hf_nr_rrc_cancelOverlappingPUSCH_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_cancelOverlappingPUSCH_r16 }, { &hf_nr_rrc_multipleRateMatchingEUTRA_CRS_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_multipleRateMatchingEUTRA_CRS_r16 }, { &hf_nr_rrc_overlapRateMatchingEUTRA_CRS_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_overlapRateMatchingEUTRA_CRS_r16 }, { &hf_nr_rrc_pdsch_MappingTypeB_Alt_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_pdsch_MappingTypeB_Alt_r16 }, - { &hf_nr_rrc_oneShotPeriodicTRS_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_oneShotPeriodicTRS_r16 }, + { &hf_nr_rrc_oneSlotPeriodicTRS_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_oneSlotPeriodicTRS_r16 }, { &hf_nr_rrc_olpc_SRS_Pos_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_OLPC_SRS_Pos_r16 }, { &hf_nr_rrc_spatialRelationsSRS_Pos_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_SpatialRelationsSRS_Pos_r16 }, - { &hf_nr_rrc_simul_SRS_Trans_IntraBandCA_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_INTEGER_1_2 }, + { &hf_nr_rrc_simulSRS_MIMO_TransWithinBand_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_simulSRS_MIMO_TransWithinBand_r16 }, { &hf_nr_rrc_channelBW_DL_IAB_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_channelBW_DL_IAB_r16 }, { &hf_nr_rrc_channelBW_UL_IAB_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_channelBW_UL_IAB_r16 }, { &hf_nr_rrc_rasterShift7dot5_IAB_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_rasterShift7dot5_IAB_r16 }, { &hf_nr_rrc_ue_PowerClass_v1610, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_ue_PowerClass_v1610 }, + { &hf_nr_rrc_condHandover_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_condHandover_r16 }, + { &hf_nr_rrc_condHandoverFailure_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_condHandoverFailure_r16 }, + { &hf_nr_rrc_condHandoverTwoTriggerEvents_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_condHandoverTwoTriggerEvents_r16 }, + { &hf_nr_rrc_condPSCellChange_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_condPSCellChange_r16 }, + { &hf_nr_rrc_condPSCellChangeTwoTriggerEvents_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_condPSCellChangeTwoTriggerEvents_r16 }, + { &hf_nr_rrc_mpr_PowerBoost_FR2_r16_01, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_mpr_PowerBoost_FR2_r16_01 }, + { &hf_nr_rrc_activeConfiguredGrant_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_activeConfiguredGrant_r16 }, + { &hf_nr_rrc_jointReleaseConfiguredGrantType2_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_jointReleaseConfiguredGrantType2_r16 }, + { &hf_nr_rrc_sps_r16 , ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_sps_r16 }, + { &hf_nr_rrc_jointReleaseSPS_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_jointReleaseSPS_r16 }, + { &hf_nr_rrc_simulSRS_TransWithinBand_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_simulSRS_TransWithinBand_r16 }, + { &hf_nr_rrc_trs_AdditionalBandwidth_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_trs_AdditionalBandwidth_r16 }, + { &hf_nr_rrc_handoverIntraF_IAB_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_handoverIntraF_IAB_r16 }, { NULL, 0, 0, NULL } }; @@ -77781,7 +82048,7 @@ dissect_nr_rrc_RF_Parameters_eag_3(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t static const per_sequence_t RF_Parameters_eag_4_sequence[] = { { &hf_nr_rrc_supportedBandCombinationList_v1610, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_BandCombinationList_v1610 }, - { &hf_nr_rrc_supportedBandCombinationListSidelink_r16_01, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_BandCombinationListSidelink_r16 }, + { &hf_nr_rrc_supportedBandCombinationListSidelinkEUTRA_NR_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_BandCombinationListSidelinkEUTRA_NR_r16 }, { &hf_nr_rrc_supportedBandCombinationList_UplinkTxSwitch_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_BandCombinationList_UplinkTxSwitch_r16 }, { NULL, 0, 0, NULL } }; @@ -78322,11 +82589,443 @@ dissect_nr_rrc_UE_SidelinkCapabilityAddXDD_Mode_r16(tvbuff_t *tvb _U_, int offse } +static const value_string nr_rrc_T_harq_RxProcessSidelink_r16_vals[] = { + { 0, "n16" }, + { 1, "n24" }, + { 2, "n32" }, + { 3, "n48" }, + { 4, "n64" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_harq_RxProcessSidelink_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 5, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const value_string nr_rrc_T_pscch_RxSidelink_r16_vals[] = { + { 0, "value1" }, + { 1, "value2" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_pscch_RxSidelink_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 2, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const per_sequence_t T_fr1_r16_sequence[] = { + { &hf_nr_rrc_scs_15kHz_r16_02, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_BIT_STRING_SIZE_16 }, + { &hf_nr_rrc_scs_30kHz_r16_02, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_BIT_STRING_SIZE_16 }, + { &hf_nr_rrc_scs_60kHz_r16_02, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_BIT_STRING_SIZE_16 }, + { NULL, 0, 0, NULL } +}; + +static int +dissect_nr_rrc_T_fr1_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_sequence(tvb, offset, actx, tree, hf_index, + ett_nr_rrc_T_fr1_r16, T_fr1_r16_sequence); + + return offset; +} + + +static const per_sequence_t T_fr2_r16_sequence[] = { + { &hf_nr_rrc_scs_60kHz_r16_02, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_BIT_STRING_SIZE_16 }, + { &hf_nr_rrc_scs_120kHz_r16_02, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_BIT_STRING_SIZE_16 }, + { NULL, 0, 0, NULL } +}; + +static int +dissect_nr_rrc_T_fr2_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_sequence(tvb, offset, actx, tree, hf_index, + ett_nr_rrc_T_fr2_r16, T_fr2_r16_sequence); + + return offset; +} + + +static const value_string nr_rrc_T_scs_CP_PatternRxSidelink_r16_vals[] = { + { 0, "fr1-r16" }, + { 1, "fr2-r16" }, + { 0, NULL } +}; + +static const per_choice_t T_scs_CP_PatternRxSidelink_r16_choice[] = { + { 0, &hf_nr_rrc_fr1_r16 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_T_fr1_r16 }, + { 1, &hf_nr_rrc_fr2_r16 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_T_fr2_r16 }, + { 0, NULL, 0, NULL } +}; + +static int +dissect_nr_rrc_T_scs_CP_PatternRxSidelink_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_choice(tvb, offset, actx, tree, hf_index, + ett_nr_rrc_T_scs_CP_PatternRxSidelink_r16, T_scs_CP_PatternRxSidelink_r16_choice, + NULL); + + return offset; +} + + +static const value_string nr_rrc_T_extendedCP_RxSidelink_r16_vals[] = { + { 0, "supported" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_extendedCP_RxSidelink_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 1, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const per_sequence_t T_sl_Reception_r16_sequence[] = { + { &hf_nr_rrc_harq_RxProcessSidelink_r16, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_T_harq_RxProcessSidelink_r16 }, + { &hf_nr_rrc_pscch_RxSidelink_r16, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_T_pscch_RxSidelink_r16 }, + { &hf_nr_rrc_scs_CP_PatternRxSidelink_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_scs_CP_PatternRxSidelink_r16 }, + { &hf_nr_rrc_extendedCP_RxSidelink_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_extendedCP_RxSidelink_r16 }, + { NULL, 0, 0, NULL } +}; + +static int +dissect_nr_rrc_T_sl_Reception_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_sequence(tvb, offset, actx, tree, hf_index, + ett_nr_rrc_T_sl_Reception_r16, T_sl_Reception_r16_sequence); + + return offset; +} + + +static const value_string nr_rrc_T_harq_TxProcessModeOneSidelink_r16_vals[] = { + { 0, "n8" }, + { 1, "n16" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_harq_TxProcessModeOneSidelink_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 2, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const per_sequence_t T_fr1_r16_01_sequence[] = { + { &hf_nr_rrc_scs_15kHz_r16_02, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_BIT_STRING_SIZE_16 }, + { &hf_nr_rrc_scs_30kHz_r16_02, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_BIT_STRING_SIZE_16 }, + { &hf_nr_rrc_scs_60kHz_r16_02, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_BIT_STRING_SIZE_16 }, + { NULL, 0, 0, NULL } +}; + +static int +dissect_nr_rrc_T_fr1_r16_01(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_sequence(tvb, offset, actx, tree, hf_index, + ett_nr_rrc_T_fr1_r16_01, T_fr1_r16_01_sequence); + + return offset; +} + + +static const per_sequence_t T_fr2_r16_01_sequence[] = { + { &hf_nr_rrc_scs_60kHz_r16_02, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_BIT_STRING_SIZE_16 }, + { &hf_nr_rrc_scs_120kHz_r16_02, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_BIT_STRING_SIZE_16 }, + { NULL, 0, 0, NULL } +}; + +static int +dissect_nr_rrc_T_fr2_r16_01(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_sequence(tvb, offset, actx, tree, hf_index, + ett_nr_rrc_T_fr2_r16_01, T_fr2_r16_01_sequence); + + return offset; +} + + +static const value_string nr_rrc_T_scs_CP_PatternTxSidelinkModeOne_r16_vals[] = { + { 0, "fr1-r16" }, + { 1, "fr2-r16" }, + { 0, NULL } +}; + +static const per_choice_t T_scs_CP_PatternTxSidelinkModeOne_r16_choice[] = { + { 0, &hf_nr_rrc_fr1_r16_01 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_T_fr1_r16_01 }, + { 1, &hf_nr_rrc_fr2_r16_01 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_T_fr2_r16_01 }, + { 0, NULL, 0, NULL } +}; + +static int +dissect_nr_rrc_T_scs_CP_PatternTxSidelinkModeOne_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_choice(tvb, offset, actx, tree, hf_index, + ett_nr_rrc_T_scs_CP_PatternTxSidelinkModeOne_r16, T_scs_CP_PatternTxSidelinkModeOne_r16_choice, + NULL); + + return offset; +} + + +static const value_string nr_rrc_T_extendedCP_TxSidelink_r16_vals[] = { + { 0, "supported" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_extendedCP_TxSidelink_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 1, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const value_string nr_rrc_T_harq_ReportOnPUCCH_r16_vals[] = { + { 0, "supported" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_harq_ReportOnPUCCH_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 1, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const per_sequence_t T_sl_TransmissionMode1_r16_sequence[] = { + { &hf_nr_rrc_harq_TxProcessModeOneSidelink_r16, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_T_harq_TxProcessModeOneSidelink_r16 }, + { &hf_nr_rrc_scs_CP_PatternTxSidelinkModeOne_r16, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_T_scs_CP_PatternTxSidelinkModeOne_r16 }, + { &hf_nr_rrc_extendedCP_TxSidelink_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_extendedCP_TxSidelink_r16 }, + { &hf_nr_rrc_harq_ReportOnPUCCH_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_harq_ReportOnPUCCH_r16 }, + { NULL, 0, 0, NULL } +}; + +static int +dissect_nr_rrc_T_sl_TransmissionMode1_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_sequence(tvb, offset, actx, tree, hf_index, + ett_nr_rrc_T_sl_TransmissionMode1_r16, T_sl_TransmissionMode1_r16_sequence); + + return offset; +} + + +static const value_string nr_rrc_T_gNB_Sync_r16_vals[] = { + { 0, "supported" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_gNB_Sync_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 1, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const value_string nr_rrc_T_gNB_GNSS_UE_SyncWithPriorityOnGNB_ENB_r16_vals[] = { + { 0, "supported" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_gNB_GNSS_UE_SyncWithPriorityOnGNB_ENB_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 1, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const value_string nr_rrc_T_gNB_GNSS_UE_SyncWithPriorityOnGNSS_r16_vals[] = { + { 0, "supported" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_gNB_GNSS_UE_SyncWithPriorityOnGNSS_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 1, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const per_sequence_t T_sync_Sidelink_r16_sequence[] = { + { &hf_nr_rrc_gNB_Sync_r16 , ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_gNB_Sync_r16 }, + { &hf_nr_rrc_gNB_GNSS_UE_SyncWithPriorityOnGNB_ENB_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_gNB_GNSS_UE_SyncWithPriorityOnGNB_ENB_r16 }, + { &hf_nr_rrc_gNB_GNSS_UE_SyncWithPriorityOnGNSS_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_gNB_GNSS_UE_SyncWithPriorityOnGNSS_r16 }, + { NULL, 0, 0, NULL } +}; + +static int +dissect_nr_rrc_T_sync_Sidelink_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_sequence(tvb, offset, actx, tree, hf_index, + ett_nr_rrc_T_sync_Sidelink_r16, T_sync_Sidelink_r16_sequence); + + return offset; +} + + +static const value_string nr_rrc_T_sl_Tx_256QAM_r16_vals[] = { + { 0, "supported" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_sl_Tx_256QAM_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 1, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const value_string nr_rrc_T_psfch_RxNumber_vals[] = { + { 0, "n5" }, + { 1, "n15" }, + { 2, "n25" }, + { 3, "n32" }, + { 4, "n35" }, + { 5, "n45" }, + { 6, "n50" }, + { 7, "n64" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_psfch_RxNumber(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 8, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const value_string nr_rrc_T_psfch_TxNumber_vals[] = { + { 0, "n4" }, + { 1, "n8" }, + { 2, "n16" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_psfch_TxNumber(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 3, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const per_sequence_t T_psfch_FormatZeroSidelink_r16_sequence[] = { + { &hf_nr_rrc_psfch_RxNumber, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_T_psfch_RxNumber }, + { &hf_nr_rrc_psfch_TxNumber, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_T_psfch_TxNumber }, + { NULL, 0, 0, NULL } +}; + +static int +dissect_nr_rrc_T_psfch_FormatZeroSidelink_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_sequence(tvb, offset, actx, tree, hf_index, + ett_nr_rrc_T_psfch_FormatZeroSidelink_r16, T_psfch_FormatZeroSidelink_r16_sequence); + + return offset; +} + + +static const value_string nr_rrc_T_lowSE_64QAM_MCS_TableSidelink_r16_vals[] = { + { 0, "supported" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_lowSE_64QAM_MCS_TableSidelink_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 1, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const value_string nr_rrc_T_enb_sync_Sidelink_r16_vals[] = { + { 0, "supported" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_enb_sync_Sidelink_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 1, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const per_sequence_t BandSidelink_r16_sequence[] = { + { &hf_nr_rrc_freqBandSidelink_r16, ASN1_EXTENSION_ROOT , ASN1_NOT_OPTIONAL, dissect_nr_rrc_FreqBandIndicatorNR }, + { &hf_nr_rrc_sl_Reception_r16, ASN1_EXTENSION_ROOT , ASN1_OPTIONAL , dissect_nr_rrc_T_sl_Reception_r16 }, + { &hf_nr_rrc_sl_TransmissionMode1_r16, ASN1_EXTENSION_ROOT , ASN1_OPTIONAL , dissect_nr_rrc_T_sl_TransmissionMode1_r16 }, + { &hf_nr_rrc_sync_Sidelink_r16, ASN1_EXTENSION_ROOT , ASN1_OPTIONAL , dissect_nr_rrc_T_sync_Sidelink_r16 }, + { &hf_nr_rrc_sl_Tx_256QAM_r16, ASN1_EXTENSION_ROOT , ASN1_OPTIONAL , dissect_nr_rrc_T_sl_Tx_256QAM_r16 }, + { &hf_nr_rrc_psfch_FormatZeroSidelink_r16, ASN1_EXTENSION_ROOT , ASN1_OPTIONAL , dissect_nr_rrc_T_psfch_FormatZeroSidelink_r16 }, + { &hf_nr_rrc_lowSE_64QAM_MCS_TableSidelink_r16, ASN1_EXTENSION_ROOT , ASN1_OPTIONAL , dissect_nr_rrc_T_lowSE_64QAM_MCS_TableSidelink_r16 }, + { &hf_nr_rrc_enb_sync_Sidelink_r16, ASN1_EXTENSION_ROOT , ASN1_OPTIONAL , dissect_nr_rrc_T_enb_sync_Sidelink_r16 }, + { NULL, 0, 0, NULL } +}; + +static int +dissect_nr_rrc_BandSidelink_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_sequence(tvb, offset, actx, tree, hf_index, + ett_nr_rrc_BandSidelink_r16, BandSidelink_r16_sequence); + + return offset; +} + + +static const per_sequence_t SEQUENCE_SIZE_1_maxBands_OF_BandSidelink_r16_sequence_of[1] = { + { &hf_nr_rrc_supportedBandListSidelink_r16_item, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_BandSidelink_r16 }, +}; + +static int +dissect_nr_rrc_SEQUENCE_SIZE_1_maxBands_OF_BandSidelink_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_constrained_sequence_of(tvb, offset, actx, tree, hf_index, + ett_nr_rrc_SEQUENCE_SIZE_1_maxBands_OF_BandSidelink_r16, SEQUENCE_SIZE_1_maxBands_OF_BandSidelink_r16_sequence_of, + 1, maxBands, FALSE); + + return offset; +} + + static const per_sequence_t SidelinkParametersNR_r16_sequence[] = { { &hf_nr_rrc_rlc_ParametersSidelink_r16, ASN1_EXTENSION_ROOT , ASN1_OPTIONAL , dissect_nr_rrc_RLC_ParametersSidelink_r16 }, { &hf_nr_rrc_mac_ParametersSidelink_r16, ASN1_EXTENSION_ROOT , ASN1_OPTIONAL , dissect_nr_rrc_MAC_ParametersSidelink_r16 }, { &hf_nr_rrc_fdd_Add_UE_Sidelink_Capabilities_r16, ASN1_EXTENSION_ROOT , ASN1_OPTIONAL , dissect_nr_rrc_UE_SidelinkCapabilityAddXDD_Mode_r16 }, { &hf_nr_rrc_tdd_Add_UE_Sidelink_Capabilities_r16, ASN1_EXTENSION_ROOT , ASN1_OPTIONAL , dissect_nr_rrc_UE_SidelinkCapabilityAddXDD_Mode_r16 }, + { &hf_nr_rrc_supportedBandListSidelink_r16, ASN1_EXTENSION_ROOT , ASN1_OPTIONAL , dissect_nr_rrc_SEQUENCE_SIZE_1_maxBands_OF_BandSidelink_r16 }, { NULL, 0, 0, NULL } }; @@ -78750,7 +83449,7 @@ dissect_nr_rrc_T_nonCriticalExtension_49(tvbuff_t *tvb _U_, int offset _U_, asn1 static const per_sequence_t UE_CapabilityRequestFilterNR_v1540_sequence[] = { { &hf_nr_rrc_srs_SwitchingTimeRequest, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_srs_SwitchingTimeRequest }, - { &hf_nr_rrc_nonCriticalExtension_84, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_nonCriticalExtension_49 }, + { &hf_nr_rrc_nonCriticalExtension_86, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_nonCriticalExtension_49 }, { NULL, 0, 0, NULL } }; @@ -78765,7 +83464,7 @@ dissect_nr_rrc_UE_CapabilityRequestFilterNR_v1540(tvbuff_t *tvb _U_, int offset static const per_sequence_t UE_CapabilityRequestFilterNR_sequence[] = { { &hf_nr_rrc_frequencyBandListFilter, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_FreqBandList }, - { &hf_nr_rrc_nonCriticalExtension_83, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_UE_CapabilityRequestFilterNR_v1540 }, + { &hf_nr_rrc_nonCriticalExtension_85, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_UE_CapabilityRequestFilterNR_v1540 }, { NULL, 0, 0, NULL } }; @@ -78862,7 +83561,7 @@ static const per_sequence_t UE_MRDC_Capability_v1610_sequence[] = { { &hf_nr_rrc_measAndMobParametersMRDC_v1610, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_MeasAndMobParametersMRDC_v1610 }, { &hf_nr_rrc_generalParametersMRDC_v1610, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_GeneralParametersMRDC_v1610 }, { &hf_nr_rrc_pdcp_ParametersMRDC_v1610, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_PDCP_ParametersMRDC_v1610 }, - { &hf_nr_rrc_nonCriticalExtension_87, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_nonCriticalExtension_50 }, + { &hf_nr_rrc_nonCriticalExtension_89, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_nonCriticalExtension_50 }, { NULL, 0, 0, NULL } }; @@ -78880,7 +83579,7 @@ static const per_sequence_t UE_MRDC_Capability_v1560_sequence[] = { { &hf_nr_rrc_measAndMobParametersMRDC_v1560, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_MeasAndMobParametersMRDC_v1560 }, { &hf_nr_rrc_fdd_Add_UE_MRDC_Capabilities_v1560, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_UE_MRDC_CapabilityAddXDD_Mode_v1560 }, { &hf_nr_rrc_tdd_Add_UE_MRDC_Capabilities_v1560, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_UE_MRDC_CapabilityAddXDD_Mode_v1560 }, - { &hf_nr_rrc_nonCriticalExtension_86, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_UE_MRDC_Capability_v1610 }, + { &hf_nr_rrc_nonCriticalExtension_88, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_UE_MRDC_Capability_v1610 }, { NULL, 0, 0, NULL } }; @@ -78905,7 +83604,7 @@ static const per_sequence_t UE_MRDC_Capability_sequence[] = { { &hf_nr_rrc_featureSetCombinations, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_SEQUENCE_SIZE_1_maxFeatureSetCombinations_OF_FeatureSetCombination }, { &hf_nr_rrc_pdcp_ParametersMRDC_v1530, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_PDCP_ParametersMRDC }, { &hf_nr_rrc_lateNonCriticalExtension, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_OCTET_STRING }, - { &hf_nr_rrc_nonCriticalExtension_85, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_UE_MRDC_Capability_v1560 }, + { &hf_nr_rrc_nonCriticalExtension_87, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_UE_MRDC_Capability_v1560 }, { NULL, 0, 0, NULL } }; @@ -79306,7 +84005,7 @@ static const per_sequence_t UE_NR_Capability_v1610_sequence[] = { { &hf_nr_rrc_ue_BasedPerfMeas_Parameters_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_UE_BasedPerfMeas_Parameters_r16 }, { &hf_nr_rrc_son_Parameters_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_SON_Parameters_r16 }, { &hf_nr_rrc_onDemandSIB_Connected_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_onDemandSIB_Connected_r16 }, - { &hf_nr_rrc_nonCriticalExtension_94, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_nonCriticalExtension_51 }, + { &hf_nr_rrc_nonCriticalExtension_96, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_nonCriticalExtension_51 }, { NULL, 0, 0, NULL } }; @@ -79321,7 +84020,7 @@ dissect_nr_rrc_UE_NR_Capability_v1610(tvbuff_t *tvb _U_, int offset _U_, asn1_ct static const per_sequence_t UE_NR_Capability_v1570_sequence[] = { { &hf_nr_rrc_nrdc_Parameters_v1570, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_NRDC_Parameters_v1570 }, - { &hf_nr_rrc_nonCriticalExtension_93, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_UE_NR_Capability_v1610 }, + { &hf_nr_rrc_nonCriticalExtension_95, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_UE_NR_Capability_v1610 }, { NULL, 0, 0, NULL } }; @@ -79337,7 +84036,7 @@ dissect_nr_rrc_UE_NR_Capability_v1570(tvbuff_t *tvb _U_, int offset _U_, asn1_ct static const per_sequence_t UE_NR_Capability_v1560_sequence[] = { { &hf_nr_rrc_nrdc_Parameters, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_NRDC_Parameters }, { &hf_nr_rrc_receivedFilters_01, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_receivedFilters_01 }, - { &hf_nr_rrc_nonCriticalExtension_92, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_UE_NR_Capability_v1570 }, + { &hf_nr_rrc_nonCriticalExtension_94, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_UE_NR_Capability_v1570 }, { NULL, 0, 0, NULL } }; @@ -79352,7 +84051,7 @@ dissect_nr_rrc_UE_NR_Capability_v1560(tvbuff_t *tvb _U_, int offset _U_, asn1_ct static const per_sequence_t UE_NR_Capability_v1550_sequence[] = { { &hf_nr_rrc_reducedCP_Latency, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_reducedCP_Latency }, - { &hf_nr_rrc_nonCriticalExtension_91, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_UE_NR_Capability_v1560 }, + { &hf_nr_rrc_nonCriticalExtension_93, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_UE_NR_Capability_v1560 }, { NULL, 0, 0, NULL } }; @@ -79372,7 +84071,7 @@ static const per_sequence_t UE_NR_Capability_v1540_sequence[] = { { &hf_nr_rrc_fr1_Add_UE_NR_Capabilities_v1540, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_UE_NR_CapabilityAddFRX_Mode_v1540 }, { &hf_nr_rrc_fr2_Add_UE_NR_Capabilities_v1540, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_UE_NR_CapabilityAddFRX_Mode_v1540 }, { &hf_nr_rrc_fr1_fr2_Add_UE_NR_Capabilities, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_UE_NR_CapabilityAddFRX_Mode }, - { &hf_nr_rrc_nonCriticalExtension_90, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_UE_NR_Capability_v1550 }, + { &hf_nr_rrc_nonCriticalExtension_92, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_UE_NR_Capability_v1550 }, { NULL, 0, 0, NULL } }; @@ -79392,7 +84091,7 @@ static const per_sequence_t UE_NR_Capability_v1530_sequence[] = { { &hf_nr_rrc_interRAT_Parameters, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_InterRAT_Parameters }, { &hf_nr_rrc_inactiveState, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_inactiveState }, { &hf_nr_rrc_delayBudgetReporting, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_delayBudgetReporting }, - { &hf_nr_rrc_nonCriticalExtension_89, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_UE_NR_Capability_v1540 }, + { &hf_nr_rrc_nonCriticalExtension_91, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_UE_NR_Capability_v1540 }, { NULL, 0, 0, NULL } }; @@ -79420,7 +84119,7 @@ static const per_sequence_t UE_NR_Capability_sequence[] = { { &hf_nr_rrc_featureSets , ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_FeatureSets }, { &hf_nr_rrc_featureSetCombinations, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_SEQUENCE_SIZE_1_maxFeatureSetCombinations_OF_FeatureSetCombination }, { &hf_nr_rrc_lateNonCriticalExtension, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_OCTET_STRING }, - { &hf_nr_rrc_nonCriticalExtension_88, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_UE_NR_Capability_v1530 }, + { &hf_nr_rrc_nonCriticalExtension_90, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_UE_NR_Capability_v1530 }, { NULL, 0, 0, NULL } }; @@ -79533,7 +84232,7 @@ dissect_nr_rrc_SBCCH_SL_BCH_Message(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_ static const per_sequence_t SL_MeasQuantityResult_r16_sequence[] = { - { &hf_nr_rrc_sl_RSRP_r16 , ASN1_EXTENSION_ROOT , ASN1_OPTIONAL , dissect_nr_rrc_RSRP_Range }, + { &hf_nr_rrc_sl_RSRP_r16_01, ASN1_EXTENSION_ROOT , ASN1_OPTIONAL , dissect_nr_rrc_RSRP_Range }, { NULL, 0, 0, NULL } }; @@ -79591,7 +84290,7 @@ dissect_nr_rrc_T_nonCriticalExtension_52(tvbuff_t *tvb _U_, int offset _U_, asn1 static const per_sequence_t MeasurementReportSidelink_IEs_r16_sequence[] = { { &hf_nr_rrc_sl_measResults_r16, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_SL_MeasResults_r16 }, { &hf_nr_rrc_lateNonCriticalExtension, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_OCTET_STRING }, - { &hf_nr_rrc_nonCriticalExtension_95, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_nonCriticalExtension_52 }, + { &hf_nr_rrc_nonCriticalExtension_97, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_nonCriticalExtension_52 }, { NULL, 0, 0, NULL } }; @@ -79667,7 +84366,7 @@ dissect_nr_rrc_SLRB_PC5_ConfigIndex_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ static int -dissect_nr_rrc_SL_PFI_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { +dissect_nr_rrc_SL_PQFI_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { offset = dissect_per_constrained_integer(tvb, offset, actx, tree, hf_index, 1U, 64U, NULL, FALSE); @@ -79675,23 +84374,40 @@ dissect_nr_rrc_SL_PFI_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U } -static const per_sequence_t SEQUENCE_SIZE_1_maxNrofSL_QFIsPerDest_r16_OF_SL_PFI_r16_sequence_of[1] = { - { &hf_nr_rrc_sl_MappedQoS_FlowsToAddList_r16_item_01, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_SL_PFI_r16 }, +static const per_sequence_t SEQUENCE_SIZE_1_maxNrofSL_QFIsPerDest_r16_OF_SL_PQFI_r16_sequence_of[1] = { + { &hf_nr_rrc_sl_MappedQoS_FlowsToAddList_r16_item_01, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_SL_PQFI_r16 }, }; static int -dissect_nr_rrc_SEQUENCE_SIZE_1_maxNrofSL_QFIsPerDest_r16_OF_SL_PFI_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { +dissect_nr_rrc_SEQUENCE_SIZE_1_maxNrofSL_QFIsPerDest_r16_OF_SL_PQFI_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { offset = dissect_per_constrained_sequence_of(tvb, offset, actx, tree, hf_index, - ett_nr_rrc_SEQUENCE_SIZE_1_maxNrofSL_QFIsPerDest_r16_OF_SL_PFI_r16, SEQUENCE_SIZE_1_maxNrofSL_QFIsPerDest_r16_OF_SL_PFI_r16_sequence_of, + ett_nr_rrc_SEQUENCE_SIZE_1_maxNrofSL_QFIsPerDest_r16_OF_SL_PQFI_r16, SEQUENCE_SIZE_1_maxNrofSL_QFIsPerDest_r16_OF_SL_PQFI_r16_sequence_of, 1, maxNrofSL_QFIsPerDest_r16, FALSE); return offset; } +static const value_string nr_rrc_T_sl_SDAP_Header_r16_01_vals[] = { + { 0, "present" }, + { 1, "absent" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_sl_SDAP_Header_r16_01(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 2, NULL, FALSE, 0, NULL); + + return offset; +} + + static const per_sequence_t SL_SDAP_ConfigPC5_r16_sequence[] = { - { &hf_nr_rrc_sl_MappedQoS_FlowsToAddList_r16_01, ASN1_EXTENSION_ROOT , ASN1_OPTIONAL , dissect_nr_rrc_SEQUENCE_SIZE_1_maxNrofSL_QFIsPerDest_r16_OF_SL_PFI_r16 }, - { &hf_nr_rrc_sl_MappedQoS_FlowsToReleaseList_r16, ASN1_EXTENSION_ROOT , ASN1_OPTIONAL , dissect_nr_rrc_SEQUENCE_SIZE_1_maxNrofSL_QFIsPerDest_r16_OF_SL_PFI_r16 }, + { &hf_nr_rrc_sl_MappedQoS_FlowsToAddList_r16_01, ASN1_EXTENSION_ROOT , ASN1_OPTIONAL , dissect_nr_rrc_SEQUENCE_SIZE_1_maxNrofSL_QFIsPerDest_r16_OF_SL_PQFI_r16 }, + { &hf_nr_rrc_sl_MappedQoS_FlowsToReleaseList_r16, ASN1_EXTENSION_ROOT , ASN1_OPTIONAL , dissect_nr_rrc_SEQUENCE_SIZE_1_maxNrofSL_QFIsPerDest_r16_OF_SL_PQFI_r16 }, + { &hf_nr_rrc_sl_SDAP_Header_r16_01, ASN1_EXTENSION_ROOT , ASN1_NOT_OPTIONAL, dissect_nr_rrc_T_sl_SDAP_Header_r16_01 }, { NULL, 0, 0, NULL } }; @@ -79720,14 +84436,14 @@ dissect_nr_rrc_T_sl_PDCP_SN_Size_r16_01(tvbuff_t *tvb _U_, int offset _U_, asn1_ } -static const value_string nr_rrc_T_sl_OutOfOrderDelivery_01_vals[] = { +static const value_string nr_rrc_T_sl_OutOfOrderDelivery_r16_vals[] = { { 0, "true" }, { 0, NULL } }; static int -dissect_nr_rrc_T_sl_OutOfOrderDelivery_01(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { +dissect_nr_rrc_T_sl_OutOfOrderDelivery_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, 1, NULL, FALSE, 0, NULL); @@ -79737,7 +84453,7 @@ dissect_nr_rrc_T_sl_OutOfOrderDelivery_01(tvbuff_t *tvb _U_, int offset _U_, asn static const per_sequence_t SL_PDCP_ConfigPC5_r16_sequence[] = { { &hf_nr_rrc_sl_PDCP_SN_Size_r16_01, ASN1_EXTENSION_ROOT , ASN1_OPTIONAL , dissect_nr_rrc_T_sl_PDCP_SN_Size_r16_01 }, - { &hf_nr_rrc_sl_OutOfOrderDelivery_01, ASN1_EXTENSION_ROOT , ASN1_OPTIONAL , dissect_nr_rrc_T_sl_OutOfOrderDelivery_01 }, + { &hf_nr_rrc_sl_OutOfOrderDelivery_r16, ASN1_EXTENSION_ROOT , ASN1_OPTIONAL , dissect_nr_rrc_T_sl_OutOfOrderDelivery_r16 }, { NULL, 0, 0, NULL } }; @@ -79884,7 +84600,7 @@ static const value_string nr_rrc_T_sl_MeasConfig_r16_vals[] = { static const per_choice_t T_sl_MeasConfig_r16_choice[] = { { 0, &hf_nr_rrc_release , ASN1_NO_EXTENSIONS , dissect_nr_rrc_NULL }, - { 1, &hf_nr_rrc_setup_125 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_SL_MeasConfig_r16 }, + { 1, &hf_nr_rrc_setup_126 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_SL_MeasConfig_r16 }, { 0, NULL, 0, NULL } }; @@ -79953,7 +84669,7 @@ static const value_string nr_rrc_T_sl_CSI_RS_Config_r16_vals[] = { static const per_choice_t T_sl_CSI_RS_Config_r16_choice[] = { { 0, &hf_nr_rrc_release , ASN1_NO_EXTENSIONS , dissect_nr_rrc_NULL }, - { 1, &hf_nr_rrc_setup_126 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_SL_CSI_RS_Config_r16 }, + { 1, &hf_nr_rrc_setup_127 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_SL_CSI_RS_Config_r16 }, { 0, NULL, 0, NULL } }; @@ -80013,7 +84729,7 @@ static const per_sequence_t RRCReconfigurationSidelink_IEs_r16_sequence[] = { { &hf_nr_rrc_sl_ResetConfig_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_sl_ResetConfig_r16 }, { &hf_nr_rrc_sl_LatencyBoundCSI_Report_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_INTEGER_3_160 }, { &hf_nr_rrc_lateNonCriticalExtension, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_OCTET_STRING }, - { &hf_nr_rrc_nonCriticalExtension_96, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_nonCriticalExtension_53 }, + { &hf_nr_rrc_nonCriticalExtension_98, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_nonCriticalExtension_53 }, { NULL, 0, 0, NULL } }; @@ -80093,7 +84809,7 @@ dissect_nr_rrc_T_nonCriticalExtension_54(tvbuff_t *tvb _U_, int offset _U_, asn1 static const per_sequence_t RRCReconfigurationCompleteSidelink_IEs_r16_sequence[] = { { &hf_nr_rrc_lateNonCriticalExtension, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_OCTET_STRING }, - { &hf_nr_rrc_nonCriticalExtension_97, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_nonCriticalExtension_54 }, + { &hf_nr_rrc_nonCriticalExtension_99, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_nonCriticalExtension_54 }, { NULL, 0, 0, NULL } }; @@ -80173,7 +84889,7 @@ dissect_nr_rrc_T_nonCriticalExtension_55(tvbuff_t *tvb _U_, int offset _U_, asn1 static const per_sequence_t RRCReconfigurationFailureSidelink_IEs_r16_sequence[] = { { &hf_nr_rrc_lateNonCriticalExtension, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_OCTET_STRING }, - { &hf_nr_rrc_nonCriticalExtension_98, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_nonCriticalExtension_55 }, + { &hf_nr_rrc_nonCriticalExtension_100, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_nonCriticalExtension_55 }, { NULL, 0, 0, NULL } }; @@ -80238,34 +84954,6 @@ dissect_nr_rrc_RRCReconfigurationFailureSidelink(tvbuff_t *tvb _U_, int offset _ } -static const per_sequence_t T_nonCriticalExtension_58_sequence[] = { - { NULL, 0, 0, NULL } -}; - -static int -dissect_nr_rrc_T_nonCriticalExtension_58(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { - offset = dissect_per_sequence(tvb, offset, actx, tree, hf_index, - ett_nr_rrc_T_nonCriticalExtension_58, T_nonCriticalExtension_58_sequence); - - return offset; -} - - -static const per_sequence_t UE_CapabilityRequestFilterSidelink_r16_sequence[] = { - { &hf_nr_rrc_frequencyBandListFilterSidelink_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_FreqBandList }, - { &hf_nr_rrc_nonCriticalExtension_101, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_nonCriticalExtension_58 }, - { NULL, 0, 0, NULL } -}; - -static int -dissect_nr_rrc_UE_CapabilityRequestFilterSidelink_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { - offset = dissect_per_sequence(tvb, offset, actx, tree, hf_index, - ett_nr_rrc_UE_CapabilityRequestFilterSidelink_r16, UE_CapabilityRequestFilterSidelink_r16_sequence); - - return offset; -} - - static const per_sequence_t T_nonCriticalExtension_56_sequence[] = { { NULL, 0, 0, NULL } }; @@ -80280,10 +84968,10 @@ dissect_nr_rrc_T_nonCriticalExtension_56(tvbuff_t *tvb _U_, int offset _U_, asn1 static const per_sequence_t UECapabilityEnquirySidelink_IEs_r16_sequence[] = { - { &hf_nr_rrc_ueCapabilityRequestFilterSidelink_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_UE_CapabilityRequestFilterSidelink_r16 }, + { &hf_nr_rrc_frequencyBandListFilterSidelink_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_FreqBandList }, { &hf_nr_rrc_ue_CapabilityInformationSidelink_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_OCTET_STRING }, { &hf_nr_rrc_lateNonCriticalExtension, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_OCTET_STRING }, - { &hf_nr_rrc_nonCriticalExtension_99, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_nonCriticalExtension_56 }, + { &hf_nr_rrc_nonCriticalExtension_101, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_nonCriticalExtension_56 }, { NULL, 0, 0, NULL } }; @@ -80444,6 +85132,214 @@ dissect_nr_rrc_PC5_RLC_ParametersSidelink_r16(tvbuff_t *tvb _U_, int offset _U_, } +static const per_sequence_t BandCombinationParametersSidelinkNR_r16_sequence_of[1] = { + { &hf_nr_rrc_BandCombinationParametersSidelinkNR_r16_item, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_BandParametersSidelink_r16 }, +}; + +static int +dissect_nr_rrc_BandCombinationParametersSidelinkNR_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_constrained_sequence_of(tvb, offset, actx, tree, hf_index, + ett_nr_rrc_BandCombinationParametersSidelinkNR_r16, BandCombinationParametersSidelinkNR_r16_sequence_of, + 1, maxSimultaneousBands, FALSE); + + return offset; +} + + +static const per_sequence_t BandCombinationListSidelinkNR_r16_sequence_of[1] = { + { &hf_nr_rrc_BandCombinationListSidelinkNR_r16_item, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_BandCombinationParametersSidelinkNR_r16 }, +}; + +static int +dissect_nr_rrc_BandCombinationListSidelinkNR_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_constrained_sequence_of(tvb, offset, actx, tree, hf_index, + ett_nr_rrc_BandCombinationListSidelinkNR_r16, BandCombinationListSidelinkNR_r16_sequence_of, + 1, maxBandComb, FALSE); + + return offset; +} + + +static const value_string nr_rrc_T_harq_RxProcessSidelink_r16_01_vals[] = { + { 0, "n16" }, + { 1, "n24" }, + { 2, "n32" }, + { 3, "n64" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_harq_RxProcessSidelink_r16_01(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 4, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const value_string nr_rrc_T_pscch_RxSidelink_r16_01_vals[] = { + { 0, "value1" }, + { 1, "value2" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_pscch_RxSidelink_r16_01(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 2, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const per_sequence_t T_fr1_r16_02_sequence[] = { + { &hf_nr_rrc_scs_15kHz_r16_02, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_BIT_STRING_SIZE_16 }, + { &hf_nr_rrc_scs_30kHz_r16_02, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_BIT_STRING_SIZE_16 }, + { &hf_nr_rrc_scs_60kHz_r16_02, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_BIT_STRING_SIZE_16 }, + { NULL, 0, 0, NULL } +}; + +static int +dissect_nr_rrc_T_fr1_r16_02(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_sequence(tvb, offset, actx, tree, hf_index, + ett_nr_rrc_T_fr1_r16_02, T_fr1_r16_02_sequence); + + return offset; +} + + +static const per_sequence_t T_fr2_r16_02_sequence[] = { + { &hf_nr_rrc_scs_60kHz_r16_02, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_BIT_STRING_SIZE_16 }, + { &hf_nr_rrc_scs_120kHz_r16_02, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_BIT_STRING_SIZE_16 }, + { NULL, 0, 0, NULL } +}; + +static int +dissect_nr_rrc_T_fr2_r16_02(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_sequence(tvb, offset, actx, tree, hf_index, + ett_nr_rrc_T_fr2_r16_02, T_fr2_r16_02_sequence); + + return offset; +} + + +static const value_string nr_rrc_T_scs_CP_PatternRxSidelink_r16_01_vals[] = { + { 0, "fr1-r16" }, + { 1, "fr2-r16" }, + { 0, NULL } +}; + +static const per_choice_t T_scs_CP_PatternRxSidelink_r16_01_choice[] = { + { 0, &hf_nr_rrc_fr1_r16_02 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_T_fr1_r16_02 }, + { 1, &hf_nr_rrc_fr2_r16_02 , ASN1_NO_EXTENSIONS , dissect_nr_rrc_T_fr2_r16_02 }, + { 0, NULL, 0, NULL } +}; + +static int +dissect_nr_rrc_T_scs_CP_PatternRxSidelink_r16_01(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_choice(tvb, offset, actx, tree, hf_index, + ett_nr_rrc_T_scs_CP_PatternRxSidelink_r16_01, T_scs_CP_PatternRxSidelink_r16_01_choice, + NULL); + + return offset; +} + + +static const value_string nr_rrc_T_extendedCP_RxSidelink_r16_01_vals[] = { + { 0, "supported" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_extendedCP_RxSidelink_r16_01(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 1, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const per_sequence_t T_sl_Reception_r16_01_sequence[] = { + { &hf_nr_rrc_harq_RxProcessSidelink_r16_01, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_T_harq_RxProcessSidelink_r16_01 }, + { &hf_nr_rrc_pscch_RxSidelink_r16_01, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_T_pscch_RxSidelink_r16_01 }, + { &hf_nr_rrc_scs_CP_PatternRxSidelink_r16_01, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_scs_CP_PatternRxSidelink_r16_01 }, + { &hf_nr_rrc_extendedCP_RxSidelink_r16_01, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_extendedCP_RxSidelink_r16_01 }, + { NULL, 0, 0, NULL } +}; + +static int +dissect_nr_rrc_T_sl_Reception_r16_01(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_sequence(tvb, offset, actx, tree, hf_index, + ett_nr_rrc_T_sl_Reception_r16_01, T_sl_Reception_r16_01_sequence); + + return offset; +} + + +static const value_string nr_rrc_T_sl_Tx_256QAM_r16_01_vals[] = { + { 0, "supported" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_sl_Tx_256QAM_r16_01(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 1, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const value_string nr_rrc_T_lowSE_64QAM_MCS_TableSidelink_r16_01_vals[] = { + { 0, "supported" }, + { 0, NULL } +}; + + +static int +dissect_nr_rrc_T_lowSE_64QAM_MCS_TableSidelink_r16_01(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_enumerated(tvb, offset, actx, tree, hf_index, + 1, NULL, FALSE, 0, NULL); + + return offset; +} + + +static const per_sequence_t PC5_BandSidelink_r16_sequence[] = { + { &hf_nr_rrc_freqBandSidelink_r16, ASN1_EXTENSION_ROOT , ASN1_NOT_OPTIONAL, dissect_nr_rrc_FreqBandIndicatorNR }, + { &hf_nr_rrc_sl_Reception_r16_01, ASN1_EXTENSION_ROOT , ASN1_OPTIONAL , dissect_nr_rrc_T_sl_Reception_r16_01 }, + { &hf_nr_rrc_sl_Tx_256QAM_r16_01, ASN1_EXTENSION_ROOT , ASN1_OPTIONAL , dissect_nr_rrc_T_sl_Tx_256QAM_r16_01 }, + { &hf_nr_rrc_lowSE_64QAM_MCS_TableSidelink_r16_01, ASN1_EXTENSION_ROOT , ASN1_OPTIONAL , dissect_nr_rrc_T_lowSE_64QAM_MCS_TableSidelink_r16_01 }, + { NULL, 0, 0, NULL } +}; + +static int +dissect_nr_rrc_PC5_BandSidelink_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_sequence(tvb, offset, actx, tree, hf_index, + ett_nr_rrc_PC5_BandSidelink_r16, PC5_BandSidelink_r16_sequence); + + return offset; +} + + +static const per_sequence_t SEQUENCE_SIZE_1_maxBands_OF_PC5_BandSidelink_r16_sequence_of[1] = { + { &hf_nr_rrc_supportedBandListSidelink_r16_item_01, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_PC5_BandSidelink_r16 }, +}; + +static int +dissect_nr_rrc_SEQUENCE_SIZE_1_maxBands_OF_PC5_BandSidelink_r16(tvbuff_t *tvb _U_, int offset _U_, asn1_ctx_t *actx _U_, proto_tree *tree _U_, int hf_index _U_) { + offset = dissect_per_constrained_sequence_of(tvb, offset, actx, tree, hf_index, + ett_nr_rrc_SEQUENCE_SIZE_1_maxBands_OF_PC5_BandSidelink_r16, SEQUENCE_SIZE_1_maxBands_OF_PC5_BandSidelink_r16_sequence_of, + 1, maxBands, FALSE); + + return offset; +} + + static const per_sequence_t T_nonCriticalExtension_57_sequence[] = { { NULL, 0, 0, NULL } }; @@ -80461,9 +85357,11 @@ static const per_sequence_t UECapabilityInformationSidelink_IEs_r16_sequence[] = { &hf_nr_rrc_accessStratumReleaseSidelink_r16, ASN1_NO_EXTENSIONS , ASN1_NOT_OPTIONAL, dissect_nr_rrc_AccessStratumReleaseSidelink_r16 }, { &hf_nr_rrc_pdcp_ParametersSidelink_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_PDCP_ParametersSidelink_r16 }, { &hf_nr_rrc_rlc_ParametersSidelink_r16_01, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_PC5_RLC_ParametersSidelink_r16 }, - { &hf_nr_rrc_supportedBandCombinationListSidelink_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_SupportedBandCombinationListSidelink_r16 }, + { &hf_nr_rrc_supportedBandCombinationListSidelinkNR_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_BandCombinationListSidelinkNR_r16 }, + { &hf_nr_rrc_supportedBandListSidelink_r16_01, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_SEQUENCE_SIZE_1_maxBands_OF_PC5_BandSidelink_r16 }, + { &hf_nr_rrc_appliedFreqBandListFilter_r16, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_FreqBandList }, { &hf_nr_rrc_lateNonCriticalExtension, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_OCTET_STRING }, - { &hf_nr_rrc_nonCriticalExtension_100, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_nonCriticalExtension_57 }, + { &hf_nr_rrc_nonCriticalExtension_102, ASN1_NO_EXTENSIONS , ASN1_OPTIONAL , dissect_nr_rrc_T_nonCriticalExtension_57 }, { NULL, 0, 0, NULL } }; @@ -81364,7 +86262,7 @@ static int dissect_UECapabilityEnquiry_v1560_IEs_PDU(tvbuff_t *tvb _U_, packet_i /*--- End of included file: packet-nr-rrc-fn.c ---*/ -#line 515 "./asn1/nr-rrc/packet-nr-rrc-template.c" +#line 513 "./asn1/nr-rrc/packet-nr-rrc-template.c" int dissect_nr_rrc_nr_RLF_Report_r16_PDU(tvbuff_t *tvb _U_, packet_info *pinfo _U_, proto_tree *tree _U_, void *data _U_) { @@ -82042,6 +86940,14 @@ proto_register_nr_rrc(void) { { &hf_nr_rrc_nonCriticalExtension_06, { "nonCriticalExtension", "nr-rrc.nonCriticalExtension_element", FT_NONE, BASE_NONE, NULL, 0, + "CG_Config_v1620_IEs", HFILL }}, + { &hf_nr_rrc_ueAssistanceInformationSCG_r16_01, + { "ueAssistanceInformationSCG-r16", "nr-rrc.ueAssistanceInformationSCG_r16", + FT_BYTES, BASE_NONE, NULL, 0, + "T_ueAssistanceInformationSCG_r16_01", HFILL }}, + { &hf_nr_rrc_nonCriticalExtension_07, + { "nonCriticalExtension", "nr-rrc.nonCriticalExtension_element", + FT_NONE, BASE_NONE, NULL, 0, "T_nonCriticalExtension_02", HFILL }}, { &hf_nr_rrc_PH_TypeListSCG_item, { "PH-InfoSCG", "nr-rrc.PH_InfoSCG_element", @@ -82103,6 +87009,10 @@ proto_register_nr_rrc(void) { { "requestedMaxIntraFreqMeasIdSCG-r16", "nr-rrc.requestedMaxIntraFreqMeasIdSCG_r16", FT_UINT32, BASE_DEC, NULL, 0, "INTEGER_1_maxMeasIdentitiesMN", HFILL }}, + { &hf_nr_rrc_requestedToffset_r16, + { "requestedToffset-r16", "nr-rrc.requestedToffset_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_Offset_r16_vals), 0, + "T_Offset_r16", HFILL }}, { &hf_nr_rrc_bandCombinationIndex, { "bandCombinationIndex", "nr-rrc.bandCombinationIndex", FT_UINT32, BASE_DEC, NULL, 0, @@ -82195,7 +87105,7 @@ proto_register_nr_rrc(void) { { "mrdc-AssistanceInfo", "nr-rrc.mrdc_AssistanceInfo_element", FT_NONE, BASE_NONE, NULL, 0, NULL, HFILL }}, - { &hf_nr_rrc_nonCriticalExtension_07, + { &hf_nr_rrc_nonCriticalExtension_08, { "nonCriticalExtension", "nr-rrc.nonCriticalExtension_element", FT_NONE, BASE_NONE, NULL, 0, "CG_ConfigInfo_v1540_IEs", HFILL }}, @@ -82211,7 +87121,7 @@ proto_register_nr_rrc(void) { { "cgi-Info", "nr-rrc.cgi_Info_element", FT_NONE, BASE_NONE, NULL, 0, "CGI_InfoNR", HFILL }}, - { &hf_nr_rrc_nonCriticalExtension_08, + { &hf_nr_rrc_nonCriticalExtension_09, { "nonCriticalExtension", "nr-rrc.nonCriticalExtension_element", FT_NONE, BASE_NONE, NULL, 0, "CG_ConfigInfo_v1560_IEs", HFILL }}, @@ -82259,7 +87169,7 @@ proto_register_nr_rrc(void) { { "fr-InfoListMCG", "nr-rrc.fr_InfoListMCG", FT_UINT32, BASE_DEC, NULL, 0, "FR_InfoList", HFILL }}, - { &hf_nr_rrc_nonCriticalExtension_09, + { &hf_nr_rrc_nonCriticalExtension_10, { "nonCriticalExtension", "nr-rrc.nonCriticalExtension_element", FT_NONE, BASE_NONE, NULL, 0, "CG_ConfigInfo_v1570_IEs", HFILL }}, @@ -82271,7 +87181,7 @@ proto_register_nr_rrc(void) { { "sftdFrequencyList-EUTRA", "nr-rrc.sftdFrequencyList_EUTRA", FT_UINT32, BASE_DEC, NULL, 0, "SFTD_FrequencyList_EUTRA", HFILL }}, - { &hf_nr_rrc_nonCriticalExtension_10, + { &hf_nr_rrc_nonCriticalExtension_11, { "nonCriticalExtension", "nr-rrc.nonCriticalExtension_element", FT_NONE, BASE_NONE, NULL, 0, "CG_ConfigInfo_v1590_IEs", HFILL }}, @@ -82283,7 +87193,7 @@ proto_register_nr_rrc(void) { { "ARFCN-ValueNR", "nr-rrc.ARFCN_ValueNR", FT_UINT32, BASE_DEC, NULL, 0, NULL, HFILL }}, - { &hf_nr_rrc_nonCriticalExtension_11, + { &hf_nr_rrc_nonCriticalExtension_12, { "nonCriticalExtension", "nr-rrc.nonCriticalExtension_element", FT_NONE, BASE_NONE, NULL, 0, "CG_ConfigInfo_v1610_IEs", HFILL }}, @@ -82327,7 +87237,15 @@ proto_register_nr_rrc(void) { { "sidelinkUEInformationEUTRA-r16", "nr-rrc.sidelinkUEInformationEUTRA_r16", FT_BYTES, BASE_NONE, NULL, 0, "OCTET_STRING", HFILL }}, - { &hf_nr_rrc_nonCriticalExtension_12, + { &hf_nr_rrc_nonCriticalExtension_13, + { "nonCriticalExtension", "nr-rrc.nonCriticalExtension_element", + FT_NONE, BASE_NONE, NULL, 0, + "CG_ConfigInfo_v1620_IEs", HFILL }}, + { &hf_nr_rrc_ueAssistanceInformationSourceSCG_r16, + { "ueAssistanceInformationSourceSCG-r16", "nr-rrc.ueAssistanceInformationSourceSCG_r16", + FT_BYTES, BASE_NONE, NULL, 0, + NULL, HFILL }}, + { &hf_nr_rrc_nonCriticalExtension_14, { "nonCriticalExtension", "nr-rrc.nonCriticalExtension_element", FT_NONE, BASE_NONE, NULL, 0, "T_nonCriticalExtension_03", HFILL }}, @@ -82447,6 +87365,10 @@ proto_register_nr_rrc(void) { { "allowedReducedConfigForOverheating-r16", "nr-rrc.allowedReducedConfigForOverheating_r16_element", FT_NONE, BASE_NONE, NULL, 0, "OverheatingAssistance", HFILL }}, + { &hf_nr_rrc_maxToffset_r16, + { "maxToffset-r16", "nr-rrc.maxToffset_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_Offset_r16_vals), 0, + "T_Offset_r16", HFILL }}, { &hf_nr_rrc_SelectedBandEntriesMN_item, { "BandEntryIndex", "nr-rrc.BandEntryIndex", FT_UINT32, BASE_DEC, NULL, 0, @@ -82699,7 +87621,7 @@ proto_register_nr_rrc(void) { { "measTiming", "nr-rrc.measTiming", FT_UINT32, BASE_DEC, NULL, 0, "MeasTimingList", HFILL }}, - { &hf_nr_rrc_nonCriticalExtension_13, + { &hf_nr_rrc_nonCriticalExtension_15, { "nonCriticalExtension", "nr-rrc.nonCriticalExtension_element", FT_NONE, BASE_NONE, NULL, 0, "MeasurementTimingConfiguration_v1550_IEs", HFILL }}, @@ -82711,7 +87633,7 @@ proto_register_nr_rrc(void) { { "psCellOnlyOnFirstSSB", "nr-rrc.psCellOnlyOnFirstSSB", FT_BOOLEAN, BASE_NONE, NULL, 0, "BOOLEAN", HFILL }}, - { &hf_nr_rrc_nonCriticalExtension_14, + { &hf_nr_rrc_nonCriticalExtension_16, { "nonCriticalExtension", "nr-rrc.nonCriticalExtension_element", FT_NONE, BASE_NONE, NULL, 0, "MeasurementTimingConfiguration_v1610_IEs", HFILL }}, @@ -82731,7 +87653,7 @@ proto_register_nr_rrc(void) { { "refSSBFreq-r16", "nr-rrc.refSSBFreq_r16", FT_UINT32, BASE_DEC, NULL, 0, "ARFCN_ValueNR", HFILL }}, - { &hf_nr_rrc_nonCriticalExtension_15, + { &hf_nr_rrc_nonCriticalExtension_17, { "nonCriticalExtension", "nr-rrc.nonCriticalExtension_element", FT_NONE, BASE_NONE, NULL, 0, "T_nonCriticalExtension_04", HFILL }}, @@ -82807,7 +87729,7 @@ proto_register_nr_rrc(void) { { "FreqBandIndicatorNR", "nr-rrc.FreqBandIndicatorNR", FT_UINT32, BASE_DEC, NULL, 0, NULL, HFILL }}, - { &hf_nr_rrc_nonCriticalExtension_16, + { &hf_nr_rrc_nonCriticalExtension_18, { "nonCriticalExtension", "nr-rrc.nonCriticalExtension_element", FT_NONE, BASE_NONE, NULL, 0, "T_nonCriticalExtension_05", HFILL }}, @@ -82831,7 +87753,7 @@ proto_register_nr_rrc(void) { { "ue-RadioAccessCapabilityInfo", "nr-rrc.ue_RadioAccessCapabilityInfo", FT_BYTES, BASE_NONE, NULL, 0, NULL, HFILL }}, - { &hf_nr_rrc_nonCriticalExtension_17, + { &hf_nr_rrc_nonCriticalExtension_19, { "nonCriticalExtension", "nr-rrc.nonCriticalExtension_element", FT_NONE, BASE_NONE, NULL, 0, "T_nonCriticalExtension_06", HFILL }}, @@ -83155,7 +88077,7 @@ proto_register_nr_rrc(void) { { "lateNonCriticalExtension", "nr-rrc.lateNonCriticalExtension", FT_BYTES, BASE_NONE, NULL, 0, "OCTET_STRING", HFILL }}, - { &hf_nr_rrc_nonCriticalExtension_18, + { &hf_nr_rrc_nonCriticalExtension_20, { "nonCriticalExtension", "nr-rrc.nonCriticalExtension_element", FT_NONE, BASE_NONE, NULL, 0, "T_nonCriticalExtension_07", HFILL }}, @@ -83191,7 +88113,7 @@ proto_register_nr_rrc(void) { { "drb-CountInfoList", "nr-rrc.drb_CountInfoList", FT_UINT32, BASE_DEC, NULL, 0, NULL, HFILL }}, - { &hf_nr_rrc_nonCriticalExtension_19, + { &hf_nr_rrc_nonCriticalExtension_21, { "nonCriticalExtension", "nr-rrc.nonCriticalExtension_element", FT_NONE, BASE_NONE, NULL, 0, "T_nonCriticalExtension_08", HFILL }}, @@ -83239,7 +88161,7 @@ proto_register_nr_rrc(void) { { "PosSIB-ReqInfo-r16", "nr-rrc.PosSIB_ReqInfo_r16_element", FT_NONE, BASE_NONE, NULL, 0, NULL, HFILL }}, - { &hf_nr_rrc_nonCriticalExtension_20, + { &hf_nr_rrc_nonCriticalExtension_22, { "nonCriticalExtension", "nr-rrc.nonCriticalExtension_element", FT_NONE, BASE_NONE, NULL, 0, "T_nonCriticalExtension_09", HFILL }}, @@ -83279,7 +88201,7 @@ proto_register_nr_rrc(void) { { "rrc-MessageSegmentType-r16", "nr-rrc.rrc_MessageSegmentType_r16", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_rrc_MessageSegmentType_r16_vals), 0, NULL, HFILL }}, - { &hf_nr_rrc_nonCriticalExtension_21, + { &hf_nr_rrc_nonCriticalExtension_23, { "nonCriticalExtension", "nr-rrc.nonCriticalExtension_element", FT_NONE, BASE_NONE, NULL, 0, "T_nonCriticalExtension_10", HFILL }}, @@ -83299,7 +88221,7 @@ proto_register_nr_rrc(void) { { "dedicatedNAS-Message", "nr-rrc.dedicatedNAS_Message", FT_BYTES, BASE_NONE, NULL, 0, NULL, HFILL }}, - { &hf_nr_rrc_nonCriticalExtension_22, + { &hf_nr_rrc_nonCriticalExtension_24, { "nonCriticalExtension", "nr-rrc.nonCriticalExtension_element", FT_NONE, BASE_NONE, NULL, 0, "DLInformationTransfer_v1610_IEs", HFILL }}, @@ -83307,7 +88229,7 @@ proto_register_nr_rrc(void) { { "referenceTimeInfo-r16", "nr-rrc.referenceTimeInfo_r16_element", FT_NONE, BASE_NONE, NULL, 0, NULL, HFILL }}, - { &hf_nr_rrc_nonCriticalExtension_23, + { &hf_nr_rrc_nonCriticalExtension_25, { "nonCriticalExtension", "nr-rrc.nonCriticalExtension_element", FT_NONE, BASE_NONE, NULL, 0, "T_nonCriticalExtension_11", HFILL }}, @@ -83335,7 +88257,7 @@ proto_register_nr_rrc(void) { { "dl-DCCH-MessageEUTRA-r16", "nr-rrc.dl_DCCH_MessageEUTRA_r16", FT_BYTES, BASE_NONE, NULL, 0, NULL, HFILL }}, - { &hf_nr_rrc_nonCriticalExtension_24, + { &hf_nr_rrc_nonCriticalExtension_26, { "nonCriticalExtension", "nr-rrc.nonCriticalExtension_element", FT_NONE, BASE_NONE, NULL, 0, "T_nonCriticalExtension_12", HFILL }}, @@ -83355,7 +88277,7 @@ proto_register_nr_rrc(void) { { "failureInfoRLC-Bearer", "nr-rrc.failureInfoRLC_Bearer_element", FT_NONE, BASE_NONE, NULL, 0, NULL, HFILL }}, - { &hf_nr_rrc_nonCriticalExtension_25, + { &hf_nr_rrc_nonCriticalExtension_27, { "nonCriticalExtension", "nr-rrc.nonCriticalExtension_element", FT_NONE, BASE_NONE, NULL, 0, "FailureInformation_v1610_IEs", HFILL }}, @@ -83375,7 +88297,7 @@ proto_register_nr_rrc(void) { { "failureInfoDAPS-r16", "nr-rrc.failureInfoDAPS_r16_element", FT_NONE, BASE_NONE, NULL, 0, NULL, HFILL }}, - { &hf_nr_rrc_nonCriticalExtension_26, + { &hf_nr_rrc_nonCriticalExtension_28, { "nonCriticalExtension", "nr-rrc.nonCriticalExtension_element", FT_NONE, BASE_NONE, NULL, 0, "T_nonCriticalExtension_13", HFILL }}, @@ -83395,9 +88317,9 @@ proto_register_nr_rrc(void) { { "criticalExtensionsFuture", "nr-rrc.criticalExtensionsFuture_element", FT_NONE, BASE_NONE, NULL, 0, "T_criticalExtensionsFuture_14", HFILL }}, - { &hf_nr_rrc_ip_InfoType, - { "ip-InfoType", "nr-rrc.ip_InfoType", - FT_UINT32, BASE_DEC, VALS(nr_rrc_T_ip_InfoType_vals), 0, + { &hf_nr_rrc_ip_InfoType_r16, + { "ip-InfoType-r16", "nr-rrc.ip_InfoType_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_ip_InfoType_r16_vals), 0, NULL, HFILL }}, { &hf_nr_rrc_iab_IP_Request_r16, { "iab-IP-Request-r16", "nr-rrc.iab_IP_Request_r16_element", @@ -83406,7 +88328,7 @@ proto_register_nr_rrc(void) { { &hf_nr_rrc_iab_IPv4_AddressNumReq_r16, { "iab-IPv4-AddressNumReq-r16", "nr-rrc.iab_IPv4_AddressNumReq_r16_element", FT_NONE, BASE_NONE, NULL, 0, - "IAB_IPAddressNumReq_r16", HFILL }}, + "IAB_IP_AddressNumReq_r16", HFILL }}, { &hf_nr_rrc_iab_IPv6_AddressReq_r16, { "iab-IPv6-AddressReq-r16", "nr-rrc.iab_IPv6_AddressReq_r16", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_iab_IPv6_AddressReq_r16_vals), 0, @@ -83414,11 +88336,11 @@ proto_register_nr_rrc(void) { { &hf_nr_rrc_iab_IPv6_AddressNumReq_r16, { "iab-IPv6-AddressNumReq-r16", "nr-rrc.iab_IPv6_AddressNumReq_r16_element", FT_NONE, BASE_NONE, NULL, 0, - "IAB_IPAddressNumReq_r16", HFILL }}, + "IAB_IP_AddressNumReq_r16", HFILL }}, { &hf_nr_rrc_iab_IPv6_AddressPrefixReq_r16, { "iab-IPv6-AddressPrefixReq-r16", "nr-rrc.iab_IPv6_AddressPrefixReq_r16_element", FT_NONE, BASE_NONE, NULL, 0, - "IAB_IPAddressPrefixReq_r16", HFILL }}, + "IAB_IP_AddressPrefixReq_r16", HFILL }}, { &hf_nr_rrc_iab_IP_Report_r16, { "iab-IP-Report-r16", "nr-rrc.iab_IP_Report_r16_element", FT_NONE, BASE_NONE, NULL, 0, @@ -83439,7 +88361,7 @@ proto_register_nr_rrc(void) { { "iab-IPv6-PrefixReport-r16", "nr-rrc.iab_IPv6_PrefixReport_r16_element", FT_NONE, BASE_NONE, NULL, 0, "IAB_IP_PrefixAndTraffic_r16", HFILL }}, - { &hf_nr_rrc_nonCriticalExtension_27, + { &hf_nr_rrc_nonCriticalExtension_29, { "nonCriticalExtension", "nr-rrc.nonCriticalExtension_element", FT_NONE, BASE_NONE, NULL, 0, "T_nonCriticalExtension_14", HFILL }}, @@ -83543,7 +88465,7 @@ proto_register_nr_rrc(void) { { "setup", "nr-rrc.setup", FT_UINT32, BASE_DEC, VALS(nr_rrc_LocationMeasurementInfo_vals), 0, "LocationMeasurementInfo", HFILL }}, - { &hf_nr_rrc_nonCriticalExtension_28, + { &hf_nr_rrc_nonCriticalExtension_30, { "nonCriticalExtension", "nr-rrc.nonCriticalExtension_element", FT_NONE, BASE_NONE, NULL, 0, "T_nonCriticalExtension_15", HFILL }}, @@ -83623,7 +88545,7 @@ proto_register_nr_rrc(void) { { "eventTriggered", "nr-rrc.eventTriggered_element", FT_NONE, BASE_NONE, NULL, 0, "LoggedEventTriggerConfig_r16", HFILL }}, - { &hf_nr_rrc_nonCriticalExtension_29, + { &hf_nr_rrc_nonCriticalExtension_31, { "nonCriticalExtension", "nr-rrc.nonCriticalExtension_element", FT_NONE, BASE_NONE, NULL, 0, "T_nonCriticalExtension_16", HFILL }}, @@ -83671,7 +88593,7 @@ proto_register_nr_rrc(void) { { "failureReportMCG-r16", "nr-rrc.failureReportMCG_r16_element", FT_NONE, BASE_NONE, NULL, 0, NULL, HFILL }}, - { &hf_nr_rrc_nonCriticalExtension_30, + { &hf_nr_rrc_nonCriticalExtension_32, { "nonCriticalExtension", "nr-rrc.nonCriticalExtension_element", FT_NONE, BASE_NONE, NULL, 0, "T_nonCriticalExtension_17", HFILL }}, @@ -83731,7 +88653,7 @@ proto_register_nr_rrc(void) { { "measResults", "nr-rrc.measResults_element", FT_NONE, BASE_NONE, NULL, 0, NULL, HFILL }}, - { &hf_nr_rrc_nonCriticalExtension_31, + { &hf_nr_rrc_nonCriticalExtension_33, { "nonCriticalExtension", "nr-rrc.nonCriticalExtension_element", FT_NONE, BASE_NONE, NULL, 0, "T_nonCriticalExtension_18", HFILL }}, @@ -83791,7 +88713,7 @@ proto_register_nr_rrc(void) { { "nas-SecurityParamFromNR", "nr-rrc.nas_SecurityParamFromNR", FT_BYTES, BASE_NONE, NULL, 0, NULL, HFILL }}, - { &hf_nr_rrc_nonCriticalExtension_32, + { &hf_nr_rrc_nonCriticalExtension_34, { "nonCriticalExtension", "nr-rrc.nonCriticalExtension_element", FT_NONE, BASE_NONE, NULL, 0, "MobilityFromNRCommand_v1610_IEs", HFILL }}, @@ -83799,7 +88721,7 @@ proto_register_nr_rrc(void) { { "voiceFallbackIndication-r16", "nr-rrc.voiceFallbackIndication_r16", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_voiceFallbackIndication_r16_vals), 0, NULL, HFILL }}, - { &hf_nr_rrc_nonCriticalExtension_33, + { &hf_nr_rrc_nonCriticalExtension_35, { "nonCriticalExtension", "nr-rrc.nonCriticalExtension_element", FT_NONE, BASE_NONE, NULL, 0, "T_nonCriticalExtension_19", HFILL }}, @@ -83807,7 +88729,7 @@ proto_register_nr_rrc(void) { { "pagingRecordList", "nr-rrc.pagingRecordList", FT_UINT32, BASE_DEC, NULL, 0, NULL, HFILL }}, - { &hf_nr_rrc_nonCriticalExtension_34, + { &hf_nr_rrc_nonCriticalExtension_36, { "nonCriticalExtension", "nr-rrc.nonCriticalExtension_element", FT_NONE, BASE_NONE, NULL, 0, "T_nonCriticalExtension_20", HFILL }}, @@ -83847,7 +88769,7 @@ proto_register_nr_rrc(void) { { "nextHopChainingCount", "nr-rrc.nextHopChainingCount", FT_UINT32, BASE_DEC, NULL, 0, NULL, HFILL }}, - { &hf_nr_rrc_nonCriticalExtension_35, + { &hf_nr_rrc_nonCriticalExtension_37, { "nonCriticalExtension", "nr-rrc.nonCriticalExtension_element", FT_NONE, BASE_NONE, NULL, 0, "T_nonCriticalExtension_21", HFILL }}, @@ -83863,15 +88785,15 @@ proto_register_nr_rrc(void) { { "criticalExtensionsFuture", "nr-rrc.criticalExtensionsFuture_element", FT_NONE, BASE_NONE, NULL, 0, "T_criticalExtensionsFuture_21", HFILL }}, - { &hf_nr_rrc_nonCriticalExtension_36, + { &hf_nr_rrc_nonCriticalExtension_38, { "nonCriticalExtension", "nr-rrc.nonCriticalExtension_element", FT_NONE, BASE_NONE, NULL, 0, "RRCReestablishmentComplete_v1610_IEs", HFILL }}, - { &hf_nr_rrc_ueMeasurementsAvailable_r16, - { "ueMeasurementsAvailable-r16", "nr-rrc.ueMeasurementsAvailable_r16_element", + { &hf_nr_rrc_ue_MeasurementsAvailable_r16, + { "ue-MeasurementsAvailable-r16", "nr-rrc.ue_MeasurementsAvailable_r16_element", FT_NONE, BASE_NONE, NULL, 0, NULL, HFILL }}, - { &hf_nr_rrc_nonCriticalExtension_37, + { &hf_nr_rrc_nonCriticalExtension_39, { "nonCriticalExtension", "nr-rrc.nonCriticalExtension_element", FT_NONE, BASE_NONE, NULL, 0, "T_nonCriticalExtension_22", HFILL }}, @@ -83915,7 +88837,7 @@ proto_register_nr_rrc(void) { { "measConfig", "nr-rrc.measConfig_element", FT_NONE, BASE_NONE, NULL, 0, NULL, HFILL }}, - { &hf_nr_rrc_nonCriticalExtension_38, + { &hf_nr_rrc_nonCriticalExtension_40, { "nonCriticalExtension", "nr-rrc.nonCriticalExtension_element", FT_NONE, BASE_NONE, NULL, 0, "RRCReconfiguration_v1530_IEs", HFILL }}, @@ -83951,7 +88873,7 @@ proto_register_nr_rrc(void) { { "otherConfig", "nr-rrc.otherConfig_element", FT_NONE, BASE_NONE, NULL, 0, NULL, HFILL }}, - { &hf_nr_rrc_nonCriticalExtension_39, + { &hf_nr_rrc_nonCriticalExtension_41, { "nonCriticalExtension", "nr-rrc.nonCriticalExtension_element", FT_NONE, BASE_NONE, NULL, 0, "RRCReconfiguration_v1540_IEs", HFILL }}, @@ -83959,7 +88881,7 @@ proto_register_nr_rrc(void) { { "otherConfig-v1540", "nr-rrc.otherConfig_v1540_element", FT_NONE, BASE_NONE, NULL, 0, NULL, HFILL }}, - { &hf_nr_rrc_nonCriticalExtension_40, + { &hf_nr_rrc_nonCriticalExtension_42, { "nonCriticalExtension", "nr-rrc.nonCriticalExtension_element", FT_NONE, BASE_NONE, NULL, 0, "RRCReconfiguration_v1560_IEs", HFILL }}, @@ -83979,7 +88901,7 @@ proto_register_nr_rrc(void) { { "sk-Counter", "nr-rrc.sk_Counter", FT_UINT32, BASE_DEC, NULL, 0, NULL, HFILL }}, - { &hf_nr_rrc_nonCriticalExtension_41, + { &hf_nr_rrc_nonCriticalExtension_43, { "nonCriticalExtension", "nr-rrc.nonCriticalExtension_element", FT_NONE, BASE_NONE, NULL, 0, "RRCReconfiguration_v1610_IEs", HFILL }}, @@ -84051,7 +88973,11 @@ proto_register_nr_rrc(void) { { "setup", "nr-rrc.setup_element", FT_NONE, BASE_NONE, NULL, 0, "SL_ConfigDedicatedEUTRA_Info_r16", HFILL }}, - { &hf_nr_rrc_nonCriticalExtension_42, + { &hf_nr_rrc_smtc_r16, + { "smtc-r16", "nr-rrc.smtc_r16_element", + FT_NONE, BASE_NONE, NULL, 0, + "SSB_MTC", HFILL }}, + { &hf_nr_rrc_nonCriticalExtension_44, { "nonCriticalExtension", "nr-rrc.nonCriticalExtension_element", FT_NONE, BASE_NONE, NULL, 0, "T_nonCriticalExtension_23", HFILL }}, @@ -84075,10 +89001,10 @@ proto_register_nr_rrc(void) { { "bap-Address-r16", "nr-rrc.bap_Address_r16", FT_BYTES, BASE_NONE, NULL, 0, "BIT_STRING_SIZE_10", HFILL }}, - { &hf_nr_rrc_defaultUL_BAProutingID_r16, - { "defaultUL-BAProutingID-r16", "nr-rrc.defaultUL_BAProutingID_r16_element", + { &hf_nr_rrc_defaultUL_BAP_RoutingID_r16, + { "defaultUL-BAP-RoutingID-r16", "nr-rrc.defaultUL_BAP_RoutingID_r16_element", FT_NONE, BASE_NONE, NULL, 0, - "BAP_Routing_ID_r16", HFILL }}, + "BAP_RoutingID_r16", HFILL }}, { &hf_nr_rrc_defaultUL_BH_RLC_Channel_r16, { "defaultUL-BH-RLC-Channel-r16", "nr-rrc.defaultUL_BH_RLC_Channel_r16", FT_BYTES, BASE_NONE, NULL, 0, @@ -84155,7 +89081,7 @@ proto_register_nr_rrc(void) { { "criticalExtensionsFuture", "nr-rrc.criticalExtensionsFuture_element", FT_NONE, BASE_NONE, NULL, 0, "T_criticalExtensionsFuture_23", HFILL }}, - { &hf_nr_rrc_nonCriticalExtension_43, + { &hf_nr_rrc_nonCriticalExtension_45, { "nonCriticalExtension", "nr-rrc.nonCriticalExtension_element", FT_NONE, BASE_NONE, NULL, 0, "RRCReconfigurationComplete_v1530_IEs", HFILL }}, @@ -84163,7 +89089,7 @@ proto_register_nr_rrc(void) { { "uplinkTxDirectCurrentList", "nr-rrc.uplinkTxDirectCurrentList", FT_UINT32, BASE_DEC, NULL, 0, NULL, HFILL }}, - { &hf_nr_rrc_nonCriticalExtension_44, + { &hf_nr_rrc_nonCriticalExtension_46, { "nonCriticalExtension", "nr-rrc.nonCriticalExtension_element", FT_NONE, BASE_NONE, NULL, 0, "RRCReconfigurationComplete_v1560_IEs", HFILL }}, @@ -84179,11 +89105,11 @@ proto_register_nr_rrc(void) { { "eutra-SCG-Response", "nr-rrc.eutra_SCG_Response", FT_BYTES, BASE_NONE, NULL, 0, NULL, HFILL }}, - { &hf_nr_rrc_nonCriticalExtension_45, + { &hf_nr_rrc_nonCriticalExtension_47, { "nonCriticalExtension", "nr-rrc.nonCriticalExtension_element", FT_NONE, BASE_NONE, NULL, 0, "RRCReconfigurationComplete_v1610_IEs", HFILL }}, - { &hf_nr_rrc_nonCriticalExtension_46, + { &hf_nr_rrc_nonCriticalExtension_48, { "nonCriticalExtension", "nr-rrc.nonCriticalExtension_element", FT_NONE, BASE_NONE, NULL, 0, "T_nonCriticalExtension_24", HFILL }}, @@ -84203,7 +89129,7 @@ proto_register_nr_rrc(void) { { "waitTime", "nr-rrc.waitTime", FT_UINT32, BASE_DEC|BASE_UNIT_STRING, &units_seconds, 0, "RejectWaitTime", HFILL }}, - { &hf_nr_rrc_nonCriticalExtension_47, + { &hf_nr_rrc_nonCriticalExtension_49, { "nonCriticalExtension", "nr-rrc.nonCriticalExtension_element", FT_NONE, BASE_NONE, NULL, 0, "T_nonCriticalExtension_25", HFILL }}, @@ -84243,11 +89169,11 @@ proto_register_nr_rrc(void) { { "deprioritisationTimer", "nr-rrc.deprioritisationTimer", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_deprioritisationTimer_vals), 0, NULL, HFILL }}, - { &hf_nr_rrc_nonCriticalExtension_48, + { &hf_nr_rrc_nonCriticalExtension_50, { "nonCriticalExtension", "nr-rrc.nonCriticalExtension_element", FT_NONE, BASE_NONE, NULL, 0, "RRCRelease_v1540_IEs", HFILL }}, - { &hf_nr_rrc_nonCriticalExtension_49, + { &hf_nr_rrc_nonCriticalExtension_51, { "nonCriticalExtension", "nr-rrc.nonCriticalExtension_element", FT_NONE, BASE_NONE, NULL, 0, "RRCRelease_v1610_IEs", HFILL }}, @@ -84263,7 +89189,7 @@ proto_register_nr_rrc(void) { { "setup", "nr-rrc.setup_element", FT_NONE, BASE_NONE, NULL, 0, "MeasIdleConfigDedicated_r16", HFILL }}, - { &hf_nr_rrc_nonCriticalExtension_50, + { &hf_nr_rrc_nonCriticalExtension_52, { "nonCriticalExtension", "nr-rrc.nonCriticalExtension_element", FT_NONE, BASE_NONE, NULL, 0, "T_nonCriticalExtension_26", HFILL }}, @@ -84395,7 +89321,7 @@ proto_register_nr_rrc(void) { { "fullConfig", "nr-rrc.fullConfig", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_fullConfig_01_vals), 0, "T_fullConfig_01", HFILL }}, - { &hf_nr_rrc_nonCriticalExtension_51, + { &hf_nr_rrc_nonCriticalExtension_53, { "nonCriticalExtension", "nr-rrc.nonCriticalExtension_element", FT_NONE, BASE_NONE, NULL, 0, "RRCResume_v1560_IEs", HFILL }}, @@ -84403,7 +89329,7 @@ proto_register_nr_rrc(void) { { "radioBearerConfig2", "nr-rrc.radioBearerConfig2", FT_BYTES, BASE_NONE, NULL, 0, "T_radioBearerConfig2_01", HFILL }}, - { &hf_nr_rrc_nonCriticalExtension_52, + { &hf_nr_rrc_nonCriticalExtension_54, { "nonCriticalExtension", "nr-rrc.nonCriticalExtension_element", FT_NONE, BASE_NONE, NULL, 0, "RRCResume_v1610_IEs", HFILL }}, @@ -84435,7 +89361,7 @@ proto_register_nr_rrc(void) { { "needForGapsConfigNR-r16", "nr-rrc.needForGapsConfigNR_r16", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_needForGapsConfigNR_r16_01_vals), 0, "T_needForGapsConfigNR_r16_01", HFILL }}, - { &hf_nr_rrc_nonCriticalExtension_53, + { &hf_nr_rrc_nonCriticalExtension_55, { "nonCriticalExtension", "nr-rrc.nonCriticalExtension_element", FT_NONE, BASE_NONE, NULL, 0, "T_nonCriticalExtension_27", HFILL }}, @@ -84455,7 +89381,7 @@ proto_register_nr_rrc(void) { { "selectedPLMN-Identity", "nr-rrc.selectedPLMN_Identity", FT_UINT32, BASE_DEC, NULL, 0, "INTEGER_1_maxPLMN", HFILL }}, - { &hf_nr_rrc_nonCriticalExtension_54, + { &hf_nr_rrc_nonCriticalExtension_56, { "nonCriticalExtension", "nr-rrc.nonCriticalExtension_element", FT_NONE, BASE_NONE, NULL, 0, "RRCResumeComplete_v1610_IEs", HFILL }}, @@ -84491,7 +89417,7 @@ proto_register_nr_rrc(void) { { "mobilityState-r16", "nr-rrc.mobilityState_r16", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_mobilityState_r16_vals), 0, NULL, HFILL }}, - { &hf_nr_rrc_nonCriticalExtension_55, + { &hf_nr_rrc_nonCriticalExtension_57, { "nonCriticalExtension", "nr-rrc.nonCriticalExtension_element", FT_NONE, BASE_NONE, NULL, 0, "T_nonCriticalExtension_28", HFILL }}, @@ -84535,7 +89461,7 @@ proto_register_nr_rrc(void) { { "masterCellGroup", "nr-rrc.masterCellGroup", FT_BYTES, BASE_NONE, NULL, 0, "T_masterCellGroup_02", HFILL }}, - { &hf_nr_rrc_nonCriticalExtension_56, + { &hf_nr_rrc_nonCriticalExtension_58, { "nonCriticalExtension", "nr-rrc.nonCriticalExtension_element", FT_NONE, BASE_NONE, NULL, 0, "T_nonCriticalExtension_29", HFILL }}, @@ -84575,7 +89501,7 @@ proto_register_nr_rrc(void) { { "ng-5G-S-TMSI-Part2", "nr-rrc.ng_5G_S_TMSI_Part2", FT_BYTES, BASE_NONE, NULL, 0, "BIT_STRING_SIZE_9", HFILL }}, - { &hf_nr_rrc_nonCriticalExtension_57, + { &hf_nr_rrc_nonCriticalExtension_59, { "nonCriticalExtension", "nr-rrc.nonCriticalExtension_element", FT_NONE, BASE_NONE, NULL, 0, "RRCSetupComplete_v1610_IEs", HFILL }}, @@ -84595,7 +89521,7 @@ proto_register_nr_rrc(void) { { "mobilityState-r16", "nr-rrc.mobilityState_r16", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_mobilityState_r16_01_vals), 0, "T_mobilityState_r16_01", HFILL }}, - { &hf_nr_rrc_nonCriticalExtension_58, + { &hf_nr_rrc_nonCriticalExtension_60, { "nonCriticalExtension", "nr-rrc.nonCriticalExtension_element", FT_NONE, BASE_NONE, NULL, 0, "T_nonCriticalExtension_30", HFILL }}, @@ -84675,11 +89601,11 @@ proto_register_nr_rrc(void) { { "failureReportSCG", "nr-rrc.failureReportSCG_element", FT_NONE, BASE_NONE, NULL, 0, NULL, HFILL }}, - { &hf_nr_rrc_nonCriticalExtension_59, + { &hf_nr_rrc_nonCriticalExtension_61, { "nonCriticalExtension", "nr-rrc.nonCriticalExtension_element", FT_NONE, BASE_NONE, NULL, 0, "SCGFailureInformation_v1590_IEs", HFILL }}, - { &hf_nr_rrc_nonCriticalExtension_60, + { &hf_nr_rrc_nonCriticalExtension_62, { "nonCriticalExtension", "nr-rrc.nonCriticalExtension_element", FT_NONE, BASE_NONE, NULL, 0, "T_nonCriticalExtension_31", HFILL }}, @@ -84723,11 +89649,11 @@ proto_register_nr_rrc(void) { { "failureReportSCG-EUTRA", "nr-rrc.failureReportSCG_EUTRA_element", FT_NONE, BASE_NONE, NULL, 0, NULL, HFILL }}, - { &hf_nr_rrc_nonCriticalExtension_61, + { &hf_nr_rrc_nonCriticalExtension_63, { "nonCriticalExtension", "nr-rrc.nonCriticalExtension_element", FT_NONE, BASE_NONE, NULL, 0, "SCGFailureInformationEUTRA_v1590_IEs", HFILL }}, - { &hf_nr_rrc_nonCriticalExtension_62, + { &hf_nr_rrc_nonCriticalExtension_64, { "nonCriticalExtension", "nr-rrc.nonCriticalExtension_element", FT_NONE, BASE_NONE, NULL, 0, "T_nonCriticalExtension_32", HFILL }}, @@ -84763,7 +89689,7 @@ proto_register_nr_rrc(void) { { "securityConfigSMC", "nr-rrc.securityConfigSMC_element", FT_NONE, BASE_NONE, NULL, 0, NULL, HFILL }}, - { &hf_nr_rrc_nonCriticalExtension_63, + { &hf_nr_rrc_nonCriticalExtension_65, { "nonCriticalExtension", "nr-rrc.nonCriticalExtension_element", FT_NONE, BASE_NONE, NULL, 0, "T_nonCriticalExtension_33", HFILL }}, @@ -84783,7 +89709,7 @@ proto_register_nr_rrc(void) { { "criticalExtensionsFuture", "nr-rrc.criticalExtensionsFuture_element", FT_NONE, BASE_NONE, NULL, 0, "T_criticalExtensionsFuture_34", HFILL }}, - { &hf_nr_rrc_nonCriticalExtension_64, + { &hf_nr_rrc_nonCriticalExtension_66, { "nonCriticalExtension", "nr-rrc.nonCriticalExtension_element", FT_NONE, BASE_NONE, NULL, 0, "T_nonCriticalExtension_34", HFILL }}, @@ -84799,7 +89725,7 @@ proto_register_nr_rrc(void) { { "criticalExtensionsFuture", "nr-rrc.criticalExtensionsFuture_element", FT_NONE, BASE_NONE, NULL, 0, "T_criticalExtensionsFuture_35", HFILL }}, - { &hf_nr_rrc_nonCriticalExtension_65, + { &hf_nr_rrc_nonCriticalExtension_67, { "nonCriticalExtension", "nr-rrc.nonCriticalExtension_element", FT_NONE, BASE_NONE, NULL, 0, "T_nonCriticalExtension_35", HFILL }}, @@ -84891,7 +89817,7 @@ proto_register_nr_rrc(void) { { "useFullResumeID", "nr-rrc.useFullResumeID", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_useFullResumeID_vals), 0, NULL, HFILL }}, - { &hf_nr_rrc_nonCriticalExtension_66, + { &hf_nr_rrc_nonCriticalExtension_68, { "nonCriticalExtension", "nr-rrc.nonCriticalExtension_element", FT_NONE, BASE_NONE, NULL, 0, "SIB1_v1610_IEs", HFILL }}, @@ -84907,7 +89833,7 @@ proto_register_nr_rrc(void) { { "posSI-SchedulingInfo-r16", "nr-rrc.posSI_SchedulingInfo_r16_element", FT_NONE, BASE_NONE, NULL, 0, NULL, HFILL }}, - { &hf_nr_rrc_nonCriticalExtension_67, + { &hf_nr_rrc_nonCriticalExtension_69, { "nonCriticalExtension", "nr-rrc.nonCriticalExtension_element", FT_NONE, BASE_NONE, NULL, 0, "T_nonCriticalExtension_36", HFILL }}, @@ -84935,7 +89861,7 @@ proto_register_nr_rrc(void) { { "sl-FailureList-r16", "nr-rrc.sl_FailureList_r16", FT_UINT32, BASE_DEC, NULL, 0, NULL, HFILL }}, - { &hf_nr_rrc_nonCriticalExtension_68, + { &hf_nr_rrc_nonCriticalExtension_70, { "nonCriticalExtension", "nr-rrc.nonCriticalExtension_element", FT_NONE, BASE_NONE, NULL, 0, "T_nonCriticalExtension_37", HFILL }}, @@ -85099,7 +90025,7 @@ proto_register_nr_rrc(void) { { "sib14-v1610", "nr-rrc.sib14_v1610_element", FT_NONE, BASE_NONE, NULL, 0, "SIB14_r16", HFILL }}, - { &hf_nr_rrc_nonCriticalExtension_69, + { &hf_nr_rrc_nonCriticalExtension_71, { "nonCriticalExtension", "nr-rrc.nonCriticalExtension_element", FT_NONE, BASE_NONE, NULL, 0, "T_nonCriticalExtension_38", HFILL }}, @@ -85119,7 +90045,7 @@ proto_register_nr_rrc(void) { { "delayBudgetReport", "nr-rrc.delayBudgetReport", FT_UINT32, BASE_DEC, VALS(nr_rrc_DelayBudgetReport_vals), 0, NULL, HFILL }}, - { &hf_nr_rrc_nonCriticalExtension_70, + { &hf_nr_rrc_nonCriticalExtension_72, { "nonCriticalExtension", "nr-rrc.nonCriticalExtension_element", FT_NONE, BASE_NONE, NULL, 0, "UEAssistanceInformation_v1540_IEs", HFILL }}, @@ -85131,7 +90057,7 @@ proto_register_nr_rrc(void) { { "overheatingAssistance", "nr-rrc.overheatingAssistance_element", FT_NONE, BASE_NONE, NULL, 0, NULL, HFILL }}, - { &hf_nr_rrc_nonCriticalExtension_71, + { &hf_nr_rrc_nonCriticalExtension_73, { "nonCriticalExtension", "nr-rrc.nonCriticalExtension_element", FT_NONE, BASE_NONE, NULL, 0, "UEAssistanceInformation_v1610_IEs", HFILL }}, @@ -85207,7 +90133,7 @@ proto_register_nr_rrc(void) { { "referenceTimeInfoPreference-r16", "nr-rrc.referenceTimeInfoPreference_r16", FT_BOOLEAN, BASE_NONE, NULL, 0, "BOOLEAN", HFILL }}, - { &hf_nr_rrc_nonCriticalExtension_72, + { &hf_nr_rrc_nonCriticalExtension_74, { "nonCriticalExtension", "nr-rrc.nonCriticalExtension_element", FT_NONE, BASE_NONE, NULL, 0, "T_nonCriticalExtension_39", HFILL }}, @@ -85427,7 +90353,7 @@ proto_register_nr_rrc(void) { { "capabilityRequestFilterCommon", "nr-rrc.capabilityRequestFilterCommon_element", FT_NONE, BASE_NONE, NULL, 0, "UE_CapabilityRequestFilterCommon", HFILL }}, - { &hf_nr_rrc_nonCriticalExtension_73, + { &hf_nr_rrc_nonCriticalExtension_75, { "nonCriticalExtension", "nr-rrc.nonCriticalExtension_element", FT_NONE, BASE_NONE, NULL, 0, "UECapabilityEnquiry_v1610_IEs", HFILL }}, @@ -85435,7 +90361,7 @@ proto_register_nr_rrc(void) { { "rrc-SegAllowed-r16", "nr-rrc.rrc_SegAllowed_r16", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_rrc_SegAllowed_r16_vals), 0, NULL, HFILL }}, - { &hf_nr_rrc_nonCriticalExtension_74, + { &hf_nr_rrc_nonCriticalExtension_76, { "nonCriticalExtension", "nr-rrc.nonCriticalExtension_element", FT_NONE, BASE_NONE, NULL, 0, "T_nonCriticalExtension_40", HFILL }}, @@ -85455,7 +90381,7 @@ proto_register_nr_rrc(void) { { "ue-CapabilityRAT-ContainerList", "nr-rrc.ue_CapabilityRAT_ContainerList", FT_UINT32, BASE_DEC, NULL, 0, NULL, HFILL }}, - { &hf_nr_rrc_nonCriticalExtension_75, + { &hf_nr_rrc_nonCriticalExtension_77, { "nonCriticalExtension", "nr-rrc.nonCriticalExtension_element", FT_NONE, BASE_NONE, NULL, 0, "T_nonCriticalExtension_41", HFILL }}, @@ -85495,7 +90421,7 @@ proto_register_nr_rrc(void) { { "mobilityHistoryReportReq-r16", "nr-rrc.mobilityHistoryReportReq_r16", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_mobilityHistoryReportReq_r16_vals), 0, NULL, HFILL }}, - { &hf_nr_rrc_nonCriticalExtension_76, + { &hf_nr_rrc_nonCriticalExtension_78, { "nonCriticalExtension", "nr-rrc.nonCriticalExtension_element", FT_NONE, BASE_NONE, NULL, 0, "T_nonCriticalExtension_42", HFILL }}, @@ -85531,7 +90457,7 @@ proto_register_nr_rrc(void) { { "mobilityHistoryReport-r16", "nr-rrc.mobilityHistoryReport_r16", FT_UINT32, BASE_DEC, NULL, 0, NULL, HFILL }}, - { &hf_nr_rrc_nonCriticalExtension_77, + { &hf_nr_rrc_nonCriticalExtension_79, { "nonCriticalExtension", "nr-rrc.nonCriticalExtension_element", FT_NONE, BASE_NONE, NULL, 0, "T_nonCriticalExtension_43", HFILL }}, @@ -85660,9 +90586,21 @@ proto_register_nr_rrc(void) { FT_NONE, BASE_NONE, NULL, 0, NULL, HFILL }}, { &hf_nr_rrc_cellId_r16, - { "cellId-r16", "nr-rrc.cellId_r16_element", + { "cellId-r16", "nr-rrc.cellId_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_cellId_r16_vals), 0, + NULL, HFILL }}, + { &hf_nr_rrc_cellGlobalId_r16, + { "cellGlobalId-r16", "nr-rrc.cellGlobalId_r16_element", FT_NONE, BASE_NONE, NULL, 0, "CGI_Info_Logging_r16", HFILL }}, + { &hf_nr_rrc_pci_arfcn_r16, + { "pci-arfcn-r16", "nr-rrc.pci_arfcn_r16_element", + FT_NONE, BASE_NONE, NULL, 0, + NULL, HFILL }}, + { &hf_nr_rrc_physCellId_r16, + { "physCellId-r16", "nr-rrc.physCellId_r16", + FT_UINT32, BASE_DEC, NULL, 0, + "PhysCellId", HFILL }}, { &hf_nr_rrc_ra_InformationCommon_r16, { "ra-InformationCommon-r16", "nr-rrc.ra_InformationCommon_r16_element", FT_NONE, BASE_NONE, NULL, 0, @@ -85795,18 +90733,10 @@ proto_register_nr_rrc(void) { { "nrFailedPCellId-r16", "nr-rrc.nrFailedPCellId_r16", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_nrFailedPCellId_r16_vals), 0, NULL, HFILL }}, - { &hf_nr_rrc_cellGlobalId_r16, - { "cellGlobalId-r16", "nr-rrc.cellGlobalId_r16_element", - FT_NONE, BASE_NONE, NULL, 0, - "CGI_Info_Logging_r16", HFILL }}, - { &hf_nr_rrc_pci_arfcn_r16, + { &hf_nr_rrc_pci_arfcn_r16_01, { "pci-arfcn-r16", "nr-rrc.pci_arfcn_r16_element", FT_NONE, BASE_NONE, NULL, 0, - NULL, HFILL }}, - { &hf_nr_rrc_physCellId_r16, - { "physCellId-r16", "nr-rrc.physCellId_r16", - FT_UINT32, BASE_DEC, NULL, 0, - "PhysCellId", HFILL }}, + "T_pci_arfcn_r16_01", HFILL }}, { &hf_nr_rrc_eutraFailedPCellId_r16, { "eutraFailedPCellId-r16", "nr-rrc.eutraFailedPCellId_r16", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_eutraFailedPCellId_r16_vals), 0, @@ -85815,10 +90745,10 @@ proto_register_nr_rrc(void) { { "cellGlobalId-r16", "nr-rrc.cellGlobalId_r16_element", FT_NONE, BASE_NONE, NULL, 0, "CGI_InfoEUTRALogging", HFILL }}, - { &hf_nr_rrc_pci_arfcn_r16_01, + { &hf_nr_rrc_pci_arfcn_r16_02, { "pci-arfcn-r16", "nr-rrc.pci_arfcn_r16_element", FT_NONE, BASE_NONE, NULL, 0, - "T_pci_arfcn_r16_01", HFILL }}, + "T_pci_arfcn_r16_02", HFILL }}, { &hf_nr_rrc_physCellId_r16_01, { "physCellId-r16", "nr-rrc.physCellId_r16", FT_UINT32, BASE_DEC, NULL, 0, @@ -85896,7 +90826,11 @@ proto_register_nr_rrc(void) { FT_UINT32, BASE_DEC, NULL, 0, "MeasResultListNR", HFILL }}, { &hf_nr_rrc_MeasResultListLogging2NR_r16_item, - { "MeasResultListLoggingNR-r16", "nr-rrc.MeasResultListLoggingNR_r16", + { "MeasResultLogging2NR-r16", "nr-rrc.MeasResultLogging2NR_r16_element", + FT_NONE, BASE_NONE, NULL, 0, + NULL, HFILL }}, + { &hf_nr_rrc_measResultListLoggingNR_r16, + { "measResultListLoggingNR-r16", "nr-rrc.measResultListLoggingNR_r16", FT_UINT32, BASE_DEC, NULL, 0, NULL, HFILL }}, { &hf_nr_rrc_MeasResultListLoggingNR_r16_item, @@ -85959,7 +90893,7 @@ proto_register_nr_rrc(void) { { "rrc-MessageSegmentType-r16", "nr-rrc.rrc_MessageSegmentType_r16", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_rrc_MessageSegmentType_r16_01_vals), 0, "T_rrc_MessageSegmentType_r16_01", HFILL }}, - { &hf_nr_rrc_nonCriticalExtension_78, + { &hf_nr_rrc_nonCriticalExtension_80, { "nonCriticalExtension", "nr-rrc.nonCriticalExtension_element", FT_NONE, BASE_NONE, NULL, 0, "T_nonCriticalExtension_44", HFILL }}, @@ -85975,7 +90909,7 @@ proto_register_nr_rrc(void) { { "criticalExtensionsFuture", "nr-rrc.criticalExtensionsFuture_element", FT_NONE, BASE_NONE, NULL, 0, "T_criticalExtensionsFuture_44", HFILL }}, - { &hf_nr_rrc_nonCriticalExtension_79, + { &hf_nr_rrc_nonCriticalExtension_81, { "nonCriticalExtension", "nr-rrc.nonCriticalExtension_element", FT_NONE, BASE_NONE, NULL, 0, "T_nonCriticalExtension_45", HFILL }}, @@ -85999,7 +90933,7 @@ proto_register_nr_rrc(void) { { "ul-DCCH-MessageEUTRA-r16", "nr-rrc.ul_DCCH_MessageEUTRA_r16", FT_BYTES, BASE_NONE, NULL, 0, NULL, HFILL }}, - { &hf_nr_rrc_nonCriticalExtension_80, + { &hf_nr_rrc_nonCriticalExtension_82, { "nonCriticalExtension", "nr-rrc.nonCriticalExtension_element", FT_NONE, BASE_NONE, NULL, 0, "T_nonCriticalExtension_46", HFILL }}, @@ -86027,7 +90961,7 @@ proto_register_nr_rrc(void) { { "ul-DCCH-MessageEUTRA", "nr-rrc.ul_DCCH_MessageEUTRA", FT_BYTES, BASE_NONE, NULL, 0, NULL, HFILL }}, - { &hf_nr_rrc_nonCriticalExtension_81, + { &hf_nr_rrc_nonCriticalExtension_83, { "nonCriticalExtension", "nr-rrc.nonCriticalExtension_element", FT_NONE, BASE_NONE, NULL, 0, "T_nonCriticalExtension_47", HFILL }}, @@ -86190,9 +91124,9 @@ proto_register_nr_rrc(void) { { &hf_nr_rrc_intraFreqCAG_CellList_r16, { "intraFreqCAG-CellList-r16", "nr-rrc.intraFreqCAG_CellList_r16", FT_UINT32, BASE_DEC, NULL, 0, - "SEQUENCE_SIZE_1_maxPLMN_OF_IntraFreqCAG_CellPerPLMN_r16", HFILL }}, + "SEQUENCE_SIZE_1_maxPLMN_OF_IntraFreqCAG_CellListPerPLMN_r16", HFILL }}, { &hf_nr_rrc_intraFreqCAG_CellList_r16_item, - { "IntraFreqCAG-CellPerPLMN-r16", "nr-rrc.IntraFreqCAG_CellPerPLMN_r16_element", + { "IntraFreqCAG-CellListPerPLMN-r16", "nr-rrc.IntraFreqCAG_CellListPerPLMN_r16_element", FT_NONE, BASE_NONE, NULL, 0, NULL, HFILL }}, { &hf_nr_rrc_IntraFreqNeighCellList_item, @@ -86306,9 +91240,9 @@ proto_register_nr_rrc(void) { { &hf_nr_rrc_interFreqCAG_CellList_r16, { "interFreqCAG-CellList-r16", "nr-rrc.interFreqCAG_CellList_r16", FT_UINT32, BASE_DEC, NULL, 0, - "SEQUENCE_SIZE_1_maxPLMN_OF_InterFreqCAG_CellList_r16", HFILL }}, + "SEQUENCE_SIZE_1_maxPLMN_OF_InterFreqCAG_CellListPerPLMN_r16", HFILL }}, { &hf_nr_rrc_interFreqCAG_CellList_r16_item, - { "InterFreqCAG-CellList-r16", "nr-rrc.InterFreqCAG_CellList_r16_element", + { "InterFreqCAG-CellListPerPLMN-r16", "nr-rrc.InterFreqCAG_CellListPerPLMN_r16_element", FT_NONE, BASE_NONE, NULL, 0, NULL, HFILL }}, { &hf_nr_rrc_InterFreqNeighCellList_item, @@ -86699,7 +91633,7 @@ proto_register_nr_rrc(void) { { "posSib6-3-r16", "nr-rrc.posSib6_3_r16_element", FT_NONE, BASE_NONE, NULL, 0, "SIBpos_r16", HFILL }}, - { &hf_nr_rrc_nonCriticalExtension_82, + { &hf_nr_rrc_nonCriticalExtension_84, { "nonCriticalExtension", "nr-rrc.nonCriticalExtension_element", FT_NONE, BASE_NONE, NULL, 0, "T_nonCriticalExtension_48", HFILL }}, @@ -87447,6 +92381,10 @@ proto_register_nr_rrc(void) { { "uplinkTxSwitchingOption-r16", "nr-rrc.uplinkTxSwitchingOption_r16", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_uplinkTxSwitchingOption_r16_vals), 0, NULL, HFILL }}, + { &hf_nr_rrc_uplinkTxSwitchingPowerBoosting_r16, + { "uplinkTxSwitchingPowerBoosting-r16", "nr-rrc.uplinkTxSwitchingPowerBoosting_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_uplinkTxSwitchingPowerBoosting_r16_vals), 0, + NULL, HFILL }}, { &hf_nr_rrc_reconfigurationWithSync, { "reconfigurationWithSync", "nr-rrc.reconfigurationWithSync_element", FT_NONE, BASE_NONE, NULL, 0, @@ -88263,8 +93201,8 @@ proto_register_nr_rrc(void) { { "rb-Offset-r16", "nr-rrc.rb_Offset_r16", FT_UINT32, BASE_DEC, NULL, 0, "INTEGER_0_5", HFILL }}, - { &hf_nr_rrc_tci_PresentForDCI_Format1_2_r16, - { "tci-PresentForDCI-Format1-2-r16", "nr-rrc.tci_PresentForDCI_Format1_2_r16", + { &hf_nr_rrc_tci_PresentDCI_1_2_r16, + { "tci-PresentDCI-1-2-r16", "nr-rrc.tci_PresentDCI_1_2_r16", FT_UINT32, BASE_DEC, NULL, 0, "INTEGER_1_3", HFILL }}, { &hf_nr_rrc_coresetPoolIndex_r16, @@ -88299,18 +93237,22 @@ proto_register_nr_rrc(void) { { "cif-InSchedulingCell", "nr-rrc.cif_InSchedulingCell", FT_UINT32, BASE_DEC, NULL, 0, "INTEGER_1_7", HFILL }}, - { &hf_nr_rrc_carrierIndicatorSize, - { "carrierIndicatorSize", "nr-rrc.carrierIndicatorSize_element", + { &hf_nr_rrc_carrierIndicatorSize_r16, + { "carrierIndicatorSize-r16", "nr-rrc.carrierIndicatorSize_r16_element", FT_NONE, BASE_NONE, NULL, 0, NULL, HFILL }}, - { &hf_nr_rrc_carrierIndicatorSizeForDCI_Format1_2_r16, - { "carrierIndicatorSizeForDCI-Format1-2-r16", "nr-rrc.carrierIndicatorSizeForDCI_Format1_2_r16", + { &hf_nr_rrc_carrierIndicatorSizeDCI_1_2_r16, + { "carrierIndicatorSizeDCI-1-2-r16", "nr-rrc.carrierIndicatorSizeDCI_1_2_r16", FT_UINT32, BASE_DEC, NULL, 0, "INTEGER_0_3", HFILL }}, - { &hf_nr_rrc_carrierIndicatorSizeForDCI_Format0_2_r16, - { "carrierIndicatorSizeForDCI-Format0-2-r16", "nr-rrc.carrierIndicatorSizeForDCI_Format0_2_r16", + { &hf_nr_rrc_carrierIndicatorSizeDCI_0_2_r16, + { "carrierIndicatorSizeDCI-0-2-r16", "nr-rrc.carrierIndicatorSizeDCI_0_2_r16", FT_UINT32, BASE_DEC, NULL, 0, "INTEGER_0_3", HFILL }}, + { &hf_nr_rrc_enableDefaultBeamForCCS_r16, + { "enableDefaultBeamForCCS-r16", "nr-rrc.enableDefaultBeamForCCS_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_enableDefaultBeamForCCS_r16_vals), 0, + NULL, HFILL }}, { &hf_nr_rrc_CSI_AperiodicTriggerStateList_item, { "CSI-AperiodicTriggerState", "nr-rrc.CSI_AperiodicTriggerState_element", FT_NONE, BASE_NONE, NULL, 0, @@ -88551,8 +93493,8 @@ proto_register_nr_rrc(void) { { "setup", "nr-rrc.setup", FT_UINT32, BASE_DEC, NULL, 0, "CSI_SemiPersistentOnPUSCH_TriggerStateList", HFILL }}, - { &hf_nr_rrc_reportTriggerSizeForDCI_Format0_2_r16, - { "reportTriggerSizeForDCI-Format0-2-r16", "nr-rrc.reportTriggerSizeForDCI_Format0_2_r16", + { &hf_nr_rrc_reportTriggerSizeDCI_0_2_r16, + { "reportTriggerSizeDCI-0-2-r16", "nr-rrc.reportTriggerSizeDCI_0_2_r16", FT_UINT32, BASE_DEC, NULL, 0, "INTEGER_0_6", HFILL }}, { &hf_nr_rrc_carrier, @@ -88807,34 +93749,34 @@ proto_register_nr_rrc(void) { { "semiPersistentOnPUSCH-v1610", "nr-rrc.semiPersistentOnPUSCH_v1610_element", FT_NONE, BASE_NONE, NULL, 0, NULL, HFILL }}, - { &hf_nr_rrc_reportSlotOffsetListForDCI_Format0_2_r16, - { "reportSlotOffsetListForDCI-Format0-2-r16", "nr-rrc.reportSlotOffsetListForDCI_Format0_2_r16", + { &hf_nr_rrc_reportSlotOffsetListDCI_0_2_r16, + { "reportSlotOffsetListDCI-0-2-r16", "nr-rrc.reportSlotOffsetListDCI_0_2_r16", FT_UINT32, BASE_DEC, NULL, 0, NULL, HFILL }}, - { &hf_nr_rrc_reportSlotOffsetListForDCI_Format0_2_r16_item, - { "reportSlotOffsetListForDCI-Format0-2-r16 item", "nr-rrc.reportSlotOffsetListForDCI_Format0_2_r16_item", + { &hf_nr_rrc_reportSlotOffsetListDCI_0_2_r16_item, + { "reportSlotOffsetListDCI-0-2-r16 item", "nr-rrc.reportSlotOffsetListDCI_0_2_r16_item", FT_UINT32, BASE_DEC, NULL, 0, "INTEGER_0_32", HFILL }}, - { &hf_nr_rrc_reportSlotOffsetListForDCI_Format0_1_r16, - { "reportSlotOffsetListForDCI-Format0-1-r16", "nr-rrc.reportSlotOffsetListForDCI_Format0_1_r16", + { &hf_nr_rrc_reportSlotOffsetListDCI_0_1_r16, + { "reportSlotOffsetListDCI-0-1-r16", "nr-rrc.reportSlotOffsetListDCI_0_1_r16", FT_UINT32, BASE_DEC, NULL, 0, NULL, HFILL }}, - { &hf_nr_rrc_reportSlotOffsetListForDCI_Format0_1_r16_item, - { "reportSlotOffsetListForDCI-Format0-1-r16 item", "nr-rrc.reportSlotOffsetListForDCI_Format0_1_r16_item", + { &hf_nr_rrc_reportSlotOffsetListDCI_0_1_r16_item, + { "reportSlotOffsetListDCI-0-1-r16 item", "nr-rrc.reportSlotOffsetListDCI_0_1_r16_item", FT_UINT32, BASE_DEC, NULL, 0, "INTEGER_0_32", HFILL }}, { &hf_nr_rrc_aperiodic_v1610, { "aperiodic-v1610", "nr-rrc.aperiodic_v1610_element", FT_NONE, BASE_NONE, NULL, 0, NULL, HFILL }}, - { &hf_nr_rrc_reportSlotOffsetListForDCI_Format0_2_r16_01, - { "reportSlotOffsetListForDCI-Format0-2-r16", "nr-rrc.reportSlotOffsetListForDCI_Format0_2_r16", + { &hf_nr_rrc_reportSlotOffsetListDCI_0_2_r16_01, + { "reportSlotOffsetListDCI-0-2-r16", "nr-rrc.reportSlotOffsetListDCI_0_2_r16", FT_UINT32, BASE_DEC, NULL, 0, - "T_reportSlotOffsetListForDCI_Format0_2_r16_01", HFILL }}, - { &hf_nr_rrc_reportSlotOffsetListForDCI_Format0_1_r16_01, - { "reportSlotOffsetListForDCI-Format0-1-r16", "nr-rrc.reportSlotOffsetListForDCI_Format0_1_r16", + "T_reportSlotOffsetListDCI_0_2_r16_01", HFILL }}, + { &hf_nr_rrc_reportSlotOffsetListDCI_0_1_r16_01, + { "reportSlotOffsetListDCI-0-1-r16", "nr-rrc.reportSlotOffsetListDCI_0_1_r16", FT_UINT32, BASE_DEC, NULL, 0, - "T_reportSlotOffsetListForDCI_Format0_1_r16_01", HFILL }}, + "T_reportSlotOffsetListDCI_0_1_r16_01", HFILL }}, { &hf_nr_rrc_reportQuantity_r16, { "reportQuantity-r16", "nr-rrc.reportQuantity_r16", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_reportQuantity_r16_vals), 0, @@ -89663,8 +94605,8 @@ proto_register_nr_rrc(void) { { "NR-PRS-MeasurementInfo-r16", "nr-rrc.NR_PRS_MeasurementInfo_r16_element", FT_NONE, BASE_NONE, NULL, 0, NULL, HFILL }}, - { &hf_nr_rrc_dl_PRS_ARFCN_PointA_r16, - { "dl-PRS-ARFCN-PointA-r16", "nr-rrc.dl_PRS_ARFCN_PointA_r16", + { &hf_nr_rrc_dl_PRS_PointA_r16, + { "dl-PRS-PointA-r16", "nr-rrc.dl_PRS_PointA_r16", FT_UINT32, BASE_DEC, NULL, 0, "ARFCN_ValueNR", HFILL }}, { &hf_nr_rrc_nr_MeasPRS_RepetitionAndOffset_r16, @@ -89935,6 +94877,10 @@ proto_register_nr_rrc(void) { { "refFR2ServCellAsyncCA-r16", "nr-rrc.refFR2ServCellAsyncCA_r16", FT_UINT32, BASE_DEC, NULL, 0, "ServCellIndex", HFILL }}, + { &hf_nr_rrc_mgl_r16, + { "mgl-r16", "nr-rrc.mgl_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_mgl_r16_vals), 0, + NULL, HFILL }}, { &hf_nr_rrc_gapSharingFR2, { "gapSharingFR2", "nr-rrc.gapSharingFR2", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_gapSharingFR2_vals), 0, @@ -90023,10 +94969,6 @@ proto_register_nr_rrc(void) { { "absThreshSS-BlocksConsolidation-r16", "nr-rrc.absThreshSS_BlocksConsolidation_r16_element", FT_NONE, BASE_NONE, NULL, 0, "ThresholdNR", HFILL }}, - { &hf_nr_rrc_smtc_r16, - { "smtc-r16", "nr-rrc.smtc_r16_element", - FT_NONE, BASE_NONE, NULL, 0, - "SSB_MTC", HFILL }}, { &hf_nr_rrc_ssb_ToMeasure_r16, { "ssb-ToMeasure-r16", "nr-rrc.ssb_ToMeasure_r16", FT_UINT32, BASE_DEC, VALS(nr_rrc_SSB_ToMeasure_vals), 0, @@ -90143,6 +95085,14 @@ proto_register_nr_rrc(void) { { "srs-SCS-r16", "nr-rrc.srs_SCS_r16", FT_UINT32, BASE_DEC, VALS(nr_rrc_SubcarrierSpacing_vals), 0, "SubcarrierSpacing", HFILL }}, + { &hf_nr_rrc_refServCellIndex_r16, + { "refServCellIndex-r16", "nr-rrc.refServCellIndex_r16", + FT_UINT32, BASE_DEC, NULL, 0, + "ServCellIndex", HFILL }}, + { &hf_nr_rrc_refBWP_r16, + { "refBWP-r16", "nr-rrc.refBWP_r16", + FT_UINT32, BASE_DEC, NULL, 0, + "BWP_Id", HFILL }}, { &hf_nr_rrc_rssi_ResourceId_r16, { "rssi-ResourceId-r16", "nr-rrc.rssi_ResourceId_r16", FT_UINT32, BASE_DEC, NULL, 0, @@ -90717,8 +95667,8 @@ proto_register_nr_rrc(void) { "INTEGER_0_49", HFILL }}, { &hf_nr_rrc_rssi_Result_r16, { "rssi-Result-r16", "nr-rrc.rssi_Result_r16", - FT_UINT32, BASE_DEC, VALS(nr_rrc_T_rssi_Result_r16_vals), 0, - "T_rssi_Result_r16", HFILL }}, + FT_UINT32, BASE_CUSTOM, CF_FUNC(nr_rrc_RSSI_Range_r16_fmt), 0, + "RSSI_Range_r16", HFILL }}, { &hf_nr_rrc_channelOccupancy_r16, { "channelOccupancy-r16", "nr-rrc.channelOccupancy_r16", FT_UINT32, BASE_DEC|BASE_UNIT_STRING, &units_percent, 0, @@ -90749,7 +95699,7 @@ proto_register_nr_rrc(void) { NULL, HFILL }}, { &hf_nr_rrc_cli_RSSI_Result_r16, { "cli-RSSI-Result-r16", "nr-rrc.cli_RSSI_Result_r16", - FT_UINT32, BASE_CUSTOM, CF_FUNC(nr_rrc_CLI_RSSI_Range_r16_fmt), 0, + FT_UINT32, BASE_CUSTOM, CF_FUNC(nr_rrc_RSSI_Range_r16_fmt), 0, "CLI_RSSI_Range_r16", HFILL }}, { &hf_nr_rrc_UL_PDCP_DelayValueResultList_r16_item, { "UL-PDCP-DelayValueResult-r16", "nr-rrc.UL_PDCP_DelayValueResult_r16_element", @@ -91030,11 +95980,11 @@ proto_register_nr_rrc(void) { { &hf_nr_rrc_msgA_ScramblingID0_r16, { "msgA-ScramblingID0-r16", "nr-rrc.msgA_ScramblingID0_r16", FT_UINT32, BASE_DEC, NULL, 0, - "INTEGER_0_65536", HFILL }}, + "INTEGER_0_65535", HFILL }}, { &hf_nr_rrc_msgA_ScramblingID1_r16, { "msgA-ScramblingID1-r16", "nr-rrc.msgA_ScramblingID1_r16", FT_UINT32, BASE_DEC, NULL, 0, - "INTEGER_0_65536", HFILL }}, + "INTEGER_0_65535", HFILL }}, { &hf_nr_rrc_MultiFrequencyBandListNR_item, { "FreqBandIndicatorNR", "nr-rrc.FreqBandIndicatorNR", FT_UINT32, BASE_DEC, NULL, 0, @@ -91315,18 +96265,6 @@ proto_register_nr_rrc(void) { { "SearchSpaceExt-r16", "nr-rrc.SearchSpaceExt_r16_element", FT_NONE, BASE_NONE, NULL, 0, NULL, HFILL }}, - { &hf_nr_rrc_searchSpaceSwitchingTimer_r16, - { "searchSpaceSwitchingTimer-r16", "nr-rrc.searchSpaceSwitchingTimer_r16", - FT_UINT32, BASE_DEC, NULL, 0, - "INTEGER_1_80", HFILL }}, - { &hf_nr_rrc_cellGroupsForSwitchingList_r16, - { "cellGroupsForSwitchingList-r16", "nr-rrc.cellGroupsForSwitchingList_r16", - FT_UINT32, BASE_DEC, NULL, 0, - "SEQUENCE_SIZE_1_4_OF_CellGroupForSwitching_r16", HFILL }}, - { &hf_nr_rrc_cellGroupsForSwitchingList_r16_item, - { "CellGroupForSwitching-r16", "nr-rrc.CellGroupForSwitching_r16", - FT_UINT32, BASE_DEC, NULL, 0, - NULL, HFILL }}, { &hf_nr_rrc_uplinkCancellation_r16, { "uplinkCancellation-r16", "nr-rrc.uplinkCancellation_r16", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_uplinkCancellation_r16_vals), 0, @@ -91339,11 +96277,23 @@ proto_register_nr_rrc(void) { { "monitoringCapabilityConfig-r16", "nr-rrc.monitoringCapabilityConfig_r16", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_monitoringCapabilityConfig_r16_vals), 0, NULL, HFILL }}, - { &hf_nr_rrc_searchSpaceSwitchingDelay_r16, - { "searchSpaceSwitchingDelay-r16", "nr-rrc.searchSpaceSwitchingDelay_r16", + { &hf_nr_rrc_searchSpaceSwitchConfig_r16, + { "searchSpaceSwitchConfig-r16", "nr-rrc.searchSpaceSwitchConfig_r16_element", + FT_NONE, BASE_NONE, NULL, 0, + NULL, HFILL }}, + { &hf_nr_rrc_cellGroupsForSwitchList_r16, + { "cellGroupsForSwitchList-r16", "nr-rrc.cellGroupsForSwitchList_r16", + FT_UINT32, BASE_DEC, NULL, 0, + "SEQUENCE_SIZE_1_4_OF_CellGroupForSwitch_r16", HFILL }}, + { &hf_nr_rrc_cellGroupsForSwitchList_r16_item, + { "CellGroupForSwitch-r16", "nr-rrc.CellGroupForSwitch_r16", + FT_UINT32, BASE_DEC, NULL, 0, + NULL, HFILL }}, + { &hf_nr_rrc_searchSpaceSwitchDelay_r16, + { "searchSpaceSwitchDelay-r16", "nr-rrc.searchSpaceSwitchDelay_r16", FT_UINT32, BASE_DEC, NULL, 0, "INTEGER_10_52", HFILL }}, - { &hf_nr_rrc_CellGroupForSwitching_r16_item, + { &hf_nr_rrc_CellGroupForSwitch_r16_item, { "ServCellIndex", "nr-rrc.ServCellIndex", FT_UINT32, BASE_DEC, NULL, 0, NULL, HFILL }}, @@ -91443,6 +96393,10 @@ proto_register_nr_rrc(void) { { "setup", "nr-rrc.setup_element", FT_NONE, BASE_NONE, NULL, 0, "AvailabilityIndicator_r16", HFILL }}, + { &hf_nr_rrc_searchSpaceSwitchTimer_r16, + { "searchSpaceSwitchTimer-r16", "nr-rrc.searchSpaceSwitchTimer_r16", + FT_UINT32, BASE_DEC, NULL, 0, + "INTEGER_1_80", HFILL }}, { &hf_nr_rrc_drb, { "drb", "nr-rrc.drb_element", FT_NONE, BASE_NONE, NULL, 0, @@ -91587,16 +96541,16 @@ proto_register_nr_rrc(void) { { "moreThanTwoRLC-DRB-r16", "nr-rrc.moreThanTwoRLC_DRB_r16_element", FT_NONE, BASE_NONE, NULL, 0, NULL, HFILL }}, - { &hf_nr_rrc_splitSecondaryPath, - { "splitSecondaryPath", "nr-rrc.splitSecondaryPath", + { &hf_nr_rrc_splitSecondaryPath_r16, + { "splitSecondaryPath-r16", "nr-rrc.splitSecondaryPath_r16", FT_UINT32, BASE_DEC, NULL, 0, "LogicalChannelIdentity", HFILL }}, - { &hf_nr_rrc_duplicationState, - { "duplicationState", "nr-rrc.duplicationState", + { &hf_nr_rrc_duplicationState_r16, + { "duplicationState-r16", "nr-rrc.duplicationState_r16", FT_UINT32, BASE_DEC, NULL, 0, NULL, HFILL }}, - { &hf_nr_rrc_duplicationState_item, - { "duplicationState item", "nr-rrc.duplicationState_item", + { &hf_nr_rrc_duplicationState_r16_item, + { "duplicationState-r16 item", "nr-rrc.duplicationState_r16_item", FT_BOOLEAN, BASE_NONE, NULL, 0, "BOOLEAN", HFILL }}, { &hf_nr_rrc_ethernetHeaderCompression_r16, @@ -91607,33 +96561,33 @@ proto_register_nr_rrc(void) { { "setup", "nr-rrc.setup_element", FT_NONE, BASE_NONE, NULL, 0, "EthernetHeaderCompression_r16", HFILL }}, - { &hf_nr_rrc_ehc_Common, - { "ehc-Common", "nr-rrc.ehc_Common_element", + { &hf_nr_rrc_ehc_Common_r16, + { "ehc-Common-r16", "nr-rrc.ehc_Common_r16_element", FT_NONE, BASE_NONE, NULL, 0, NULL, HFILL }}, - { &hf_nr_rrc_ehc_CID_Length, - { "ehc-CID-Length", "nr-rrc.ehc_CID_Length", - FT_UINT32, BASE_DEC, VALS(nr_rrc_T_ehc_CID_Length_vals), 0, + { &hf_nr_rrc_ehc_CID_Length_r16, + { "ehc-CID-Length-r16", "nr-rrc.ehc_CID_Length_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_ehc_CID_Length_r16_vals), 0, NULL, HFILL }}, - { &hf_nr_rrc_ehc_Downlink, - { "ehc-Downlink", "nr-rrc.ehc_Downlink_element", + { &hf_nr_rrc_ehc_Downlink_r16, + { "ehc-Downlink-r16", "nr-rrc.ehc_Downlink_r16_element", FT_NONE, BASE_NONE, NULL, 0, NULL, HFILL }}, - { &hf_nr_rrc_drb_ContinueEHC_DL, - { "drb-ContinueEHC-DL", "nr-rrc.drb_ContinueEHC_DL", - FT_UINT32, BASE_DEC, VALS(nr_rrc_T_drb_ContinueEHC_DL_vals), 0, + { &hf_nr_rrc_drb_ContinueEHC_DL_r16, + { "drb-ContinueEHC-DL-r16", "nr-rrc.drb_ContinueEHC_DL_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_drb_ContinueEHC_DL_r16_vals), 0, NULL, HFILL }}, - { &hf_nr_rrc_ehc_Uplink, - { "ehc-Uplink", "nr-rrc.ehc_Uplink_element", + { &hf_nr_rrc_ehc_Uplink_r16, + { "ehc-Uplink-r16", "nr-rrc.ehc_Uplink_r16_element", FT_NONE, BASE_NONE, NULL, 0, NULL, HFILL }}, - { &hf_nr_rrc_maxCID_EHC_UL, - { "maxCID-EHC-UL", "nr-rrc.maxCID_EHC_UL", + { &hf_nr_rrc_maxCID_EHC_UL_r16, + { "maxCID-EHC-UL-r16", "nr-rrc.maxCID_EHC_UL_r16", FT_UINT32, BASE_DEC, NULL, 0, "INTEGER_1_32767", HFILL }}, - { &hf_nr_rrc_drb_ContinueEHC_UL, - { "drb-ContinueEHC-UL", "nr-rrc.drb_ContinueEHC_UL", - FT_UINT32, BASE_DEC, VALS(nr_rrc_T_drb_ContinueEHC_UL_vals), 0, + { &hf_nr_rrc_drb_ContinueEHC_UL_r16, + { "drb-ContinueEHC-UL-r16", "nr-rrc.drb_ContinueEHC_UL_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_drb_ContinueEHC_UL_r16_vals), 0, NULL, HFILL }}, { &hf_nr_rrc_dataScramblingIdentityPDSCH, { "dataScramblingIdentityPDSCH", "nr-rrc.dataScramblingIdentityPDSCH", @@ -91819,61 +96773,61 @@ proto_register_nr_rrc(void) { { "setup", "nr-rrc.setup", FT_UINT32, BASE_DEC, NULL, 0, "MinSchedulingOffsetK0_Values_r16", HFILL }}, - { &hf_nr_rrc_antennaPortsFieldPresenceForDCI_Format1_2_r16, - { "antennaPortsFieldPresenceForDCI-Format1-2-r16", "nr-rrc.antennaPortsFieldPresenceForDCI_Format1_2_r16", - FT_UINT32, BASE_DEC, VALS(nr_rrc_T_antennaPortsFieldPresenceForDCI_Format1_2_r16_vals), 0, + { &hf_nr_rrc_antennaPortsFieldPresenceDCI_1_2_r16, + { "antennaPortsFieldPresenceDCI-1-2-r16", "nr-rrc.antennaPortsFieldPresenceDCI_1_2_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_antennaPortsFieldPresenceDCI_1_2_r16_vals), 0, NULL, HFILL }}, - { &hf_nr_rrc_aperiodicZP_CSI_RS_ResourceSetsToAddModListForDCI_Format1_2_r16, - { "aperiodicZP-CSI-RS-ResourceSetsToAddModListForDCI-Format1-2-r16", "nr-rrc.aperiodicZP_CSI_RS_ResourceSetsToAddModListForDCI_Format1_2_r16", + { &hf_nr_rrc_aperiodicZP_CSI_RS_ResourceSetsToAddModListDCI_1_2_r16, + { "aperiodicZP-CSI-RS-ResourceSetsToAddModListDCI-1-2-r16", "nr-rrc.aperiodicZP_CSI_RS_ResourceSetsToAddModListDCI_1_2_r16", FT_UINT32, BASE_DEC, NULL, 0, "SEQUENCE_SIZE_1_maxNrofZP_CSI_RS_ResourceSets_OF_ZP_CSI_RS_ResourceSet", HFILL }}, - { &hf_nr_rrc_aperiodicZP_CSI_RS_ResourceSetsToAddModListForDCI_Format1_2_r16_item, + { &hf_nr_rrc_aperiodicZP_CSI_RS_ResourceSetsToAddModListDCI_1_2_r16_item, { "ZP-CSI-RS-ResourceSet", "nr-rrc.ZP_CSI_RS_ResourceSet_element", FT_NONE, BASE_NONE, NULL, 0, NULL, HFILL }}, - { &hf_nr_rrc_aperiodicZP_CSI_RS_ResourceSetsToReleaseListForDCI_Format1_2_r16, - { "aperiodicZP-CSI-RS-ResourceSetsToReleaseListForDCI-Format1-2-r16", "nr-rrc.aperiodicZP_CSI_RS_ResourceSetsToReleaseListForDCI_Format1_2_r16", + { &hf_nr_rrc_aperiodicZP_CSI_RS_ResourceSetsToReleaseListDCI_1_2_r16, + { "aperiodicZP-CSI-RS-ResourceSetsToReleaseListDCI-1-2-r16", "nr-rrc.aperiodicZP_CSI_RS_ResourceSetsToReleaseListDCI_1_2_r16", FT_UINT32, BASE_DEC, NULL, 0, "SEQUENCE_SIZE_1_maxNrofZP_CSI_RS_ResourceSets_OF_ZP_CSI_RS_ResourceSetId", HFILL }}, - { &hf_nr_rrc_aperiodicZP_CSI_RS_ResourceSetsToReleaseListForDCI_Format1_2_r16_item, + { &hf_nr_rrc_aperiodicZP_CSI_RS_ResourceSetsToReleaseListDCI_1_2_r16_item, { "ZP-CSI-RS-ResourceSetId", "nr-rrc.ZP_CSI_RS_ResourceSetId", FT_UINT32, BASE_DEC, NULL, 0, NULL, HFILL }}, - { &hf_nr_rrc_dmrs_DownlinkForPDSCH_MappingTypeA_ForDCI_Format1_2_r16, - { "dmrs-DownlinkForPDSCH-MappingTypeA-ForDCI-Format1-2-r16", "nr-rrc.dmrs_DownlinkForPDSCH_MappingTypeA_ForDCI_Format1_2_r16", - FT_UINT32, BASE_DEC, VALS(nr_rrc_T_dmrs_DownlinkForPDSCH_MappingTypeA_ForDCI_Format1_2_r16_vals), 0, + { &hf_nr_rrc_dmrs_DownlinkForPDSCH_MappingTypeA_DCI_1_2_r16, + { "dmrs-DownlinkForPDSCH-MappingTypeA-DCI-1-2-r16", "nr-rrc.dmrs_DownlinkForPDSCH_MappingTypeA_DCI_1_2_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_dmrs_DownlinkForPDSCH_MappingTypeA_DCI_1_2_r16_vals), 0, NULL, HFILL }}, - { &hf_nr_rrc_dmrs_DownlinkForPDSCH_MappingTypeB_ForDCI_Format1_2_r16, - { "dmrs-DownlinkForPDSCH-MappingTypeB-ForDCI-Format1-2-r16", "nr-rrc.dmrs_DownlinkForPDSCH_MappingTypeB_ForDCI_Format1_2_r16", - FT_UINT32, BASE_DEC, VALS(nr_rrc_T_dmrs_DownlinkForPDSCH_MappingTypeB_ForDCI_Format1_2_r16_vals), 0, + { &hf_nr_rrc_dmrs_DownlinkForPDSCH_MappingTypeB_DCI_1_2_r16, + { "dmrs-DownlinkForPDSCH-MappingTypeB-DCI-1-2-r16", "nr-rrc.dmrs_DownlinkForPDSCH_MappingTypeB_DCI_1_2_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_dmrs_DownlinkForPDSCH_MappingTypeB_DCI_1_2_r16_vals), 0, NULL, HFILL }}, - { &hf_nr_rrc_dmrs_SequenceInitializationForDCI_Format1_2_r16, - { "dmrs-SequenceInitializationForDCI-Format1-2-r16", "nr-rrc.dmrs_SequenceInitializationForDCI_Format1_2_r16", - FT_UINT32, BASE_DEC, VALS(nr_rrc_T_dmrs_SequenceInitializationForDCI_Format1_2_r16_vals), 0, + { &hf_nr_rrc_dmrs_SequenceInitializationDCI_1_2_r16, + { "dmrs-SequenceInitializationDCI-1-2-r16", "nr-rrc.dmrs_SequenceInitializationDCI_1_2_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_dmrs_SequenceInitializationDCI_1_2_r16_vals), 0, NULL, HFILL }}, - { &hf_nr_rrc_harq_ProcessNumberSizeForDCI_Format1_2_r16, - { "harq-ProcessNumberSizeForDCI-Format1-2-r16", "nr-rrc.harq_ProcessNumberSizeForDCI_Format1_2_r16", + { &hf_nr_rrc_harq_ProcessNumberSizeDCI_1_2_r16, + { "harq-ProcessNumberSizeDCI-1-2-r16", "nr-rrc.harq_ProcessNumberSizeDCI_1_2_r16", FT_UINT32, BASE_DEC, NULL, 0, "INTEGER_0_4", HFILL }}, - { &hf_nr_rrc_mcs_TableForDCI_Format1_2_r16, - { "mcs-TableForDCI-Format1-2-r16", "nr-rrc.mcs_TableForDCI_Format1_2_r16", - FT_UINT32, BASE_DEC, VALS(nr_rrc_T_mcs_TableForDCI_Format1_2_r16_vals), 0, + { &hf_nr_rrc_mcs_TableDCI_1_2_r16, + { "mcs-TableDCI-1-2-r16", "nr-rrc.mcs_TableDCI_1_2_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_mcs_TableDCI_1_2_r16_vals), 0, NULL, HFILL }}, - { &hf_nr_rrc_numberOfBitsForRV_ForDCI_Format1_2_r16, - { "numberOfBitsForRV-ForDCI-Format1-2-r16", "nr-rrc.numberOfBitsForRV_ForDCI_Format1_2_r16", + { &hf_nr_rrc_numberOfBitsForRV_DCI_1_2_r16, + { "numberOfBitsForRV-DCI-1-2-r16", "nr-rrc.numberOfBitsForRV_DCI_1_2_r16", FT_UINT32, BASE_DEC, NULL, 0, "INTEGER_0_2", HFILL }}, - { &hf_nr_rrc_pdsch_TimeDomainAllocationListForDCI_Format1_2_r16, - { "pdsch-TimeDomainAllocationListForDCI-Format1-2-r16", "nr-rrc.pdsch_TimeDomainAllocationListForDCI_Format1_2_r16", - FT_UINT32, BASE_DEC, VALS(nr_rrc_T_pdsch_TimeDomainAllocationListForDCI_Format1_2_r16_vals), 0, + { &hf_nr_rrc_pdsch_TimeDomainAllocationListDCI_1_2_r16, + { "pdsch-TimeDomainAllocationListDCI-1-2-r16", "nr-rrc.pdsch_TimeDomainAllocationListDCI_1_2_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_pdsch_TimeDomainAllocationListDCI_1_2_r16_vals), 0, NULL, HFILL }}, { &hf_nr_rrc_setup_64, { "setup", "nr-rrc.setup", FT_UINT32, BASE_DEC, NULL, 0, "PDSCH_TimeDomainResourceAllocationList_r16", HFILL }}, - { &hf_nr_rrc_prb_BundlingTypeForDCI_Format1_2_r16, - { "prb-BundlingTypeForDCI-Format1-2-r16", "nr-rrc.prb_BundlingTypeForDCI_Format1_2_r16", - FT_UINT32, BASE_DEC, VALS(nr_rrc_T_prb_BundlingTypeForDCI_Format1_2_r16_vals), 0, + { &hf_nr_rrc_prb_BundlingTypeDCI_1_2_r16, + { "prb-BundlingTypeDCI-1-2-r16", "nr-rrc.prb_BundlingTypeDCI_1_2_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_prb_BundlingTypeDCI_1_2_r16_vals), 0, NULL, HFILL }}, { &hf_nr_rrc_staticBundling_r16, { "staticBundling-r16", "nr-rrc.staticBundling_r16_element", @@ -91895,37 +96849,37 @@ proto_register_nr_rrc(void) { { "bundleSizeSet2-r16", "nr-rrc.bundleSizeSet2_r16", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_bundleSizeSet2_r16_vals), 0, NULL, HFILL }}, - { &hf_nr_rrc_priorityIndicatorForDCI_Format1_2_r16, - { "priorityIndicatorForDCI-Format1-2-r16", "nr-rrc.priorityIndicatorForDCI_Format1_2_r16", - FT_UINT32, BASE_DEC, VALS(nr_rrc_T_priorityIndicatorForDCI_Format1_2_r16_vals), 0, + { &hf_nr_rrc_priorityIndicatorDCI_1_2_r16, + { "priorityIndicatorDCI-1-2-r16", "nr-rrc.priorityIndicatorDCI_1_2_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_priorityIndicatorDCI_1_2_r16_vals), 0, NULL, HFILL }}, - { &hf_nr_rrc_rateMatchPatternGroup1ForDCI_Format1_2_r16, - { "rateMatchPatternGroup1ForDCI-Format1-2-r16", "nr-rrc.rateMatchPatternGroup1ForDCI_Format1_2_r16", + { &hf_nr_rrc_rateMatchPatternGroup1DCI_1_2_r16, + { "rateMatchPatternGroup1DCI-1-2-r16", "nr-rrc.rateMatchPatternGroup1DCI_1_2_r16", FT_UINT32, BASE_DEC, NULL, 0, "RateMatchPatternGroup", HFILL }}, - { &hf_nr_rrc_rateMatchPatternGroup2ForDCI_Format1_2_r16, - { "rateMatchPatternGroup2ForDCI-Format1-2-r16", "nr-rrc.rateMatchPatternGroup2ForDCI_Format1_2_r16", + { &hf_nr_rrc_rateMatchPatternGroup2DCI_1_2_r16, + { "rateMatchPatternGroup2DCI-1-2-r16", "nr-rrc.rateMatchPatternGroup2DCI_1_2_r16", FT_UINT32, BASE_DEC, NULL, 0, "RateMatchPatternGroup", HFILL }}, - { &hf_nr_rrc_resourceAllocationType1GranularityForDCI_Format1_2_r16, - { "resourceAllocationType1GranularityForDCI-Format1-2-r16", "nr-rrc.resourceAllocationType1GranularityForDCI_Format1_2_r16", - FT_UINT32, BASE_DEC, VALS(nr_rrc_T_resourceAllocationType1GranularityForDCI_Format1_2_r16_vals), 0, + { &hf_nr_rrc_resourceAllocationType1GranularityDCI_1_2_r16, + { "resourceAllocationType1GranularityDCI-1-2-r16", "nr-rrc.resourceAllocationType1GranularityDCI_1_2_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_resourceAllocationType1GranularityDCI_1_2_r16_vals), 0, NULL, HFILL }}, - { &hf_nr_rrc_vrb_ToPRB_InterleaverForDCI_Format1_2_r16, - { "vrb-ToPRB-InterleaverForDCI-Format1-2-r16", "nr-rrc.vrb_ToPRB_InterleaverForDCI_Format1_2_r16", - FT_UINT32, BASE_DEC, VALS(nr_rrc_T_vrb_ToPRB_InterleaverForDCI_Format1_2_r16_vals), 0, + { &hf_nr_rrc_vrb_ToPRB_InterleaverDCI_1_2_r16, + { "vrb-ToPRB-InterleaverDCI-1-2-r16", "nr-rrc.vrb_ToPRB_InterleaverDCI_1_2_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_vrb_ToPRB_InterleaverDCI_1_2_r16_vals), 0, NULL, HFILL }}, - { &hf_nr_rrc_referenceOfSLIVForDCI_Format1_2_r16, - { "referenceOfSLIVForDCI-Format1-2-r16", "nr-rrc.referenceOfSLIVForDCI_Format1_2_r16", - FT_UINT32, BASE_DEC, VALS(nr_rrc_T_referenceOfSLIVForDCI_Format1_2_r16_vals), 0, + { &hf_nr_rrc_referenceOfSLIVDCI_1_2_r16, + { "referenceOfSLIVDCI-1-2-r16", "nr-rrc.referenceOfSLIVDCI_1_2_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_referenceOfSLIVDCI_1_2_r16_vals), 0, NULL, HFILL }}, - { &hf_nr_rrc_resourceAllocationForDCI_Format1_2_r16, - { "resourceAllocationForDCI-Format1-2-r16", "nr-rrc.resourceAllocationForDCI_Format1_2_r16", - FT_UINT32, BASE_DEC, VALS(nr_rrc_T_resourceAllocationForDCI_Format1_2_r16_vals), 0, + { &hf_nr_rrc_resourceAllocationDCI_1_2_r16, + { "resourceAllocationDCI-1-2-r16", "nr-rrc.resourceAllocationDCI_1_2_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_resourceAllocationDCI_1_2_r16_vals), 0, NULL, HFILL }}, - { &hf_nr_rrc_priorityIndicatorForDCI_Format1_1_r16, - { "priorityIndicatorForDCI-Format1-1-r16", "nr-rrc.priorityIndicatorForDCI_Format1_1_r16", - FT_UINT32, BASE_DEC, VALS(nr_rrc_T_priorityIndicatorForDCI_Format1_1_r16_vals), 0, + { &hf_nr_rrc_priorityIndicatorDCI_1_1_r16, + { "priorityIndicatorDCI-1-1-r16", "nr-rrc.priorityIndicatorDCI_1_1_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_priorityIndicatorDCI_1_1_r16_vals), 0, NULL, HFILL }}, { &hf_nr_rrc_dataScramblingIdentityPDSCH2_r16, { "dataScramblingIdentityPDSCH2-r16", "nr-rrc.dataScramblingIdentityPDSCH2_r16", @@ -92075,6 +97029,22 @@ proto_register_nr_rrc(void) { { "phr-ModeOtherCG", "nr-rrc.phr_ModeOtherCG", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_phr_ModeOtherCG_vals), 0, NULL, HFILL }}, + { &hf_nr_rrc_mpe_Reporting_FR2_r16, + { "mpe-Reporting-FR2-r16", "nr-rrc.mpe_Reporting_FR2_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_mpe_Reporting_FR2_r16_vals), 0, + NULL, HFILL }}, + { &hf_nr_rrc_setup_68, + { "setup", "nr-rrc.setup_element", + FT_NONE, BASE_NONE, NULL, 0, + "MPE_Config_FR2_r16", HFILL }}, + { &hf_nr_rrc_mpe_ProhibitTimer_r16, + { "mpe-ProhibitTimer-r16", "nr-rrc.mpe_ProhibitTimer_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_mpe_ProhibitTimer_r16_vals), 0, + NULL, HFILL }}, + { &hf_nr_rrc_mpe_Threshold_r16, + { "mpe-Threshold-r16", "nr-rrc.mpe_Threshold_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_mpe_Threshold_r16_vals), 0, + NULL, HFILL }}, { &hf_nr_rrc_harq_ACK_SpatialBundlingPUCCH, { "harq-ACK-SpatialBundlingPUCCH", "nr-rrc.harq_ACK_SpatialBundlingPUCCH", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_harq_ACK_SpatialBundlingPUCCH_vals), 0, @@ -92111,7 +97081,7 @@ proto_register_nr_rrc(void) { { "cs-RNTI", "nr-rrc.cs_RNTI", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_cs_RNTI_vals), 0, NULL, HFILL }}, - { &hf_nr_rrc_setup_68, + { &hf_nr_rrc_setup_69, { "setup", "nr-rrc.setup", FT_UINT32, BASE_DEC, NULL, 0, "RNTI_Value", HFILL }}, @@ -92131,7 +97101,7 @@ proto_register_nr_rrc(void) { { "pdcch-BlindDetection", "nr-rrc.pdcch_BlindDetection", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_pdcch_BlindDetection_vals), 0, NULL, HFILL }}, - { &hf_nr_rrc_setup_69, + { &hf_nr_rrc_setup_70, { "setup", "nr-rrc.setup", FT_UINT32, BASE_DEC, NULL, 0, "PDCCH_BlindDetection", HFILL }}, @@ -92139,21 +97109,21 @@ proto_register_nr_rrc(void) { { "dcp-Config-r16", "nr-rrc.dcp_Config_r16", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_dcp_Config_r16_vals), 0, NULL, HFILL }}, - { &hf_nr_rrc_setup_70, + { &hf_nr_rrc_setup_71, { "setup", "nr-rrc.setup_element", FT_NONE, BASE_NONE, NULL, 0, "DCP_Config_r16", HFILL }}, - { &hf_nr_rrc_harq_ACK_SpatialBundlingPUCCH_secondaryPUCCH_group_r16, - { "harq-ACK-SpatialBundlingPUCCH-secondaryPUCCH-group-r16", "nr-rrc.harq_ACK_SpatialBundlingPUCCH_secondaryPUCCH_group_r16", - FT_UINT32, BASE_DEC, VALS(nr_rrc_T_harq_ACK_SpatialBundlingPUCCH_secondaryPUCCH_group_r16_vals), 0, + { &hf_nr_rrc_harq_ACK_SpatialBundlingPUCCH_secondaryPUCCHgroup_r16, + { "harq-ACK-SpatialBundlingPUCCH-secondaryPUCCHgroup-r16", "nr-rrc.harq_ACK_SpatialBundlingPUCCH_secondaryPUCCHgroup_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_harq_ACK_SpatialBundlingPUCCH_secondaryPUCCHgroup_r16_vals), 0, NULL, HFILL }}, - { &hf_nr_rrc_harq_ACK_SpatialBundlingPUSCH_secondaryPUCCH_group_r16, - { "harq-ACK-SpatialBundlingPUSCH-secondaryPUCCH-group-r16", "nr-rrc.harq_ACK_SpatialBundlingPUSCH_secondaryPUCCH_group_r16", - FT_UINT32, BASE_DEC, VALS(nr_rrc_T_harq_ACK_SpatialBundlingPUSCH_secondaryPUCCH_group_r16_vals), 0, + { &hf_nr_rrc_harq_ACK_SpatialBundlingPUSCH_secondaryPUCCHgroup_r16, + { "harq-ACK-SpatialBundlingPUSCH-secondaryPUCCHgroup-r16", "nr-rrc.harq_ACK_SpatialBundlingPUSCH_secondaryPUCCHgroup_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_harq_ACK_SpatialBundlingPUSCH_secondaryPUCCHgroup_r16_vals), 0, NULL, HFILL }}, - { &hf_nr_rrc_pdsch_HARQ_ACK_Codebook_secondaryPUCCH_group_r16, - { "pdsch-HARQ-ACK-Codebook-secondaryPUCCH-group-r16", "nr-rrc.pdsch_HARQ_ACK_Codebook_secondaryPUCCH_group_r16", - FT_UINT32, BASE_DEC, VALS(nr_rrc_T_pdsch_HARQ_ACK_Codebook_secondaryPUCCH_group_r16_vals), 0, + { &hf_nr_rrc_pdsch_HARQ_ACK_Codebook_secondaryPUCCHgroup_r16, + { "pdsch-HARQ-ACK-Codebook-secondaryPUCCHgroup-r16", "nr-rrc.pdsch_HARQ_ACK_Codebook_secondaryPUCCHgroup_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_pdsch_HARQ_ACK_Codebook_secondaryPUCCHgroup_r16_vals), 0, NULL, HFILL }}, { &hf_nr_rrc_p_NR_FR2_r16, { "p-NR-FR2-r16", "nr-rrc.p_NR_FR2_r16", @@ -92195,19 +97165,19 @@ proto_register_nr_rrc(void) { { "pdsch-HARQ-ACK-OneShotFeedbackCBG-r16", "nr-rrc.pdsch_HARQ_ACK_OneShotFeedbackCBG_r16", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_pdsch_HARQ_ACK_OneShotFeedbackCBG_r16_vals), 0, NULL, HFILL }}, - { &hf_nr_rrc_downlinkAssignmentIndexForDCI_Format0_2_r16, - { "downlinkAssignmentIndexForDCI-Format0-2-r16", "nr-rrc.downlinkAssignmentIndexForDCI_Format0_2_r16", - FT_UINT32, BASE_DEC, VALS(nr_rrc_T_downlinkAssignmentIndexForDCI_Format0_2_r16_vals), 0, + { &hf_nr_rrc_downlinkAssignmentIndexDCI_0_2_r16, + { "downlinkAssignmentIndexDCI-0-2-r16", "nr-rrc.downlinkAssignmentIndexDCI_0_2_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_downlinkAssignmentIndexDCI_0_2_r16_vals), 0, NULL, HFILL }}, - { &hf_nr_rrc_downlinkAssignmentIndexForDCI_Format1_2_r16, - { "downlinkAssignmentIndexForDCI-Format1-2-r16", "nr-rrc.downlinkAssignmentIndexForDCI_Format1_2_r16", - FT_UINT32, BASE_DEC, VALS(nr_rrc_T_downlinkAssignmentIndexForDCI_Format1_2_r16_vals), 0, + { &hf_nr_rrc_downlinkAssignmentIndexDCI_1_2_r16, + { "downlinkAssignmentIndexDCI-1-2-r16", "nr-rrc.downlinkAssignmentIndexDCI_1_2_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_downlinkAssignmentIndexDCI_1_2_r16_vals), 0, NULL, HFILL }}, { &hf_nr_rrc_pdsch_HARQ_ACK_CodebookList_r16, { "pdsch-HARQ-ACK-CodebookList-r16", "nr-rrc.pdsch_HARQ_ACK_CodebookList_r16", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_pdsch_HARQ_ACK_CodebookList_r16_vals), 0, "T_pdsch_HARQ_ACK_CodebookList_r16", HFILL }}, - { &hf_nr_rrc_setup_71, + { &hf_nr_rrc_setup_72, { "setup", "nr-rrc.setup", FT_UINT32, BASE_DEC, NULL, 0, "PDSCH_HARQ_ACK_CodebookList_r16", HFILL }}, @@ -92219,7 +97189,7 @@ proto_register_nr_rrc(void) { { "pdcch-BlindDetectionCA-CombIndicator-r16", "nr-rrc.pdcch_BlindDetectionCA_CombIndicator_r16", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_pdcch_BlindDetectionCA_CombIndicator_r16_vals), 0, NULL, HFILL }}, - { &hf_nr_rrc_setup_72, + { &hf_nr_rrc_setup_73, { "setup", "nr-rrc.setup_element", FT_NONE, BASE_NONE, NULL, 0, "PDCCH_BlindDetectionCA_CombIndicator_r16", HFILL }}, @@ -92227,7 +97197,7 @@ proto_register_nr_rrc(void) { { "pdcch-BlindDetection2-r16", "nr-rrc.pdcch_BlindDetection2_r16", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_pdcch_BlindDetection2_r16_vals), 0, NULL, HFILL }}, - { &hf_nr_rrc_setup_73, + { &hf_nr_rrc_setup_74, { "setup", "nr-rrc.setup", FT_UINT32, BASE_DEC, NULL, 0, "PDCCH_BlindDetection2_r16", HFILL }}, @@ -92235,7 +97205,7 @@ proto_register_nr_rrc(void) { { "pdcch-BlindDetection3-r16", "nr-rrc.pdcch_BlindDetection3_r16", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_pdcch_BlindDetection3_r16_vals), 0, NULL, HFILL }}, - { &hf_nr_rrc_setup_74, + { &hf_nr_rrc_setup_75, { "setup", "nr-rrc.setup", FT_UINT32, BASE_DEC, NULL, 0, "PDCCH_BlindDetection3_r16", HFILL }}, @@ -92431,7 +97401,7 @@ proto_register_nr_rrc(void) { { "format1", "nr-rrc.format1", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_format1_vals), 0, NULL, HFILL }}, - { &hf_nr_rrc_setup_75, + { &hf_nr_rrc_setup_76, { "setup", "nr-rrc.setup_element", FT_NONE, BASE_NONE, NULL, 0, "PUCCH_FormatConfig", HFILL }}, @@ -92511,18 +97481,18 @@ proto_register_nr_rrc(void) { { "dl-DataToUL-ACK-r16", "nr-rrc.dl_DataToUL_ACK_r16", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_dl_DataToUL_ACK_r16_vals), 0, NULL, HFILL }}, - { &hf_nr_rrc_setup_76, + { &hf_nr_rrc_setup_77, { "setup", "nr-rrc.setup", FT_UINT32, BASE_DEC, NULL, 0, "DL_DataToUL_ACK_r16", HFILL }}, - { &hf_nr_rrc_ul_AccessConfigListForDCI_Format_1_1_r16, - { "ul-AccessConfigListForDCI-Format-1-1-r16", "nr-rrc.ul_AccessConfigListForDCI_Format_1_1_r16", - FT_UINT32, BASE_DEC, VALS(nr_rrc_T_ul_AccessConfigListForDCI_Format_1_1_r16_vals), 0, - "T_ul_AccessConfigListForDCI_Format_1_1_r16", HFILL }}, - { &hf_nr_rrc_setup_77, + { &hf_nr_rrc_ul_AccessConfigListDCI_1_1_r16, + { "ul-AccessConfigListDCI-1-1-r16", "nr-rrc.ul_AccessConfigListDCI_1_1_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_ul_AccessConfigListDCI_1_1_r16_vals), 0, + NULL, HFILL }}, + { &hf_nr_rrc_setup_78, { "setup", "nr-rrc.setup", FT_UINT32, BASE_DEC, NULL, 0, - "UL_AccessConfigListForDCI_Format1_1_r16", HFILL }}, + "UL_AccessConfigListDCI_1_1_r16", HFILL }}, { &hf_nr_rrc_subslotLengthForPUCCH_r16, { "subslotLengthForPUCCH-r16", "nr-rrc.subslotLengthForPUCCH_r16", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_subslotLengthForPUCCH_r16_vals), 0, @@ -92535,16 +97505,16 @@ proto_register_nr_rrc(void) { { "extendedCP-r16", "nr-rrc.extendedCP_r16", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_extendedCP_r16_vals), 0, NULL, HFILL }}, - { &hf_nr_rrc_dl_DataToUL_ACK_ForDCI_Format1_2_r16, - { "dl-DataToUL-ACK-ForDCI-Format1-2-r16", "nr-rrc.dl_DataToUL_ACK_ForDCI_Format1_2_r16", - FT_UINT32, BASE_DEC, VALS(nr_rrc_T_dl_DataToUL_ACK_ForDCI_Format1_2_r16_vals), 0, + { &hf_nr_rrc_dl_DataToUL_ACK_DCI_1_2_r16, + { "dl-DataToUL-ACK-DCI-1-2-r16", "nr-rrc.dl_DataToUL_ACK_DCI_1_2_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_dl_DataToUL_ACK_DCI_1_2_r16_vals), 0, NULL, HFILL }}, - { &hf_nr_rrc_setup_78, + { &hf_nr_rrc_setup_79, { "setup", "nr-rrc.setup", FT_UINT32, BASE_DEC, NULL, 0, - "DL_DataToUL_ACK_ForDCI_Format1_2_r16", HFILL }}, - { &hf_nr_rrc_numberOfBitsForPUCCH_ResourceIndicatorForDCI_Format1_2_r16, - { "numberOfBitsForPUCCH-ResourceIndicatorForDCI-Format1-2-r16", "nr-rrc.numberOfBitsForPUCCH_ResourceIndicatorForDCI_Format1_2_r16", + "DL_DataToUL_ACK_DCI_1_2_r16", HFILL }}, + { &hf_nr_rrc_numberOfBitsForPUCCH_ResourceIndicatorDCI_1_2_r16, + { "numberOfBitsForPUCCH-ResourceIndicatorDCI-1-2-r16", "nr-rrc.numberOfBitsForPUCCH_ResourceIndicatorDCI_1_2_r16", FT_UINT32, BASE_DEC, NULL, 0, "INTEGER_0_3", HFILL }}, { &hf_nr_rrc_dmrs_UplinkTransformPrecodingPUCCH_r16, @@ -92603,7 +97573,7 @@ proto_register_nr_rrc(void) { { "sps-PUCCH-AN-List-r16", "nr-rrc.sps_PUCCH_AN_List_r16", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_sps_PUCCH_AN_List_r16_vals), 0, "T_sps_PUCCH_AN_List_r16", HFILL }}, - { &hf_nr_rrc_setup_79, + { &hf_nr_rrc_setup_80, { "setup", "nr-rrc.setup", FT_UINT32, BASE_DEC, NULL, 0, "SPS_PUCCH_AN_List_r16", HFILL }}, @@ -92787,12 +97757,12 @@ proto_register_nr_rrc(void) { { "DL-DataToUL-ACK-r16 item", "nr-rrc.DL_DataToUL_ACK_r16_item", FT_INT32, BASE_DEC, NULL, 0, "INTEGER_M1_15", HFILL }}, - { &hf_nr_rrc_DL_DataToUL_ACK_ForDCI_Format1_2_r16_item, - { "DL-DataToUL-ACK-ForDCI-Format1-2-r16 item", "nr-rrc.DL_DataToUL_ACK_ForDCI_Format1_2_r16_item", + { &hf_nr_rrc_DL_DataToUL_ACK_DCI_1_2_r16_item, + { "DL-DataToUL-ACK-DCI-1-2-r16 item", "nr-rrc.DL_DataToUL_ACK_DCI_1_2_r16_item", FT_UINT32, BASE_DEC, NULL, 0, "INTEGER_0_15", HFILL }}, - { &hf_nr_rrc_UL_AccessConfigListForDCI_Format1_1_r16_item, - { "UL-AccessConfigListForDCI-Format1-1-r16 item", "nr-rrc.UL_AccessConfigListForDCI_Format1_1_r16_item", + { &hf_nr_rrc_UL_AccessConfigListDCI_1_1_r16_item, + { "UL-AccessConfigListDCI-1-1-r16 item", "nr-rrc.UL_AccessConfigListDCI_1_1_r16_item", FT_UINT32, BASE_DEC, NULL, 0, "INTEGER_0_15", HFILL }}, { &hf_nr_rrc_pucch_ResourceCommon, @@ -92859,7 +97829,7 @@ proto_register_nr_rrc(void) { { "pathlossReferenceRSs-v1610", "nr-rrc.pathlossReferenceRSs_v1610", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_pathlossReferenceRSs_v1610_vals), 0, NULL, HFILL }}, - { &hf_nr_rrc_setup_80, + { &hf_nr_rrc_setup_81, { "setup", "nr-rrc.setup", FT_UINT32, BASE_DEC, NULL, 0, "PathlossReferenceRSs_v1610", HFILL }}, @@ -92951,7 +97921,7 @@ proto_register_nr_rrc(void) { { "dmrs-UplinkForPUSCH-MappingTypeA", "nr-rrc.dmrs_UplinkForPUSCH_MappingTypeA", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_dmrs_UplinkForPUSCH_MappingTypeA_vals), 0, NULL, HFILL }}, - { &hf_nr_rrc_setup_81, + { &hf_nr_rrc_setup_82, { "setup", "nr-rrc.setup_element", FT_NONE, BASE_NONE, NULL, 0, "DMRS_UplinkConfig", HFILL }}, @@ -92983,7 +97953,7 @@ proto_register_nr_rrc(void) { { "pusch-TimeDomainAllocationList", "nr-rrc.pusch_TimeDomainAllocationList", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_pusch_TimeDomainAllocationList_vals), 0, NULL, HFILL }}, - { &hf_nr_rrc_setup_82, + { &hf_nr_rrc_setup_83, { "setup", "nr-rrc.setup", FT_UINT32, BASE_DEC, NULL, 0, "PUSCH_TimeDomainResourceAllocationList", HFILL }}, @@ -93019,7 +97989,7 @@ proto_register_nr_rrc(void) { { "uci-OnPUSCH", "nr-rrc.uci_OnPUSCH", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_uci_OnPUSCH_01_vals), 0, "T_uci_OnPUSCH_01", HFILL }}, - { &hf_nr_rrc_setup_83, + { &hf_nr_rrc_setup_84, { "setup", "nr-rrc.setup_element", FT_NONE, BASE_NONE, NULL, 0, "UCI_OnPUSCH", HFILL }}, @@ -93031,45 +98001,45 @@ proto_register_nr_rrc(void) { { "minimumSchedulingOffsetK2-r16", "nr-rrc.minimumSchedulingOffsetK2_r16", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_minimumSchedulingOffsetK2_r16_vals), 0, NULL, HFILL }}, - { &hf_nr_rrc_setup_84, + { &hf_nr_rrc_setup_85, { "setup", "nr-rrc.setup", FT_UINT32, BASE_DEC, NULL, 0, "MinSchedulingOffsetK2_Values_r16", HFILL }}, - { &hf_nr_rrc_ul_AccessConfigListForDCI_Format0_1_r16, - { "ul-AccessConfigListForDCI-Format0-1-r16", "nr-rrc.ul_AccessConfigListForDCI_Format0_1_r16", - FT_UINT32, BASE_DEC, VALS(nr_rrc_T_ul_AccessConfigListForDCI_Format0_1_r16_vals), 0, + { &hf_nr_rrc_ul_AccessConfigListDCI_0_1_r16, + { "ul-AccessConfigListDCI-0-1-r16", "nr-rrc.ul_AccessConfigListDCI_0_1_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_ul_AccessConfigListDCI_0_1_r16_vals), 0, NULL, HFILL }}, - { &hf_nr_rrc_setup_85, + { &hf_nr_rrc_setup_86, { "setup", "nr-rrc.setup", FT_UINT32, BASE_DEC, NULL, 0, - "UL_AccessConfigListForDCI_Format0_1_r16", HFILL }}, - { &hf_nr_rrc_harq_ProcessNumberSizeForDCI_Format0_2_r16, - { "harq-ProcessNumberSizeForDCI-Format0-2-r16", "nr-rrc.harq_ProcessNumberSizeForDCI_Format0_2_r16", + "UL_AccessConfigListDCI_0_1_r16", HFILL }}, + { &hf_nr_rrc_harq_ProcessNumberSizeDCI_0_2_r16, + { "harq-ProcessNumberSizeDCI-0-2-r16", "nr-rrc.harq_ProcessNumberSizeDCI_0_2_r16", FT_UINT32, BASE_DEC, NULL, 0, "INTEGER_0_4", HFILL }}, - { &hf_nr_rrc_dmrs_SequenceInitializationForDCI_Format0_2_r16, - { "dmrs-SequenceInitializationForDCI-Format0-2-r16", "nr-rrc.dmrs_SequenceInitializationForDCI_Format0_2_r16", - FT_UINT32, BASE_DEC, VALS(nr_rrc_T_dmrs_SequenceInitializationForDCI_Format0_2_r16_vals), 0, + { &hf_nr_rrc_dmrs_SequenceInitializationDCI_0_2_r16, + { "dmrs-SequenceInitializationDCI-0-2-r16", "nr-rrc.dmrs_SequenceInitializationDCI_0_2_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_dmrs_SequenceInitializationDCI_0_2_r16_vals), 0, NULL, HFILL }}, - { &hf_nr_rrc_numberOfBitsForRV_ForDCI_Format0_2_r16, - { "numberOfBitsForRV-ForDCI-Format0-2-r16", "nr-rrc.numberOfBitsForRV_ForDCI_Format0_2_r16", + { &hf_nr_rrc_numberOfBitsForRV_DCI_0_2_r16, + { "numberOfBitsForRV-DCI-0-2-r16", "nr-rrc.numberOfBitsForRV_DCI_0_2_r16", FT_UINT32, BASE_DEC, NULL, 0, "INTEGER_0_2", HFILL }}, - { &hf_nr_rrc_antennaPortsFieldPresenceForDCI_Format0_2_r16, - { "antennaPortsFieldPresenceForDCI-Format0-2-r16", "nr-rrc.antennaPortsFieldPresenceForDCI_Format0_2_r16", - FT_UINT32, BASE_DEC, VALS(nr_rrc_T_antennaPortsFieldPresenceForDCI_Format0_2_r16_vals), 0, + { &hf_nr_rrc_antennaPortsFieldPresenceDCI_0_2_r16, + { "antennaPortsFieldPresenceDCI-0-2-r16", "nr-rrc.antennaPortsFieldPresenceDCI_0_2_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_antennaPortsFieldPresenceDCI_0_2_r16_vals), 0, NULL, HFILL }}, - { &hf_nr_rrc_dmrs_UplinkForPUSCH_MappingTypeA_ForDCI_Format0_2_r16, - { "dmrs-UplinkForPUSCH-MappingTypeA-ForDCI-Format0-2-r16", "nr-rrc.dmrs_UplinkForPUSCH_MappingTypeA_ForDCI_Format0_2_r16", - FT_UINT32, BASE_DEC, VALS(nr_rrc_T_dmrs_UplinkForPUSCH_MappingTypeA_ForDCI_Format0_2_r16_vals), 0, + { &hf_nr_rrc_dmrs_UplinkForPUSCH_MappingTypeA_DCI_0_2_r16, + { "dmrs-UplinkForPUSCH-MappingTypeA-DCI-0-2-r16", "nr-rrc.dmrs_UplinkForPUSCH_MappingTypeA_DCI_0_2_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_dmrs_UplinkForPUSCH_MappingTypeA_DCI_0_2_r16_vals), 0, NULL, HFILL }}, - { &hf_nr_rrc_dmrs_UplinkForPUSCH_MappingTypeB_ForDCI_Format0_2_r16, - { "dmrs-UplinkForPUSCH-MappingTypeB-ForDCI-Format0-2-r16", "nr-rrc.dmrs_UplinkForPUSCH_MappingTypeB_ForDCI_Format0_2_r16", - FT_UINT32, BASE_DEC, VALS(nr_rrc_T_dmrs_UplinkForPUSCH_MappingTypeB_ForDCI_Format0_2_r16_vals), 0, + { &hf_nr_rrc_dmrs_UplinkForPUSCH_MappingTypeB_DCI_0_2_r16, + { "dmrs-UplinkForPUSCH-MappingTypeB-DCI-0-2-r16", "nr-rrc.dmrs_UplinkForPUSCH_MappingTypeB_DCI_0_2_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_dmrs_UplinkForPUSCH_MappingTypeB_DCI_0_2_r16_vals), 0, NULL, HFILL }}, - { &hf_nr_rrc_frequencyHoppingForDCI_Format0_2_r16, - { "frequencyHoppingForDCI-Format0-2-r16", "nr-rrc.frequencyHoppingForDCI_Format0_2_r16", - FT_UINT32, BASE_DEC, VALS(nr_rrc_T_frequencyHoppingForDCI_Format0_2_r16_vals), 0, + { &hf_nr_rrc_frequencyHoppingDCI_0_2_r16, + { "frequencyHoppingDCI-0-2-r16", "nr-rrc.frequencyHoppingDCI_0_2_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_frequencyHoppingDCI_0_2_r16_vals), 0, NULL, HFILL }}, { &hf_nr_rrc_pusch_RepTypeA, { "pusch-RepTypeA", "nr-rrc.pusch_RepTypeA", @@ -93079,94 +98049,94 @@ proto_register_nr_rrc(void) { { "pusch-RepTypeB", "nr-rrc.pusch_RepTypeB", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_pusch_RepTypeB_vals), 0, NULL, HFILL }}, - { &hf_nr_rrc_frequencyHoppingOffsetListsForDCI_Format0_2_r16, - { "frequencyHoppingOffsetListsForDCI-Format0-2-r16", "nr-rrc.frequencyHoppingOffsetListsForDCI_Format0_2_r16", - FT_UINT32, BASE_DEC, VALS(nr_rrc_T_frequencyHoppingOffsetListsForDCI_Format0_2_r16_vals), 0, + { &hf_nr_rrc_frequencyHoppingOffsetListsDCI_0_2_r16, + { "frequencyHoppingOffsetListsDCI-0-2-r16", "nr-rrc.frequencyHoppingOffsetListsDCI_0_2_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_frequencyHoppingOffsetListsDCI_0_2_r16_vals), 0, NULL, HFILL }}, - { &hf_nr_rrc_setup_86, + { &hf_nr_rrc_setup_87, { "setup", "nr-rrc.setup", FT_UINT32, BASE_DEC, NULL, 0, - "FrequencyHoppingOffsetListsForDCI_Format0_2_r16", HFILL }}, - { &hf_nr_rrc_codebookSubsetForDCI_Format0_2_r16, - { "codebookSubsetForDCI-Format0-2-r16", "nr-rrc.codebookSubsetForDCI_Format0_2_r16", - FT_UINT32, BASE_DEC, VALS(nr_rrc_T_codebookSubsetForDCI_Format0_2_r16_vals), 0, + "FrequencyHoppingOffsetListsDCI_0_2_r16", HFILL }}, + { &hf_nr_rrc_codebookSubsetDCI_0_2_r16, + { "codebookSubsetDCI-0-2-r16", "nr-rrc.codebookSubsetDCI_0_2_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_codebookSubsetDCI_0_2_r16_vals), 0, NULL, HFILL }}, - { &hf_nr_rrc_invalidSymbolPatternIndicatorForDCI_Format0_2_r16, - { "invalidSymbolPatternIndicatorForDCI-Format0-2-r16", "nr-rrc.invalidSymbolPatternIndicatorForDCI_Format0_2_r16", - FT_UINT32, BASE_DEC, VALS(nr_rrc_T_invalidSymbolPatternIndicatorForDCI_Format0_2_r16_vals), 0, + { &hf_nr_rrc_invalidSymbolPatternIndicatorDCI_0_2_r16, + { "invalidSymbolPatternIndicatorDCI-0-2-r16", "nr-rrc.invalidSymbolPatternIndicatorDCI_0_2_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_invalidSymbolPatternIndicatorDCI_0_2_r16_vals), 0, NULL, HFILL }}, - { &hf_nr_rrc_maxRankForDCI_Format0_2_r16, - { "maxRankForDCI-Format0-2-r16", "nr-rrc.maxRankForDCI_Format0_2_r16", + { &hf_nr_rrc_maxRankDCI_0_2_r16, + { "maxRankDCI-0-2-r16", "nr-rrc.maxRankDCI_0_2_r16", FT_UINT32, BASE_DEC, NULL, 0, "INTEGER_1_4", HFILL }}, - { &hf_nr_rrc_mcs_TableForDCI_Format0_2_r16, - { "mcs-TableForDCI-Format0-2-r16", "nr-rrc.mcs_TableForDCI_Format0_2_r16", - FT_UINT32, BASE_DEC, VALS(nr_rrc_T_mcs_TableForDCI_Format0_2_r16_vals), 0, + { &hf_nr_rrc_mcs_TableDCI_0_2_r16, + { "mcs-TableDCI-0-2-r16", "nr-rrc.mcs_TableDCI_0_2_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_mcs_TableDCI_0_2_r16_vals), 0, NULL, HFILL }}, - { &hf_nr_rrc_mcs_TableTransformPrecoderForDCI_Format0_2_r16, - { "mcs-TableTransformPrecoderForDCI-Format0-2-r16", "nr-rrc.mcs_TableTransformPrecoderForDCI_Format0_2_r16", - FT_UINT32, BASE_DEC, VALS(nr_rrc_T_mcs_TableTransformPrecoderForDCI_Format0_2_r16_vals), 0, + { &hf_nr_rrc_mcs_TableTransformPrecoderDCI_0_2_r16, + { "mcs-TableTransformPrecoderDCI-0-2-r16", "nr-rrc.mcs_TableTransformPrecoderDCI_0_2_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_mcs_TableTransformPrecoderDCI_0_2_r16_vals), 0, NULL, HFILL }}, - { &hf_nr_rrc_priorityIndicatorForDCI_Format0_2_r16, - { "priorityIndicatorForDCI-Format0-2-r16", "nr-rrc.priorityIndicatorForDCI_Format0_2_r16", - FT_UINT32, BASE_DEC, VALS(nr_rrc_T_priorityIndicatorForDCI_Format0_2_r16_vals), 0, + { &hf_nr_rrc_priorityIndicatorDCI_0_2_r16, + { "priorityIndicatorDCI-0-2-r16", "nr-rrc.priorityIndicatorDCI_0_2_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_priorityIndicatorDCI_0_2_r16_vals), 0, NULL, HFILL }}, - { &hf_nr_rrc_pusch_RepTypeIndicatorForDCI_Format0_2_r16, - { "pusch-RepTypeIndicatorForDCI-Format0-2-r16", "nr-rrc.pusch_RepTypeIndicatorForDCI_Format0_2_r16", - FT_UINT32, BASE_DEC, VALS(nr_rrc_T_pusch_RepTypeIndicatorForDCI_Format0_2_r16_vals), 0, + { &hf_nr_rrc_pusch_RepTypeIndicatorDCI_0_2_r16, + { "pusch-RepTypeIndicatorDCI-0-2-r16", "nr-rrc.pusch_RepTypeIndicatorDCI_0_2_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_pusch_RepTypeIndicatorDCI_0_2_r16_vals), 0, NULL, HFILL }}, - { &hf_nr_rrc_resourceAllocationForDCI_Format0_2_r16, - { "resourceAllocationForDCI-Format0-2-r16", "nr-rrc.resourceAllocationForDCI_Format0_2_r16", - FT_UINT32, BASE_DEC, VALS(nr_rrc_T_resourceAllocationForDCI_Format0_2_r16_vals), 0, + { &hf_nr_rrc_resourceAllocationDCI_0_2_r16, + { "resourceAllocationDCI-0-2-r16", "nr-rrc.resourceAllocationDCI_0_2_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_resourceAllocationDCI_0_2_r16_vals), 0, NULL, HFILL }}, - { &hf_nr_rrc_resourceAllocationType1GranularityForDCI_Format0_2_r16, - { "resourceAllocationType1GranularityForDCI-Format0-2-r16", "nr-rrc.resourceAllocationType1GranularityForDCI_Format0_2_r16", - FT_UINT32, BASE_DEC, VALS(nr_rrc_T_resourceAllocationType1GranularityForDCI_Format0_2_r16_vals), 0, + { &hf_nr_rrc_resourceAllocationType1GranularityDCI_0_2_r16, + { "resourceAllocationType1GranularityDCI-0-2-r16", "nr-rrc.resourceAllocationType1GranularityDCI_0_2_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_resourceAllocationType1GranularityDCI_0_2_r16_vals), 0, NULL, HFILL }}, - { &hf_nr_rrc_uci_OnPUSCH_ListForDCI_Format0_2_r16, - { "uci-OnPUSCH-ListForDCI-Format0-2-r16", "nr-rrc.uci_OnPUSCH_ListForDCI_Format0_2_r16", - FT_UINT32, BASE_DEC, VALS(nr_rrc_T_uci_OnPUSCH_ListForDCI_Format0_2_r16_vals), 0, + { &hf_nr_rrc_uci_OnPUSCH_ListDCI_0_2_r16, + { "uci-OnPUSCH-ListDCI-0-2-r16", "nr-rrc.uci_OnPUSCH_ListDCI_0_2_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_uci_OnPUSCH_ListDCI_0_2_r16_vals), 0, NULL, HFILL }}, - { &hf_nr_rrc_setup_87, + { &hf_nr_rrc_setup_88, { "setup", "nr-rrc.setup", FT_UINT32, BASE_DEC, NULL, 0, - "UCI_OnPUSCH_ListForDCI_Format0_2_r16", HFILL }}, - { &hf_nr_rrc_pusch_TimeDomainAllocationListForDCI_Format0_2_r16, - { "pusch-TimeDomainAllocationListForDCI-Format0-2-r16", "nr-rrc.pusch_TimeDomainAllocationListForDCI_Format0_2_r16", - FT_UINT32, BASE_DEC, VALS(nr_rrc_T_pusch_TimeDomainAllocationListForDCI_Format0_2_r16_vals), 0, + "UCI_OnPUSCH_ListDCI_0_2_r16", HFILL }}, + { &hf_nr_rrc_pusch_TimeDomainAllocationListDCI_0_2_r16, + { "pusch-TimeDomainAllocationListDCI-0-2-r16", "nr-rrc.pusch_TimeDomainAllocationListDCI_0_2_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_pusch_TimeDomainAllocationListDCI_0_2_r16_vals), 0, NULL, HFILL }}, - { &hf_nr_rrc_setup_88, + { &hf_nr_rrc_setup_89, { "setup", "nr-rrc.setup", FT_UINT32, BASE_DEC, NULL, 0, "PUSCH_TimeDomainResourceAllocationList_r16", HFILL }}, - { &hf_nr_rrc_pusch_TimeDomainAllocationListForDCI_Format0_1_r16, - { "pusch-TimeDomainAllocationListForDCI-Format0-1-r16", "nr-rrc.pusch_TimeDomainAllocationListForDCI_Format0_1_r16", - FT_UINT32, BASE_DEC, VALS(nr_rrc_T_pusch_TimeDomainAllocationListForDCI_Format0_1_r16_vals), 0, + { &hf_nr_rrc_pusch_TimeDomainAllocationListDCI_0_1_r16, + { "pusch-TimeDomainAllocationListDCI-0-1-r16", "nr-rrc.pusch_TimeDomainAllocationListDCI_0_1_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_pusch_TimeDomainAllocationListDCI_0_1_r16_vals), 0, NULL, HFILL }}, - { &hf_nr_rrc_invalidSymbolPatternIndicatorForDCI_Format0_1_r16, - { "invalidSymbolPatternIndicatorForDCI-Format0-1-r16", "nr-rrc.invalidSymbolPatternIndicatorForDCI_Format0_1_r16", - FT_UINT32, BASE_DEC, VALS(nr_rrc_T_invalidSymbolPatternIndicatorForDCI_Format0_1_r16_vals), 0, + { &hf_nr_rrc_invalidSymbolPatternIndicatorDCI_0_1_r16, + { "invalidSymbolPatternIndicatorDCI-0-1-r16", "nr-rrc.invalidSymbolPatternIndicatorDCI_0_1_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_invalidSymbolPatternIndicatorDCI_0_1_r16_vals), 0, NULL, HFILL }}, - { &hf_nr_rrc_priorityIndicatorForDCI_Format0_1_r16, - { "priorityIndicatorForDCI-Format0-1-r16", "nr-rrc.priorityIndicatorForDCI_Format0_1_r16", - FT_UINT32, BASE_DEC, VALS(nr_rrc_T_priorityIndicatorForDCI_Format0_1_r16_vals), 0, + { &hf_nr_rrc_priorityIndicatorDCI_0_1_r16, + { "priorityIndicatorDCI-0-1-r16", "nr-rrc.priorityIndicatorDCI_0_1_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_priorityIndicatorDCI_0_1_r16_vals), 0, NULL, HFILL }}, - { &hf_nr_rrc_pusch_RepTypeIndicatorForDCI_Format0_1_r16, - { "pusch-RepTypeIndicatorForDCI-Format0-1-r16", "nr-rrc.pusch_RepTypeIndicatorForDCI_Format0_1_r16", - FT_UINT32, BASE_DEC, VALS(nr_rrc_T_pusch_RepTypeIndicatorForDCI_Format0_1_r16_vals), 0, + { &hf_nr_rrc_pusch_RepTypeIndicatorDCI_0_1_r16, + { "pusch-RepTypeIndicatorDCI-0-1-r16", "nr-rrc.pusch_RepTypeIndicatorDCI_0_1_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_pusch_RepTypeIndicatorDCI_0_1_r16_vals), 0, NULL, HFILL }}, - { &hf_nr_rrc_frequencyHoppingForDCI_Format0_1_r16, - { "frequencyHoppingForDCI-Format0-1-r16", "nr-rrc.frequencyHoppingForDCI_Format0_1_r16", - FT_UINT32, BASE_DEC, VALS(nr_rrc_T_frequencyHoppingForDCI_Format0_1_r16_vals), 0, + { &hf_nr_rrc_frequencyHoppingDCI_0_1_r16, + { "frequencyHoppingDCI-0-1-r16", "nr-rrc.frequencyHoppingDCI_0_1_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_frequencyHoppingDCI_0_1_r16_vals), 0, NULL, HFILL }}, - { &hf_nr_rrc_uci_OnPUSCH_ListForDCI_Format0_1_r16, - { "uci-OnPUSCH-ListForDCI-Format0-1-r16", "nr-rrc.uci_OnPUSCH_ListForDCI_Format0_1_r16", - FT_UINT32, BASE_DEC, VALS(nr_rrc_T_uci_OnPUSCH_ListForDCI_Format0_1_r16_vals), 0, + { &hf_nr_rrc_uci_OnPUSCH_ListDCI_0_1_r16, + { "uci-OnPUSCH-ListDCI-0-1-r16", "nr-rrc.uci_OnPUSCH_ListDCI_0_1_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_uci_OnPUSCH_ListDCI_0_1_r16_vals), 0, NULL, HFILL }}, - { &hf_nr_rrc_setup_89, + { &hf_nr_rrc_setup_90, { "setup", "nr-rrc.setup", FT_UINT32, BASE_DEC, NULL, 0, - "UCI_OnPUSCH_ListForDCI_Format0_1_r16", HFILL }}, + "UCI_OnPUSCH_ListDCI_0_1_r16", HFILL }}, { &hf_nr_rrc_invalidSymbolPattern_r16, { "invalidSymbolPattern-r16", "nr-rrc.invalidSymbolPattern_r16_element", FT_NONE, BASE_NONE, NULL, 0, @@ -93175,7 +98145,7 @@ proto_register_nr_rrc(void) { { "pusch-PowerControl-v1610", "nr-rrc.pusch_PowerControl_v1610", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_pusch_PowerControl_v1610_vals), 0, NULL, HFILL }}, - { &hf_nr_rrc_setup_90, + { &hf_nr_rrc_setup_91, { "setup", "nr-rrc.setup_element", FT_NONE, BASE_NONE, NULL, 0, "PUSCH_PowerControl_v1610", HFILL }}, @@ -93207,13 +98177,13 @@ proto_register_nr_rrc(void) { { "MinSchedulingOffsetK2-Values-r16 item", "nr-rrc.MinSchedulingOffsetK2_Values_r16_item", FT_UINT32, BASE_DEC, NULL, 0, "INTEGER_0_maxK2_SchedulingOffset_r16", HFILL }}, - { &hf_nr_rrc_betaOffsetsForDCI_Format0_2_r16, - { "betaOffsetsForDCI-Format0-2-r16", "nr-rrc.betaOffsetsForDCI_Format0_2_r16", - FT_UINT32, BASE_DEC, VALS(nr_rrc_T_betaOffsetsForDCI_Format0_2_r16_vals), 0, + { &hf_nr_rrc_betaOffsetsDCI_0_2_r16, + { "betaOffsetsDCI-0-2-r16", "nr-rrc.betaOffsetsDCI_0_2_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_betaOffsetsDCI_0_2_r16_vals), 0, NULL, HFILL }}, - { &hf_nr_rrc_dynamicForDCI_Format0_2_r16, - { "dynamicForDCI-Format0-2-r16", "nr-rrc.dynamicForDCI_Format0_2_r16", - FT_UINT32, BASE_DEC, VALS(nr_rrc_T_dynamicForDCI_Format0_2_r16_vals), 0, + { &hf_nr_rrc_dynamicDCI_0_2_r16, + { "dynamicDCI-0-2-r16", "nr-rrc.dynamicDCI_0_2_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_dynamicDCI_0_2_r16_vals), 0, NULL, HFILL }}, { &hf_nr_rrc_oneBit_r16, { "oneBit-r16", "nr-rrc.oneBit_r16", @@ -93231,28 +98201,28 @@ proto_register_nr_rrc(void) { { "BetaOffsets", "nr-rrc.BetaOffsets_element", FT_NONE, BASE_NONE, NULL, 0, NULL, HFILL }}, - { &hf_nr_rrc_semiStaticForDCI_Format0_2_r16, - { "semiStaticForDCI-Format0-2-r16", "nr-rrc.semiStaticForDCI_Format0_2_r16_element", + { &hf_nr_rrc_semiStaticDCI_0_2_r16, + { "semiStaticDCI-0-2-r16", "nr-rrc.semiStaticDCI_0_2_r16_element", FT_NONE, BASE_NONE, NULL, 0, "BetaOffsets", HFILL }}, - { &hf_nr_rrc_scalingForDCI_Format0_2_r16, - { "scalingForDCI-Format0-2-r16", "nr-rrc.scalingForDCI_Format0_2_r16", - FT_UINT32, BASE_DEC, VALS(nr_rrc_T_scalingForDCI_Format0_2_r16_vals), 0, + { &hf_nr_rrc_scalingDCI_0_2_r16, + { "scalingDCI-0-2-r16", "nr-rrc.scalingDCI_0_2_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_scalingDCI_0_2_r16_vals), 0, NULL, HFILL }}, - { &hf_nr_rrc_FrequencyHoppingOffsetListsForDCI_Format0_2_r16_item, - { "FrequencyHoppingOffsetListsForDCI-Format0-2-r16 item", "nr-rrc.FrequencyHoppingOffsetListsForDCI_Format0_2_r16_item", + { &hf_nr_rrc_FrequencyHoppingOffsetListsDCI_0_2_r16_item, + { "FrequencyHoppingOffsetListsDCI-0-2-r16 item", "nr-rrc.FrequencyHoppingOffsetListsDCI_0_2_r16_item", FT_UINT32, BASE_DEC, NULL, 0, "INTEGER_1_maxNrofPhysicalResourceBlocks_1", HFILL }}, - { &hf_nr_rrc_UCI_OnPUSCH_ListForDCI_Format0_2_r16_item, - { "UCI-OnPUSCH-ForDCI-Format0-2-r16", "nr-rrc.UCI_OnPUSCH_ForDCI_Format0_2_r16_element", + { &hf_nr_rrc_UCI_OnPUSCH_ListDCI_0_2_r16_item, + { "UCI-OnPUSCH-DCI-0-2-r16", "nr-rrc.UCI_OnPUSCH_DCI_0_2_r16_element", FT_NONE, BASE_NONE, NULL, 0, NULL, HFILL }}, - { &hf_nr_rrc_UCI_OnPUSCH_ListForDCI_Format0_1_r16_item, + { &hf_nr_rrc_UCI_OnPUSCH_ListDCI_0_1_r16_item, { "UCI-OnPUSCH", "nr-rrc.UCI_OnPUSCH_element", FT_NONE, BASE_NONE, NULL, 0, NULL, HFILL }}, - { &hf_nr_rrc_UL_AccessConfigListForDCI_Format0_1_r16_item, - { "UL-AccessConfigListForDCI-Format0-1-r16 item", "nr-rrc.UL_AccessConfigListForDCI_Format0_1_r16_item", + { &hf_nr_rrc_UL_AccessConfigListDCI_0_1_r16_item, + { "UL-AccessConfigListDCI-0-1-r16 item", "nr-rrc.UL_AccessConfigListDCI_0_1_r16_item", FT_UINT32, BASE_DEC, NULL, 0, "INTEGER_0_63", HFILL }}, { &hf_nr_rrc_groupHoppingEnabledTransformPrecoding, @@ -93403,12 +98373,12 @@ proto_register_nr_rrc(void) { { "olpc-ParameterSet", "nr-rrc.olpc_ParameterSet_element", FT_NONE, BASE_NONE, NULL, 0, NULL, HFILL }}, - { &hf_nr_rrc_olpc_ParameterSetForDCI_Format0_1_r16, - { "olpc-ParameterSetForDCI-Format0-1-r16", "nr-rrc.olpc_ParameterSetForDCI_Format0_1_r16", + { &hf_nr_rrc_olpc_ParameterSetDCI_0_1_r16, + { "olpc-ParameterSetDCI-0-1-r16", "nr-rrc.olpc_ParameterSetDCI_0_1_r16", FT_UINT32, BASE_DEC, NULL, 0, "INTEGER_1_2", HFILL }}, - { &hf_nr_rrc_olpc_ParameterSetForDCI_Format0_2_r16, - { "olpc-ParameterSetForDCI-Format0-2-r16", "nr-rrc.olpc_ParameterSetForDCI_Format0_2_r16", + { &hf_nr_rrc_olpc_ParameterSetDCI_0_2_r16, + { "olpc-ParameterSetDCI-0-2-r16", "nr-rrc.olpc_ParameterSetDCI_0_2_r16", FT_UINT32, BASE_DEC, NULL, 0, "INTEGER_1_2", HFILL }}, { &hf_nr_rrc_p0_PUSCH_SetId_r16, @@ -93427,7 +98397,7 @@ proto_register_nr_rrc(void) { { "codeBlockGroupTransmission", "nr-rrc.codeBlockGroupTransmission", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_codeBlockGroupTransmission_01_vals), 0, "T_codeBlockGroupTransmission_01", HFILL }}, - { &hf_nr_rrc_setup_91, + { &hf_nr_rrc_setup_92, { "setup", "nr-rrc.setup_element", FT_NONE, BASE_NONE, NULL, 0, "PUSCH_CodeBlockGroupTransmission", HFILL }}, @@ -93443,14 +98413,14 @@ proto_register_nr_rrc(void) { { "maxMIMO-Layers", "nr-rrc.maxMIMO_Layers", FT_UINT32, BASE_DEC, NULL, 0, "INTEGER_1_4", HFILL }}, - { &hf_nr_rrc_maxMIMO_LayersForDCI_Format0_2_r16, - { "maxMIMO-LayersForDCI-Format0-2-r16", "nr-rrc.maxMIMO_LayersForDCI_Format0_2_r16", - FT_UINT32, BASE_DEC, VALS(nr_rrc_T_maxMIMO_LayersForDCI_Format0_2_r16_vals), 0, + { &hf_nr_rrc_maxMIMO_LayersDCI_0_2_r16, + { "maxMIMO-LayersDCI-0-2-r16", "nr-rrc.maxMIMO_LayersDCI_0_2_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_maxMIMO_LayersDCI_0_2_r16_vals), 0, NULL, HFILL }}, - { &hf_nr_rrc_setup_92, + { &hf_nr_rrc_setup_93, { "setup", "nr-rrc.setup", FT_UINT32, BASE_DEC, NULL, 0, - "MaxMIMO_LayersForDCI_Format0_2_r16", HFILL }}, + "MaxMIMO_LayersDCI_0_2_r16", HFILL }}, { &hf_nr_rrc_maxCodeBlockGroupsPerTransportBlock_01, { "maxCodeBlockGroupsPerTransportBlock", "nr-rrc.maxCodeBlockGroupsPerTransportBlock", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_maxCodeBlockGroupsPerTransportBlock_01_vals), 0, @@ -93663,8 +98633,8 @@ proto_register_nr_rrc(void) { { "msg3-transformPrecoder", "nr-rrc.msg3_transformPrecoder", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_msg3_transformPrecoder_vals), 0, NULL, HFILL }}, - { &hf_nr_rrc_ra_PrioritizationForAccessIdentity, - { "ra-PrioritizationForAccessIdentity", "nr-rrc.ra_PrioritizationForAccessIdentity_element", + { &hf_nr_rrc_ra_PrioritizationForAccessIdentity_r16, + { "ra-PrioritizationForAccessIdentity-r16", "nr-rrc.ra_PrioritizationForAccessIdentity_r16_element", FT_NONE, BASE_NONE, NULL, 0, NULL, HFILL }}, { &hf_nr_rrc_ra_Prioritization_r16, @@ -94155,7 +99125,7 @@ proto_register_nr_rrc(void) { { "fdm-TDM-r16", "nr-rrc.fdm_TDM_r16", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_fdm_TDM_r16_vals), 0, NULL, HFILL }}, - { &hf_nr_rrc_setup_93, + { &hf_nr_rrc_setup_94, { "setup", "nr-rrc.setup_element", FT_NONE, BASE_NONE, NULL, 0, "FDM_TDM_r16", HFILL }}, @@ -94163,7 +99133,7 @@ proto_register_nr_rrc(void) { { "slotBased-r16", "nr-rrc.slotBased_r16", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_slotBased_r16_vals), 0, NULL, HFILL }}, - { &hf_nr_rrc_setup_94, + { &hf_nr_rrc_setup_95, { "setup", "nr-rrc.setup_element", FT_NONE, BASE_NONE, NULL, 0, "SlotBased_r16", HFILL }}, @@ -94523,7 +99493,7 @@ proto_register_nr_rrc(void) { { "ul-DelayValueConfig-r16", "nr-rrc.ul_DelayValueConfig_r16", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_ul_DelayValueConfig_r16_vals), 0, NULL, HFILL }}, - { &hf_nr_rrc_setup_95, + { &hf_nr_rrc_setup_96, { "setup", "nr-rrc.setup_element", FT_NONE, BASE_NONE, NULL, 0, "UL_DelayValueConfig_r16", HFILL }}, @@ -94557,7 +99527,7 @@ proto_register_nr_rrc(void) { "BOOLEAN", HFILL }}, { &hf_nr_rrc_channelOccupancyThreshold_r16, { "channelOccupancyThreshold-r16", "nr-rrc.channelOccupancyThreshold_r16", - FT_UINT32, BASE_DEC, NULL, 0, + FT_UINT32, BASE_CUSTOM, CF_FUNC(nr_rrc_RSSI_Range_r16_fmt), 0, "RSSI_Range_r16", HFILL }}, { &hf_nr_rrc_eventId_r16, { "eventId-r16", "nr-rrc.eventId_r16", @@ -94597,7 +99567,7 @@ proto_register_nr_rrc(void) { "SRS_RSRP_Range_r16", HFILL }}, { &hf_nr_rrc_cli_RSSI_r16, { "cli-RSSI-r16", "nr-rrc.cli_RSSI_r16", - FT_UINT32, BASE_CUSTOM, CF_FUNC(nr_rrc_CLI_RSSI_Range_r16_fmt), 0, + FT_UINT32, BASE_CUSTOM, CF_FUNC(nr_rrc_RSSI_Range_r16_fmt), 0, "CLI_RSSI_Range_r16", HFILL }}, { &hf_nr_rrc_reportType_r16, { "reportType-r16", "nr-rrc.reportType_r16", @@ -95179,7 +100149,7 @@ proto_register_nr_rrc(void) { { "pdcch-ServingCellConfig", "nr-rrc.pdcch_ServingCellConfig", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_pdcch_ServingCellConfig_vals), 0, NULL, HFILL }}, - { &hf_nr_rrc_setup_96, + { &hf_nr_rrc_setup_97, { "setup", "nr-rrc.setup_element", FT_NONE, BASE_NONE, NULL, 0, "PDCCH_ServingCellConfig", HFILL }}, @@ -95187,7 +100157,7 @@ proto_register_nr_rrc(void) { { "pdsch-ServingCellConfig", "nr-rrc.pdsch_ServingCellConfig", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_pdsch_ServingCellConfig_vals), 0, NULL, HFILL }}, - { &hf_nr_rrc_setup_97, + { &hf_nr_rrc_setup_98, { "setup", "nr-rrc.setup_element", FT_NONE, BASE_NONE, NULL, 0, "PDSCH_ServingCellConfig", HFILL }}, @@ -95195,7 +100165,7 @@ proto_register_nr_rrc(void) { { "csi-MeasConfig", "nr-rrc.csi_MeasConfig", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_csi_MeasConfig_vals), 0, NULL, HFILL }}, - { &hf_nr_rrc_setup_98, + { &hf_nr_rrc_setup_99, { "setup", "nr-rrc.setup_element", FT_NONE, BASE_NONE, NULL, 0, "CSI_MeasConfig", HFILL }}, @@ -95227,7 +100197,7 @@ proto_register_nr_rrc(void) { { "lte-CRS-ToMatchAround", "nr-rrc.lte_CRS_ToMatchAround", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_lte_CRS_ToMatchAround_vals), 0, NULL, HFILL }}, - { &hf_nr_rrc_setup_99, + { &hf_nr_rrc_setup_100, { "setup", "nr-rrc.setup_element", FT_NONE, BASE_NONE, NULL, 0, "RateMatchPatternLTE_CRS", HFILL }}, @@ -95243,15 +100213,15 @@ proto_register_nr_rrc(void) { { "supplementaryUplinkRelease", "nr-rrc.supplementaryUplinkRelease", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_supplementaryUplinkRelease_vals), 0, NULL, HFILL }}, - { &hf_nr_rrc_tdd_UL_DL_ConfigurationDedicated_iab_mt_r16, - { "tdd-UL-DL-ConfigurationDedicated-iab-mt-r16", "nr-rrc.tdd_UL_DL_ConfigurationDedicated_iab_mt_r16_element", + { &hf_nr_rrc_tdd_UL_DL_ConfigurationDedicated_IAB_MT_r16, + { "tdd-UL-DL-ConfigurationDedicated-IAB-MT-r16", "nr-rrc.tdd_UL_DL_ConfigurationDedicated_IAB_MT_r16_element", FT_NONE, BASE_NONE, NULL, 0, "TDD_UL_DL_ConfigDedicated_IAB_MT_r16", HFILL }}, { &hf_nr_rrc_dormantBWP_Config_r16, { "dormantBWP-Config-r16", "nr-rrc.dormantBWP_Config_r16", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_dormantBWP_Config_r16_vals), 0, NULL, HFILL }}, - { &hf_nr_rrc_setup_100, + { &hf_nr_rrc_setup_101, { "setup", "nr-rrc.setup_element", FT_NONE, BASE_NONE, NULL, 0, "DormantBWP_Config_r16", HFILL }}, @@ -95279,18 +100249,26 @@ proto_register_nr_rrc(void) { { "channelAccessConfig-r16", "nr-rrc.channelAccessConfig_r16", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_channelAccessConfig_r16_vals), 0, NULL, HFILL }}, - { &hf_nr_rrc_setup_101, + { &hf_nr_rrc_setup_102, { "setup", "nr-rrc.setup_element", FT_NONE, BASE_NONE, NULL, 0, "ChannelAccessConfig_r16", HFILL }}, - { &hf_nr_rrc_intraCellGuardBandsUL_r16, - { "intraCellGuardBandsUL-r16", "nr-rrc.intraCellGuardBandsUL_r16", + { &hf_nr_rrc_intraCellGuardBandsDL_List_r16, + { "intraCellGuardBandsDL-List-r16", "nr-rrc.intraCellGuardBandsDL_List_r16", FT_UINT32, BASE_DEC, NULL, 0, - "IntraCellGuardBands_r16", HFILL }}, - { &hf_nr_rrc_intraCellGuardBandsDL_r16, - { "intraCellGuardBandsDL-r16", "nr-rrc.intraCellGuardBandsDL_r16", + "SEQUENCE_SIZE_1_maxSCSs_OF_IntraCellGuardBandsPerSCS_r16", HFILL }}, + { &hf_nr_rrc_intraCellGuardBandsDL_List_r16_item, + { "IntraCellGuardBandsPerSCS-r16", "nr-rrc.IntraCellGuardBandsPerSCS_r16_element", + FT_NONE, BASE_NONE, NULL, 0, + NULL, HFILL }}, + { &hf_nr_rrc_intraCellGuardBandsUL_List_r16, + { "intraCellGuardBandsUL-List-r16", "nr-rrc.intraCellGuardBandsUL_List_r16", FT_UINT32, BASE_DEC, NULL, 0, - "IntraCellGuardBands_r16", HFILL }}, + "SEQUENCE_SIZE_1_maxSCSs_OF_IntraCellGuardBandsPerSCS_r16", HFILL }}, + { &hf_nr_rrc_intraCellGuardBandsUL_List_r16_item, + { "IntraCellGuardBandsPerSCS-r16", "nr-rrc.IntraCellGuardBandsPerSCS_r16_element", + FT_NONE, BASE_NONE, NULL, 0, + NULL, HFILL }}, { &hf_nr_rrc_csi_RS_ValidationWith_DCI_r16, { "csi-RS-ValidationWith-DCI-r16", "nr-rrc.csi_RS_ValidationWith_DCI_r16", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_csi_RS_ValidationWith_DCI_r16_vals), 0, @@ -95299,7 +100277,7 @@ proto_register_nr_rrc(void) { { "lte-CRS-PatternList1-r16", "nr-rrc.lte_CRS_PatternList1_r16", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_lte_CRS_PatternList1_r16_vals), 0, NULL, HFILL }}, - { &hf_nr_rrc_setup_102, + { &hf_nr_rrc_setup_103, { "setup", "nr-rrc.setup", FT_UINT32, BASE_DEC, NULL, 0, "LTE_CRS_PatternList_r16", HFILL }}, @@ -95311,13 +100289,13 @@ proto_register_nr_rrc(void) { { "crs-RateMatch-PerCORESETPoolIndex-r16", "nr-rrc.crs_RateMatch_PerCORESETPoolIndex_r16", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_crs_RateMatch_PerCORESETPoolIndex_r16_vals), 0, NULL, HFILL }}, - { &hf_nr_rrc_enableTwoDefaultTCIStates_r16, - { "enableTwoDefaultTCIStates-r16", "nr-rrc.enableTwoDefaultTCIStates_r16", - FT_UINT32, BASE_DEC, VALS(nr_rrc_T_enableTwoDefaultTCIStates_r16_vals), 0, + { &hf_nr_rrc_enableTwoDefaultTCI_States_r16, + { "enableTwoDefaultTCI-States-r16", "nr-rrc.enableTwoDefaultTCI_States_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_enableTwoDefaultTCI_States_r16_vals), 0, NULL, HFILL }}, - { &hf_nr_rrc_enableDefaultTCIStatePerCoresetPoolIndex_r16, - { "enableDefaultTCIStatePerCoresetPoolIndex-r16", "nr-rrc.enableDefaultTCIStatePerCoresetPoolIndex_r16", - FT_UINT32, BASE_DEC, VALS(nr_rrc_T_enableDefaultTCIStatePerCoresetPoolIndex_r16_vals), 0, + { &hf_nr_rrc_enableDefaultTCI_StatePerCoresetPoolIndex_r16, + { "enableDefaultTCI-StatePerCoresetPoolIndex-r16", "nr-rrc.enableDefaultTCI_StatePerCoresetPoolIndex_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_enableDefaultTCI_StatePerCoresetPoolIndex_r16_vals), 0, NULL, HFILL }}, { &hf_nr_rrc_enableBeamSwitchTiming_r16, { "enableBeamSwitchTiming-r16", "nr-rrc.enableBeamSwitchTiming_r16", @@ -95359,7 +100337,7 @@ proto_register_nr_rrc(void) { { "pusch-ServingCellConfig", "nr-rrc.pusch_ServingCellConfig", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_pusch_ServingCellConfig_vals), 0, NULL, HFILL }}, - { &hf_nr_rrc_setup_103, + { &hf_nr_rrc_setup_104, { "setup", "nr-rrc.setup_element", FT_NONE, BASE_NONE, NULL, 0, "PUSCH_ServingCellConfig", HFILL }}, @@ -95367,7 +100345,7 @@ proto_register_nr_rrc(void) { { "carrierSwitching", "nr-rrc.carrierSwitching", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_carrierSwitching_vals), 0, NULL, HFILL }}, - { &hf_nr_rrc_setup_104, + { &hf_nr_rrc_setup_105, { "setup", "nr-rrc.setup_element", FT_NONE, BASE_NONE, NULL, 0, "SRS_CarrierSwitching", HFILL }}, @@ -95383,13 +100361,13 @@ proto_register_nr_rrc(void) { { "SCS-SpecificCarrier", "nr-rrc.SCS_SpecificCarrier_element", FT_NONE, BASE_NONE, NULL, 0, NULL, HFILL }}, - { &hf_nr_rrc_enablePLRS_UpdateForPUSCH_SRS_r16, - { "enablePLRS-UpdateForPUSCH-SRS-r16", "nr-rrc.enablePLRS_UpdateForPUSCH_SRS_r16", - FT_UINT32, BASE_DEC, VALS(nr_rrc_T_enablePLRS_UpdateForPUSCH_SRS_r16_vals), 0, + { &hf_nr_rrc_enablePL_RS_UpdateForPUSCH_SRS_r16, + { "enablePL-RS-UpdateForPUSCH-SRS-r16", "nr-rrc.enablePL_RS_UpdateForPUSCH_SRS_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_enablePL_RS_UpdateForPUSCH_SRS_r16_vals), 0, NULL, HFILL }}, - { &hf_nr_rrc_enableDefaultBeamPL_ForPUSCH0_r16, - { "enableDefaultBeamPL-ForPUSCH0-r16", "nr-rrc.enableDefaultBeamPL_ForPUSCH0_r16", - FT_UINT32, BASE_DEC, VALS(nr_rrc_T_enableDefaultBeamPL_ForPUSCH0_r16_vals), 0, + { &hf_nr_rrc_enableDefaultBeamPL_ForPUSCH0_0_r16, + { "enableDefaultBeamPL-ForPUSCH0-0-r16", "nr-rrc.enableDefaultBeamPL_ForPUSCH0_0_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_enableDefaultBeamPL_ForPUSCH0_0_r16_vals), 0, NULL, HFILL }}, { &hf_nr_rrc_enableDefaultBeamPL_ForPUCCH_r16, { "enableDefaultBeamPL-ForPUCCH-r16", "nr-rrc.enableDefaultBeamPL_ForPUCCH_r16", @@ -95403,10 +100381,14 @@ proto_register_nr_rrc(void) { { "uplinkTxSwitching-r16", "nr-rrc.uplinkTxSwitching_r16", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_uplinkTxSwitching_r16_vals), 0, NULL, HFILL }}, - { &hf_nr_rrc_setup_105, + { &hf_nr_rrc_setup_106, { "setup", "nr-rrc.setup_element", FT_NONE, BASE_NONE, NULL, 0, "UplinkTxSwitching_r16", HFILL }}, + { &hf_nr_rrc_mpr_PowerBoost_FR2_r16, + { "mpr-PowerBoost-FR2-r16", "nr-rrc.mpr_PowerBoost_FR2_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_mpr_PowerBoost_FR2_r16_vals), 0, + "T_mpr_PowerBoost_FR2_r16", HFILL }}, { &hf_nr_rrc_maxEnergyDetectionThreshold_r16, { "maxEnergyDetectionThreshold-r16", "nr-rrc.maxEnergyDetectionThreshold_r16", FT_INT32, BASE_DEC|BASE_UNIT_STRING, &units_dbm, 0, @@ -95423,7 +100405,15 @@ proto_register_nr_rrc(void) { { "absenceOfAnyOtherTechnology-r16", "nr-rrc.absenceOfAnyOtherTechnology_r16", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_absenceOfAnyOtherTechnology_r16_vals), 0, NULL, HFILL }}, - { &hf_nr_rrc_IntraCellGuardBands_r16_item, + { &hf_nr_rrc_guardBandSCS_r16, + { "guardBandSCS-r16", "nr-rrc.guardBandSCS_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_SubcarrierSpacing_vals), 0, + "SubcarrierSpacing", HFILL }}, + { &hf_nr_rrc_intraCellGuardBands_r16, + { "intraCellGuardBands-r16", "nr-rrc.intraCellGuardBands_r16", + FT_UINT32, BASE_DEC, NULL, 0, + "SEQUENCE_SIZE_1_4_OF_GuardBand_r16", HFILL }}, + { &hf_nr_rrc_intraCellGuardBands_r16_item, { "GuardBand-r16", "nr-rrc.GuardBand_r16_element", FT_NONE, BASE_NONE, NULL, 0, NULL, HFILL }}, @@ -95443,7 +100433,7 @@ proto_register_nr_rrc(void) { { "withinActiveTimeConfig-r16", "nr-rrc.withinActiveTimeConfig_r16", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_withinActiveTimeConfig_r16_vals), 0, NULL, HFILL }}, - { &hf_nr_rrc_setup_106, + { &hf_nr_rrc_setup_107, { "setup", "nr-rrc.setup_element", FT_NONE, BASE_NONE, NULL, 0, "WithinActiveTimeConfig_r16", HFILL }}, @@ -95451,7 +100441,7 @@ proto_register_nr_rrc(void) { { "outsideActiveTimeConfig-r16", "nr-rrc.outsideActiveTimeConfig_r16", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_outsideActiveTimeConfig_r16_vals), 0, NULL, HFILL }}, - { &hf_nr_rrc_setup_107, + { &hf_nr_rrc_setup_108, { "setup", "nr-rrc.setup_element", FT_NONE, BASE_NONE, NULL, 0, "OutsideActiveTimeConfig_r16", HFILL }}, @@ -95747,19 +100737,19 @@ proto_register_nr_rrc(void) { { "ServCellIndex", "nr-rrc.ServCellIndex", FT_UINT32, BASE_DEC, NULL, 0, NULL, HFILL }}, - { &hf_nr_rrc_searchSpaceSwitchTriggerToAddModList_r16, - { "searchSpaceSwitchTriggerToAddModList-r16", "nr-rrc.searchSpaceSwitchTriggerToAddModList_r16", + { &hf_nr_rrc_switchTriggerToAddModList_r16, + { "switchTriggerToAddModList-r16", "nr-rrc.switchTriggerToAddModList_r16", FT_UINT32, BASE_DEC, NULL, 0, "SEQUENCE_SIZE_1_4_OF_SearchSpaceSwitchTrigger_r16", HFILL }}, - { &hf_nr_rrc_searchSpaceSwitchTriggerToAddModList_r16_item, + { &hf_nr_rrc_switchTriggerToAddModList_r16_item, { "SearchSpaceSwitchTrigger-r16", "nr-rrc.SearchSpaceSwitchTrigger_r16_element", FT_NONE, BASE_NONE, NULL, 0, NULL, HFILL }}, - { &hf_nr_rrc_searchSpaceSwitchTriggerToReleaseList_r16, - { "searchSpaceSwitchTriggerToReleaseList-r16", "nr-rrc.searchSpaceSwitchTriggerToReleaseList_r16", + { &hf_nr_rrc_switchTriggerToReleaseList_r16, + { "switchTriggerToReleaseList-r16", "nr-rrc.switchTriggerToReleaseList_r16", FT_UINT32, BASE_DEC, NULL, 0, "SEQUENCE_SIZE_1_4_OF_ServCellIndex", HFILL }}, - { &hf_nr_rrc_searchSpaceSwitchTriggerToReleaseList_r16_item, + { &hf_nr_rrc_switchTriggerToReleaseList_r16_item, { "ServCellIndex", "nr-rrc.ServCellIndex", FT_UINT32, BASE_DEC, NULL, 0, NULL, HFILL }}, @@ -95935,27 +100925,27 @@ proto_register_nr_rrc(void) { { "tpc-Accumulation", "nr-rrc.tpc_Accumulation", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_tpc_Accumulation_01_vals), 0, "T_tpc_Accumulation_01", HFILL }}, - { &hf_nr_rrc_srs_RequestForDCI_Format1_2_r16, - { "srs-RequestForDCI-Format1-2-r16", "nr-rrc.srs_RequestForDCI_Format1_2_r16", + { &hf_nr_rrc_srs_RequestDCI_1_2_r16, + { "srs-RequestDCI-1-2-r16", "nr-rrc.srs_RequestDCI_1_2_r16", FT_UINT32, BASE_DEC, NULL, 0, "INTEGER_1_2", HFILL }}, - { &hf_nr_rrc_srs_RequestForDCI_Format0_2_r16, - { "srs-RequestForDCI-Format0-2-r16", "nr-rrc.srs_RequestForDCI_Format0_2_r16", + { &hf_nr_rrc_srs_RequestDCI_0_2_r16, + { "srs-RequestDCI-0-2-r16", "nr-rrc.srs_RequestDCI_0_2_r16", FT_UINT32, BASE_DEC, NULL, 0, "INTEGER_1_2", HFILL }}, - { &hf_nr_rrc_srs_ResourceSetToAddModListForDCI_Format0_2_r16, - { "srs-ResourceSetToAddModListForDCI-Format0-2-r16", "nr-rrc.srs_ResourceSetToAddModListForDCI_Format0_2_r16", + { &hf_nr_rrc_srs_ResourceSetToAddModListDCI_0_2_r16, + { "srs-ResourceSetToAddModListDCI-0-2-r16", "nr-rrc.srs_ResourceSetToAddModListDCI_0_2_r16", FT_UINT32, BASE_DEC, NULL, 0, "SEQUENCE_SIZE_1_maxNrofSRS_ResourceSets_OF_SRS_ResourceSet", HFILL }}, - { &hf_nr_rrc_srs_ResourceSetToAddModListForDCI_Format0_2_r16_item, + { &hf_nr_rrc_srs_ResourceSetToAddModListDCI_0_2_r16_item, { "SRS-ResourceSet", "nr-rrc.SRS_ResourceSet_element", FT_NONE, BASE_NONE, NULL, 0, NULL, HFILL }}, - { &hf_nr_rrc_srs_ResourceSetToReleaseListForDCI_Format0_2_r16, - { "srs-ResourceSetToReleaseListForDCI-Format0-2-r16", "nr-rrc.srs_ResourceSetToReleaseListForDCI_Format0_2_r16", + { &hf_nr_rrc_srs_ResourceSetToReleaseListDCI_0_2_r16, + { "srs-ResourceSetToReleaseListDCI-0-2-r16", "nr-rrc.srs_ResourceSetToReleaseListDCI_0_2_r16", FT_UINT32, BASE_DEC, NULL, 0, "SEQUENCE_SIZE_1_maxNrofSRS_ResourceSets_OF_SRS_ResourceSetId", HFILL }}, - { &hf_nr_rrc_srs_ResourceSetToReleaseListForDCI_Format0_2_r16_item, + { &hf_nr_rrc_srs_ResourceSetToReleaseListDCI_0_2_r16_item, { "SRS-ResourceSetId", "nr-rrc.SRS_ResourceSetId", FT_UINT32, BASE_DEC, NULL, 0, NULL, HFILL }}, @@ -96059,7 +101049,7 @@ proto_register_nr_rrc(void) { { "pathlossReferenceRSList-r16", "nr-rrc.pathlossReferenceRSList_r16", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_pathlossReferenceRSList_r16_vals), 0, "T_pathlossReferenceRSList_r16", HFILL }}, - { &hf_nr_rrc_setup_108, + { &hf_nr_rrc_setup_109, { "setup", "nr-rrc.setup", FT_UINT32, BASE_DEC, NULL, 0, "PathlossReferenceRSList_r16", HFILL }}, @@ -97091,6 +102081,18 @@ proto_register_nr_rrc(void) { { "powerClass-v1610", "nr-rrc.powerClass_v1610", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_powerClass_v1610_vals), 0, NULL, HFILL }}, + { &hf_nr_rrc_powerClassNRPart_r16, + { "powerClassNRPart-r16", "nr-rrc.powerClassNRPart_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_powerClassNRPart_r16_vals), 0, + "T_powerClassNRPart_r16", HFILL }}, + { &hf_nr_rrc_featureSetCombinationDAPS_r16, + { "featureSetCombinationDAPS-r16", "nr-rrc.featureSetCombinationDAPS_r16", + FT_UINT32, BASE_DEC, NULL, 0, + "FeatureSetCombinationId", HFILL }}, + { &hf_nr_rrc_mrdc_Parameters_v1620, + { "mrdc-Parameters-v1620", "nr-rrc.mrdc_Parameters_v1620_element", + FT_NONE, BASE_NONE, NULL, 0, + NULL, HFILL }}, { &hf_nr_rrc_ne_DC_BC, { "ne-DC-BC", "nr-rrc.ne_DC_BC", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_ne_DC_BC_vals), 0, @@ -97163,6 +102165,10 @@ proto_register_nr_rrc(void) { { "uplinkTxSwitching-OptionSupport-r16", "nr-rrc.uplinkTxSwitching_OptionSupport_r16", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_uplinkTxSwitching_OptionSupport_r16_vals), 0, "T_uplinkTxSwitching_OptionSupport_r16", HFILL }}, + { &hf_nr_rrc_uplinkTxSwitching_PowerBoosting_r16, + { "uplinkTxSwitching-PowerBoosting-r16", "nr-rrc.uplinkTxSwitching_PowerBoosting_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_uplinkTxSwitching_PowerBoosting_r16_vals), 0, + NULL, HFILL }}, { &hf_nr_rrc_bandIndexUL1_r16, { "bandIndexUL1-r16", "nr-rrc.bandIndexUL1_r16", FT_UINT32, BASE_DEC, NULL, 0, @@ -97263,75 +102269,11 @@ proto_register_nr_rrc(void) { { "supportedSRS-TxPortSwitch-v1610", "nr-rrc.supportedSRS_TxPortSwitch_v1610", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_supportedSRS_TxPortSwitch_v1610_vals), 0, NULL, HFILL }}, - { &hf_nr_rrc_intraFreqDAPS_Parameters_r16, - { "intraFreqDAPS-Parameters-r16", "nr-rrc.intraFreqDAPS_Parameters_r16_element", - FT_NONE, BASE_NONE, NULL, 0, - NULL, HFILL }}, - { &hf_nr_rrc_intraFreqDiffSCS_DAPS_r16, - { "intraFreqDiffSCS-DAPS-r16", "nr-rrc.intraFreqDiffSCS_DAPS_r16", - FT_UINT32, BASE_DEC, VALS(nr_rrc_T_intraFreqDiffSCS_DAPS_r16_vals), 0, - NULL, HFILL }}, - { &hf_nr_rrc_intraFreqDAPS_r16, - { "intraFreqDAPS-r16", "nr-rrc.intraFreqDAPS_r16", - FT_UINT32, BASE_DEC, VALS(nr_rrc_T_intraFreqDAPS_r16_vals), 0, - NULL, HFILL }}, - { &hf_nr_rrc_intraFreqAsyncDAPS_r16, - { "intraFreqAsyncDAPS-r16", "nr-rrc.intraFreqAsyncDAPS_r16", - FT_UINT32, BASE_DEC, VALS(nr_rrc_T_intraFreqAsyncDAPS_r16_vals), 0, - NULL, HFILL }}, - { &hf_nr_rrc_intraFreqMultiUL_TransmissionDAPS_r16, - { "intraFreqMultiUL-TransmissionDAPS-r16", "nr-rrc.intraFreqMultiUL_TransmissionDAPS_r16", - FT_UINT32, BASE_DEC, VALS(nr_rrc_T_intraFreqMultiUL_TransmissionDAPS_r16_vals), 0, - NULL, HFILL }}, - { &hf_nr_rrc_intraFreqTwoTAGs_DAPS_r16, - { "intraFreqTwoTAGs-DAPS-r16", "nr-rrc.intraFreqTwoTAGs_DAPS_r16", - FT_UINT32, BASE_DEC, VALS(nr_rrc_T_intraFreqTwoTAGs_DAPS_r16_vals), 0, - NULL, HFILL }}, - { &hf_nr_rrc_intraFreqSemiStaticPowerSharingDAPS_Mode1_r16, - { "intraFreqSemiStaticPowerSharingDAPS-Mode1-r16", "nr-rrc.intraFreqSemiStaticPowerSharingDAPS_Mode1_r16", - FT_UINT32, BASE_DEC, VALS(nr_rrc_T_intraFreqSemiStaticPowerSharingDAPS_Mode1_r16_vals), 0, - NULL, HFILL }}, - { &hf_nr_rrc_intraFreqSemiStaticPowerSharingDAPS_Mode2_r16, - { "intraFreqSemiStaticPowerSharingDAPS-Mode2-r16", "nr-rrc.intraFreqSemiStaticPowerSharingDAPS_Mode2_r16", - FT_UINT32, BASE_DEC, VALS(nr_rrc_T_intraFreqSemiStaticPowerSharingDAPS_Mode2_r16_vals), 0, - NULL, HFILL }}, - { &hf_nr_rrc_intraFreqDynamicPowersharingDAPS_r16, - { "intraFreqDynamicPowersharingDAPS-r16", "nr-rrc.intraFreqDynamicPowersharingDAPS_r16", - FT_UINT32, BASE_DEC, VALS(nr_rrc_T_intraFreqDynamicPowersharingDAPS_r16_vals), 0, - NULL, HFILL }}, - { &hf_nr_rrc_supportedBandCombinationListSidelink_r16, - { "supportedBandCombinationListSidelink-r16", "nr-rrc.supportedBandCombinationListSidelink_r16", - FT_UINT32, BASE_DEC, NULL, 0, - NULL, HFILL }}, - { &hf_nr_rrc_supportedBandCombinationListSidelinkEUTRA_r16, - { "supportedBandCombinationListSidelinkEUTRA-r16", "nr-rrc.supportedBandCombinationListSidelinkEUTRA_r16_element", - FT_NONE, BASE_NONE, NULL, 0, - NULL, HFILL }}, - { &hf_nr_rrc_supportedBandCombinationListSidelinkEUTRA_NR_r16, - { "supportedBandCombinationListSidelinkEUTRA-NR-r16", "nr-rrc.supportedBandCombinationListSidelinkEUTRA_NR_r16", - FT_UINT32, BASE_DEC, NULL, 0, - NULL, HFILL }}, - { &hf_nr_rrc_SupportedBandCombinationListSidelink_r16_item, - { "BandCombinationParametersSidelink-r16", "nr-rrc.BandCombinationParametersSidelink_r16", - FT_UINT32, BASE_DEC, NULL, 0, - NULL, HFILL }}, - { &hf_nr_rrc_BandCombinationParametersSidelink_r16_item, - { "BandParametersSidelink-r16", "nr-rrc.BandParametersSidelink_r16_element", - FT_NONE, BASE_NONE, NULL, 0, - NULL, HFILL }}, { &hf_nr_rrc_freqBandSidelink_r16, { "freqBandSidelink-r16", "nr-rrc.freqBandSidelink_r16", FT_UINT32, BASE_DEC, NULL, 0, "FreqBandIndicatorNR", HFILL }}, - { &hf_nr_rrc_bandCombinationListEUTRA1_r16, - { "bandCombinationListEUTRA1-r16", "nr-rrc.bandCombinationListEUTRA1_r16", - FT_BYTES, BASE_NONE, NULL, 0, - NULL, HFILL }}, - { &hf_nr_rrc_bandCombinationListEUTRA2_r16, - { "bandCombinationListEUTRA2-r16", "nr-rrc.bandCombinationListEUTRA2_r16", - FT_BYTES, BASE_NONE, NULL, 0, - NULL, HFILL }}, - { &hf_nr_rrc_SupportedBandCombinationListSidelinkEUTRA_NR_r16_item, + { &hf_nr_rrc_BandCombinationListSidelinkEUTRA_NR_r16_item, { "BandCombinationParametersSidelinkEUTRA-NR-r16", "nr-rrc.BandCombinationParametersSidelinkEUTRA_NR_r16", FT_UINT32, BASE_DEC, NULL, 0, NULL, HFILL }}, @@ -97491,50 +102433,126 @@ proto_register_nr_rrc(void) { { "interCA-NonAlignedFrame-r16", "nr-rrc.interCA_NonAlignedFrame_r16", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_interCA_NonAlignedFrame_r16_vals), 0, NULL, HFILL }}, - { &hf_nr_rrc_simul_SRS_Trans_InterBandCA_r16, - { "simul-SRS-Trans-InterBandCA-r16", "nr-rrc.simul_SRS_Trans_InterBandCA_r16", - FT_UINT32, BASE_DEC, NULL, 0, - "INTEGER_1_2", HFILL }}, - { &hf_nr_rrc_daps_Parameters_r16, - { "daps-Parameters-r16", "nr-rrc.daps_Parameters_r16_element", - FT_NONE, BASE_NONE, NULL, 0, - NULL, HFILL }}, - { &hf_nr_rrc_asyncDAPS_r16, - { "asyncDAPS-r16", "nr-rrc.asyncDAPS_r16", - FT_UINT32, BASE_DEC, VALS(nr_rrc_T_asyncDAPS_r16_vals), 0, + { &hf_nr_rrc_simul_SRS_Trans_BC_r16, + { "simul-SRS-Trans-BC-r16", "nr-rrc.simul_SRS_Trans_BC_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_simul_SRS_Trans_BC_r16_vals), 0, NULL, HFILL }}, { &hf_nr_rrc_interFreqDAPS_r16, - { "interFreqDAPS-r16", "nr-rrc.interFreqDAPS_r16", - FT_UINT32, BASE_DEC, VALS(nr_rrc_T_interFreqDAPS_r16_vals), 0, + { "interFreqDAPS-r16", "nr-rrc.interFreqDAPS_r16_element", + FT_NONE, BASE_NONE, NULL, 0, + NULL, HFILL }}, + { &hf_nr_rrc_interFreqAsyncDAPS_r16, + { "interFreqAsyncDAPS-r16", "nr-rrc.interFreqAsyncDAPS_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_interFreqAsyncDAPS_r16_vals), 0, NULL, HFILL }}, { &hf_nr_rrc_interFreqDiffSCS_DAPS_r16, { "interFreqDiffSCS-DAPS-r16", "nr-rrc.interFreqDiffSCS_DAPS_r16", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_interFreqDiffSCS_DAPS_r16_vals), 0, NULL, HFILL }}, - { &hf_nr_rrc_multiUL_TransmissionDAPS_r16, - { "multiUL-TransmissionDAPS-r16", "nr-rrc.multiUL_TransmissionDAPS_r16", - FT_UINT32, BASE_DEC, VALS(nr_rrc_T_multiUL_TransmissionDAPS_r16_vals), 0, + { &hf_nr_rrc_interFreqMultiUL_TransmissionDAPS_r16, + { "interFreqMultiUL-TransmissionDAPS-r16", "nr-rrc.interFreqMultiUL_TransmissionDAPS_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_interFreqMultiUL_TransmissionDAPS_r16_vals), 0, NULL, HFILL }}, - { &hf_nr_rrc_semiStaticPowerSharingDAPS_Mode1_r16, - { "semiStaticPowerSharingDAPS-Mode1-r16", "nr-rrc.semiStaticPowerSharingDAPS_Mode1_r16", - FT_UINT32, BASE_DEC, VALS(nr_rrc_T_semiStaticPowerSharingDAPS_Mode1_r16_vals), 0, + { &hf_nr_rrc_interFreqSemiStaticPowerSharingDAPS_Mode1_r16, + { "interFreqSemiStaticPowerSharingDAPS-Mode1-r16", "nr-rrc.interFreqSemiStaticPowerSharingDAPS_Mode1_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_interFreqSemiStaticPowerSharingDAPS_Mode1_r16_vals), 0, NULL, HFILL }}, - { &hf_nr_rrc_semiStaticPowerSharingDAPS_Mode2_r16, - { "semiStaticPowerSharingDAPS-Mode2-r16", "nr-rrc.semiStaticPowerSharingDAPS_Mode2_r16", - FT_UINT32, BASE_DEC, VALS(nr_rrc_T_semiStaticPowerSharingDAPS_Mode2_r16_vals), 0, + { &hf_nr_rrc_interFreqSemiStaticPowerSharingDAPS_Mode2_r16, + { "interFreqSemiStaticPowerSharingDAPS-Mode2-r16", "nr-rrc.interFreqSemiStaticPowerSharingDAPS_Mode2_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_interFreqSemiStaticPowerSharingDAPS_Mode2_r16_vals), 0, NULL, HFILL }}, - { &hf_nr_rrc_dynamicPowersharingDAPS_r16, - { "dynamicPowersharingDAPS-r16", "nr-rrc.dynamicPowersharingDAPS_r16", - FT_UINT32, BASE_DEC, VALS(nr_rrc_T_dynamicPowersharingDAPS_r16_vals), 0, + { &hf_nr_rrc_interFreqDynamicPowerSharingDAPS_r16, + { "interFreqDynamicPowerSharingDAPS-r16", "nr-rrc.interFreqDynamicPowerSharingDAPS_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_interFreqDynamicPowerSharingDAPS_r16_vals), 0, NULL, HFILL }}, - { &hf_nr_rrc_ul_TransCancellationDAPS_r16, - { "ul-TransCancellationDAPS-r16", "nr-rrc.ul_TransCancellationDAPS_r16", - FT_UINT32, BASE_DEC, VALS(nr_rrc_T_ul_TransCancellationDAPS_r16_vals), 0, + { &hf_nr_rrc_interFreqUL_TransCancellationDAPS_r16, + { "interFreqUL-TransCancellationDAPS-r16", "nr-rrc.interFreqUL_TransCancellationDAPS_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_interFreqUL_TransCancellationDAPS_r16_vals), 0, NULL, HFILL }}, { &hf_nr_rrc_codebookParametersPerBC_r16, { "codebookParametersPerBC-r16", "nr-rrc.codebookParametersPerBC_r16_element", FT_NONE, BASE_NONE, NULL, 0, "CodebookParameters_v1610", HFILL }}, + { &hf_nr_rrc_blindDetectFactor_r16, + { "blindDetectFactor-r16", "nr-rrc.blindDetectFactor_r16", + FT_UINT32, BASE_DEC, NULL, 0, + "INTEGER_1_2", HFILL }}, + { &hf_nr_rrc_pdcch_MonitoringCA_r16, + { "pdcch-MonitoringCA-r16", "nr-rrc.pdcch_MonitoringCA_r16_element", + FT_NONE, BASE_NONE, NULL, 0, + NULL, HFILL }}, + { &hf_nr_rrc_maxNumberOfMonitoringCC_r16, + { "maxNumberOfMonitoringCC-r16", "nr-rrc.maxNumberOfMonitoringCC_r16", + FT_UINT32, BASE_DEC, NULL, 0, + "INTEGER_2_16", HFILL }}, + { &hf_nr_rrc_supportedSpanArrangement_r16, + { "supportedSpanArrangement-r16", "nr-rrc.supportedSpanArrangement_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_supportedSpanArrangement_r16_vals), 0, + "T_supportedSpanArrangement_r16", HFILL }}, + { &hf_nr_rrc_pdcch_BlindDetectionCA_Mixed_r16, + { "pdcch-BlindDetectionCA-Mixed-r16", "nr-rrc.pdcch_BlindDetectionCA_Mixed_r16_element", + FT_NONE, BASE_NONE, NULL, 0, + NULL, HFILL }}, + { &hf_nr_rrc_supportedSpanArrangement_r16_01, + { "supportedSpanArrangement-r16", "nr-rrc.supportedSpanArrangement_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_supportedSpanArrangement_r16_01_vals), 0, + "T_supportedSpanArrangement_r16_01", HFILL }}, + { &hf_nr_rrc_pdcch_BlindDetectionMCG_UE_r16, + { "pdcch-BlindDetectionMCG-UE-r16", "nr-rrc.pdcch_BlindDetectionMCG_UE_r16", + FT_UINT32, BASE_DEC, NULL, 0, + "INTEGER_1_14", HFILL }}, + { &hf_nr_rrc_pdcch_BlindDetectionSCG_UE_r16, + { "pdcch-BlindDetectionSCG-UE-r16", "nr-rrc.pdcch_BlindDetectionSCG_UE_r16", + FT_UINT32, BASE_DEC, NULL, 0, + "INTEGER_1_14", HFILL }}, + { &hf_nr_rrc_pdcch_BlindDetectionMCG_UE_Mixed_r16, + { "pdcch-BlindDetectionMCG-UE-Mixed-r16", "nr-rrc.pdcch_BlindDetectionMCG_UE_Mixed_r16_element", + FT_NONE, BASE_NONE, NULL, 0, + NULL, HFILL }}, + { &hf_nr_rrc_pdcch_BlindDetectionMCG_UE1_r16, + { "pdcch-BlindDetectionMCG-UE1-r16", "nr-rrc.pdcch_BlindDetectionMCG_UE1_r16", + FT_UINT32, BASE_DEC, NULL, 0, + "INTEGER_0_15", HFILL }}, + { &hf_nr_rrc_pdcch_BlindDetectionMCG_UE2_r16, + { "pdcch-BlindDetectionMCG-UE2-r16", "nr-rrc.pdcch_BlindDetectionMCG_UE2_r16", + FT_UINT32, BASE_DEC, NULL, 0, + "INTEGER_0_15", HFILL }}, + { &hf_nr_rrc_pdcch_BlindDetectionSCG_UE_Mixed_r16, + { "pdcch-BlindDetectionSCG-UE-Mixed-r16", "nr-rrc.pdcch_BlindDetectionSCG_UE_Mixed_r16_element", + FT_NONE, BASE_NONE, NULL, 0, + NULL, HFILL }}, + { &hf_nr_rrc_pdcch_BlindDetectionSCG_UE1_r16, + { "pdcch-BlindDetectionSCG-UE1-r16", "nr-rrc.pdcch_BlindDetectionSCG_UE1_r16", + FT_UINT32, BASE_DEC, NULL, 0, + "INTEGER_0_15", HFILL }}, + { &hf_nr_rrc_pdcch_BlindDetectionSCG_UE2_r16, + { "pdcch-BlindDetectionSCG-UE2-r16", "nr-rrc.pdcch_BlindDetectionSCG_UE2_r16", + FT_UINT32, BASE_DEC, NULL, 0, + "INTEGER_0_15", HFILL }}, + { &hf_nr_rrc_crossCarrierSchedulingDL_DiffSCS_r16, + { "crossCarrierSchedulingDL-DiffSCS-r16", "nr-rrc.crossCarrierSchedulingDL_DiffSCS_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_crossCarrierSchedulingDL_DiffSCS_r16_vals), 0, + NULL, HFILL }}, + { &hf_nr_rrc_crossCarrierSchedulingDefaultQCL_r16, + { "crossCarrierSchedulingDefaultQCL-r16", "nr-rrc.crossCarrierSchedulingDefaultQCL_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_crossCarrierSchedulingDefaultQCL_r16_vals), 0, + NULL, HFILL }}, + { &hf_nr_rrc_crossCarrierSchedulingUL_DiffSCS_r16, + { "crossCarrierSchedulingUL-DiffSCS-r16", "nr-rrc.crossCarrierSchedulingUL_DiffSCS_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_crossCarrierSchedulingUL_DiffSCS_r16_vals), 0, + NULL, HFILL }}, + { &hf_nr_rrc_simul_SRS_MIMO_Trans_BC_r16, + { "simul-SRS-MIMO-Trans-BC-r16", "nr-rrc.simul_SRS_MIMO_Trans_BC_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_simul_SRS_MIMO_Trans_BC_r16_vals), 0, + NULL, HFILL }}, + { &hf_nr_rrc_codebookParametersAdditionPerBC_r16, + { "codebookParametersAdditionPerBC-r16", "nr-rrc.codebookParametersAdditionPerBC_r16_element", + FT_NONE, BASE_NONE, NULL, 0, + NULL, HFILL }}, + { &hf_nr_rrc_codebookComboParametersAdditionPerBC_r16, + { "codebookComboParametersAdditionPerBC-r16", "nr-rrc.codebookComboParametersAdditionPerBC_r16_element", + FT_NONE, BASE_NONE, NULL, 0, + NULL, HFILL }}, { &hf_nr_rrc_ca_ParametersNR_ForDC, { "ca-ParametersNR-ForDC", "nr-rrc.ca_ParametersNR_ForDC_element", FT_NONE, BASE_NONE, NULL, 0, @@ -97567,6 +102585,10 @@ proto_register_nr_rrc(void) { { "intraFR-NR-DC-DynamicPwrSharing-r16", "nr-rrc.intraFR_NR_DC_DynamicPwrSharing_r16", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_intraFR_NR_DC_DynamicPwrSharing_r16_vals), 0, NULL, HFILL }}, + { &hf_nr_rrc_asyncNRDC_r16, + { "asyncNRDC-r16", "nr-rrc.asyncNRDC_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_asyncNRDC_r16_vals), 0, + NULL, HFILL }}, { &hf_nr_rrc_fr1fdd_FR1TDD_CA_SpCellOnFR1FDD, { "fr1fdd-FR1TDD-CA-SpCellOnFR1FDD", "nr-rrc.fr1fdd_FR1TDD_CA_SpCellOnFR1FDD", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_fr1fdd_FR1TDD_CA_SpCellOnFR1FDD_vals), 0, @@ -97699,6 +102721,322 @@ proto_register_nr_rrc(void) { { "type2-PortSelection-r16 item", "nr-rrc.type2_PortSelection_r16_item", FT_UINT32, BASE_DEC, NULL, 0, "INTEGER_0_maxNrofCSI_RS_ResourcesAlt_1_r16", HFILL }}, + { &hf_nr_rrc_etype2_r16, + { "etype2-r16", "nr-rrc.etype2_r16_element", + FT_NONE, BASE_NONE, NULL, 0, + NULL, HFILL }}, + { &hf_nr_rrc_etype2R1_r16, + { "etype2R1-r16", "nr-rrc.etype2R1_r16_element", + FT_NONE, BASE_NONE, NULL, 0, + NULL, HFILL }}, + { &hf_nr_rrc_supportedCSI_RS_ResourceListAdd_r16, + { "supportedCSI-RS-ResourceListAdd-r16", "nr-rrc.supportedCSI_RS_ResourceListAdd_r16", + FT_UINT32, BASE_DEC, NULL, 0, + NULL, HFILL }}, + { &hf_nr_rrc_supportedCSI_RS_ResourceListAdd_r16_item, + { "supportedCSI-RS-ResourceListAdd-r16 item", "nr-rrc.supportedCSI_RS_ResourceListAdd_r16_item", + FT_UINT32, BASE_DEC, NULL, 0, + "INTEGER_0_maxNrofCSI_RS_ResourcesAlt_1_r16", HFILL }}, + { &hf_nr_rrc_etype2R2_r16, + { "etype2R2-r16", "nr-rrc.etype2R2_r16_element", + FT_NONE, BASE_NONE, NULL, 0, + NULL, HFILL }}, + { &hf_nr_rrc_supportedCSI_RS_ResourceListAdd_r16_01, + { "supportedCSI-RS-ResourceListAdd-r16", "nr-rrc.supportedCSI_RS_ResourceListAdd_r16", + FT_UINT32, BASE_DEC, NULL, 0, + "T_supportedCSI_RS_ResourceListAdd_r16_01", HFILL }}, + { &hf_nr_rrc_paramComb7_8_r16, + { "paramComb7-8-r16", "nr-rrc.paramComb7_8_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_paramComb7_8_r16_vals), 0, + NULL, HFILL }}, + { &hf_nr_rrc_rank3_4_r16, + { "rank3-4-r16", "nr-rrc.rank3_4_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_rank3_4_r16_vals), 0, + NULL, HFILL }}, + { &hf_nr_rrc_softAmpRestriction_r16, + { "softAmpRestriction-r16", "nr-rrc.softAmpRestriction_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_softAmpRestriction_r16_vals), 0, + NULL, HFILL }}, + { &hf_nr_rrc_etype2_PS_r16, + { "etype2-PS-r16", "nr-rrc.etype2_PS_r16_element", + FT_NONE, BASE_NONE, NULL, 0, + NULL, HFILL }}, + { &hf_nr_rrc_etype2R1_PortSelection_r16, + { "etype2R1-PortSelection-r16", "nr-rrc.etype2R1_PortSelection_r16_element", + FT_NONE, BASE_NONE, NULL, 0, + NULL, HFILL }}, + { &hf_nr_rrc_supportedCSI_RS_ResourceListAdd_r16_02, + { "supportedCSI-RS-ResourceListAdd-r16", "nr-rrc.supportedCSI_RS_ResourceListAdd_r16", + FT_UINT32, BASE_DEC, NULL, 0, + "T_supportedCSI_RS_ResourceListAdd_r16_02", HFILL }}, + { &hf_nr_rrc_etype2R2_PortSelection_r16, + { "etype2R2-PortSelection-r16", "nr-rrc.etype2R2_PortSelection_r16_element", + FT_NONE, BASE_NONE, NULL, 0, + NULL, HFILL }}, + { &hf_nr_rrc_supportedCSI_RS_ResourceListAdd_r16_03, + { "supportedCSI-RS-ResourceListAdd-r16", "nr-rrc.supportedCSI_RS_ResourceListAdd_r16", + FT_UINT32, BASE_DEC, NULL, 0, + "T_supportedCSI_RS_ResourceListAdd_r16_03", HFILL }}, + { &hf_nr_rrc_rank3_4_r16_01, + { "rank3-4-r16", "nr-rrc.rank3_4_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_rank3_4_r16_01_vals), 0, + "T_rank3_4_r16_01", HFILL }}, + { &hf_nr_rrc_type1SP_Type2_null_r16, + { "type1SP-Type2-null-r16", "nr-rrc.type1SP_Type2_null_r16_element", + FT_NONE, BASE_NONE, NULL, 0, + NULL, HFILL }}, + { &hf_nr_rrc_supportedCSI_RS_ResourceListAdd_r16_04, + { "supportedCSI-RS-ResourceListAdd-r16", "nr-rrc.supportedCSI_RS_ResourceListAdd_r16", + FT_UINT32, BASE_DEC, NULL, 0, + "T_supportedCSI_RS_ResourceListAdd_r16_04", HFILL }}, + { &hf_nr_rrc_type1SP_Type2PS_null_r16, + { "type1SP-Type2PS-null-r16", "nr-rrc.type1SP_Type2PS_null_r16_element", + FT_NONE, BASE_NONE, NULL, 0, + NULL, HFILL }}, + { &hf_nr_rrc_supportedCSI_RS_ResourceListAdd_r16_05, + { "supportedCSI-RS-ResourceListAdd-r16", "nr-rrc.supportedCSI_RS_ResourceListAdd_r16", + FT_UINT32, BASE_DEC, NULL, 0, + "T_supportedCSI_RS_ResourceListAdd_r16_05", HFILL }}, + { &hf_nr_rrc_type1SP_eType2R1_null_r16, + { "type1SP-eType2R1-null-r16", "nr-rrc.type1SP_eType2R1_null_r16_element", + FT_NONE, BASE_NONE, NULL, 0, + NULL, HFILL }}, + { &hf_nr_rrc_supportedCSI_RS_ResourceListAdd_r16_06, + { "supportedCSI-RS-ResourceListAdd-r16", "nr-rrc.supportedCSI_RS_ResourceListAdd_r16", + FT_UINT32, BASE_DEC, NULL, 0, + "T_supportedCSI_RS_ResourceListAdd_r16_06", HFILL }}, + { &hf_nr_rrc_type1SP_eType2R2_null_r16, + { "type1SP-eType2R2-null-r16", "nr-rrc.type1SP_eType2R2_null_r16_element", + FT_NONE, BASE_NONE, NULL, 0, + NULL, HFILL }}, + { &hf_nr_rrc_supportedCSI_RS_ResourceListAdd_r16_07, + { "supportedCSI-RS-ResourceListAdd-r16", "nr-rrc.supportedCSI_RS_ResourceListAdd_r16", + FT_UINT32, BASE_DEC, NULL, 0, + "T_supportedCSI_RS_ResourceListAdd_r16_07", HFILL }}, + { &hf_nr_rrc_type1SP_eType2R1PS_null_r16, + { "type1SP-eType2R1PS-null-r16", "nr-rrc.type1SP_eType2R1PS_null_r16_element", + FT_NONE, BASE_NONE, NULL, 0, + NULL, HFILL }}, + { &hf_nr_rrc_supportedCSI_RS_ResourceListAdd_r16_08, + { "supportedCSI-RS-ResourceListAdd-r16", "nr-rrc.supportedCSI_RS_ResourceListAdd_r16", + FT_UINT32, BASE_DEC, NULL, 0, + "T_supportedCSI_RS_ResourceListAdd_r16_08", HFILL }}, + { &hf_nr_rrc_type1SP_eType2R2PS_null_r16, + { "type1SP-eType2R2PS-null-r16", "nr-rrc.type1SP_eType2R2PS_null_r16_element", + FT_NONE, BASE_NONE, NULL, 0, + NULL, HFILL }}, + { &hf_nr_rrc_supportedCSI_RS_ResourceListAdd_r16_09, + { "supportedCSI-RS-ResourceListAdd-r16", "nr-rrc.supportedCSI_RS_ResourceListAdd_r16", + FT_UINT32, BASE_DEC, NULL, 0, + "T_supportedCSI_RS_ResourceListAdd_r16_09", HFILL }}, + { &hf_nr_rrc_type1SP_Type2_Type2PS_r16, + { "type1SP-Type2-Type2PS-r16", "nr-rrc.type1SP_Type2_Type2PS_r16_element", + FT_NONE, BASE_NONE, NULL, 0, + NULL, HFILL }}, + { &hf_nr_rrc_supportedCSI_RS_ResourceListAdd_r16_10, + { "supportedCSI-RS-ResourceListAdd-r16", "nr-rrc.supportedCSI_RS_ResourceListAdd_r16", + FT_UINT32, BASE_DEC, NULL, 0, + "T_supportedCSI_RS_ResourceListAdd_r16_10", HFILL }}, + { &hf_nr_rrc_type1MP_Type2_null_r16, + { "type1MP-Type2-null-r16", "nr-rrc.type1MP_Type2_null_r16_element", + FT_NONE, BASE_NONE, NULL, 0, + NULL, HFILL }}, + { &hf_nr_rrc_supportedCSI_RS_ResourceListAdd_r16_11, + { "supportedCSI-RS-ResourceListAdd-r16", "nr-rrc.supportedCSI_RS_ResourceListAdd_r16", + FT_UINT32, BASE_DEC, NULL, 0, + "T_supportedCSI_RS_ResourceListAdd_r16_11", HFILL }}, + { &hf_nr_rrc_type1MP_Type2PS_null_r16, + { "type1MP-Type2PS-null-r16", "nr-rrc.type1MP_Type2PS_null_r16_element", + FT_NONE, BASE_NONE, NULL, 0, + NULL, HFILL }}, + { &hf_nr_rrc_supportedCSI_RS_ResourceListAdd_r16_12, + { "supportedCSI-RS-ResourceListAdd-r16", "nr-rrc.supportedCSI_RS_ResourceListAdd_r16", + FT_UINT32, BASE_DEC, NULL, 0, + "T_supportedCSI_RS_ResourceListAdd_r16_12", HFILL }}, + { &hf_nr_rrc_type1MP_eType2R1_null_r16, + { "type1MP-eType2R1-null-r16", "nr-rrc.type1MP_eType2R1_null_r16_element", + FT_NONE, BASE_NONE, NULL, 0, + NULL, HFILL }}, + { &hf_nr_rrc_supportedCSI_RS_ResourceListAdd_r16_13, + { "supportedCSI-RS-ResourceListAdd-r16", "nr-rrc.supportedCSI_RS_ResourceListAdd_r16", + FT_UINT32, BASE_DEC, NULL, 0, + "T_supportedCSI_RS_ResourceListAdd_r16_13", HFILL }}, + { &hf_nr_rrc_type1MP_eType2R2_null_r16, + { "type1MP-eType2R2-null-r16", "nr-rrc.type1MP_eType2R2_null_r16_element", + FT_NONE, BASE_NONE, NULL, 0, + NULL, HFILL }}, + { &hf_nr_rrc_supportedCSI_RS_ResourceListAdd_r16_14, + { "supportedCSI-RS-ResourceListAdd-r16", "nr-rrc.supportedCSI_RS_ResourceListAdd_r16", + FT_UINT32, BASE_DEC, NULL, 0, + "T_supportedCSI_RS_ResourceListAdd_r16_14", HFILL }}, + { &hf_nr_rrc_type1MP_eType2R1PS_null_r16, + { "type1MP-eType2R1PS-null-r16", "nr-rrc.type1MP_eType2R1PS_null_r16_element", + FT_NONE, BASE_NONE, NULL, 0, + NULL, HFILL }}, + { &hf_nr_rrc_supportedCSI_RS_ResourceListAdd_r16_15, + { "supportedCSI-RS-ResourceListAdd-r16", "nr-rrc.supportedCSI_RS_ResourceListAdd_r16", + FT_UINT32, BASE_DEC, NULL, 0, + "T_supportedCSI_RS_ResourceListAdd_r16_15", HFILL }}, + { &hf_nr_rrc_type1MP_eType2R2PS_null_r16, + { "type1MP-eType2R2PS-null-r16", "nr-rrc.type1MP_eType2R2PS_null_r16_element", + FT_NONE, BASE_NONE, NULL, 0, + NULL, HFILL }}, + { &hf_nr_rrc_supportedCSI_RS_ResourceListAdd_r16_16, + { "supportedCSI-RS-ResourceListAdd-r16", "nr-rrc.supportedCSI_RS_ResourceListAdd_r16", + FT_UINT32, BASE_DEC, NULL, 0, + "T_supportedCSI_RS_ResourceListAdd_r16_16", HFILL }}, + { &hf_nr_rrc_type1MP_Type2_Type2PS_r16, + { "type1MP-Type2-Type2PS-r16", "nr-rrc.type1MP_Type2_Type2PS_r16_element", + FT_NONE, BASE_NONE, NULL, 0, + NULL, HFILL }}, + { &hf_nr_rrc_supportedCSI_RS_ResourceListAdd_r16_17, + { "supportedCSI-RS-ResourceListAdd-r16", "nr-rrc.supportedCSI_RS_ResourceListAdd_r16", + FT_UINT32, BASE_DEC, NULL, 0, + "T_supportedCSI_RS_ResourceListAdd_r16_17", HFILL }}, + { &hf_nr_rrc_etype2R1_r16_01, + { "etype2R1-r16", "nr-rrc.etype2R1_r16", + FT_UINT32, BASE_DEC, NULL, 0, + "T_etype2R1_r16_01", HFILL }}, + { &hf_nr_rrc_etype2R1_r16_item, + { "etype2R1-r16 item", "nr-rrc.etype2R1_r16_item", + FT_UINT32, BASE_DEC, NULL, 0, + "INTEGER_0_maxNrofCSI_RS_ResourcesAlt_1_r16", HFILL }}, + { &hf_nr_rrc_etype2R2_r16_01, + { "etype2R2-r16", "nr-rrc.etype2R2_r16", + FT_UINT32, BASE_DEC, NULL, 0, + "T_etype2R2_r16_01", HFILL }}, + { &hf_nr_rrc_etype2R2_r16_item, + { "etype2R2-r16 item", "nr-rrc.etype2R2_r16_item", + FT_UINT32, BASE_DEC, NULL, 0, + "INTEGER_0_maxNrofCSI_RS_ResourcesAlt_1_r16", HFILL }}, + { &hf_nr_rrc_etype2R1_PortSelection_r16_01, + { "etype2R1-PortSelection-r16", "nr-rrc.etype2R1_PortSelection_r16", + FT_UINT32, BASE_DEC, NULL, 0, + "T_etype2R1_PortSelection_r16_01", HFILL }}, + { &hf_nr_rrc_etype2R1_PortSelection_r16_item, + { "etype2R1-PortSelection-r16 item", "nr-rrc.etype2R1_PortSelection_r16_item", + FT_UINT32, BASE_DEC, NULL, 0, + "INTEGER_0_maxNrofCSI_RS_ResourcesAlt_1_r16", HFILL }}, + { &hf_nr_rrc_etype2R2_PortSelection_r16_01, + { "etype2R2-PortSelection-r16", "nr-rrc.etype2R2_PortSelection_r16", + FT_UINT32, BASE_DEC, NULL, 0, + "T_etype2R2_PortSelection_r16_01", HFILL }}, + { &hf_nr_rrc_etype2R2_PortSelection_r16_item, + { "etype2R2-PortSelection-r16 item", "nr-rrc.etype2R2_PortSelection_r16_item", + FT_UINT32, BASE_DEC, NULL, 0, + "INTEGER_0_maxNrofCSI_RS_ResourcesAlt_1_r16", HFILL }}, + { &hf_nr_rrc_type1SP_Type2_null_r16_01, + { "type1SP-Type2-null-r16", "nr-rrc.type1SP_Type2_null_r16", + FT_UINT32, BASE_DEC, NULL, 0, + "T_type1SP_Type2_null_r16_01", HFILL }}, + { &hf_nr_rrc_type1SP_Type2_null_r16_item, + { "type1SP-Type2-null-r16 item", "nr-rrc.type1SP_Type2_null_r16_item", + FT_UINT32, BASE_DEC, NULL, 0, + "INTEGER_0_maxNrofCSI_RS_ResourcesAlt_1_r16", HFILL }}, + { &hf_nr_rrc_type1SP_Type2PS_null_r16_01, + { "type1SP-Type2PS-null-r16", "nr-rrc.type1SP_Type2PS_null_r16", + FT_UINT32, BASE_DEC, NULL, 0, + "T_type1SP_Type2PS_null_r16_01", HFILL }}, + { &hf_nr_rrc_type1SP_Type2PS_null_r16_item, + { "type1SP-Type2PS-null-r16 item", "nr-rrc.type1SP_Type2PS_null_r16_item", + FT_UINT32, BASE_DEC, NULL, 0, + "INTEGER_0_maxNrofCSI_RS_ResourcesAlt_1_r16", HFILL }}, + { &hf_nr_rrc_type1SP_eType2R1_null_r16_01, + { "type1SP-eType2R1-null-r16", "nr-rrc.type1SP_eType2R1_null_r16", + FT_UINT32, BASE_DEC, NULL, 0, + "T_type1SP_eType2R1_null_r16_01", HFILL }}, + { &hf_nr_rrc_type1SP_eType2R1_null_r16_item, + { "type1SP-eType2R1-null-r16 item", "nr-rrc.type1SP_eType2R1_null_r16_item", + FT_UINT32, BASE_DEC, NULL, 0, + "INTEGER_0_maxNrofCSI_RS_ResourcesAlt_1_r16", HFILL }}, + { &hf_nr_rrc_type1SP_eType2R2_null_r16_01, + { "type1SP-eType2R2-null-r16", "nr-rrc.type1SP_eType2R2_null_r16", + FT_UINT32, BASE_DEC, NULL, 0, + "T_type1SP_eType2R2_null_r16_01", HFILL }}, + { &hf_nr_rrc_type1SP_eType2R2_null_r16_item, + { "type1SP-eType2R2-null-r16 item", "nr-rrc.type1SP_eType2R2_null_r16_item", + FT_UINT32, BASE_DEC, NULL, 0, + "INTEGER_0_maxNrofCSI_RS_ResourcesAlt_1_r16", HFILL }}, + { &hf_nr_rrc_type1SP_eType2R1PS_null_r16_01, + { "type1SP-eType2R1PS-null-r16", "nr-rrc.type1SP_eType2R1PS_null_r16", + FT_UINT32, BASE_DEC, NULL, 0, + "T_type1SP_eType2R1PS_null_r16_01", HFILL }}, + { &hf_nr_rrc_type1SP_eType2R1PS_null_r16_item, + { "type1SP-eType2R1PS-null-r16 item", "nr-rrc.type1SP_eType2R1PS_null_r16_item", + FT_UINT32, BASE_DEC, NULL, 0, + "INTEGER_0_maxNrofCSI_RS_ResourcesAlt_1_r16", HFILL }}, + { &hf_nr_rrc_type1SP_eType2R2PS_null_r16_01, + { "type1SP-eType2R2PS-null-r16", "nr-rrc.type1SP_eType2R2PS_null_r16", + FT_UINT32, BASE_DEC, NULL, 0, + "T_type1SP_eType2R2PS_null_r16_01", HFILL }}, + { &hf_nr_rrc_type1SP_eType2R2PS_null_r16_item, + { "type1SP-eType2R2PS-null-r16 item", "nr-rrc.type1SP_eType2R2PS_null_r16_item", + FT_UINT32, BASE_DEC, NULL, 0, + "INTEGER_0_maxNrofCSI_RS_ResourcesAlt_1_r16", HFILL }}, + { &hf_nr_rrc_type1SP_Type2_Type2PS_r16_01, + { "type1SP-Type2-Type2PS-r16", "nr-rrc.type1SP_Type2_Type2PS_r16", + FT_UINT32, BASE_DEC, NULL, 0, + "T_type1SP_Type2_Type2PS_r16_01", HFILL }}, + { &hf_nr_rrc_type1SP_Type2_Type2PS_r16_item, + { "type1SP-Type2-Type2PS-r16 item", "nr-rrc.type1SP_Type2_Type2PS_r16_item", + FT_UINT32, BASE_DEC, NULL, 0, + "INTEGER_0_maxNrofCSI_RS_ResourcesAlt_1_r16", HFILL }}, + { &hf_nr_rrc_type1MP_Type2_null_r16_01, + { "type1MP-Type2-null-r16", "nr-rrc.type1MP_Type2_null_r16", + FT_UINT32, BASE_DEC, NULL, 0, + "T_type1MP_Type2_null_r16_01", HFILL }}, + { &hf_nr_rrc_type1MP_Type2_null_r16_item, + { "type1MP-Type2-null-r16 item", "nr-rrc.type1MP_Type2_null_r16_item", + FT_UINT32, BASE_DEC, NULL, 0, + "INTEGER_0_maxNrofCSI_RS_ResourcesAlt_1_r16", HFILL }}, + { &hf_nr_rrc_type1MP_Type2PS_null_r16_01, + { "type1MP-Type2PS-null-r16", "nr-rrc.type1MP_Type2PS_null_r16", + FT_UINT32, BASE_DEC, NULL, 0, + "T_type1MP_Type2PS_null_r16_01", HFILL }}, + { &hf_nr_rrc_type1MP_Type2PS_null_r16_item, + { "type1MP-Type2PS-null-r16 item", "nr-rrc.type1MP_Type2PS_null_r16_item", + FT_UINT32, BASE_DEC, NULL, 0, + "INTEGER_0_maxNrofCSI_RS_ResourcesAlt_1_r16", HFILL }}, + { &hf_nr_rrc_type1MP_eType2R1_null_r16_01, + { "type1MP-eType2R1-null-r16", "nr-rrc.type1MP_eType2R1_null_r16", + FT_UINT32, BASE_DEC, NULL, 0, + "T_type1MP_eType2R1_null_r16_01", HFILL }}, + { &hf_nr_rrc_type1MP_eType2R1_null_r16_item, + { "type1MP-eType2R1-null-r16 item", "nr-rrc.type1MP_eType2R1_null_r16_item", + FT_UINT32, BASE_DEC, NULL, 0, + "INTEGER_0_maxNrofCSI_RS_ResourcesAlt_1_r16", HFILL }}, + { &hf_nr_rrc_type1MP_eType2R2_null_r16_01, + { "type1MP-eType2R2-null-r16", "nr-rrc.type1MP_eType2R2_null_r16", + FT_UINT32, BASE_DEC, NULL, 0, + "T_type1MP_eType2R2_null_r16_01", HFILL }}, + { &hf_nr_rrc_type1MP_eType2R2_null_r16_item, + { "type1MP-eType2R2-null-r16 item", "nr-rrc.type1MP_eType2R2_null_r16_item", + FT_UINT32, BASE_DEC, NULL, 0, + "INTEGER_0_maxNrofCSI_RS_ResourcesAlt_1_r16", HFILL }}, + { &hf_nr_rrc_type1MP_eType2R1PS_null_r16_01, + { "type1MP-eType2R1PS-null-r16", "nr-rrc.type1MP_eType2R1PS_null_r16", + FT_UINT32, BASE_DEC, NULL, 0, + "T_type1MP_eType2R1PS_null_r16_01", HFILL }}, + { &hf_nr_rrc_type1MP_eType2R1PS_null_r16_item, + { "type1MP-eType2R1PS-null-r16 item", "nr-rrc.type1MP_eType2R1PS_null_r16_item", + FT_UINT32, BASE_DEC, NULL, 0, + "INTEGER_0_maxNrofCSI_RS_ResourcesAlt_1_r16", HFILL }}, + { &hf_nr_rrc_type1MP_eType2R2PS_null_r16_01, + { "type1MP-eType2R2PS-null-r16", "nr-rrc.type1MP_eType2R2PS_null_r16", + FT_UINT32, BASE_DEC, NULL, 0, + "T_type1MP_eType2R2PS_null_r16_01", HFILL }}, + { &hf_nr_rrc_type1MP_eType2R2PS_null_r16_item, + { "type1MP-eType2R2PS-null-r16 item", "nr-rrc.type1MP_eType2R2PS_null_r16_item", + FT_UINT32, BASE_DEC, NULL, 0, + "INTEGER_0_maxNrofCSI_RS_ResourcesAlt_1_r16", HFILL }}, + { &hf_nr_rrc_type1MP_Type2_Type2PS_r16_01, + { "type1MP-Type2-Type2PS-r16", "nr-rrc.type1MP_Type2_Type2PS_r16", + FT_UINT32, BASE_DEC, NULL, 0, + "T_type1MP_Type2_Type2PS_r16_01", HFILL }}, + { &hf_nr_rrc_type1MP_Type2_Type2PS_r16_item, + { "type1MP-Type2-Type2PS-r16 item", "nr-rrc.type1MP_Type2_Type2PS_r16_item", + FT_UINT32, BASE_DEC, NULL, 0, + "INTEGER_0_maxNrofCSI_RS_ResourcesAlt_1_r16", HFILL }}, { &hf_nr_rrc_CodebookVariantsList_r16_item, { "SupportedCSI-RS-Resource", "nr-rrc.SupportedCSI_RS_Resource_element", FT_NONE, BASE_NONE, NULL, 0, @@ -97939,8 +103277,8 @@ proto_register_nr_rrc(void) { { "supportedSRS-Resources", "nr-rrc.supportedSRS_Resources_element", FT_NONE, BASE_NONE, NULL, 0, "SRS_Resources", HFILL }}, - { &hf_nr_rrc_cbgPDSCH_ProcessingType1_DifferentTB_PerSlot, - { "cbgPDSCH-ProcessingType1-DifferentTB-PerSlot", "nr-rrc.cbgPDSCH_ProcessingType1_DifferentTB_PerSlot_element", + { &hf_nr_rrc_cbgPDSCH_ProcessingType1_NumberOfTB_PerSlot, + { "cbgPDSCH-ProcessingType1-NumberOfTB-PerSlot", "nr-rrc.cbgPDSCH_ProcessingType1_NumberOfTB_PerSlot_element", FT_NONE, BASE_NONE, NULL, 0, NULL, HFILL }}, { &hf_nr_rrc_scs_15kHz_03, @@ -97959,8 +103297,8 @@ proto_register_nr_rrc(void) { { "scs-120kHz", "nr-rrc.scs_120kHz", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_scs_120kHz_03_vals), 0, "T_scs_120kHz_03", HFILL }}, - { &hf_nr_rrc_cbgPDSCH_ProcessingType2_DifferentTB_PerSlot, - { "cbgPDSCH-ProcessingType2-DifferentTB-PerSlot", "nr-rrc.cbgPDSCH_ProcessingType2_DifferentTB_PerSlot_element", + { &hf_nr_rrc_cbgPDSCH_ProcessingType2_NumberOfTB_PerSlot, + { "cbgPDSCH-ProcessingType2-NumberOfTB-PerSlot", "nr-rrc.cbgPDSCH_ProcessingType2_NumberOfTB_PerSlot_element", FT_NONE, BASE_NONE, NULL, 0, NULL, HFILL }}, { &hf_nr_rrc_scs_15kHz_04, @@ -97979,6 +103317,94 @@ proto_register_nr_rrc(void) { { "scs-120kHz", "nr-rrc.scs_120kHz", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_scs_120kHz_04_vals), 0, "T_scs_120kHz_04", HFILL }}, + { &hf_nr_rrc_intraFreqDAPS_r16, + { "intraFreqDAPS-r16", "nr-rrc.intraFreqDAPS_r16_element", + FT_NONE, BASE_NONE, NULL, 0, + NULL, HFILL }}, + { &hf_nr_rrc_intraFreqDiffSCS_DAPS_r16, + { "intraFreqDiffSCS-DAPS-r16", "nr-rrc.intraFreqDiffSCS_DAPS_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_intraFreqDiffSCS_DAPS_r16_vals), 0, + NULL, HFILL }}, + { &hf_nr_rrc_intraFreqAsyncDAPS_r16, + { "intraFreqAsyncDAPS-r16", "nr-rrc.intraFreqAsyncDAPS_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_intraFreqAsyncDAPS_r16_vals), 0, + NULL, HFILL }}, + { &hf_nr_rrc_intraBandFreqSeparationDL_v1620, + { "intraBandFreqSeparationDL-v1620", "nr-rrc.intraBandFreqSeparationDL_v1620", + FT_UINT32, BASE_DEC, VALS(nr_rrc_FreqSeparationClassDL_v1620_vals), 0, + "FreqSeparationClassDL_v1620", HFILL }}, + { &hf_nr_rrc_intraBandFreqSeparationDL_Only_r16, + { "intraBandFreqSeparationDL-Only-r16", "nr-rrc.intraBandFreqSeparationDL_Only_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_FreqSeparationClassDL_Only_r16_vals), 0, + "FreqSeparationClassDL_Only_r16", HFILL }}, + { &hf_nr_rrc_pdcch_Monitoring_r16, + { "pdcch-Monitoring-r16", "nr-rrc.pdcch_Monitoring_r16_element", + FT_NONE, BASE_NONE, NULL, 0, + NULL, HFILL }}, + { &hf_nr_rrc_pdsch_ProcessingType1_r16, + { "pdsch-ProcessingType1-r16", "nr-rrc.pdsch_ProcessingType1_r16_element", + FT_NONE, BASE_NONE, NULL, 0, + NULL, HFILL }}, + { &hf_nr_rrc_scs_15kHz_r16, + { "scs-15kHz-r16", "nr-rrc.scs_15kHz_r16_element", + FT_NONE, BASE_NONE, NULL, 0, + "PDCCH_MonitoringOccasions_r16", HFILL }}, + { &hf_nr_rrc_scs_30kHz_r16, + { "scs-30kHz-r16", "nr-rrc.scs_30kHz_r16_element", + FT_NONE, BASE_NONE, NULL, 0, + "PDCCH_MonitoringOccasions_r16", HFILL }}, + { &hf_nr_rrc_pdsch_ProcessingType2_r16, + { "pdsch-ProcessingType2-r16", "nr-rrc.pdsch_ProcessingType2_r16_element", + FT_NONE, BASE_NONE, NULL, 0, + NULL, HFILL }}, + { &hf_nr_rrc_pdcch_MonitoringMixed_r16, + { "pdcch-MonitoringMixed-r16", "nr-rrc.pdcch_MonitoringMixed_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_pdcch_MonitoringMixed_r16_vals), 0, + NULL, HFILL }}, + { &hf_nr_rrc_crossCarrierSchedulingProcessing_DiffSCS_r16, + { "crossCarrierSchedulingProcessing-DiffSCS-r16", "nr-rrc.crossCarrierSchedulingProcessing_DiffSCS_r16_element", + FT_NONE, BASE_NONE, NULL, 0, + NULL, HFILL }}, + { &hf_nr_rrc_scs_15kHz_120kHz_r16, + { "scs-15kHz-120kHz-r16", "nr-rrc.scs_15kHz_120kHz_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_scs_15kHz_120kHz_r16_vals), 0, + NULL, HFILL }}, + { &hf_nr_rrc_scs_15kHz_60kHz_r16, + { "scs-15kHz-60kHz-r16", "nr-rrc.scs_15kHz_60kHz_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_scs_15kHz_60kHz_r16_vals), 0, + NULL, HFILL }}, + { &hf_nr_rrc_scs_30kHz_120kHz_r16, + { "scs-30kHz-120kHz-r16", "nr-rrc.scs_30kHz_120kHz_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_scs_30kHz_120kHz_r16_vals), 0, + NULL, HFILL }}, + { &hf_nr_rrc_scs_15kHz_30kHz_r16, + { "scs-15kHz-30kHz-r16", "nr-rrc.scs_15kHz_30kHz_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_scs_15kHz_30kHz_r16_vals), 0, + NULL, HFILL }}, + { &hf_nr_rrc_scs_30kHz_60kHz_r16, + { "scs-30kHz-60kHz-r16", "nr-rrc.scs_30kHz_60kHz_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_scs_30kHz_60kHz_r16_vals), 0, + NULL, HFILL }}, + { &hf_nr_rrc_scs_60kHz_120kHz_r16, + { "scs-60kHz-120kHz-r16", "nr-rrc.scs_60kHz_120kHz_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_scs_60kHz_120kHz_r16_vals), 0, + NULL, HFILL }}, + { &hf_nr_rrc_singleDCI_SDM_scheme_r16, + { "singleDCI-SDM-scheme-r16", "nr-rrc.singleDCI_SDM_scheme_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_singleDCI_SDM_scheme_r16_vals), 0, + NULL, HFILL }}, + { &hf_nr_rrc_period7span3_r16, + { "period7span3-r16", "nr-rrc.period7span3_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_period7span3_r16_vals), 0, + NULL, HFILL }}, + { &hf_nr_rrc_period4span3_r16, + { "period4span3-r16", "nr-rrc.period4span3_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_period4span3_r16_vals), 0, + NULL, HFILL }}, + { &hf_nr_rrc_period2span2_r16, + { "period2span2-r16", "nr-rrc.period2span2_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_period2span2_r16_vals), 0, + NULL, HFILL }}, { &hf_nr_rrc_maxNumberNZP_CSI_RS_PerCC, { "maxNumberNZP-CSI-RS-PerCC", "nr-rrc.maxNumberNZP_CSI_RS_PerCC", FT_UINT32, BASE_DEC, NULL, 0, @@ -98067,6 +103493,26 @@ proto_register_nr_rrc(void) { { "supportedModulationOrderDL", "nr-rrc.supportedModulationOrderDL", FT_UINT32, BASE_DEC, VALS(nr_rrc_ModulationOrder_vals), 0, "ModulationOrder", HFILL }}, + { &hf_nr_rrc_multiDCI_MultiTRP_r16, + { "multiDCI-MultiTRP-r16", "nr-rrc.multiDCI_MultiTRP_r16_element", + FT_NONE, BASE_NONE, NULL, 0, + NULL, HFILL }}, + { &hf_nr_rrc_supportFDM_SchemeB_r16, + { "supportFDM-SchemeB-r16", "nr-rrc.supportFDM_SchemeB_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_supportFDM_SchemeB_r16_vals), 0, + NULL, HFILL }}, + { &hf_nr_rrc_maxNumberCORESET_r16, + { "maxNumberCORESET-r16", "nr-rrc.maxNumberCORESET_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_maxNumberCORESET_r16_vals), 0, + "T_maxNumberCORESET_r16", HFILL }}, + { &hf_nr_rrc_maxNumberCORESETPerPoolIndex_r16, + { "maxNumberCORESETPerPoolIndex-r16", "nr-rrc.maxNumberCORESETPerPoolIndex_r16", + FT_UINT32, BASE_DEC, NULL, 0, + "INTEGER_1_3", HFILL }}, + { &hf_nr_rrc_maxNumberUnicastPDSCH_PerPool_r16, + { "maxNumberUnicastPDSCH-PerPool-r16", "nr-rrc.maxNumberUnicastPDSCH_PerPool_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_maxNumberUnicastPDSCH_PerPool_r16_vals), 0, + NULL, HFILL }}, { &hf_nr_rrc_featureSetsDownlink, { "featureSetsDownlink", "nr-rrc.featureSetsDownlink", FT_UINT32, BASE_DEC, NULL, 0, @@ -98147,6 +103593,14 @@ proto_register_nr_rrc(void) { { "FeatureSetUplink-v1610", "nr-rrc.FeatureSetUplink_v1610_element", FT_NONE, BASE_NONE, NULL, 0, NULL, HFILL }}, + { &hf_nr_rrc_featureSetDownlinkPerCC_v1620, + { "featureSetDownlinkPerCC-v1620", "nr-rrc.featureSetDownlinkPerCC_v1620", + FT_UINT32, BASE_DEC, NULL, 0, + "SEQUENCE_SIZE_1_maxPerCC_FeatureSets_OF_FeatureSetDownlinkPerCC_v1620", HFILL }}, + { &hf_nr_rrc_featureSetDownlinkPerCC_v1620_item, + { "FeatureSetDownlinkPerCC-v1620", "nr-rrc.FeatureSetDownlinkPerCC_v1620_element", + FT_NONE, BASE_NONE, NULL, 0, + NULL, HFILL }}, { &hf_nr_rrc_featureSetListPerUplinkCC, { "featureSetListPerUplinkCC", "nr-rrc.featureSetListPerUplinkCC", FT_UINT32, BASE_DEC, NULL, 0, @@ -98299,6 +103753,170 @@ proto_register_nr_rrc(void) { { "supportedSRS-PosResources-r16", "nr-rrc.supportedSRS_PosResources_r16_element", FT_NONE, BASE_NONE, NULL, 0, "SRS_AllPosResources_r16", HFILL }}, + { &hf_nr_rrc_intraFreqDAPS_UL_r16, + { "intraFreqDAPS-UL-r16", "nr-rrc.intraFreqDAPS_UL_r16_element", + FT_NONE, BASE_NONE, NULL, 0, + NULL, HFILL }}, + { &hf_nr_rrc_intraFreqMultiUL_TransmissionDAPS_r16, + { "intraFreqMultiUL-TransmissionDAPS-r16", "nr-rrc.intraFreqMultiUL_TransmissionDAPS_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_intraFreqMultiUL_TransmissionDAPS_r16_vals), 0, + NULL, HFILL }}, + { &hf_nr_rrc_intraFreqTwoTAGs_DAPS_r16, + { "intraFreqTwoTAGs-DAPS-r16", "nr-rrc.intraFreqTwoTAGs_DAPS_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_intraFreqTwoTAGs_DAPS_r16_vals), 0, + NULL, HFILL }}, + { &hf_nr_rrc_intraFreqSemiStaticPowerSharingDAPS_Mode1_r16, + { "intraFreqSemiStaticPowerSharingDAPS-Mode1-r16", "nr-rrc.intraFreqSemiStaticPowerSharingDAPS_Mode1_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_intraFreqSemiStaticPowerSharingDAPS_Mode1_r16_vals), 0, + NULL, HFILL }}, + { &hf_nr_rrc_intraFreqSemiStaticPowerSharingDAPS_Mode2_r16, + { "intraFreqSemiStaticPowerSharingDAPS-Mode2-r16", "nr-rrc.intraFreqSemiStaticPowerSharingDAPS_Mode2_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_intraFreqSemiStaticPowerSharingDAPS_Mode2_r16_vals), 0, + NULL, HFILL }}, + { &hf_nr_rrc_intraFreqDynamicPowerSharingDAPS_r16, + { "intraFreqDynamicPowerSharingDAPS-r16", "nr-rrc.intraFreqDynamicPowerSharingDAPS_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_intraFreqDynamicPowerSharingDAPS_r16_vals), 0, + NULL, HFILL }}, + { &hf_nr_rrc_intraBandFreqSeparationUL_v1620, + { "intraBandFreqSeparationUL-v1620", "nr-rrc.intraBandFreqSeparationUL_v1620", + FT_UINT32, BASE_DEC, VALS(nr_rrc_FreqSeparationClassUL_v1620_vals), 0, + "FreqSeparationClassUL_v1620", HFILL }}, + { &hf_nr_rrc_multiPUCCH_r16, + { "multiPUCCH-r16", "nr-rrc.multiPUCCH_r16_element", + FT_NONE, BASE_NONE, NULL, 0, + NULL, HFILL }}, + { &hf_nr_rrc_sub_SlotConfig_NCP_r16, + { "sub-SlotConfig-NCP-r16", "nr-rrc.sub_SlotConfig_NCP_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_sub_SlotConfig_NCP_r16_vals), 0, + NULL, HFILL }}, + { &hf_nr_rrc_sub_SlotConfig_ECP_r16, + { "sub-SlotConfig-ECP-r16", "nr-rrc.sub_SlotConfig_ECP_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_sub_SlotConfig_ECP_r16_vals), 0, + NULL, HFILL }}, + { &hf_nr_rrc_twoPUCCH_Type1_r16, + { "twoPUCCH-Type1-r16", "nr-rrc.twoPUCCH_Type1_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_twoPUCCH_Type1_r16_vals), 0, + NULL, HFILL }}, + { &hf_nr_rrc_twoPUCCH_Type2_r16, + { "twoPUCCH-Type2-r16", "nr-rrc.twoPUCCH_Type2_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_twoPUCCH_Type2_r16_vals), 0, + NULL, HFILL }}, + { &hf_nr_rrc_twoPUCCH_Type3_r16, + { "twoPUCCH-Type3-r16", "nr-rrc.twoPUCCH_Type3_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_twoPUCCH_Type3_r16_vals), 0, + NULL, HFILL }}, + { &hf_nr_rrc_twoPUCCH_Type4_r16, + { "twoPUCCH-Type4-r16", "nr-rrc.twoPUCCH_Type4_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_twoPUCCH_Type4_r16_vals), 0, + NULL, HFILL }}, + { &hf_nr_rrc_mux_SR_HARQ_ACK_r16, + { "mux-SR-HARQ-ACK-r16", "nr-rrc.mux_SR_HARQ_ACK_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_mux_SR_HARQ_ACK_r16_vals), 0, + NULL, HFILL }}, + { &hf_nr_rrc_twoHARQ_ACK_Codebook_type1_r16, + { "twoHARQ-ACK-Codebook-type1-r16", "nr-rrc.twoHARQ_ACK_Codebook_type1_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_twoHARQ_ACK_Codebook_type1_r16_vals), 0, + NULL, HFILL }}, + { &hf_nr_rrc_twoHARQ_ACK_Codebook_type2_r16, + { "twoHARQ-ACK-Codebook-type2-r16", "nr-rrc.twoHARQ_ACK_Codebook_type2_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_twoHARQ_ACK_Codebook_type2_r16_vals), 0, + NULL, HFILL }}, + { &hf_nr_rrc_twoPUCCH_Type5_r16, + { "twoPUCCH-Type5-r16", "nr-rrc.twoPUCCH_Type5_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_twoPUCCH_Type5_r16_vals), 0, + NULL, HFILL }}, + { &hf_nr_rrc_twoPUCCH_Type6_r16, + { "twoPUCCH-Type6-r16", "nr-rrc.twoPUCCH_Type6_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_twoPUCCH_Type6_r16_vals), 0, + NULL, HFILL }}, + { &hf_nr_rrc_twoPUCCH_Type7_r16, + { "twoPUCCH-Type7-r16", "nr-rrc.twoPUCCH_Type7_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_twoPUCCH_Type7_r16_vals), 0, + NULL, HFILL }}, + { &hf_nr_rrc_twoPUCCH_Type8_r16, + { "twoPUCCH-Type8-r16", "nr-rrc.twoPUCCH_Type8_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_twoPUCCH_Type8_r16_vals), 0, + NULL, HFILL }}, + { &hf_nr_rrc_twoPUCCH_Type9_r16, + { "twoPUCCH-Type9-r16", "nr-rrc.twoPUCCH_Type9_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_twoPUCCH_Type9_r16_vals), 0, + NULL, HFILL }}, + { &hf_nr_rrc_twoPUCCH_Type10_r16, + { "twoPUCCH-Type10-r16", "nr-rrc.twoPUCCH_Type10_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_twoPUCCH_Type10_r16_vals), 0, + NULL, HFILL }}, + { &hf_nr_rrc_twoPUCCH_Type11_r16, + { "twoPUCCH-Type11-r16", "nr-rrc.twoPUCCH_Type11_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_twoPUCCH_Type11_r16_vals), 0, + NULL, HFILL }}, + { &hf_nr_rrc_ul_IntraUE_Mux_r16, + { "ul-IntraUE-Mux-r16", "nr-rrc.ul_IntraUE_Mux_r16_element", + FT_NONE, BASE_NONE, NULL, 0, + NULL, HFILL }}, + { &hf_nr_rrc_pusch_PreparationLowPriority_r16, + { "pusch-PreparationLowPriority-r16", "nr-rrc.pusch_PreparationLowPriority_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_pusch_PreparationLowPriority_r16_vals), 0, + NULL, HFILL }}, + { &hf_nr_rrc_pusch_PreparationHighPriority_r16, + { "pusch-PreparationHighPriority-r16", "nr-rrc.pusch_PreparationHighPriority_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_pusch_PreparationHighPriority_r16_vals), 0, + NULL, HFILL }}, + { &hf_nr_rrc_ul_FullPwrMode_r16, + { "ul-FullPwrMode-r16", "nr-rrc.ul_FullPwrMode_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_ul_FullPwrMode_r16_vals), 0, + NULL, HFILL }}, + { &hf_nr_rrc_crossCarrierSchedulingProcessing_DiffSCS_r16_01, + { "crossCarrierSchedulingProcessing-DiffSCS-r16", "nr-rrc.crossCarrierSchedulingProcessing_DiffSCS_r16_element", + FT_NONE, BASE_NONE, NULL, 0, + "T_crossCarrierSchedulingProcessing_DiffSCS_r16_01", HFILL }}, + { &hf_nr_rrc_scs_15kHz_120kHz_r16_01, + { "scs-15kHz-120kHz-r16", "nr-rrc.scs_15kHz_120kHz_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_scs_15kHz_120kHz_r16_01_vals), 0, + "T_scs_15kHz_120kHz_r16_01", HFILL }}, + { &hf_nr_rrc_scs_15kHz_60kHz_r16_01, + { "scs-15kHz-60kHz-r16", "nr-rrc.scs_15kHz_60kHz_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_scs_15kHz_60kHz_r16_01_vals), 0, + "T_scs_15kHz_60kHz_r16_01", HFILL }}, + { &hf_nr_rrc_scs_30kHz_120kHz_r16_01, + { "scs-30kHz-120kHz-r16", "nr-rrc.scs_30kHz_120kHz_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_scs_30kHz_120kHz_r16_01_vals), 0, + "T_scs_30kHz_120kHz_r16_01", HFILL }}, + { &hf_nr_rrc_scs_15kHz_30kHz_r16_01, + { "scs-15kHz-30kHz-r16", "nr-rrc.scs_15kHz_30kHz_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_scs_15kHz_30kHz_r16_01_vals), 0, + "T_scs_15kHz_30kHz_r16_01", HFILL }}, + { &hf_nr_rrc_scs_30kHz_60kHz_r16_01, + { "scs-30kHz-60kHz-r16", "nr-rrc.scs_30kHz_60kHz_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_scs_30kHz_60kHz_r16_01_vals), 0, + "T_scs_30kHz_60kHz_r16_01", HFILL }}, + { &hf_nr_rrc_scs_60kHz_120kHz_r16_01, + { "scs-60kHz-120kHz-r16", "nr-rrc.scs_60kHz_120kHz_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_scs_60kHz_120kHz_r16_01_vals), 0, + "T_scs_60kHz_120kHz_r16_01", HFILL }}, + { &hf_nr_rrc_ul_FullPwrMode1_r16, + { "ul-FullPwrMode1-r16", "nr-rrc.ul_FullPwrMode1_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_ul_FullPwrMode1_r16_vals), 0, + NULL, HFILL }}, + { &hf_nr_rrc_ul_FullPwrMode2_SRSConfig_diffNumSRSPorts_r16, + { "ul-FullPwrMode2-SRSConfig-diffNumSRSPorts-r16", "nr-rrc.ul_FullPwrMode2_SRSConfig_diffNumSRSPorts_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_ul_FullPwrMode2_SRSConfig_diffNumSRSPorts_r16_vals), 0, + NULL, HFILL }}, + { &hf_nr_rrc_ul_FullPwrMode2_TPMIGroup_r16, + { "ul-FullPwrMode2-TPMIGroup-r16", "nr-rrc.ul_FullPwrMode2_TPMIGroup_r16_element", + FT_NONE, BASE_NONE, NULL, 0, + NULL, HFILL }}, + { &hf_nr_rrc_twoPorts_r16, + { "twoPorts-r16", "nr-rrc.twoPorts_r16", + FT_BYTES, BASE_NONE, NULL, 0, + "BIT_STRING_SIZE_2", HFILL }}, + { &hf_nr_rrc_fourPortsNonCoherent_r16, + { "fourPortsNonCoherent-r16", "nr-rrc.fourPortsNonCoherent_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_fourPortsNonCoherent_r16_vals), 0, + "T_fourPortsNonCoherent_r16", HFILL }}, + { &hf_nr_rrc_fourPortsPartialCoherent_r16, + { "fourPortsPartialCoherent-r16", "nr-rrc.fourPortsPartialCoherent_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_fourPortsPartialCoherent_r16_vals), 0, + "T_fourPortsPartialCoherent_r16", HFILL }}, { &hf_nr_rrc_srs_PosResources_r16, { "srs-PosResources-r16", "nr-rrc.srs_PosResources_r16_element", FT_NONE, BASE_NONE, NULL, 0, @@ -98587,10 +104205,6 @@ proto_register_nr_rrc(void) { { "recommendedBitRateMultiplier-r16", "nr-rrc.recommendedBitRateMultiplier_r16", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_recommendedBitRateMultiplier_r16_vals), 0, NULL, HFILL }}, - { &hf_nr_rrc_secondaryDRX_Group, - { "secondaryDRX-Group", "nr-rrc.secondaryDRX_Group", - FT_UINT32, BASE_DEC, VALS(nr_rrc_T_secondaryDRX_Group_vals), 0, - NULL, HFILL }}, { &hf_nr_rrc_preEmptiveBSR_r16, { "preEmptiveBSR-r16", "nr-rrc.preEmptiveBSR_r16", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_preEmptiveBSR_r16_vals), 0, @@ -98619,6 +104233,14 @@ proto_register_nr_rrc(void) { { "ul-LBT-FailureDetectionRecovery-r16", "nr-rrc.ul_LBT_FailureDetectionRecovery_r16", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_ul_LBT_FailureDetectionRecovery_r16_vals), 0, "T_ul_LBT_FailureDetectionRecovery_r16", HFILL }}, + { &hf_nr_rrc_tdd_MPE_P_MPR_Reporting_r16, + { "tdd-MPE-P-MPR-Reporting-r16", "nr-rrc.tdd_MPE_P_MPR_Reporting_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_tdd_MPE_P_MPR_Reporting_r16_vals), 0, + NULL, HFILL }}, + { &hf_nr_rrc_lcid_ExtensionIAB_r16, + { "lcid-ExtensionIAB-r16", "nr-rrc.lcid_ExtensionIAB_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_lcid_ExtensionIAB_r16_vals), 0, + NULL, HFILL }}, { &hf_nr_rrc_directMCG_SCellActivation_r16, { "directMCG-SCellActivation-r16", "nr-rrc.directMCG_SCellActivation_r16", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_directMCG_SCellActivation_r16_vals), 0, @@ -98639,12 +104261,12 @@ proto_register_nr_rrc(void) { { "drx-Adaptation-r16", "nr-rrc.drx_Adaptation_r16_element", FT_NONE, BASE_NONE, NULL, 0, NULL, HFILL }}, - { &hf_nr_rrc_licensedBand_r16, - { "licensedBand-r16", "nr-rrc.licensedBand_r16_element", + { &hf_nr_rrc_non_SharedSpectrumChAccess_r16, + { "non-SharedSpectrumChAccess-r16", "nr-rrc.non_SharedSpectrumChAccess_r16_element", FT_NONE, BASE_NONE, NULL, 0, "MinTimeGap_r16", HFILL }}, - { &hf_nr_rrc_unlicensedBand_r16, - { "unlicensedBand-r16", "nr-rrc.unlicensedBand_r16_element", + { &hf_nr_rrc_sharedSpectrumChAccess_r16, + { "sharedSpectrumChAccess-r16", "nr-rrc.sharedSpectrumChAccess_r16_element", FT_NONE, BASE_NONE, NULL, 0, "MinTimeGap_r16", HFILL }}, { &hf_nr_rrc_skipUplinkTxDynamic_01, @@ -98671,11 +104293,15 @@ proto_register_nr_rrc(void) { { "multipleConfiguredGrants", "nr-rrc.multipleConfiguredGrants", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_multipleConfiguredGrants_vals), 0, NULL, HFILL }}, - { &hf_nr_rrc_scs_15kHz_r16, + { &hf_nr_rrc_secondaryDRX_Group_r16, + { "secondaryDRX-Group-r16", "nr-rrc.secondaryDRX_Group_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_secondaryDRX_Group_r16_vals), 0, + NULL, HFILL }}, + { &hf_nr_rrc_scs_15kHz_r16_01, { "scs-15kHz-r16", "nr-rrc.scs_15kHz_r16", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_scs_15kHz_r16_vals), 0, NULL, HFILL }}, - { &hf_nr_rrc_scs_30kHz_r16, + { &hf_nr_rrc_scs_30kHz_r16_01, { "scs-30kHz-r16", "nr-rrc.scs_30kHz_r16", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_scs_30kHz_r16_vals), 0, NULL, HFILL }}, @@ -98823,6 +104449,26 @@ proto_register_nr_rrc(void) { { "idleInactive-ValidityArea-r16", "nr-rrc.idleInactive_ValidityArea_r16", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_idleInactive_ValidityArea_r16_vals), 0, NULL, HFILL }}, + { &hf_nr_rrc_eutra_AutonomousGaps_r16, + { "eutra-AutonomousGaps-r16", "nr-rrc.eutra_AutonomousGaps_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_eutra_AutonomousGaps_r16_vals), 0, + NULL, HFILL }}, + { &hf_nr_rrc_eutra_AutonomousGaps_NEDC_r16, + { "eutra-AutonomousGaps-NEDC-r16", "nr-rrc.eutra_AutonomousGaps_NEDC_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_eutra_AutonomousGaps_NEDC_r16_vals), 0, + NULL, HFILL }}, + { &hf_nr_rrc_eutra_AutonomousGaps_NRDC_r16, + { "eutra-AutonomousGaps-NRDC-r16", "nr-rrc.eutra_AutonomousGaps_NRDC_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_eutra_AutonomousGaps_NRDC_r16_vals), 0, + NULL, HFILL }}, + { &hf_nr_rrc_pcellT312_r16, + { "pcellT312-r16", "nr-rrc.pcellT312_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_pcellT312_r16_vals), 0, + NULL, HFILL }}, + { &hf_nr_rrc_supportedGapPattern_r16, + { "supportedGapPattern-r16", "nr-rrc.supportedGapPattern_r16", + FT_BYTES, BASE_NONE, NULL, 0, + "BIT_STRING_SIZE_2", HFILL }}, { &hf_nr_rrc_intraAndInterF_MeasAndReport, { "intraAndInterF-MeasAndReport", "nr-rrc.intraAndInterF_MeasAndReport", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_intraAndInterF_MeasAndReport_vals), 0, @@ -98851,58 +104497,6 @@ proto_register_nr_rrc(void) { { "sftd-MeasNR-Neigh-DRX", "nr-rrc.sftd_MeasNR_Neigh_DRX", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_sftd_MeasNR_Neigh_DRX_vals), 0, NULL, HFILL }}, - { &hf_nr_rrc_condHandoverParametersXDD_Diff_r16, - { "condHandoverParametersXDD-Diff-r16", "nr-rrc.condHandoverParametersXDD_Diff_r16_element", - FT_NONE, BASE_NONE, NULL, 0, - NULL, HFILL }}, - { &hf_nr_rrc_condHandover_r16, - { "condHandover-r16", "nr-rrc.condHandover_r16", - FT_UINT32, BASE_DEC, VALS(nr_rrc_T_condHandover_r16_vals), 0, - NULL, HFILL }}, - { &hf_nr_rrc_condHandoverFailure_r16, - { "condHandoverFailure-r16", "nr-rrc.condHandoverFailure_r16", - FT_UINT32, BASE_DEC, VALS(nr_rrc_T_condHandoverFailure_r16_vals), 0, - NULL, HFILL }}, - { &hf_nr_rrc_condHandoverTwoTriggerEvents_r16, - { "condHandoverTwoTriggerEvents-r16", "nr-rrc.condHandoverTwoTriggerEvents_r16", - FT_UINT32, BASE_DEC, VALS(nr_rrc_T_condHandoverTwoTriggerEvents_r16_vals), 0, - NULL, HFILL }}, - { &hf_nr_rrc_pcellT312_r16, - { "pcellT312-r16", "nr-rrc.pcellT312_r16", - FT_UINT32, BASE_DEC, VALS(nr_rrc_T_pcellT312_r16_vals), 0, - NULL, HFILL }}, - { &hf_nr_rrc_handoverIntraF_IAB_r16, - { "handoverIntraF-IAB-r16", "nr-rrc.handoverIntraF_IAB_r16", - FT_UINT32, BASE_DEC, VALS(nr_rrc_T_handoverIntraF_IAB_r16_vals), 0, - NULL, HFILL }}, - { &hf_nr_rrc_eutra_AutonomousGaps_r16, - { "eutra-AutonomousGaps-r16", "nr-rrc.eutra_AutonomousGaps_r16", - FT_UINT32, BASE_DEC, VALS(nr_rrc_T_eutra_AutonomousGaps_r16_vals), 0, - NULL, HFILL }}, - { &hf_nr_rrc_eutra_AutonomousGapsNEDC_r16, - { "eutra-AutonomousGapsNEDC-r16", "nr-rrc.eutra_AutonomousGapsNEDC_r16", - FT_UINT32, BASE_DEC, VALS(nr_rrc_T_eutra_AutonomousGapsNEDC_r16_vals), 0, - NULL, HFILL }}, - { &hf_nr_rrc_eutra_AutonomousGapsNRDC_r16, - { "eutra-AutonomousGapsNRDC-r16", "nr-rrc.eutra_AutonomousGapsNRDC_r16", - FT_UINT32, BASE_DEC, VALS(nr_rrc_T_eutra_AutonomousGapsNRDC_r16_vals), 0, - NULL, HFILL }}, - { &hf_nr_rrc_nr_AutonomousGaps_r16, - { "nr-AutonomousGaps-r16", "nr-rrc.nr_AutonomousGaps_r16", - FT_UINT32, BASE_DEC, VALS(nr_rrc_T_nr_AutonomousGaps_r16_vals), 0, - NULL, HFILL }}, - { &hf_nr_rrc_nr_AutonomousGaps_ENDC_r16, - { "nr-AutonomousGaps-ENDC-r16", "nr-rrc.nr_AutonomousGaps_ENDC_r16", - FT_UINT32, BASE_DEC, VALS(nr_rrc_T_nr_AutonomousGaps_ENDC_r16_vals), 0, - NULL, HFILL }}, - { &hf_nr_rrc_nr_AutonomousGapsNEDC_r16, - { "nr-AutonomousGapsNEDC-r16", "nr-rrc.nr_AutonomousGapsNEDC_r16", - FT_UINT32, BASE_DEC, VALS(nr_rrc_T_nr_AutonomousGapsNEDC_r16_vals), 0, - NULL, HFILL }}, - { &hf_nr_rrc_nr_AutonomousGapsNRDC_r16, - { "nr-AutonomousGapsNRDC-r16", "nr-rrc.nr_AutonomousGapsNRDC_r16", - FT_UINT32, BASE_DEC, VALS(nr_rrc_T_nr_AutonomousGapsNRDC_r16_vals), 0, - NULL, HFILL }}, { &hf_nr_rrc_handoverUTRA_FDD_r16, { "handoverUTRA-FDD-r16", "nr-rrc.handoverUTRA_FDD_r16", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_handoverUTRA_FDD_r16_vals), 0, @@ -98947,14 +104541,22 @@ proto_register_nr_rrc(void) { { "simultaneousRxDataSSB-DiffNumerology", "nr-rrc.simultaneousRxDataSSB_DiffNumerology", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_simultaneousRxDataSSB_DiffNumerology_vals), 0, NULL, HFILL }}, - { &hf_nr_rrc_nr_AutonomousGaps_r16_01, + { &hf_nr_rrc_nr_AutonomousGaps_r16, { "nr-AutonomousGaps-r16", "nr-rrc.nr_AutonomousGaps_r16", - FT_UINT32, BASE_DEC, VALS(nr_rrc_T_nr_AutonomousGaps_r16_01_vals), 0, - "T_nr_AutonomousGaps_r16_01", HFILL }}, - { &hf_nr_rrc_nr_AutonomousGaps_ENDC_r16_01, + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_nr_AutonomousGaps_r16_vals), 0, + NULL, HFILL }}, + { &hf_nr_rrc_nr_AutonomousGaps_ENDC_r16, { "nr-AutonomousGaps-ENDC-r16", "nr-rrc.nr_AutonomousGaps_ENDC_r16", - FT_UINT32, BASE_DEC, VALS(nr_rrc_T_nr_AutonomousGaps_ENDC_r16_01_vals), 0, - "T_nr_AutonomousGaps_ENDC_r16_01", HFILL }}, + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_nr_AutonomousGaps_ENDC_r16_vals), 0, + NULL, HFILL }}, + { &hf_nr_rrc_nr_AutonomousGaps_NEDC_r16, + { "nr-AutonomousGaps-NEDC-r16", "nr-rrc.nr_AutonomousGaps_NEDC_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_nr_AutonomousGaps_NEDC_r16_vals), 0, + NULL, HFILL }}, + { &hf_nr_rrc_nr_AutonomousGaps_NRDC_r16, + { "nr-AutonomousGaps-NRDC-r16", "nr-rrc.nr_AutonomousGaps_NRDC_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_nr_AutonomousGaps_NRDC_r16_vals), 0, + NULL, HFILL }}, { &hf_nr_rrc_handoverUTRA_FDD_r16_01, { "handoverUTRA-FDD-r16", "nr-rrc.handoverUTRA_FDD_r16", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_handoverUTRA_FDD_r16_01_vals), 0, @@ -98967,26 +104569,6 @@ proto_register_nr_rrc(void) { { "cli-SRS-RSRP-Meas-r16", "nr-rrc.cli_SRS_RSRP_Meas_r16", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_cli_SRS_RSRP_Meas_r16_vals), 0, NULL, HFILL }}, - { &hf_nr_rrc_condHandoverParametersFRX_Diff_r16, - { "condHandoverParametersFRX-Diff-r16", "nr-rrc.condHandoverParametersFRX_Diff_r16_element", - FT_NONE, BASE_NONE, NULL, 0, - NULL, HFILL }}, - { &hf_nr_rrc_condHandover_r16_01, - { "condHandover-r16", "nr-rrc.condHandover_r16", - FT_UINT32, BASE_DEC, VALS(nr_rrc_T_condHandover_r16_01_vals), 0, - "T_condHandover_r16_01", HFILL }}, - { &hf_nr_rrc_condHandoverFailure_r16_01, - { "condHandoverFailure-r16", "nr-rrc.condHandoverFailure_r16", - FT_UINT32, BASE_DEC, VALS(nr_rrc_T_condHandoverFailure_r16_01_vals), 0, - "T_condHandoverFailure_r16_01", HFILL }}, - { &hf_nr_rrc_condHandoverTwoTriggerEvents_r16_01, - { "condHandoverTwoTriggerEvents-r16", "nr-rrc.condHandoverTwoTriggerEvents_r16", - FT_UINT32, BASE_DEC, VALS(nr_rrc_T_condHandoverTwoTriggerEvents_r16_01_vals), 0, - "T_condHandoverTwoTriggerEvents_r16_01", HFILL }}, - { &hf_nr_rrc_pcellT312_r16_01, - { "pcellT312-r16", "nr-rrc.pcellT312_r16", - FT_UINT32, BASE_DEC, VALS(nr_rrc_T_pcellT312_r16_01_vals), 0, - "T_pcellT312_r16_01", HFILL }}, { &hf_nr_rrc_interFrequencyMeas_Nogap_r16, { "interFrequencyMeas-Nogap-r16", "nr-rrc.interFrequencyMeas_Nogap_r16", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_interFrequencyMeas_Nogap_r16_vals), 0, @@ -98995,14 +104577,14 @@ proto_register_nr_rrc(void) { { "simultaneousRxDataSSB-DiffNumerology-Inter-r16", "nr-rrc.simultaneousRxDataSSB_DiffNumerology_Inter_r16", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_simultaneousRxDataSSB_DiffNumerology_Inter_r16_vals), 0, NULL, HFILL }}, - { &hf_nr_rrc_handoverIntraF_IAB_r16_01, - { "handoverIntraF-IAB-r16", "nr-rrc.handoverIntraF_IAB_r16", - FT_UINT32, BASE_DEC, VALS(nr_rrc_T_handoverIntraF_IAB_r16_01_vals), 0, - "T_handoverIntraF_IAB_r16_01", HFILL }}, { &hf_nr_rrc_idleInactiveNR_MeasReport_r16, { "idleInactiveNR-MeasReport-r16", "nr-rrc.idleInactiveNR_MeasReport_r16", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_idleInactiveNR_MeasReport_r16_vals), 0, "T_idleInactiveNR_MeasReport_r16", HFILL }}, + { &hf_nr_rrc_idleInactiveNR_MeasBeamReport_r16, + { "idleInactiveNR-MeasBeamReport-r16", "nr-rrc.idleInactiveNR_MeasBeamReport_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_idleInactiveNR_MeasBeamReport_r16_vals), 0, + "T_idleInactiveNR_MeasBeamReport_r16", HFILL }}, { &hf_nr_rrc_measAndMobParametersMRDC_Common, { "measAndMobParametersMRDC-Common", "nr-rrc.measAndMobParametersMRDC_Common_element", FT_NONE, BASE_NONE, NULL, 0, @@ -99023,14 +104605,6 @@ proto_register_nr_rrc(void) { { "measAndMobParametersMRDC-Common-v1610", "nr-rrc.measAndMobParametersMRDC_Common_v1610_element", FT_NONE, BASE_NONE, NULL, 0, NULL, HFILL }}, - { &hf_nr_rrc_measAndMobParametersMRDC_XDD_Diff_v1610, - { "measAndMobParametersMRDC-XDD-Diff-v1610", "nr-rrc.measAndMobParametersMRDC_XDD_Diff_v1610_element", - FT_NONE, BASE_NONE, NULL, 0, - NULL, HFILL }}, - { &hf_nr_rrc_measAndMobParametersMRDC_FRX_Diff_v1610, - { "measAndMobParametersMRDC-FRX-Diff-v1610", "nr-rrc.measAndMobParametersMRDC_FRX_Diff_v1610_element", - FT_NONE, BASE_NONE, NULL, 0, - NULL, HFILL }}, { &hf_nr_rrc_interNR_MeasEUTRA_IAB_r16, { "interNR-MeasEUTRA-IAB-r16", "nr-rrc.interNR_MeasEUTRA_IAB_r16", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_interNR_MeasEUTRA_IAB_r16_vals), 0, @@ -99051,6 +104625,10 @@ proto_register_nr_rrc(void) { { "condPSCellChangeFR1-FR2-r16", "nr-rrc.condPSCellChangeFR1_FR2_r16", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_condPSCellChangeFR1_FR2_r16_vals), 0, NULL, HFILL }}, + { &hf_nr_rrc_pscellT312_r16, + { "pscellT312-r16", "nr-rrc.pscellT312_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_pscellT312_r16_vals), 0, + NULL, HFILL }}, { &hf_nr_rrc_sftd_MeasPSCell, { "sftd-MeasPSCell", "nr-rrc.sftd_MeasPSCell", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_sftd_MeasPSCell_vals), 0, @@ -99063,42 +104641,10 @@ proto_register_nr_rrc(void) { { "sftd-MeasPSCell-NEDC", "nr-rrc.sftd_MeasPSCell_NEDC", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_sftd_MeasPSCell_NEDC_vals), 0, NULL, HFILL }}, - { &hf_nr_rrc_condPSCellChangeParametersXDD_Diff_r16, - { "condPSCellChangeParametersXDD-Diff-r16", "nr-rrc.condPSCellChangeParametersXDD_Diff_r16_element", - FT_NONE, BASE_NONE, NULL, 0, - NULL, HFILL }}, - { &hf_nr_rrc_condPSCellChange_r16, - { "condPSCellChange-r16", "nr-rrc.condPSCellChange_r16", - FT_UINT32, BASE_DEC, VALS(nr_rrc_T_condPSCellChange_r16_vals), 0, - NULL, HFILL }}, - { &hf_nr_rrc_condPSCellChangeTwoTriggerEvents_r16, - { "condPSCellChangeTwoTriggerEvents-r16", "nr-rrc.condPSCellChangeTwoTriggerEvents_r16", - FT_UINT32, BASE_DEC, VALS(nr_rrc_T_condPSCellChangeTwoTriggerEvents_r16_vals), 0, - NULL, HFILL }}, - { &hf_nr_rrc_pscellT312_r16, - { "pscellT312-r16", "nr-rrc.pscellT312_r16", - FT_UINT32, BASE_DEC, VALS(nr_rrc_T_pscellT312_r16_vals), 0, - NULL, HFILL }}, { &hf_nr_rrc_simultaneousRxDataSSB_DiffNumerology_01, { "simultaneousRxDataSSB-DiffNumerology", "nr-rrc.simultaneousRxDataSSB_DiffNumerology", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_simultaneousRxDataSSB_DiffNumerology_01_vals), 0, "T_simultaneousRxDataSSB_DiffNumerology_01", HFILL }}, - { &hf_nr_rrc_condPSCellChangeParametersFRX_Diff_r16, - { "condPSCellChangeParametersFRX-Diff-r16", "nr-rrc.condPSCellChangeParametersFRX_Diff_r16_element", - FT_NONE, BASE_NONE, NULL, 0, - NULL, HFILL }}, - { &hf_nr_rrc_condPSCellChange_r16_01, - { "condPSCellChange-r16", "nr-rrc.condPSCellChange_r16", - FT_UINT32, BASE_DEC, VALS(nr_rrc_T_condPSCellChange_r16_01_vals), 0, - "T_condPSCellChange_r16_01", HFILL }}, - { &hf_nr_rrc_condPSCellChangeTwoTriggerEvents_r16_01, - { "condPSCellChangeTwoTriggerEvents-r16", "nr-rrc.condPSCellChangeTwoTriggerEvents_r16", - FT_UINT32, BASE_DEC, VALS(nr_rrc_T_condPSCellChangeTwoTriggerEvents_r16_01_vals), 0, - "T_condPSCellChangeTwoTriggerEvents_r16_01", HFILL }}, - { &hf_nr_rrc_pscellT312_r16_01, - { "pscellT312-r16", "nr-rrc.pscellT312_r16", - FT_UINT32, BASE_DEC, VALS(nr_rrc_T_pscellT312_r16_01_vals), 0, - "T_pscellT312_r16_01", HFILL }}, { &hf_nr_rrc_tci_StatePDSCH, { "tci-StatePDSCH", "nr-rrc.tci_StatePDSCH_element", FT_NONE, BASE_NONE, NULL, 0, @@ -99347,6 +104893,198 @@ proto_register_nr_rrc(void) { { "codebookParametersPerBand-r16", "nr-rrc.codebookParametersPerBand_r16_element", FT_NONE, BASE_NONE, NULL, 0, "CodebookParameters_v1610", HFILL }}, + { &hf_nr_rrc_simul_SpatialRelationUpdatePUCCHResGroup_r16, + { "simul-SpatialRelationUpdatePUCCHResGroup-r16", "nr-rrc.simul_SpatialRelationUpdatePUCCHResGroup_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_simul_SpatialRelationUpdatePUCCHResGroup_r16_vals), 0, + NULL, HFILL }}, + { &hf_nr_rrc_maxNumberSCellBFR_r16, + { "maxNumberSCellBFR-r16", "nr-rrc.maxNumberSCellBFR_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_maxNumberSCellBFR_r16_vals), 0, + NULL, HFILL }}, + { &hf_nr_rrc_simultaneousReceptionDiffTypeD_r16, + { "simultaneousReceptionDiffTypeD-r16", "nr-rrc.simultaneousReceptionDiffTypeD_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_simultaneousReceptionDiffTypeD_r16_vals), 0, + NULL, HFILL }}, + { &hf_nr_rrc_ssb_csirs_SINR_measurement_r16, + { "ssb-csirs-SINR-measurement-r16", "nr-rrc.ssb_csirs_SINR_measurement_r16_element", + FT_NONE, BASE_NONE, NULL, 0, + "T_ssb_csirs_SINR_measurement_r16", HFILL }}, + { &hf_nr_rrc_maxNumberSSB_CSIRS_OneTx_CMR_r16, + { "maxNumberSSB-CSIRS-OneTx-CMR-r16", "nr-rrc.maxNumberSSB_CSIRS_OneTx_CMR_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_maxNumberSSB_CSIRS_OneTx_CMR_r16_vals), 0, + NULL, HFILL }}, + { &hf_nr_rrc_maxNumberCSI_IM_NZP_IMR_res_r16, + { "maxNumberCSI-IM-NZP-IMR-res-r16", "nr-rrc.maxNumberCSI_IM_NZP_IMR_res_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_maxNumberCSI_IM_NZP_IMR_res_r16_vals), 0, + NULL, HFILL }}, + { &hf_nr_rrc_maxNumberCSIRS_2Tx_res_r16, + { "maxNumberCSIRS-2Tx-res-r16", "nr-rrc.maxNumberCSIRS_2Tx_res_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_maxNumberCSIRS_2Tx_res_r16_vals), 0, + NULL, HFILL }}, + { &hf_nr_rrc_maxNumberSSB_CSIRS_res_r16, + { "maxNumberSSB-CSIRS-res-r16", "nr-rrc.maxNumberSSB_CSIRS_res_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_maxNumberSSB_CSIRS_res_r16_vals), 0, + NULL, HFILL }}, + { &hf_nr_rrc_maxNumberCSI_IM_NZP_IMR_res_mem_r16, + { "maxNumberCSI-IM-NZP-IMR-res-mem-r16", "nr-rrc.maxNumberCSI_IM_NZP_IMR_res_mem_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_maxNumberCSI_IM_NZP_IMR_res_mem_r16_vals), 0, + NULL, HFILL }}, + { &hf_nr_rrc_supportedCSI_RS_Density_CMR_r16, + { "supportedCSI-RS-Density-CMR-r16", "nr-rrc.supportedCSI_RS_Density_CMR_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_supportedCSI_RS_Density_CMR_r16_vals), 0, + NULL, HFILL }}, + { &hf_nr_rrc_maxNumberAperiodicCSI_RS_Res_r16, + { "maxNumberAperiodicCSI-RS-Res-r16", "nr-rrc.maxNumberAperiodicCSI_RS_Res_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_maxNumberAperiodicCSI_RS_Res_r16_vals), 0, + NULL, HFILL }}, + { &hf_nr_rrc_supportedSNIR_meas_r16, + { "supportedSNIR-meas-r16", "nr-rrc.supportedSNIR_meas_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_supportedSNIR_meas_r16_vals), 0, + NULL, HFILL }}, + { &hf_nr_rrc_nonGroupSINR_reporting_r16, + { "nonGroupSINR-reporting-r16", "nr-rrc.nonGroupSINR_reporting_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_nonGroupSINR_reporting_r16_vals), 0, + NULL, HFILL }}, + { &hf_nr_rrc_groupSINR_reporting_r16, + { "groupSINR-reporting-r16", "nr-rrc.groupSINR_reporting_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_groupSINR_reporting_r16_vals), 0, + NULL, HFILL }}, + { &hf_nr_rrc_multiDCI_multiTRP_Parameters_r16, + { "multiDCI-multiTRP-Parameters-r16", "nr-rrc.multiDCI_multiTRP_Parameters_r16_element", + FT_NONE, BASE_NONE, NULL, 0, + NULL, HFILL }}, + { &hf_nr_rrc_overlapPDSCHsFullyFreqTime_r16, + { "overlapPDSCHsFullyFreqTime-r16", "nr-rrc.overlapPDSCHsFullyFreqTime_r16", + FT_UINT32, BASE_DEC, NULL, 0, + "INTEGER_1_2", HFILL }}, + { &hf_nr_rrc_overlapPDSCHsInTimePartiallyFreq_r16, + { "overlapPDSCHsInTimePartiallyFreq-r16", "nr-rrc.overlapPDSCHsInTimePartiallyFreq_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_overlapPDSCHsInTimePartiallyFreq_r16_vals), 0, + NULL, HFILL }}, + { &hf_nr_rrc_outOfOrderOperationDL_r16, + { "outOfOrderOperationDL-r16", "nr-rrc.outOfOrderOperationDL_r16_element", + FT_NONE, BASE_NONE, NULL, 0, + NULL, HFILL }}, + { &hf_nr_rrc_supportPDCCH_ToPDSCH_r16, + { "supportPDCCH-ToPDSCH-r16", "nr-rrc.supportPDCCH_ToPDSCH_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_supportPDCCH_ToPDSCH_r16_vals), 0, + NULL, HFILL }}, + { &hf_nr_rrc_supportPDSCH_ToHARQ_ACK_r16, + { "supportPDSCH-ToHARQ-ACK-r16", "nr-rrc.supportPDSCH_ToHARQ_ACK_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_supportPDSCH_ToHARQ_ACK_r16_vals), 0, + NULL, HFILL }}, + { &hf_nr_rrc_outOfOrderOperationUL_r16, + { "outOfOrderOperationUL-r16", "nr-rrc.outOfOrderOperationUL_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_outOfOrderOperationUL_r16_vals), 0, + NULL, HFILL }}, + { &hf_nr_rrc_separateCRS_RateMatching_r16, + { "separateCRS-RateMatching-r16", "nr-rrc.separateCRS_RateMatching_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_separateCRS_RateMatching_r16_vals), 0, + NULL, HFILL }}, + { &hf_nr_rrc_defaultQCL_PerCORESETPoolIndex_r16, + { "defaultQCL-PerCORESETPoolIndex-r16", "nr-rrc.defaultQCL_PerCORESETPoolIndex_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_defaultQCL_PerCORESETPoolIndex_r16_vals), 0, + NULL, HFILL }}, + { &hf_nr_rrc_maxNumberActivatedTCI_States_r16, + { "maxNumberActivatedTCI-States-r16", "nr-rrc.maxNumberActivatedTCI_States_r16_element", + FT_NONE, BASE_NONE, NULL, 0, + NULL, HFILL }}, + { &hf_nr_rrc_maxNumberPerCORESET_Pool_r16, + { "maxNumberPerCORESET-Pool-r16", "nr-rrc.maxNumberPerCORESET_Pool_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_maxNumberPerCORESET_Pool_r16_vals), 0, + "T_maxNumberPerCORESET_Pool_r16", HFILL }}, + { &hf_nr_rrc_maxTotalNumberAcrossCORESET_Pool_r16, + { "maxTotalNumberAcrossCORESET-Pool-r16", "nr-rrc.maxTotalNumberAcrossCORESET_Pool_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_maxTotalNumberAcrossCORESET_Pool_r16_vals), 0, + "T_maxTotalNumberAcrossCORESET_Pool_r16", HFILL }}, + { &hf_nr_rrc_singleDCI_SDM_scheme_Parameters_r16, + { "singleDCI-SDM-scheme-Parameters-r16", "nr-rrc.singleDCI_SDM_scheme_Parameters_r16_element", + FT_NONE, BASE_NONE, NULL, 0, + NULL, HFILL }}, + { &hf_nr_rrc_supportNewDMRS_Port_r16, + { "supportNewDMRS-Port-r16", "nr-rrc.supportNewDMRS_Port_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_supportNewDMRS_Port_r16_vals), 0, + "T_supportNewDMRS_Port_r16", HFILL }}, + { &hf_nr_rrc_supportTwoPortDL_PTRS_r16, + { "supportTwoPortDL-PTRS-r16", "nr-rrc.supportTwoPortDL_PTRS_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_supportTwoPortDL_PTRS_r16_vals), 0, + NULL, HFILL }}, + { &hf_nr_rrc_supportFDM_SchemeA_r16, + { "supportFDM-SchemeA-r16", "nr-rrc.supportFDM_SchemeA_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_supportFDM_SchemeA_r16_vals), 0, + NULL, HFILL }}, + { &hf_nr_rrc_supportCodeWordSoftCombining_r16, + { "supportCodeWordSoftCombining-r16", "nr-rrc.supportCodeWordSoftCombining_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_supportCodeWordSoftCombining_r16_vals), 0, + NULL, HFILL }}, + { &hf_nr_rrc_supportTDM_SchemeA_r16, + { "supportTDM-SchemeA-r16", "nr-rrc.supportTDM_SchemeA_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_supportTDM_SchemeA_r16_vals), 0, + NULL, HFILL }}, + { &hf_nr_rrc_supportInter_slotTDM_r16, + { "supportInter-slotTDM-r16", "nr-rrc.supportInter_slotTDM_r16_element", + FT_NONE, BASE_NONE, NULL, 0, + NULL, HFILL }}, + { &hf_nr_rrc_supportRepNumPDSCH_TDRA_r16, + { "supportRepNumPDSCH-TDRA-r16", "nr-rrc.supportRepNumPDSCH_TDRA_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_supportRepNumPDSCH_TDRA_r16_vals), 0, + NULL, HFILL }}, + { &hf_nr_rrc_maxTBS_Size_r16, + { "maxTBS-Size-r16", "nr-rrc.maxTBS_Size_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_maxTBS_Size_r16_vals), 0, + NULL, HFILL }}, + { &hf_nr_rrc_maxNumberTCI_states_r16, + { "maxNumberTCI-states-r16", "nr-rrc.maxNumberTCI_states_r16", + FT_UINT32, BASE_DEC, NULL, 0, + "INTEGER_1_2", HFILL }}, + { &hf_nr_rrc_lowPAPR_DMRS_PDSCH_r16, + { "lowPAPR-DMRS-PDSCH-r16", "nr-rrc.lowPAPR_DMRS_PDSCH_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_lowPAPR_DMRS_PDSCH_r16_vals), 0, + NULL, HFILL }}, + { &hf_nr_rrc_lowPAPR_DMRS_PUSCHwithoutPrecoding_r16, + { "lowPAPR-DMRS-PUSCHwithoutPrecoding-r16", "nr-rrc.lowPAPR_DMRS_PUSCHwithoutPrecoding_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_lowPAPR_DMRS_PUSCHwithoutPrecoding_r16_vals), 0, + NULL, HFILL }}, + { &hf_nr_rrc_lowPAPR_DMRS_PUCCH_r16, + { "lowPAPR-DMRS-PUCCH-r16", "nr-rrc.lowPAPR_DMRS_PUCCH_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_lowPAPR_DMRS_PUCCH_r16_vals), 0, + NULL, HFILL }}, + { &hf_nr_rrc_lowPAPR_DMRS_PUSCHwithPrecoding_r16, + { "lowPAPR-DMRS-PUSCHwithPrecoding-r16", "nr-rrc.lowPAPR_DMRS_PUSCHwithPrecoding_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_lowPAPR_DMRS_PUSCHwithPrecoding_r16_vals), 0, + NULL, HFILL }}, + { &hf_nr_rrc_csi_ReportFrameworkExt_r16, + { "csi-ReportFrameworkExt-r16", "nr-rrc.csi_ReportFrameworkExt_r16_element", + FT_NONE, BASE_NONE, NULL, 0, + NULL, HFILL }}, + { &hf_nr_rrc_codebookParametersAddition_r16, + { "codebookParametersAddition-r16", "nr-rrc.codebookParametersAddition_r16_element", + FT_NONE, BASE_NONE, NULL, 0, + NULL, HFILL }}, + { &hf_nr_rrc_codebookComboParametersAddition_r16, + { "codebookComboParametersAddition-r16", "nr-rrc.codebookComboParametersAddition_r16_element", + FT_NONE, BASE_NONE, NULL, 0, + NULL, HFILL }}, + { &hf_nr_rrc_beamCorrespondenceSSB_based_r16, + { "beamCorrespondenceSSB-based-r16", "nr-rrc.beamCorrespondenceSSB_based_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_beamCorrespondenceSSB_based_r16_vals), 0, + NULL, HFILL }}, + { &hf_nr_rrc_beamCorrespondenceCSI_RS_based_r16, + { "beamCorrespondenceCSI-RS-based-r16", "nr-rrc.beamCorrespondenceCSI_RS_based_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_beamCorrespondenceCSI_RS_based_r16_vals), 0, + NULL, HFILL }}, + { &hf_nr_rrc_beamSwitchTiming_r16, + { "beamSwitchTiming-r16", "nr-rrc.beamSwitchTiming_r16_element", + FT_NONE, BASE_NONE, NULL, 0, + NULL, HFILL }}, + { &hf_nr_rrc_scs_60kHz_r16_01, + { "scs-60kHz-r16", "nr-rrc.scs_60kHz_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_scs_60kHz_r16_01_vals), 0, + "T_scs_60kHz_r16_01", HFILL }}, + { &hf_nr_rrc_scs_120kHz_r16_01, + { "scs-120kHz-r16", "nr-rrc.scs_120kHz_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_scs_120kHz_r16_01_vals), 0, + "T_scs_120kHz_r16_01", HFILL }}, { &hf_nr_rrc_maxNumberSSB_CSI_RS_ResourceOneTx, { "maxNumberSSB-CSI-RS-ResourceOneTx", "nr-rrc.maxNumberSSB_CSI_RS_ResourceOneTx", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_maxNumberSSB_CSI_RS_ResourceOneTx_vals), 0, @@ -99471,6 +105209,10 @@ proto_register_nr_rrc(void) { { "simultaneousCSI-ReportsPerCC", "nr-rrc.simultaneousCSI_ReportsPerCC", FT_UINT32, BASE_DEC, NULL, 0, "INTEGER_1_8", HFILL }}, + { &hf_nr_rrc_maxNumberAperiodicCSI_PerBWP_ForCSI_ReportExt_r16, + { "maxNumberAperiodicCSI-PerBWP-ForCSI-ReportExt-r16", "nr-rrc.maxNumberAperiodicCSI_PerBWP_ForCSI_ReportExt_r16", + FT_UINT32, BASE_DEC, NULL, 0, + "INTEGER_5_8", HFILL }}, { &hf_nr_rrc_frequencyDensity1, { "frequencyDensity1", "nr-rrc.frequencyDensity1", FT_UINT32, BASE_DEC, NULL, 0, @@ -99575,6 +105317,14 @@ proto_register_nr_rrc(void) { { "ul-TimingAlignmentEUTRA-NR", "nr-rrc.ul_TimingAlignmentEUTRA_NR", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_ul_TimingAlignmentEUTRA_NR_vals), 0, NULL, HFILL }}, + { &hf_nr_rrc_dynamicPowerSharingNEDC, + { "dynamicPowerSharingNEDC", "nr-rrc.dynamicPowerSharingNEDC", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_dynamicPowerSharingNEDC_vals), 0, + NULL, HFILL }}, + { &hf_nr_rrc_interBandContiguousMRDC, + { "interBandContiguousMRDC", "nr-rrc.interBandContiguousMRDC", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_interBandContiguousMRDC_vals), 0, + NULL, HFILL }}, { &hf_nr_rrc_maxUplinkDutyCycle_interBandENDC_TDD_PC2_r16, { "maxUplinkDutyCycle-interBandENDC-TDD-PC2-r16", "nr-rrc.maxUplinkDutyCycle_interBandENDC_TDD_PC2_r16_element", FT_NONE, BASE_NONE, NULL, 0, @@ -99607,13 +105357,21 @@ proto_register_nr_rrc(void) { { "eutra-TDD-Config6-r16", "nr-rrc.eutra_TDD_Config6_r16", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_eutra_TDD_Config6_r16_vals), 0, NULL, HFILL }}, - { &hf_nr_rrc_dynamicPowerSharingNEDC, - { "dynamicPowerSharingNEDC", "nr-rrc.dynamicPowerSharingNEDC", - FT_UINT32, BASE_DEC, VALS(nr_rrc_T_dynamicPowerSharingNEDC_vals), 0, + { &hf_nr_rrc_tdm_restrictionTDD_endc_r16, + { "tdm-restrictionTDD-endc-r16", "nr-rrc.tdm_restrictionTDD_endc_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_tdm_restrictionTDD_endc_r16_vals), 0, NULL, HFILL }}, - { &hf_nr_rrc_interBandContiguousMRDC, - { "interBandContiguousMRDC", "nr-rrc.interBandContiguousMRDC", - FT_UINT32, BASE_DEC, VALS(nr_rrc_T_interBandContiguousMRDC_vals), 0, + { &hf_nr_rrc_tdm_restrictionFDD_endc_r16, + { "tdm-restrictionFDD-endc-r16", "nr-rrc.tdm_restrictionFDD_endc_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_tdm_restrictionFDD_endc_r16_vals), 0, + NULL, HFILL }}, + { &hf_nr_rrc_singleUL_HARQ_offsetTDD_PCell_r16, + { "singleUL-HARQ-offsetTDD-PCell-r16", "nr-rrc.singleUL_HARQ_offsetTDD_PCell_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_singleUL_HARQ_offsetTDD_PCell_r16_vals), 0, + NULL, HFILL }}, + { &hf_nr_rrc_tdm_restrictionDualTX_FDD_endc_r16, + { "tdm-restrictionDualTX-FDD-endc-r16", "nr-rrc.tdm_restrictionDualTX_FDD_endc_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_tdm_restrictionDualTX_FDD_endc_r16_vals), 0, NULL, HFILL }}, { &hf_nr_rrc_measAndMobParametersNRDC, { "measAndMobParametersNRDC", "nr-rrc.measAndMobParametersNRDC_element", @@ -99995,22 +105753,18 @@ proto_register_nr_rrc(void) { { "crossSlotScheduling-r16", "nr-rrc.crossSlotScheduling_r16_element", FT_NONE, BASE_NONE, NULL, 0, NULL, HFILL }}, - { &hf_nr_rrc_licensedBand_r16_01, - { "licensedBand-r16", "nr-rrc.licensedBand_r16", - FT_UINT32, BASE_DEC, VALS(nr_rrc_T_licensedBand_r16_vals), 0, + { &hf_nr_rrc_non_SharedSpectrumChAccess_r16_01, + { "non-SharedSpectrumChAccess-r16", "nr-rrc.non_SharedSpectrumChAccess_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_non_SharedSpectrumChAccess_r16_vals), 0, NULL, HFILL }}, - { &hf_nr_rrc_unlicensedBand_r16_01, - { "unlicensedBand-r16", "nr-rrc.unlicensedBand_r16", - FT_UINT32, BASE_DEC, VALS(nr_rrc_T_unlicensedBand_r16_vals), 0, + { &hf_nr_rrc_sharedSpectrumChAccess_r16_01, + { "sharedSpectrumChAccess-r16", "nr-rrc.sharedSpectrumChAccess_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_sharedSpectrumChAccess_r16_vals), 0, NULL, HFILL }}, { &hf_nr_rrc_maxNumberSRS_PosPathLossEstimateAllServingCells_r16, { "maxNumberSRS-PosPathLossEstimateAllServingCells-r16", "nr-rrc.maxNumberSRS_PosPathLossEstimateAllServingCells_r16", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_maxNumberSRS_PosPathLossEstimateAllServingCells_r16_vals), 0, NULL, HFILL }}, - { &hf_nr_rrc_maxNumberSRS_PosSpatialRelationsAllServingCells_r16, - { "maxNumberSRS-PosSpatialRelationsAllServingCells-r16", "nr-rrc.maxNumberSRS_PosSpatialRelationsAllServingCells_r16", - FT_UINT32, BASE_DEC, VALS(nr_rrc_T_maxNumberSRS_PosSpatialRelationsAllServingCells_r16_vals), 0, - NULL, HFILL }}, { &hf_nr_rrc_extendedCG_Periodicities_r16, { "extendedCG-Periodicities-r16", "nr-rrc.extendedCG_Periodicities_r16", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_extendedCG_Periodicities_r16_vals), 0, @@ -100023,6 +105777,70 @@ proto_register_nr_rrc(void) { { "codebookVariantsList-r16", "nr-rrc.codebookVariantsList_r16", FT_UINT32, BASE_DEC, NULL, 0, NULL, HFILL }}, + { &hf_nr_rrc_pusch_RepetitionTypeA_r16, + { "pusch-RepetitionTypeA-r16", "nr-rrc.pusch_RepetitionTypeA_r16_element", + FT_NONE, BASE_NONE, NULL, 0, + NULL, HFILL }}, + { &hf_nr_rrc_sharedSpectrumChAccess_r16_02, + { "sharedSpectrumChAccess-r16", "nr-rrc.sharedSpectrumChAccess_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_sharedSpectrumChAccess_r16_01_vals), 0, + "T_sharedSpectrumChAccess_r16_01", HFILL }}, + { &hf_nr_rrc_non_SharedSpectrumChAccess_r16_02, + { "non-SharedSpectrumChAccess-r16", "nr-rrc.non_SharedSpectrumChAccess_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_non_SharedSpectrumChAccess_r16_01_vals), 0, + "T_non_SharedSpectrumChAccess_r16_01", HFILL }}, + { &hf_nr_rrc_dci_DL_PriorityIndicator_r16, + { "dci-DL-PriorityIndicator-r16", "nr-rrc.dci_DL_PriorityIndicator_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_dci_DL_PriorityIndicator_r16_vals), 0, + NULL, HFILL }}, + { &hf_nr_rrc_dci_UL_PriorityIndicator_r16, + { "dci-UL-PriorityIndicator-r16", "nr-rrc.dci_UL_PriorityIndicator_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_dci_UL_PriorityIndicator_r16_vals), 0, + NULL, HFILL }}, + { &hf_nr_rrc_maxNumberPathlossRS_Update_r16, + { "maxNumberPathlossRS-Update-r16", "nr-rrc.maxNumberPathlossRS_Update_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_maxNumberPathlossRS_Update_r16_vals), 0, + NULL, HFILL }}, + { &hf_nr_rrc_type2_HARQ_ACK_Codebook_r16, + { "type2-HARQ-ACK-Codebook-r16", "nr-rrc.type2_HARQ_ACK_Codebook_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_type2_HARQ_ACK_Codebook_r16_vals), 0, + NULL, HFILL }}, + { &hf_nr_rrc_maxTotalResourcesForAcrossFreqRanges_r16, + { "maxTotalResourcesForAcrossFreqRanges-r16", "nr-rrc.maxTotalResourcesForAcrossFreqRanges_r16_element", + FT_NONE, BASE_NONE, NULL, 0, + NULL, HFILL }}, + { &hf_nr_rrc_maxNumberResWithinSlotAcrossCC_AcrossFR_r16, + { "maxNumberResWithinSlotAcrossCC-AcrossFR-r16", "nr-rrc.maxNumberResWithinSlotAcrossCC_AcrossFR_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_maxNumberResWithinSlotAcrossCC_AcrossFR_r16_vals), 0, + NULL, HFILL }}, + { &hf_nr_rrc_maxNumberResAcrossCC_AcrossFR_r16, + { "maxNumberResAcrossCC-AcrossFR-r16", "nr-rrc.maxNumberResAcrossCC_AcrossFR_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_maxNumberResAcrossCC_AcrossFR_r16_vals), 0, + NULL, HFILL }}, + { &hf_nr_rrc_harqACK_separateMultiDCI_MultiTRP_r16, + { "harqACK-separateMultiDCI-MultiTRP-r16", "nr-rrc.harqACK_separateMultiDCI_MultiTRP_r16_element", + FT_NONE, BASE_NONE, NULL, 0, + NULL, HFILL }}, + { &hf_nr_rrc_maxNumberLongPUCCHs_r16, + { "maxNumberLongPUCCHs-r16", "nr-rrc.maxNumberLongPUCCHs_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_maxNumberLongPUCCHs_r16_vals), 0, + NULL, HFILL }}, + { &hf_nr_rrc_harqACK_jointMultiDCI_MultiTRP_r16, + { "harqACK-jointMultiDCI-MultiTRP-r16", "nr-rrc.harqACK_jointMultiDCI_MultiTRP_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_harqACK_jointMultiDCI_MultiTRP_r16_vals), 0, + NULL, HFILL }}, + { &hf_nr_rrc_bwp_SwitchingMultiCCs_r16, + { "bwp-SwitchingMultiCCs-r16", "nr-rrc.bwp_SwitchingMultiCCs_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_bwp_SwitchingMultiCCs_r16_vals), 0, + NULL, HFILL }}, + { &hf_nr_rrc_type1_r16, + { "type1-r16", "nr-rrc.type1_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_type1_r16_vals), 0, + NULL, HFILL }}, + { &hf_nr_rrc_type2_r16_01, + { "type2-r16", "nr-rrc.type2_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_type2_r16_01_vals), 0, + "T_type2_r16_01", HFILL }}, { &hf_nr_rrc_dynamicSFI, { "dynamicSFI", "nr-rrc.dynamicSFI", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_dynamicSFI_vals), 0, @@ -100287,14 +106105,6 @@ proto_register_nr_rrc(void) { { "simultaneousSpatialRelationMultipleCC-r16", "nr-rrc.simultaneousSpatialRelationMultipleCC_r16", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_simultaneousSpatialRelationMultipleCC_r16_vals), 0, NULL, HFILL }}, - { &hf_nr_rrc_defaultSpatialRelationPathlossRS_r16, - { "defaultSpatialRelationPathlossRS-r16", "nr-rrc.defaultSpatialRelationPathlossRS_r16", - FT_UINT32, BASE_DEC, VALS(nr_rrc_T_defaultSpatialRelationPathlossRS_r16_vals), 0, - NULL, HFILL }}, - { &hf_nr_rrc_spatialRelationUpdateAP_SRS_r16, - { "spatialRelationUpdateAP-SRS-r16", "nr-rrc.spatialRelationUpdateAP_SRS_r16", - FT_UINT32, BASE_DEC, VALS(nr_rrc_T_spatialRelationUpdateAP_SRS_r16_vals), 0, - NULL, HFILL }}, { &hf_nr_rrc_cli_RSSI_FDM_DL_r16, { "cli-RSSI-FDM-DL-r16", "nr-rrc.cli_RSSI_FDM_DL_r16", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_cli_RSSI_FDM_DL_r16_vals), 0, @@ -100307,6 +106117,22 @@ proto_register_nr_rrc(void) { { "maxLayersMIMO-Adaptation-r16", "nr-rrc.maxLayersMIMO_Adaptation_r16", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_maxLayersMIMO_Adaptation_r16_vals), 0, NULL, HFILL }}, + { &hf_nr_rrc_aggregationFactorSPS_DL_r16, + { "aggregationFactorSPS-DL-r16", "nr-rrc.aggregationFactorSPS_DL_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_aggregationFactorSPS_DL_r16_vals), 0, + NULL, HFILL }}, + { &hf_nr_rrc_maxTotalResourcesForOneFreqRange_r16, + { "maxTotalResourcesForOneFreqRange-r16", "nr-rrc.maxTotalResourcesForOneFreqRange_r16_element", + FT_NONE, BASE_NONE, NULL, 0, + NULL, HFILL }}, + { &hf_nr_rrc_maxNumberResWithinSlotAcrossCC_OneFR_r16, + { "maxNumberResWithinSlotAcrossCC-OneFR-r16", "nr-rrc.maxNumberResWithinSlotAcrossCC_OneFR_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_maxNumberResWithinSlotAcrossCC_OneFR_r16_vals), 0, + NULL, HFILL }}, + { &hf_nr_rrc_maxNumberResAcrossCC_OneFR_r16, + { "maxNumberResAcrossCC-OneFR-r16", "nr-rrc.maxNumberResAcrossCC_OneFR_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_maxNumberResAcrossCC_OneFR_r16_vals), 0, + NULL, HFILL }}, { &hf_nr_rrc_pdcch_MonitoringSingleOccasion, { "pdcch-MonitoringSingleOccasion", "nr-rrc.pdcch_MonitoringSingleOccasion", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_pdcch_MonitoringSingleOccasion_vals), 0, @@ -100343,6 +106169,18 @@ proto_register_nr_rrc(void) { { "pdsch-RE-MappingFR2-PerSlot", "nr-rrc.pdsch_RE_MappingFR2_PerSlot", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_pdsch_RE_MappingFR2_PerSlot_vals), 0, NULL, HFILL }}, + { &hf_nr_rrc_defaultSpatialRelationPathlossRS_r16, + { "defaultSpatialRelationPathlossRS-r16", "nr-rrc.defaultSpatialRelationPathlossRS_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_defaultSpatialRelationPathlossRS_r16_vals), 0, + NULL, HFILL }}, + { &hf_nr_rrc_spatialRelationUpdateAP_SRS_r16, + { "spatialRelationUpdateAP-SRS-r16", "nr-rrc.spatialRelationUpdateAP_SRS_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_spatialRelationUpdateAP_SRS_r16_vals), 0, + NULL, HFILL }}, + { &hf_nr_rrc_maxNumberSRS_PosSpatialRelationsAllServingCells_r16, + { "maxNumberSRS-PosSpatialRelationsAllServingCells-r16", "nr-rrc.maxNumberSRS_PosSpatialRelationsAllServingCells_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_maxNumberSRS_PosSpatialRelationsAllServingCells_r16_vals), 0, + NULL, HFILL }}, { &hf_nr_rrc_naics_Capability_List, { "naics-Capability-List", "nr-rrc.naics_Capability_List", FT_UINT32, BASE_DEC, NULL, 0, @@ -100351,6 +106189,14 @@ proto_register_nr_rrc(void) { { "NAICS-Capability-Entry", "nr-rrc.NAICS_Capability_Entry_element", FT_NONE, BASE_NONE, NULL, 0, NULL, HFILL }}, + { &hf_nr_rrc_tdd_PCellUL_TX_AllUL_Subframe_r16, + { "tdd-PCellUL-TX-AllUL-Subframe-r16", "nr-rrc.tdd_PCellUL_TX_AllUL_Subframe_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_tdd_PCellUL_TX_AllUL_Subframe_r16_vals), 0, + NULL, HFILL }}, + { &hf_nr_rrc_fdd_PCellUL_TX_AllUL_Subframe_r16, + { "fdd-PCellUL-TX-AllUL-Subframe-r16", "nr-rrc.fdd_PCellUL_TX_AllUL_Subframe_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_fdd_PCellUL_TX_AllUL_Subframe_r16_vals), 0, + NULL, HFILL }}, { &hf_nr_rrc_numberOfNAICS_CapableCC, { "numberOfNAICS-CapableCC", "nr-rrc.numberOfNAICS_CapableCC", FT_UINT32, BASE_DEC, NULL, 0, @@ -100451,10 +106297,10 @@ proto_register_nr_rrc(void) { { "supportedBandCombinationList-v1610", "nr-rrc.supportedBandCombinationList_v1610", FT_UINT32, BASE_DEC, NULL, 0, "BandCombinationList_v1610", HFILL }}, - { &hf_nr_rrc_supportedBandCombinationListSidelink_r16_01, - { "supportedBandCombinationListSidelink-r16", "nr-rrc.supportedBandCombinationListSidelink_r16_element", - FT_NONE, BASE_NONE, NULL, 0, - "BandCombinationListSidelink_r16", HFILL }}, + { &hf_nr_rrc_supportedBandCombinationListSidelinkEUTRA_NR_r16, + { "supportedBandCombinationListSidelinkEUTRA-NR-r16", "nr-rrc.supportedBandCombinationListSidelinkEUTRA_NR_r16", + FT_UINT32, BASE_DEC, NULL, 0, + "BandCombinationListSidelinkEUTRA_NR_r16", HFILL }}, { &hf_nr_rrc_supportedBandCombinationList_UplinkTxSwitch_r16, { "supportedBandCombinationList-UplinkTxSwitch-r16", "nr-rrc.supportedBandCombinationList_UplinkTxSwitch_r16", FT_UINT32, BASE_DEC, NULL, 0, @@ -100615,8 +106461,8 @@ proto_register_nr_rrc(void) { { "asymmetricBandwidthCombinationSet", "nr-rrc.asymmetricBandwidthCombinationSet", FT_BYTES, BASE_NONE, NULL, 0, "BIT_STRING_SIZE_1_32", HFILL }}, - { &hf_nr_rrc_unlicensedParametersPerBand_r16, - { "unlicensedParametersPerBand-r16", "nr-rrc.unlicensedParametersPerBand_r16_element", + { &hf_nr_rrc_sharedSpectrumChAccessParamsPerBand_r16, + { "sharedSpectrumChAccessParamsPerBand-r16", "nr-rrc.sharedSpectrumChAccessParamsPerBand_r16_element", FT_NONE, BASE_NONE, NULL, 0, NULL, HFILL }}, { &hf_nr_rrc_cancelOverlappingPUSCH_r16, @@ -100643,9 +106489,9 @@ proto_register_nr_rrc(void) { { "pdsch-MappingTypeB-Alt-r16", "nr-rrc.pdsch_MappingTypeB_Alt_r16", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_pdsch_MappingTypeB_Alt_r16_vals), 0, "T_pdsch_MappingTypeB_Alt_r16", HFILL }}, - { &hf_nr_rrc_oneShotPeriodicTRS_r16, - { "oneShotPeriodicTRS-r16", "nr-rrc.oneShotPeriodicTRS_r16", - FT_UINT32, BASE_DEC, VALS(nr_rrc_T_oneShotPeriodicTRS_r16_vals), 0, + { &hf_nr_rrc_oneSlotPeriodicTRS_r16, + { "oneSlotPeriodicTRS-r16", "nr-rrc.oneSlotPeriodicTRS_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_oneSlotPeriodicTRS_r16_vals), 0, NULL, HFILL }}, { &hf_nr_rrc_olpc_SRS_Pos_r16, { "olpc-SRS-Pos-r16", "nr-rrc.olpc_SRS_Pos_r16_element", @@ -100655,10 +106501,10 @@ proto_register_nr_rrc(void) { { "spatialRelationsSRS-Pos-r16", "nr-rrc.spatialRelationsSRS_Pos_r16_element", FT_NONE, BASE_NONE, NULL, 0, NULL, HFILL }}, - { &hf_nr_rrc_simul_SRS_Trans_IntraBandCA_r16, - { "simul-SRS-Trans-IntraBandCA-r16", "nr-rrc.simul_SRS_Trans_IntraBandCA_r16", - FT_UINT32, BASE_DEC, NULL, 0, - "INTEGER_1_2", HFILL }}, + { &hf_nr_rrc_simulSRS_MIMO_TransWithinBand_r16, + { "simulSRS-MIMO-TransWithinBand-r16", "nr-rrc.simulSRS_MIMO_TransWithinBand_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_simulSRS_MIMO_TransWithinBand_r16_vals), 0, + NULL, HFILL }}, { &hf_nr_rrc_channelBW_DL_IAB_r16, { "channelBW-DL-IAB-r16", "nr-rrc.channelBW_DL_IAB_r16", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_channelBW_DL_IAB_r16_vals), 0, @@ -100731,6 +106577,70 @@ proto_register_nr_rrc(void) { { "ue-PowerClass-v1610", "nr-rrc.ue_PowerClass_v1610", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_ue_PowerClass_v1610_vals), 0, NULL, HFILL }}, + { &hf_nr_rrc_condHandover_r16, + { "condHandover-r16", "nr-rrc.condHandover_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_condHandover_r16_vals), 0, + NULL, HFILL }}, + { &hf_nr_rrc_condHandoverFailure_r16, + { "condHandoverFailure-r16", "nr-rrc.condHandoverFailure_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_condHandoverFailure_r16_vals), 0, + NULL, HFILL }}, + { &hf_nr_rrc_condHandoverTwoTriggerEvents_r16, + { "condHandoverTwoTriggerEvents-r16", "nr-rrc.condHandoverTwoTriggerEvents_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_condHandoverTwoTriggerEvents_r16_vals), 0, + NULL, HFILL }}, + { &hf_nr_rrc_condPSCellChange_r16, + { "condPSCellChange-r16", "nr-rrc.condPSCellChange_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_condPSCellChange_r16_vals), 0, + NULL, HFILL }}, + { &hf_nr_rrc_condPSCellChangeTwoTriggerEvents_r16, + { "condPSCellChangeTwoTriggerEvents-r16", "nr-rrc.condPSCellChangeTwoTriggerEvents_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_condPSCellChangeTwoTriggerEvents_r16_vals), 0, + NULL, HFILL }}, + { &hf_nr_rrc_mpr_PowerBoost_FR2_r16_01, + { "mpr-PowerBoost-FR2-r16", "nr-rrc.mpr_PowerBoost_FR2_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_mpr_PowerBoost_FR2_r16_01_vals), 0, + "T_mpr_PowerBoost_FR2_r16_01", HFILL }}, + { &hf_nr_rrc_activeConfiguredGrant_r16, + { "activeConfiguredGrant-r16", "nr-rrc.activeConfiguredGrant_r16_element", + FT_NONE, BASE_NONE, NULL, 0, + "T_activeConfiguredGrant_r16", HFILL }}, + { &hf_nr_rrc_maxNumberConfigsPerBWP_r16, + { "maxNumberConfigsPerBWP-r16", "nr-rrc.maxNumberConfigsPerBWP_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_maxNumberConfigsPerBWP_r16_vals), 0, + NULL, HFILL }}, + { &hf_nr_rrc_maxNumberConfigsAllCC_r16, + { "maxNumberConfigsAllCC-r16", "nr-rrc.maxNumberConfigsAllCC_r16", + FT_UINT32, BASE_DEC, NULL, 0, + "INTEGER_2_32", HFILL }}, + { &hf_nr_rrc_jointReleaseConfiguredGrantType2_r16, + { "jointReleaseConfiguredGrantType2-r16", "nr-rrc.jointReleaseConfiguredGrantType2_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_jointReleaseConfiguredGrantType2_r16_vals), 0, + NULL, HFILL }}, + { &hf_nr_rrc_sps_r16, + { "sps-r16", "nr-rrc.sps_r16_element", + FT_NONE, BASE_NONE, NULL, 0, + NULL, HFILL }}, + { &hf_nr_rrc_maxNumberConfigsPerBWP_r16_01, + { "maxNumberConfigsPerBWP-r16", "nr-rrc.maxNumberConfigsPerBWP_r16", + FT_UINT32, BASE_DEC, NULL, 0, + "INTEGER_1_8", HFILL }}, + { &hf_nr_rrc_jointReleaseSPS_r16, + { "jointReleaseSPS-r16", "nr-rrc.jointReleaseSPS_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_jointReleaseSPS_r16_vals), 0, + NULL, HFILL }}, + { &hf_nr_rrc_simulSRS_TransWithinBand_r16, + { "simulSRS-TransWithinBand-r16", "nr-rrc.simulSRS_TransWithinBand_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_simulSRS_TransWithinBand_r16_vals), 0, + NULL, HFILL }}, + { &hf_nr_rrc_trs_AdditionalBandwidth_r16, + { "trs-AdditionalBandwidth-r16", "nr-rrc.trs_AdditionalBandwidth_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_trs_AdditionalBandwidth_r16_vals), 0, + NULL, HFILL }}, + { &hf_nr_rrc_handoverIntraF_IAB_r16, + { "handoverIntraF-IAB-r16", "nr-rrc.handoverIntraF_IAB_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_handoverIntraF_IAB_r16_vals), 0, + NULL, HFILL }}, { &hf_nr_rrc_srs_SwitchingTimeRequested_01, { "srs-SwitchingTimeRequested", "nr-rrc.srs_SwitchingTimeRequested", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_srs_SwitchingTimeRequested_01_vals), 0, @@ -100815,6 +106725,14 @@ proto_register_nr_rrc(void) { { "tdd-Add-UE-Sidelink-Capabilities-r16", "nr-rrc.tdd_Add_UE_Sidelink_Capabilities_r16_element", FT_NONE, BASE_NONE, NULL, 0, "UE_SidelinkCapabilityAddXDD_Mode_r16", HFILL }}, + { &hf_nr_rrc_supportedBandListSidelink_r16, + { "supportedBandListSidelink-r16", "nr-rrc.supportedBandListSidelink_r16", + FT_UINT32, BASE_DEC, NULL, 0, + "SEQUENCE_SIZE_1_maxBands_OF_BandSidelink_r16", HFILL }}, + { &hf_nr_rrc_supportedBandListSidelink_r16_item, + { "BandSidelink-r16", "nr-rrc.BandSidelink_r16_element", + FT_NONE, BASE_NONE, NULL, 0, + NULL, HFILL }}, { &hf_nr_rrc_sl_ParametersEUTRA1_r16, { "sl-ParametersEUTRA1-r16", "nr-rrc.sl_ParametersEUTRA1_r16", FT_BYTES, BASE_NONE, NULL, 0, @@ -100883,6 +106801,118 @@ proto_register_nr_rrc(void) { { "gnb-ScheduledMode4SidelinkEUTRA-r16", "nr-rrc.gnb_ScheduledMode4SidelinkEUTRA_r16", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_gnb_ScheduledMode4SidelinkEUTRA_r16_vals), 0, NULL, HFILL }}, + { &hf_nr_rrc_sl_Reception_r16, + { "sl-Reception-r16", "nr-rrc.sl_Reception_r16_element", + FT_NONE, BASE_NONE, NULL, 0, + NULL, HFILL }}, + { &hf_nr_rrc_harq_RxProcessSidelink_r16, + { "harq-RxProcessSidelink-r16", "nr-rrc.harq_RxProcessSidelink_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_harq_RxProcessSidelink_r16_vals), 0, + NULL, HFILL }}, + { &hf_nr_rrc_pscch_RxSidelink_r16, + { "pscch-RxSidelink-r16", "nr-rrc.pscch_RxSidelink_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_pscch_RxSidelink_r16_vals), 0, + NULL, HFILL }}, + { &hf_nr_rrc_scs_CP_PatternRxSidelink_r16, + { "scs-CP-PatternRxSidelink-r16", "nr-rrc.scs_CP_PatternRxSidelink_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_scs_CP_PatternRxSidelink_r16_vals), 0, + NULL, HFILL }}, + { &hf_nr_rrc_fr1_r16, + { "fr1-r16", "nr-rrc.fr1_r16_element", + FT_NONE, BASE_NONE, NULL, 0, + NULL, HFILL }}, + { &hf_nr_rrc_scs_15kHz_r16_02, + { "scs-15kHz-r16", "nr-rrc.scs_15kHz_r16", + FT_BYTES, BASE_NONE, NULL, 0, + "BIT_STRING_SIZE_16", HFILL }}, + { &hf_nr_rrc_scs_30kHz_r16_02, + { "scs-30kHz-r16", "nr-rrc.scs_30kHz_r16", + FT_BYTES, BASE_NONE, NULL, 0, + "BIT_STRING_SIZE_16", HFILL }}, + { &hf_nr_rrc_scs_60kHz_r16_02, + { "scs-60kHz-r16", "nr-rrc.scs_60kHz_r16", + FT_BYTES, BASE_NONE, NULL, 0, + "BIT_STRING_SIZE_16", HFILL }}, + { &hf_nr_rrc_fr2_r16, + { "fr2-r16", "nr-rrc.fr2_r16_element", + FT_NONE, BASE_NONE, NULL, 0, + NULL, HFILL }}, + { &hf_nr_rrc_scs_120kHz_r16_02, + { "scs-120kHz-r16", "nr-rrc.scs_120kHz_r16", + FT_BYTES, BASE_NONE, NULL, 0, + "BIT_STRING_SIZE_16", HFILL }}, + { &hf_nr_rrc_extendedCP_RxSidelink_r16, + { "extendedCP-RxSidelink-r16", "nr-rrc.extendedCP_RxSidelink_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_extendedCP_RxSidelink_r16_vals), 0, + NULL, HFILL }}, + { &hf_nr_rrc_sl_TransmissionMode1_r16, + { "sl-TransmissionMode1-r16", "nr-rrc.sl_TransmissionMode1_r16_element", + FT_NONE, BASE_NONE, NULL, 0, + NULL, HFILL }}, + { &hf_nr_rrc_harq_TxProcessModeOneSidelink_r16, + { "harq-TxProcessModeOneSidelink-r16", "nr-rrc.harq_TxProcessModeOneSidelink_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_harq_TxProcessModeOneSidelink_r16_vals), 0, + NULL, HFILL }}, + { &hf_nr_rrc_scs_CP_PatternTxSidelinkModeOne_r16, + { "scs-CP-PatternTxSidelinkModeOne-r16", "nr-rrc.scs_CP_PatternTxSidelinkModeOne_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_scs_CP_PatternTxSidelinkModeOne_r16_vals), 0, + NULL, HFILL }}, + { &hf_nr_rrc_fr1_r16_01, + { "fr1-r16", "nr-rrc.fr1_r16_element", + FT_NONE, BASE_NONE, NULL, 0, + "T_fr1_r16_01", HFILL }}, + { &hf_nr_rrc_fr2_r16_01, + { "fr2-r16", "nr-rrc.fr2_r16_element", + FT_NONE, BASE_NONE, NULL, 0, + "T_fr2_r16_01", HFILL }}, + { &hf_nr_rrc_extendedCP_TxSidelink_r16, + { "extendedCP-TxSidelink-r16", "nr-rrc.extendedCP_TxSidelink_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_extendedCP_TxSidelink_r16_vals), 0, + NULL, HFILL }}, + { &hf_nr_rrc_harq_ReportOnPUCCH_r16, + { "harq-ReportOnPUCCH-r16", "nr-rrc.harq_ReportOnPUCCH_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_harq_ReportOnPUCCH_r16_vals), 0, + NULL, HFILL }}, + { &hf_nr_rrc_sync_Sidelink_r16, + { "sync-Sidelink-r16", "nr-rrc.sync_Sidelink_r16_element", + FT_NONE, BASE_NONE, NULL, 0, + NULL, HFILL }}, + { &hf_nr_rrc_gNB_Sync_r16, + { "gNB-Sync-r16", "nr-rrc.gNB_Sync_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_gNB_Sync_r16_vals), 0, + NULL, HFILL }}, + { &hf_nr_rrc_gNB_GNSS_UE_SyncWithPriorityOnGNB_ENB_r16, + { "gNB-GNSS-UE-SyncWithPriorityOnGNB-ENB-r16", "nr-rrc.gNB_GNSS_UE_SyncWithPriorityOnGNB_ENB_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_gNB_GNSS_UE_SyncWithPriorityOnGNB_ENB_r16_vals), 0, + NULL, HFILL }}, + { &hf_nr_rrc_gNB_GNSS_UE_SyncWithPriorityOnGNSS_r16, + { "gNB-GNSS-UE-SyncWithPriorityOnGNSS-r16", "nr-rrc.gNB_GNSS_UE_SyncWithPriorityOnGNSS_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_gNB_GNSS_UE_SyncWithPriorityOnGNSS_r16_vals), 0, + NULL, HFILL }}, + { &hf_nr_rrc_sl_Tx_256QAM_r16, + { "sl-Tx-256QAM-r16", "nr-rrc.sl_Tx_256QAM_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_sl_Tx_256QAM_r16_vals), 0, + NULL, HFILL }}, + { &hf_nr_rrc_psfch_FormatZeroSidelink_r16, + { "psfch-FormatZeroSidelink-r16", "nr-rrc.psfch_FormatZeroSidelink_r16_element", + FT_NONE, BASE_NONE, NULL, 0, + NULL, HFILL }}, + { &hf_nr_rrc_psfch_RxNumber, + { "psfch-RxNumber", "nr-rrc.psfch_RxNumber", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_psfch_RxNumber_vals), 0, + NULL, HFILL }}, + { &hf_nr_rrc_psfch_TxNumber, + { "psfch-TxNumber", "nr-rrc.psfch_TxNumber", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_psfch_TxNumber_vals), 0, + NULL, HFILL }}, + { &hf_nr_rrc_lowSE_64QAM_MCS_TableSidelink_r16, + { "lowSE-64QAM-MCS-TableSidelink-r16", "nr-rrc.lowSE_64QAM_MCS_TableSidelink_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_lowSE_64QAM_MCS_TableSidelink_r16_vals), 0, + NULL, HFILL }}, + { &hf_nr_rrc_enb_sync_Sidelink_r16, + { "enb-sync-Sidelink-r16", "nr-rrc.enb_sync_Sidelink_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_enb_sync_Sidelink_r16_vals), 0, + NULL, HFILL }}, { &hf_nr_rrc_rach_Report_r16, { "rach-Report-r16", "nr-rrc.rach_Report_r16", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_rach_Report_r16_vals), 0, @@ -101023,10 +107053,10 @@ proto_register_nr_rrc(void) { { "type1-MultiPanel-r16", "nr-rrc.type1_MultiPanel_r16", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_type1_MultiPanel_r16_01_vals), 0, "T_type1_MultiPanel_r16_01", HFILL }}, - { &hf_nr_rrc_type2_r16_01, + { &hf_nr_rrc_type2_r16_02, { "type2-r16", "nr-rrc.type2_r16", - FT_UINT32, BASE_DEC, VALS(nr_rrc_T_type2_r16_01_vals), 0, - "T_type2_r16_01", HFILL }}, + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_type2_r16_02_vals), 0, + "T_type2_r16_02", HFILL }}, { &hf_nr_rrc_type2_PortSelection_r16_01, { "type2-PortSelection-r16", "nr-rrc.type2_PortSelection_r16", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_type2_PortSelection_r16_01_vals), 0, @@ -101039,7 +107069,7 @@ proto_register_nr_rrc(void) { { "frequencyBandListFilter", "nr-rrc.frequencyBandListFilter", FT_UINT32, BASE_DEC, NULL, 0, "FreqBandList", HFILL }}, - { &hf_nr_rrc_nonCriticalExtension_83, + { &hf_nr_rrc_nonCriticalExtension_85, { "nonCriticalExtension", "nr-rrc.nonCriticalExtension_element", FT_NONE, BASE_NONE, NULL, 0, "UE_CapabilityRequestFilterNR_v1540", HFILL }}, @@ -101047,7 +107077,7 @@ proto_register_nr_rrc(void) { { "srs-SwitchingTimeRequest", "nr-rrc.srs_SwitchingTimeRequest", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_srs_SwitchingTimeRequest_vals), 0, NULL, HFILL }}, - { &hf_nr_rrc_nonCriticalExtension_84, + { &hf_nr_rrc_nonCriticalExtension_86, { "nonCriticalExtension", "nr-rrc.nonCriticalExtension_element", FT_NONE, BASE_NONE, NULL, 0, "T_nonCriticalExtension_49", HFILL }}, @@ -101095,7 +107125,7 @@ proto_register_nr_rrc(void) { { "pdcp-ParametersMRDC-v1530", "nr-rrc.pdcp_ParametersMRDC_v1530_element", FT_NONE, BASE_NONE, NULL, 0, "PDCP_ParametersMRDC", HFILL }}, - { &hf_nr_rrc_nonCriticalExtension_85, + { &hf_nr_rrc_nonCriticalExtension_87, { "nonCriticalExtension", "nr-rrc.nonCriticalExtension_element", FT_NONE, BASE_NONE, NULL, 0, "UE_MRDC_Capability_v1560", HFILL }}, @@ -101115,7 +107145,7 @@ proto_register_nr_rrc(void) { { "tdd-Add-UE-MRDC-Capabilities-v1560", "nr-rrc.tdd_Add_UE_MRDC_Capabilities_v1560_element", FT_NONE, BASE_NONE, NULL, 0, "UE_MRDC_CapabilityAddXDD_Mode_v1560", HFILL }}, - { &hf_nr_rrc_nonCriticalExtension_86, + { &hf_nr_rrc_nonCriticalExtension_88, { "nonCriticalExtension", "nr-rrc.nonCriticalExtension_element", FT_NONE, BASE_NONE, NULL, 0, "UE_MRDC_Capability_v1610", HFILL }}, @@ -101131,7 +107161,7 @@ proto_register_nr_rrc(void) { { "pdcp-ParametersMRDC-v1610", "nr-rrc.pdcp_ParametersMRDC_v1610_element", FT_NONE, BASE_NONE, NULL, 0, NULL, HFILL }}, - { &hf_nr_rrc_nonCriticalExtension_87, + { &hf_nr_rrc_nonCriticalExtension_89, { "nonCriticalExtension", "nr-rrc.nonCriticalExtension_element", FT_NONE, BASE_NONE, NULL, 0, "T_nonCriticalExtension_50", HFILL }}, @@ -101207,7 +107237,7 @@ proto_register_nr_rrc(void) { { "featureSets", "nr-rrc.featureSets_element", FT_NONE, BASE_NONE, NULL, 0, NULL, HFILL }}, - { &hf_nr_rrc_nonCriticalExtension_88, + { &hf_nr_rrc_nonCriticalExtension_90, { "nonCriticalExtension", "nr-rrc.nonCriticalExtension_element", FT_NONE, BASE_NONE, NULL, 0, "UE_NR_Capability_v1530", HFILL }}, @@ -101235,7 +107265,7 @@ proto_register_nr_rrc(void) { { "delayBudgetReporting", "nr-rrc.delayBudgetReporting", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_delayBudgetReporting_vals), 0, NULL, HFILL }}, - { &hf_nr_rrc_nonCriticalExtension_89, + { &hf_nr_rrc_nonCriticalExtension_91, { "nonCriticalExtension", "nr-rrc.nonCriticalExtension_element", FT_NONE, BASE_NONE, NULL, 0, "UE_NR_Capability_v1540", HFILL }}, @@ -101263,7 +107293,7 @@ proto_register_nr_rrc(void) { { "fr1-fr2-Add-UE-NR-Capabilities", "nr-rrc.fr1_fr2_Add_UE_NR_Capabilities_element", FT_NONE, BASE_NONE, NULL, 0, "UE_NR_CapabilityAddFRX_Mode", HFILL }}, - { &hf_nr_rrc_nonCriticalExtension_90, + { &hf_nr_rrc_nonCriticalExtension_92, { "nonCriticalExtension", "nr-rrc.nonCriticalExtension_element", FT_NONE, BASE_NONE, NULL, 0, "UE_NR_Capability_v1550", HFILL }}, @@ -101271,7 +107301,7 @@ proto_register_nr_rrc(void) { { "reducedCP-Latency", "nr-rrc.reducedCP_Latency", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_reducedCP_Latency_vals), 0, NULL, HFILL }}, - { &hf_nr_rrc_nonCriticalExtension_91, + { &hf_nr_rrc_nonCriticalExtension_93, { "nonCriticalExtension", "nr-rrc.nonCriticalExtension_element", FT_NONE, BASE_NONE, NULL, 0, "UE_NR_Capability_v1560", HFILL }}, @@ -101283,7 +107313,7 @@ proto_register_nr_rrc(void) { { "receivedFilters", "nr-rrc.receivedFilters", FT_BYTES, BASE_NONE, NULL, 0, "T_receivedFilters_01", HFILL }}, - { &hf_nr_rrc_nonCriticalExtension_92, + { &hf_nr_rrc_nonCriticalExtension_94, { "nonCriticalExtension", "nr-rrc.nonCriticalExtension_element", FT_NONE, BASE_NONE, NULL, 0, "UE_NR_Capability_v1570", HFILL }}, @@ -101291,7 +107321,7 @@ proto_register_nr_rrc(void) { { "nrdc-Parameters-v1570", "nr-rrc.nrdc_Parameters_v1570_element", FT_NONE, BASE_NONE, NULL, 0, NULL, HFILL }}, - { &hf_nr_rrc_nonCriticalExtension_93, + { &hf_nr_rrc_nonCriticalExtension_95, { "nonCriticalExtension", "nr-rrc.nonCriticalExtension_element", FT_NONE, BASE_NONE, NULL, 0, "UE_NR_Capability_v1610", HFILL }}, @@ -101375,7 +107405,7 @@ proto_register_nr_rrc(void) { { "onDemandSIB-Connected-r16", "nr-rrc.onDemandSIB_Connected_r16", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_onDemandSIB_Connected_r16_vals), 0, NULL, HFILL }}, - { &hf_nr_rrc_nonCriticalExtension_94, + { &hf_nr_rrc_nonCriticalExtension_96, { "nonCriticalExtension", "nr-rrc.nonCriticalExtension_element", FT_NONE, BASE_NONE, NULL, 0, "T_nonCriticalExtension_51", HFILL }}, @@ -101387,6 +107417,42 @@ proto_register_nr_rrc(void) { { "flowControlRouting-ID-Based-r16", "nr-rrc.flowControlRouting_ID_Based_r16", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_flowControlRouting_ID_Based_r16_vals), 0, NULL, HFILL }}, + { &hf_nr_rrc_ul_DynamicChAccess_r16, + { "ul-DynamicChAccess-r16", "nr-rrc.ul_DynamicChAccess_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_ul_DynamicChAccess_r16_vals), 0, + NULL, HFILL }}, + { &hf_nr_rrc_ul_Semi_StaticChAccess_r16, + { "ul-Semi-StaticChAccess-r16", "nr-rrc.ul_Semi_StaticChAccess_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_ul_Semi_StaticChAccess_r16_vals), 0, + NULL, HFILL }}, + { &hf_nr_rrc_ssb_RRM_DynamicChAccess_r16, + { "ssb-RRM-DynamicChAccess-r16", "nr-rrc.ssb_RRM_DynamicChAccess_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_ssb_RRM_DynamicChAccess_r16_vals), 0, + NULL, HFILL }}, + { &hf_nr_rrc_ssb_RRM_Semi_StaticChAccess_r16, + { "ssb-RRM-Semi-StaticChAccess-r16", "nr-rrc.ssb_RRM_Semi_StaticChAccess_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_ssb_RRM_Semi_StaticChAccess_r16_vals), 0, + NULL, HFILL }}, + { &hf_nr_rrc_mib_Acquisition_r16, + { "mib-Acquisition-r16", "nr-rrc.mib_Acquisition_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_mib_Acquisition_r16_vals), 0, + NULL, HFILL }}, + { &hf_nr_rrc_ssb_RLM_DynamicChAccess_r16, + { "ssb-RLM-DynamicChAccess-r16", "nr-rrc.ssb_RLM_DynamicChAccess_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_ssb_RLM_DynamicChAccess_r16_vals), 0, + NULL, HFILL }}, + { &hf_nr_rrc_ssb_RLM_Semi_StaticChAccess_r16, + { "ssb-RLM-Semi-StaticChAccess-r16", "nr-rrc.ssb_RLM_Semi_StaticChAccess_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_ssb_RLM_Semi_StaticChAccess_r16_vals), 0, + NULL, HFILL }}, + { &hf_nr_rrc_sib1_Acquisition_r16, + { "sib1-Acquisition-r16", "nr-rrc.sib1_Acquisition_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_sib1_Acquisition_r16_vals), 0, + NULL, HFILL }}, + { &hf_nr_rrc_extendedRAR_Window_r16, + { "extendedRAR-Window-r16", "nr-rrc.extendedRAR_Window_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_extendedRAR_Window_r16_vals), 0, + NULL, HFILL }}, { &hf_nr_rrc_ssb_BFD_CBD_dynamicChannelAccess_r16, { "ssb-BFD-CBD-dynamicChannelAccess-r16", "nr-rrc.ssb_BFD_CBD_dynamicChannelAccess_r16", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_ssb_BFD_CBD_dynamicChannelAccess_r16_vals), 0, @@ -101399,6 +107465,10 @@ proto_register_nr_rrc(void) { { "csi-RS-BFD-CBD-r16", "nr-rrc.csi_RS_BFD_CBD_r16", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_csi_RS_BFD_CBD_r16_vals), 0, NULL, HFILL }}, + { &hf_nr_rrc_ul_ChannelBW_SCell_10mhz_r16, + { "ul-ChannelBW-SCell-10mhz-r16", "nr-rrc.ul_ChannelBW_SCell_10mhz_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_ul_ChannelBW_SCell_10mhz_r16_vals), 0, + NULL, HFILL }}, { &hf_nr_rrc_rssi_ChannelOccupancyReporting_r16, { "rssi-ChannelOccupancyReporting-r16", "nr-rrc.rssi_ChannelOccupancyReporting_r16", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_rssi_ChannelOccupancyReporting_r16_vals), 0, @@ -101423,6 +107493,18 @@ proto_register_nr_rrc(void) { { "configuredUL-Tx-r16", "nr-rrc.configuredUL_Tx_r16", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_configuredUL_Tx_r16_vals), 0, NULL, HFILL }}, + { &hf_nr_rrc_prach_Wideband_r16, + { "prach-Wideband-r16", "nr-rrc.prach_Wideband_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_prach_Wideband_r16_vals), 0, + NULL, HFILL }}, + { &hf_nr_rrc_dci_AvailableRB_Set_r16, + { "dci-AvailableRB-Set-r16", "nr-rrc.dci_AvailableRB_Set_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_dci_AvailableRB_Set_r16_vals), 0, + "T_dci_AvailableRB_Set_r16", HFILL }}, + { &hf_nr_rrc_dci_ChOccupancyDuration_r16, + { "dci-ChOccupancyDuration-r16", "nr-rrc.dci_ChOccupancyDuration_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_dci_ChOccupancyDuration_r16_vals), 0, + NULL, HFILL }}, { &hf_nr_rrc_typeB_PDSCH_length_r16, { "typeB-PDSCH-length-r16", "nr-rrc.typeB_PDSCH_length_r16", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_typeB_PDSCH_length_r16_vals), 0, @@ -101459,9 +107541,13 @@ proto_register_nr_rrc(void) { { "csi-RS-RLM-r16", "nr-rrc.csi_RS_RLM_r16", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_csi_RS_RLM_r16_vals), 0, NULL, HFILL }}, - { &hf_nr_rrc_vcsi_RS_RRM_r16, - { "vcsi-RS-RRM-r16", "nr-rrc.vcsi_RS_RRM_r16", - FT_UINT32, BASE_DEC, VALS(nr_rrc_T_vcsi_RS_RRM_r16_vals), 0, + { &hf_nr_rrc_csi_RS_RRM_r16, + { "csi-RS-RRM-r16", "nr-rrc.csi_RS_RRM_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_csi_RS_RRM_r16_vals), 0, + NULL, HFILL }}, + { &hf_nr_rrc_periodicAndSemi_PersistentCSI_RS_r16, + { "periodicAndSemi-PersistentCSI-RS-r16", "nr-rrc.periodicAndSemi_PersistentCSI_RS_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_periodicAndSemi_PersistentCSI_RS_r16_vals), 0, NULL, HFILL }}, { &hf_nr_rrc_pusch_PRB_interlace_r16, { "pusch-PRB-interlace-r16", "nr-rrc.pusch_PRB_interlace_r16", @@ -101483,6 +107569,14 @@ proto_register_nr_rrc(void) { { "configuredGrantWithReTx-r16", "nr-rrc.configuredGrantWithReTx_r16", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_configuredGrantWithReTx_r16_vals), 0, NULL, HFILL }}, + { &hf_nr_rrc_ed_Threshold_r16, + { "ed-Threshold-r16", "nr-rrc.ed_Threshold_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_ed_Threshold_r16_vals), 0, + NULL, HFILL }}, + { &hf_nr_rrc_ul_DL_COT_Sharing_r16, + { "ul-DL-COT-Sharing-r16", "nr-rrc.ul_DL_COT_Sharing_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_ul_DL_COT_Sharing_r16_vals), 0, + "T_ul_DL_COT_Sharing_r16", HFILL }}, { &hf_nr_rrc_mux_CG_UCI_HARQ_ACK_r16, { "mux-CG-UCI-HARQ-ACK-r16", "nr-rrc.mux_CG_UCI_HARQ_ACK_r16", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_mux_CG_UCI_HARQ_ACK_r16_vals), 0, @@ -101675,7 +107769,7 @@ proto_register_nr_rrc(void) { { "delayBudgetReportingConfig", "nr-rrc.delayBudgetReportingConfig", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_delayBudgetReportingConfig_vals), 0, NULL, HFILL }}, - { &hf_nr_rrc_setup_109, + { &hf_nr_rrc_setup_110, { "setup", "nr-rrc.setup_element", FT_NONE, BASE_NONE, NULL, 0, NULL, HFILL }}, @@ -101687,7 +107781,7 @@ proto_register_nr_rrc(void) { { "overheatingAssistanceConfig", "nr-rrc.overheatingAssistanceConfig", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_overheatingAssistanceConfig_vals), 0, NULL, HFILL }}, - { &hf_nr_rrc_setup_110, + { &hf_nr_rrc_setup_111, { "setup", "nr-rrc.setup_element", FT_NONE, BASE_NONE, NULL, 0, "OverheatingAssistanceConfig", HFILL }}, @@ -101699,7 +107793,7 @@ proto_register_nr_rrc(void) { { "idc-AssistanceConfig-r16", "nr-rrc.idc_AssistanceConfig_r16", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_idc_AssistanceConfig_r16_vals), 0, NULL, HFILL }}, - { &hf_nr_rrc_setup_111, + { &hf_nr_rrc_setup_112, { "setup", "nr-rrc.setup_element", FT_NONE, BASE_NONE, NULL, 0, "IDC_AssistanceConfig_r16", HFILL }}, @@ -101707,7 +107801,7 @@ proto_register_nr_rrc(void) { { "drx-PreferenceConfig-r16", "nr-rrc.drx_PreferenceConfig_r16", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_drx_PreferenceConfig_r16_vals), 0, NULL, HFILL }}, - { &hf_nr_rrc_setup_112, + { &hf_nr_rrc_setup_113, { "setup", "nr-rrc.setup_element", FT_NONE, BASE_NONE, NULL, 0, "DRX_PreferenceConfig_r16", HFILL }}, @@ -101715,7 +107809,7 @@ proto_register_nr_rrc(void) { { "maxBW-PreferenceConfig-r16", "nr-rrc.maxBW_PreferenceConfig_r16", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_maxBW_PreferenceConfig_r16_vals), 0, NULL, HFILL }}, - { &hf_nr_rrc_setup_113, + { &hf_nr_rrc_setup_114, { "setup", "nr-rrc.setup_element", FT_NONE, BASE_NONE, NULL, 0, "MaxBW_PreferenceConfig_r16", HFILL }}, @@ -101723,7 +107817,7 @@ proto_register_nr_rrc(void) { { "maxCC-PreferenceConfig-r16", "nr-rrc.maxCC_PreferenceConfig_r16", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_maxCC_PreferenceConfig_r16_vals), 0, NULL, HFILL }}, - { &hf_nr_rrc_setup_114, + { &hf_nr_rrc_setup_115, { "setup", "nr-rrc.setup_element", FT_NONE, BASE_NONE, NULL, 0, "MaxCC_PreferenceConfig_r16", HFILL }}, @@ -101731,7 +107825,7 @@ proto_register_nr_rrc(void) { { "maxMIMO-LayerPreferenceConfig-r16", "nr-rrc.maxMIMO_LayerPreferenceConfig_r16", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_maxMIMO_LayerPreferenceConfig_r16_vals), 0, NULL, HFILL }}, - { &hf_nr_rrc_setup_115, + { &hf_nr_rrc_setup_116, { "setup", "nr-rrc.setup_element", FT_NONE, BASE_NONE, NULL, 0, "MaxMIMO_LayerPreferenceConfig_r16", HFILL }}, @@ -101739,7 +107833,7 @@ proto_register_nr_rrc(void) { { "minSchedulingOffsetPreferenceConfig-r16", "nr-rrc.minSchedulingOffsetPreferenceConfig_r16", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_minSchedulingOffsetPreferenceConfig_r16_vals), 0, NULL, HFILL }}, - { &hf_nr_rrc_setup_116, + { &hf_nr_rrc_setup_117, { "setup", "nr-rrc.setup_element", FT_NONE, BASE_NONE, NULL, 0, "MinSchedulingOffsetPreferenceConfig_r16", HFILL }}, @@ -101747,7 +107841,7 @@ proto_register_nr_rrc(void) { { "releasePreferenceConfig-r16", "nr-rrc.releasePreferenceConfig_r16", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_releasePreferenceConfig_r16_vals), 0, NULL, HFILL }}, - { &hf_nr_rrc_setup_117, + { &hf_nr_rrc_setup_118, { "setup", "nr-rrc.setup_element", FT_NONE, BASE_NONE, NULL, 0, "ReleasePreferenceConfig_r16", HFILL }}, @@ -101859,10 +107953,10 @@ proto_register_nr_rrc(void) { { "nr-CellId-r16", "nr-rrc.nr_CellId_r16", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_nr_CellId_r16_vals), 0, NULL, HFILL }}, - { &hf_nr_rrc_pci_arfcn_r16_02, + { &hf_nr_rrc_pci_arfcn_r16_03, { "pci-arfcn-r16", "nr-rrc.pci_arfcn_r16_element", FT_NONE, BASE_NONE, NULL, 0, - "T_pci_arfcn_r16_02", HFILL }}, + "T_pci_arfcn_r16_03", HFILL }}, { &hf_nr_rrc_eutra_CellId_r16, { "eutra-CellId-r16", "nr-rrc.eutra_CellId_r16", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_eutra_CellId_r16_vals), 0, @@ -101871,10 +107965,10 @@ proto_register_nr_rrc(void) { { "cellGlobalId-r16", "nr-rrc.cellGlobalId_r16_element", FT_NONE, BASE_NONE, NULL, 0, "CGI_InfoEUTRA", HFILL }}, - { &hf_nr_rrc_pci_arfcn_r16_03, + { &hf_nr_rrc_pci_arfcn_r16_04, { "pci-arfcn-r16", "nr-rrc.pci_arfcn_r16_element", FT_NONE, BASE_NONE, NULL, 0, - "T_pci_arfcn_r16_03", HFILL }}, + "T_pci_arfcn_r16_04", HFILL }}, { &hf_nr_rrc_timeSpent_r16, { "timeSpent-r16", "nr-rrc.timeSpent_r16", FT_UINT32, BASE_DEC|BASE_UNIT_STRING, &units_seconds, 0, @@ -101911,7 +108005,7 @@ proto_register_nr_rrc(void) { { "sl-PSBCH-Config-r16", "nr-rrc.sl_PSBCH_Config_r16", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_sl_PSBCH_Config_r16_vals), 0, NULL, HFILL }}, - { &hf_nr_rrc_setup_118, + { &hf_nr_rrc_setup_119, { "setup", "nr-rrc.setup_element", FT_NONE, BASE_NONE, NULL, 0, "SL_PSBCH_Config_r16", HFILL }}, @@ -102059,7 +108153,7 @@ proto_register_nr_rrc(void) { { "sl-ScheduledConfig-r16", "nr-rrc.sl_ScheduledConfig_r16", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_sl_ScheduledConfig_r16_vals), 0, NULL, HFILL }}, - { &hf_nr_rrc_setup_119, + { &hf_nr_rrc_setup_120, { "setup", "nr-rrc.setup_element", FT_NONE, BASE_NONE, NULL, 0, "SL_ScheduledConfig_r16", HFILL }}, @@ -102067,7 +108161,7 @@ proto_register_nr_rrc(void) { { "sl-UE-SelectedConfig-r16", "nr-rrc.sl_UE_SelectedConfig_r16", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_sl_UE_SelectedConfig_r16_vals), 0, NULL, HFILL }}, - { &hf_nr_rrc_setup_120, + { &hf_nr_rrc_setup_121, { "setup", "nr-rrc.setup_element", FT_NONE, BASE_NONE, NULL, 0, "SL_UE_SelectedConfig_r16", HFILL }}, @@ -102115,7 +108209,7 @@ proto_register_nr_rrc(void) { { "sl-CSI-SchedulingRequestId-r16", "nr-rrc.sl_CSI_SchedulingRequestId_r16", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_sl_CSI_SchedulingRequestId_r16_vals), 0, NULL, HFILL }}, - { &hf_nr_rrc_setup_121, + { &hf_nr_rrc_setup_122, { "setup", "nr-rrc.setup", FT_UINT32, BASE_DEC, NULL, 0, "SchedulingRequestId", HFILL }}, @@ -102147,10 +108241,10 @@ proto_register_nr_rrc(void) { { "sl-CG-MaxTransNumList-r16", "nr-rrc.sl_CG_MaxTransNumList_r16", FT_UINT32, BASE_DEC, NULL, 0, NULL, HFILL }}, - { &hf_nr_rrc_rrc_ConfiguredSidelinkGrant, - { "rrc-ConfiguredSidelinkGrant", "nr-rrc.rrc_ConfiguredSidelinkGrant_element", + { &hf_nr_rrc_rrc_ConfiguredSidelinkGrant_r16, + { "rrc-ConfiguredSidelinkGrant-r16", "nr-rrc.rrc_ConfiguredSidelinkGrant_r16_element", FT_NONE, BASE_NONE, NULL, 0, - NULL, HFILL }}, + "T_rrc_ConfiguredSidelinkGrant_r16", HFILL }}, { &hf_nr_rrc_sl_TimeResourceCG_Type1_r16, { "sl-TimeResourceCG-Type1-r16", "nr-rrc.sl_TimeResourceCG_Type1_r16", FT_UINT32, BASE_DEC, NULL, 0, @@ -102175,6 +108269,10 @@ proto_register_nr_rrc(void) { { "sl-PSFCH-ToPUCCH-CG-Type1-r16", "nr-rrc.sl_PSFCH_ToPUCCH_CG_Type1_r16", FT_UINT32, BASE_DEC, NULL, 0, "INTEGER_0_15", HFILL }}, + { &hf_nr_rrc_sl_TimeReferenceSFN_Type1_r16, + { "sl-TimeReferenceSFN-Type1-r16", "nr-rrc.sl_TimeReferenceSFN_Type1_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_sl_TimeReferenceSFN_Type1_r16_vals), 0, + NULL, HFILL }}, { &hf_nr_rrc_SL_CG_MaxTransNumList_r16_item, { "SL-CG-MaxTransNum-r16", "nr-rrc.SL_CG_MaxTransNum_r16_element", FT_NONE, BASE_NONE, NULL, 0, @@ -102577,13 +108675,17 @@ proto_register_nr_rrc(void) { "T_sl_ReportAmount_r16_01", HFILL }}, { &hf_nr_rrc_sl_RSRP_r16, { "sl-RSRP-r16", "nr-rrc.sl_RSRP_r16", + FT_BOOLEAN, BASE_NONE, NULL, 0, + "BOOLEAN", HFILL }}, + { &hf_nr_rrc_sl_RSRP_r16_01, + { "sl-RSRP-r16", "nr-rrc.sl_RSRP_r16", FT_UINT32, BASE_CUSTOM, CF_FUNC(nr_rrc_RSRP_Range_fmt), 0, "RSRP_Range", HFILL }}, { &hf_nr_rrc_sl_PSCCH_Config_r16, { "sl-PSCCH-Config-r16", "nr-rrc.sl_PSCCH_Config_r16", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_sl_PSCCH_Config_r16_vals), 0, NULL, HFILL }}, - { &hf_nr_rrc_setup_122, + { &hf_nr_rrc_setup_123, { "setup", "nr-rrc.setup_element", FT_NONE, BASE_NONE, NULL, 0, "SL_PSCCH_Config_r16", HFILL }}, @@ -102591,7 +108693,7 @@ proto_register_nr_rrc(void) { { "sl-PSSCH-Config-r16", "nr-rrc.sl_PSSCH_Config_r16", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_sl_PSSCH_Config_r16_vals), 0, NULL, HFILL }}, - { &hf_nr_rrc_setup_123, + { &hf_nr_rrc_setup_124, { "setup", "nr-rrc.setup_element", FT_NONE, BASE_NONE, NULL, 0, "SL_PSSCH_Config_r16", HFILL }}, @@ -102599,7 +108701,7 @@ proto_register_nr_rrc(void) { { "sl-PSFCH-Config-r16", "nr-rrc.sl_PSFCH_Config_r16", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_sl_PSFCH_Config_r16_vals), 0, NULL, HFILL }}, - { &hf_nr_rrc_setup_124, + { &hf_nr_rrc_setup_125, { "setup", "nr-rrc.setup_element", FT_NONE, BASE_NONE, NULL, 0, "SL_PSFCH_Config_r16", HFILL }}, @@ -102959,10 +109061,6 @@ proto_register_nr_rrc(void) { { "mac-MainConfigSL-r16", "nr-rrc.mac_MainConfigSL_r16_element", FT_NONE, BASE_NONE, NULL, 0, NULL, HFILL }}, - { &hf_nr_rrc_sl_Timing_Config_r16, - { "sl-Timing-Config-r16", "nr-rrc.sl_Timing_Config_r16_element", - FT_NONE, BASE_NONE, NULL, 0, - "SL_TimingConfig_r16", HFILL }}, { &hf_nr_rrc_sl_CS_RNTI_r16, { "sl-CS-RNTI-r16", "nr-rrc.sl_CS_RNTI_r16", FT_UINT32, BASE_DEC, NULL, 0, @@ -102991,10 +109089,6 @@ proto_register_nr_rrc(void) { { "sl-PrioritizationThres-r16", "nr-rrc.sl_PrioritizationThres_r16", FT_UINT32, BASE_DEC, NULL, 0, "INTEGER_1_8", HFILL }}, - { &hf_nr_rrc_sl_DCI_ToSL_Trans_r16, - { "sl-DCI-ToSL-Trans-r16", "nr-rrc.sl_DCI_ToSL_Trans_r16", - FT_UINT32, BASE_DEC, VALS(nr_rrc_T_sl_DCI_ToSL_Trans_r16_vals), 0, - NULL, HFILL }}, { &hf_nr_rrc_sl_ConfiguredGrantConfigToReleaseList_r16, { "sl-ConfiguredGrantConfigToReleaseList-r16", "nr-rrc.sl_ConfiguredGrantConfigToReleaseList_r16", FT_UINT32, BASE_DEC, NULL, 0, @@ -103239,7 +109333,7 @@ proto_register_nr_rrc(void) { { "sl-measResults-r16", "nr-rrc.sl_measResults_r16_element", FT_NONE, BASE_NONE, NULL, 0, NULL, HFILL }}, - { &hf_nr_rrc_nonCriticalExtension_95, + { &hf_nr_rrc_nonCriticalExtension_97, { "nonCriticalExtension", "nr-rrc.nonCriticalExtension_element", FT_NONE, BASE_NONE, NULL, 0, "T_nonCriticalExtension_52", HFILL }}, @@ -103287,7 +109381,7 @@ proto_register_nr_rrc(void) { { "sl-MeasConfig-r16", "nr-rrc.sl_MeasConfig_r16", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_sl_MeasConfig_r16_vals), 0, NULL, HFILL }}, - { &hf_nr_rrc_setup_125, + { &hf_nr_rrc_setup_126, { "setup", "nr-rrc.setup_element", FT_NONE, BASE_NONE, NULL, 0, "SL_MeasConfig_r16", HFILL }}, @@ -103295,7 +109389,7 @@ proto_register_nr_rrc(void) { { "sl-CSI-RS-Config-r16", "nr-rrc.sl_CSI_RS_Config_r16", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_sl_CSI_RS_Config_r16_vals), 0, NULL, HFILL }}, - { &hf_nr_rrc_setup_126, + { &hf_nr_rrc_setup_127, { "setup", "nr-rrc.setup_element", FT_NONE, BASE_NONE, NULL, 0, "SL_CSI_RS_Config_r16", HFILL }}, @@ -103307,7 +109401,7 @@ proto_register_nr_rrc(void) { { "sl-LatencyBoundCSI-Report-r16", "nr-rrc.sl_LatencyBoundCSI_Report_r16", FT_UINT32, BASE_DEC, NULL, 0, "INTEGER_3_160", HFILL }}, - { &hf_nr_rrc_nonCriticalExtension_96, + { &hf_nr_rrc_nonCriticalExtension_98, { "nonCriticalExtension", "nr-rrc.nonCriticalExtension_element", FT_NONE, BASE_NONE, NULL, 0, "T_nonCriticalExtension_53", HFILL }}, @@ -103334,27 +109428,31 @@ proto_register_nr_rrc(void) { { &hf_nr_rrc_sl_MappedQoS_FlowsToAddList_r16_01, { "sl-MappedQoS-FlowsToAddList-r16", "nr-rrc.sl_MappedQoS_FlowsToAddList_r16", FT_UINT32, BASE_DEC, NULL, 0, - "SEQUENCE_SIZE_1_maxNrofSL_QFIsPerDest_r16_OF_SL_PFI_r16", HFILL }}, + "SEQUENCE_SIZE_1_maxNrofSL_QFIsPerDest_r16_OF_SL_PQFI_r16", HFILL }}, { &hf_nr_rrc_sl_MappedQoS_FlowsToAddList_r16_item_01, - { "SL-PFI-r16", "nr-rrc.SL_PFI_r16", + { "SL-PQFI-r16", "nr-rrc.SL_PQFI_r16", FT_UINT32, BASE_DEC, NULL, 0, NULL, HFILL }}, { &hf_nr_rrc_sl_MappedQoS_FlowsToReleaseList_r16, { "sl-MappedQoS-FlowsToReleaseList-r16", "nr-rrc.sl_MappedQoS_FlowsToReleaseList_r16", FT_UINT32, BASE_DEC, NULL, 0, - "SEQUENCE_SIZE_1_maxNrofSL_QFIsPerDest_r16_OF_SL_PFI_r16", HFILL }}, + "SEQUENCE_SIZE_1_maxNrofSL_QFIsPerDest_r16_OF_SL_PQFI_r16", HFILL }}, { &hf_nr_rrc_sl_MappedQoS_FlowsToReleaseList_r16_item, - { "SL-PFI-r16", "nr-rrc.SL_PFI_r16", + { "SL-PQFI-r16", "nr-rrc.SL_PQFI_r16", FT_UINT32, BASE_DEC, NULL, 0, NULL, HFILL }}, + { &hf_nr_rrc_sl_SDAP_Header_r16_01, + { "sl-SDAP-Header-r16", "nr-rrc.sl_SDAP_Header_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_sl_SDAP_Header_r16_01_vals), 0, + "T_sl_SDAP_Header_r16_01", HFILL }}, { &hf_nr_rrc_sl_PDCP_SN_Size_r16_01, { "sl-PDCP-SN-Size-r16", "nr-rrc.sl_PDCP_SN_Size_r16", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_sl_PDCP_SN_Size_r16_01_vals), 0, "T_sl_PDCP_SN_Size_r16_01", HFILL }}, - { &hf_nr_rrc_sl_OutOfOrderDelivery_01, - { "sl-OutOfOrderDelivery", "nr-rrc.sl_OutOfOrderDelivery", - FT_UINT32, BASE_DEC, VALS(nr_rrc_T_sl_OutOfOrderDelivery_01_vals), 0, - "T_sl_OutOfOrderDelivery_01", HFILL }}, + { &hf_nr_rrc_sl_OutOfOrderDelivery_r16, + { "sl-OutOfOrderDelivery-r16", "nr-rrc.sl_OutOfOrderDelivery_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_sl_OutOfOrderDelivery_r16_vals), 0, + NULL, HFILL }}, { &hf_nr_rrc_sl_AM_RLC_r16_01, { "sl-AM-RLC-r16", "nr-rrc.sl_AM_RLC_r16_element", FT_NONE, BASE_NONE, NULL, 0, @@ -103399,7 +109497,7 @@ proto_register_nr_rrc(void) { { "criticalExtensionsFuture", "nr-rrc.criticalExtensionsFuture_element", FT_NONE, BASE_NONE, NULL, 0, "T_criticalExtensionsFuture_49", HFILL }}, - { &hf_nr_rrc_nonCriticalExtension_97, + { &hf_nr_rrc_nonCriticalExtension_99, { "nonCriticalExtension", "nr-rrc.nonCriticalExtension_element", FT_NONE, BASE_NONE, NULL, 0, "T_nonCriticalExtension_54", HFILL }}, @@ -103415,7 +109513,7 @@ proto_register_nr_rrc(void) { { "criticalExtensionsFuture", "nr-rrc.criticalExtensionsFuture_element", FT_NONE, BASE_NONE, NULL, 0, "T_criticalExtensionsFuture_50", HFILL }}, - { &hf_nr_rrc_nonCriticalExtension_98, + { &hf_nr_rrc_nonCriticalExtension_100, { "nonCriticalExtension", "nr-rrc.nonCriticalExtension_element", FT_NONE, BASE_NONE, NULL, 0, "T_nonCriticalExtension_55", HFILL }}, @@ -103431,15 +109529,15 @@ proto_register_nr_rrc(void) { { "criticalExtensionsFuture", "nr-rrc.criticalExtensionsFuture_element", FT_NONE, BASE_NONE, NULL, 0, "T_criticalExtensionsFuture_51", HFILL }}, - { &hf_nr_rrc_ueCapabilityRequestFilterSidelink_r16, - { "ueCapabilityRequestFilterSidelink-r16", "nr-rrc.ueCapabilityRequestFilterSidelink_r16_element", - FT_NONE, BASE_NONE, NULL, 0, - "UE_CapabilityRequestFilterSidelink_r16", HFILL }}, + { &hf_nr_rrc_frequencyBandListFilterSidelink_r16, + { "frequencyBandListFilterSidelink-r16", "nr-rrc.frequencyBandListFilterSidelink_r16", + FT_UINT32, BASE_DEC, NULL, 0, + "FreqBandList", HFILL }}, { &hf_nr_rrc_ue_CapabilityInformationSidelink_r16, { "ue-CapabilityInformationSidelink-r16", "nr-rrc.ue_CapabilityInformationSidelink_r16", FT_BYTES, BASE_NONE, NULL, 0, "OCTET_STRING", HFILL }}, - { &hf_nr_rrc_nonCriticalExtension_99, + { &hf_nr_rrc_nonCriticalExtension_101, { "nonCriticalExtension", "nr-rrc.nonCriticalExtension_element", FT_NONE, BASE_NONE, NULL, 0, "T_nonCriticalExtension_56", HFILL }}, @@ -103467,7 +109565,23 @@ proto_register_nr_rrc(void) { { "rlc-ParametersSidelink-r16", "nr-rrc.rlc_ParametersSidelink_r16_element", FT_NONE, BASE_NONE, NULL, 0, "PC5_RLC_ParametersSidelink_r16", HFILL }}, - { &hf_nr_rrc_nonCriticalExtension_100, + { &hf_nr_rrc_supportedBandCombinationListSidelinkNR_r16, + { "supportedBandCombinationListSidelinkNR-r16", "nr-rrc.supportedBandCombinationListSidelinkNR_r16", + FT_UINT32, BASE_DEC, NULL, 0, + "BandCombinationListSidelinkNR_r16", HFILL }}, + { &hf_nr_rrc_supportedBandListSidelink_r16_01, + { "supportedBandListSidelink-r16", "nr-rrc.supportedBandListSidelink_r16", + FT_UINT32, BASE_DEC, NULL, 0, + "SEQUENCE_SIZE_1_maxBands_OF_PC5_BandSidelink_r16", HFILL }}, + { &hf_nr_rrc_supportedBandListSidelink_r16_item_01, + { "PC5-BandSidelink-r16", "nr-rrc.PC5_BandSidelink_r16_element", + FT_NONE, BASE_NONE, NULL, 0, + NULL, HFILL }}, + { &hf_nr_rrc_appliedFreqBandListFilter_r16, + { "appliedFreqBandListFilter-r16", "nr-rrc.appliedFreqBandListFilter_r16", + FT_UINT32, BASE_DEC, NULL, 0, + "FreqBandList", HFILL }}, + { &hf_nr_rrc_nonCriticalExtension_102, { "nonCriticalExtension", "nr-rrc.nonCriticalExtension_element", FT_NONE, BASE_NONE, NULL, 0, "T_nonCriticalExtension_57", HFILL }}, @@ -103483,17 +109597,53 @@ proto_register_nr_rrc(void) { { "um-WithLongSN-Sidelink-r16", "nr-rrc.um_WithLongSN_Sidelink_r16", FT_UINT32, BASE_DEC, VALS(nr_rrc_T_um_WithLongSN_Sidelink_r16_01_vals), 0, "T_um_WithLongSN_Sidelink_r16_01", HFILL }}, - { &hf_nr_rrc_frequencyBandListFilterSidelink_r16, - { "frequencyBandListFilterSidelink-r16", "nr-rrc.frequencyBandListFilterSidelink_r16", + { &hf_nr_rrc_BandCombinationListSidelinkNR_r16_item, + { "BandCombinationParametersSidelinkNR-r16", "nr-rrc.BandCombinationParametersSidelinkNR_r16", FT_UINT32, BASE_DEC, NULL, 0, - "FreqBandList", HFILL }}, - { &hf_nr_rrc_nonCriticalExtension_101, - { "nonCriticalExtension", "nr-rrc.nonCriticalExtension_element", + NULL, HFILL }}, + { &hf_nr_rrc_BandCombinationParametersSidelinkNR_r16_item, + { "BandParametersSidelink-r16", "nr-rrc.BandParametersSidelink_r16_element", FT_NONE, BASE_NONE, NULL, 0, - "T_nonCriticalExtension_58", HFILL }}, + NULL, HFILL }}, + { &hf_nr_rrc_sl_Reception_r16_01, + { "sl-Reception-r16", "nr-rrc.sl_Reception_r16_element", + FT_NONE, BASE_NONE, NULL, 0, + "T_sl_Reception_r16_01", HFILL }}, + { &hf_nr_rrc_harq_RxProcessSidelink_r16_01, + { "harq-RxProcessSidelink-r16", "nr-rrc.harq_RxProcessSidelink_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_harq_RxProcessSidelink_r16_01_vals), 0, + "T_harq_RxProcessSidelink_r16_01", HFILL }}, + { &hf_nr_rrc_pscch_RxSidelink_r16_01, + { "pscch-RxSidelink-r16", "nr-rrc.pscch_RxSidelink_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_pscch_RxSidelink_r16_01_vals), 0, + "T_pscch_RxSidelink_r16_01", HFILL }}, + { &hf_nr_rrc_scs_CP_PatternRxSidelink_r16_01, + { "scs-CP-PatternRxSidelink-r16", "nr-rrc.scs_CP_PatternRxSidelink_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_scs_CP_PatternRxSidelink_r16_01_vals), 0, + "T_scs_CP_PatternRxSidelink_r16_01", HFILL }}, + { &hf_nr_rrc_fr1_r16_02, + { "fr1-r16", "nr-rrc.fr1_r16_element", + FT_NONE, BASE_NONE, NULL, 0, + "T_fr1_r16_02", HFILL }}, + { &hf_nr_rrc_fr2_r16_02, + { "fr2-r16", "nr-rrc.fr2_r16_element", + FT_NONE, BASE_NONE, NULL, 0, + "T_fr2_r16_02", HFILL }}, + { &hf_nr_rrc_extendedCP_RxSidelink_r16_01, + { "extendedCP-RxSidelink-r16", "nr-rrc.extendedCP_RxSidelink_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_extendedCP_RxSidelink_r16_01_vals), 0, + "T_extendedCP_RxSidelink_r16_01", HFILL }}, + { &hf_nr_rrc_sl_Tx_256QAM_r16_01, + { "sl-Tx-256QAM-r16", "nr-rrc.sl_Tx_256QAM_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_sl_Tx_256QAM_r16_01_vals), 0, + "T_sl_Tx_256QAM_r16_01", HFILL }}, + { &hf_nr_rrc_lowSE_64QAM_MCS_TableSidelink_r16_01, + { "lowSE-64QAM-MCS-TableSidelink-r16", "nr-rrc.lowSE_64QAM_MCS_TableSidelink_r16", + FT_UINT32, BASE_DEC, VALS(nr_rrc_T_lowSE_64QAM_MCS_TableSidelink_r16_01_vals), 0, + "T_lowSE_64QAM_MCS_TableSidelink_r16_01", HFILL }}, /*--- End of included file: packet-nr-rrc-hfarr.c ---*/ -#line 547 "./asn1/nr-rrc/packet-nr-rrc-template.c" +#line 545 "./asn1/nr-rrc/packet-nr-rrc-template.c" { &hf_nr_rrc_serialNumber_gs, { "Geographical Scope", "nr-rrc.serialNumber.gs", @@ -103669,6 +109819,7 @@ proto_register_nr_rrc(void) { &ett_nr_rrc_SEQUENCE_SIZE_1_maxNrofServingCells_1_OF_ARFCN_ValueNR, &ett_nr_rrc_SEQUENCE_SIZE_1_maxNrofServingCells_1_OF_ARFCN_ValueEUTRA, &ett_nr_rrc_CG_Config_v1610_IEs, + &ett_nr_rrc_CG_Config_v1620_IEs, &ett_nr_rrc_T_nonCriticalExtension_02, &ett_nr_rrc_PH_TypeListSCG, &ett_nr_rrc_PH_InfoSCG, @@ -103698,6 +109849,7 @@ proto_register_nr_rrc(void) { &ett_nr_rrc_CG_ConfigInfo_v1610_IEs, &ett_nr_rrc_T_scgFailureInfo_r16, &ett_nr_rrc_T_scgFailureInfoEUTRA_r16, + &ett_nr_rrc_CG_ConfigInfo_v1620_IEs, &ett_nr_rrc_T_nonCriticalExtension_03, &ett_nr_rrc_SFTD_FrequencyList_NR, &ett_nr_rrc_SFTD_FrequencyList_EUTRA, @@ -103839,14 +109991,14 @@ proto_register_nr_rrc(void) { &ett_nr_rrc_T_criticalExtensions_14, &ett_nr_rrc_T_criticalExtensionsFuture_14, &ett_nr_rrc_IABOtherInformation_r16_IEs, - &ett_nr_rrc_T_ip_InfoType, + &ett_nr_rrc_T_ip_InfoType_r16, &ett_nr_rrc_T_iab_IP_Request_r16, &ett_nr_rrc_T_iab_IPv6_AddressReq_r16, &ett_nr_rrc_T_iab_IP_Report_r16, &ett_nr_rrc_T_iab_IPv6_Report_r16, &ett_nr_rrc_T_nonCriticalExtension_14, - &ett_nr_rrc_IAB_IPAddressNumReq_r16, - &ett_nr_rrc_IAB_IPAddressPrefixReq_r16, + &ett_nr_rrc_IAB_IP_AddressNumReq_r16, + &ett_nr_rrc_IAB_IP_AddressPrefixReq_r16, &ett_nr_rrc_IAB_IP_AddressAndTraffic_r16, &ett_nr_rrc_SEQUENCE_SIZE_1_8_OF_IAB_IP_Address_r16, &ett_nr_rrc_IAB_IP_PrefixAndTraffic_r16, @@ -104153,6 +110305,8 @@ proto_register_nr_rrc(void) { &ett_nr_rrc_T_rsIndexResults_r16, &ett_nr_rrc_RA_ReportList_r16, &ett_nr_rrc_RA_Report_r16, + &ett_nr_rrc_T_cellId_r16, + &ett_nr_rrc_T_pci_arfcn_r16, &ett_nr_rrc_RA_InformationCommon_r16, &ett_nr_rrc_PerRAInfoList_r16, &ett_nr_rrc_PerRAInfo_r16, @@ -104166,15 +110320,16 @@ proto_register_nr_rrc(void) { &ett_nr_rrc_T_previousPCellId_r16, &ett_nr_rrc_T_failedPCellId_r16, &ett_nr_rrc_T_nrFailedPCellId_r16, - &ett_nr_rrc_T_pci_arfcn_r16, - &ett_nr_rrc_T_eutraFailedPCellId_r16, &ett_nr_rrc_T_pci_arfcn_r16_01, + &ett_nr_rrc_T_eutraFailedPCellId_r16, + &ett_nr_rrc_T_pci_arfcn_r16_02, &ett_nr_rrc_T_reconnectCellId_r16, &ett_nr_rrc_T_eutra_RLF_Report_r16, &ett_nr_rrc_MeasResultList2NR_r16, &ett_nr_rrc_MeasResultList2EUTRA_r16, &ett_nr_rrc_MeasResult2NR_r16, &ett_nr_rrc_MeasResultListLogging2NR_r16, + &ett_nr_rrc_MeasResultLogging2NR_r16, &ett_nr_rrc_MeasResultListLoggingNR_r16, &ett_nr_rrc_MeasResultLoggingNR_r16, &ett_nr_rrc_MeasResult2EUTRA_r16, @@ -104214,14 +110369,14 @@ proto_register_nr_rrc(void) { &ett_nr_rrc_T_lowMobilityEvaluation_r16, &ett_nr_rrc_T_cellEdgeEvaluation_r16, &ett_nr_rrc_SIB3, - &ett_nr_rrc_SEQUENCE_SIZE_1_maxPLMN_OF_IntraFreqCAG_CellPerPLMN_r16, + &ett_nr_rrc_SEQUENCE_SIZE_1_maxPLMN_OF_IntraFreqCAG_CellListPerPLMN_r16, &ett_nr_rrc_IntraFreqNeighCellList, &ett_nr_rrc_IntraFreqNeighCellList_v1610, &ett_nr_rrc_IntraFreqNeighCellInfo, &ett_nr_rrc_IntraFreqNeighCellInfo_v1610, &ett_nr_rrc_IntraFreqBlackCellList, &ett_nr_rrc_IntraFreqWhiteCellList_r16, - &ett_nr_rrc_IntraFreqCAG_CellPerPLMN_r16, + &ett_nr_rrc_IntraFreqCAG_CellListPerPLMN_r16, &ett_nr_rrc_SEQUENCE_SIZE_1_maxCAG_Cell_r16_OF_PCI_Range, &ett_nr_rrc_SIB4, &ett_nr_rrc_InterFreqCarrierFreqList, @@ -104229,14 +110384,14 @@ proto_register_nr_rrc(void) { &ett_nr_rrc_InterFreqCarrierFreqInfo, &ett_nr_rrc_T_threshX_Q, &ett_nr_rrc_InterFreqCarrierFreqInfo_v1610, - &ett_nr_rrc_SEQUENCE_SIZE_1_maxPLMN_OF_InterFreqCAG_CellList_r16, + &ett_nr_rrc_SEQUENCE_SIZE_1_maxPLMN_OF_InterFreqCAG_CellListPerPLMN_r16, &ett_nr_rrc_InterFreqNeighCellList, &ett_nr_rrc_InterFreqNeighCellList_v1610, &ett_nr_rrc_InterFreqNeighCellInfo, &ett_nr_rrc_InterFreqNeighCellInfo_v1610, &ett_nr_rrc_InterFreqBlackCellList, &ett_nr_rrc_InterFreqWhiteCellList_r16, - &ett_nr_rrc_InterFreqCAG_CellList_r16, + &ett_nr_rrc_InterFreqCAG_CellListPerPLMN_r16, &ett_nr_rrc_SIB5, &ett_nr_rrc_CarrierFreqListEUTRA, &ett_nr_rrc_CarrierFreqListEUTRA_v1610, @@ -104277,7 +110432,7 @@ proto_register_nr_rrc(void) { &ett_nr_rrc_AvailabilityIndicator_r16, &ett_nr_rrc_SEQUENCE_SIZE_1_maxNrofDUCells_r16_OF_AvailabilityCombinationsPerCell_r16, &ett_nr_rrc_SEQUENCE_SIZE_1_maxNrofDUCells_r16_OF_AvailabilityCombinationsPerCellIndex_r16, - &ett_nr_rrc_BAP_Routing_ID_r16, + &ett_nr_rrc_BAP_RoutingID_r16, &ett_nr_rrc_BeamFailureRecoveryConfig, &ett_nr_rrc_SEQUENCE_SIZE_1_maxNrofCandidateBeams_OF_PRACH_ResourceDedicatedBFR, &ett_nr_rrc_T_candidateBeamRSListExt_v1610, @@ -104409,7 +110564,7 @@ proto_register_nr_rrc(void) { &ett_nr_rrc_T_schedulingCellInfo, &ett_nr_rrc_T_own, &ett_nr_rrc_T_other, - &ett_nr_rrc_T_carrierIndicatorSize, + &ett_nr_rrc_T_carrierIndicatorSize_r16, &ett_nr_rrc_CSI_AperiodicTriggerStateList, &ett_nr_rrc_CSI_AperiodicTriggerState, &ett_nr_rrc_SEQUENCE_SIZE_1_maxNrofReportConfigPerAperiodicTrigger_OF_CSI_AssociatedReportConfigInfo, @@ -104459,11 +110614,11 @@ proto_register_nr_rrc(void) { &ett_nr_rrc_SEQUENCE_SIZE_1_maxNrofNZP_CSI_RS_ResourcesPerConfig_OF_PortIndexFor8Ranks, &ett_nr_rrc_T_semiPersistentOnPUSCH_v1530, &ett_nr_rrc_T_semiPersistentOnPUSCH_v1610, - &ett_nr_rrc_T_reportSlotOffsetListForDCI_Format0_2_r16, - &ett_nr_rrc_T_reportSlotOffsetListForDCI_Format0_1_r16, + &ett_nr_rrc_T_reportSlotOffsetListDCI_0_2_r16, + &ett_nr_rrc_T_reportSlotOffsetListDCI_0_1_r16, &ett_nr_rrc_T_aperiodic_v1610, - &ett_nr_rrc_T_reportSlotOffsetListForDCI_Format0_2_r16_01, - &ett_nr_rrc_T_reportSlotOffsetListForDCI_Format0_1_r16_01, + &ett_nr_rrc_T_reportSlotOffsetListDCI_0_2_r16_01, + &ett_nr_rrc_T_reportSlotOffsetListDCI_0_1_r16_01, &ett_nr_rrc_T_reportQuantity_r16, &ett_nr_rrc_CSI_ReportPeriodicityAndOffset, &ett_nr_rrc_PUCCH_CSI_Resource, @@ -104739,9 +110894,10 @@ proto_register_nr_rrc(void) { &ett_nr_rrc_SEQUENCE_SIZE_1_2_OF_ControlResourceSet, &ett_nr_rrc_SEQUENCE_SIZE_1_5_OF_ControlResourceSetId_r16, &ett_nr_rrc_SEQUENCE_SIZE_1_10_OF_SearchSpaceExt_r16, - &ett_nr_rrc_SEQUENCE_SIZE_1_4_OF_CellGroupForSwitching_r16, &ett_nr_rrc_T_uplinkCancellation_r16, - &ett_nr_rrc_CellGroupForSwitching_r16, + &ett_nr_rrc_SearchSpaceSwitchConfig_r16, + &ett_nr_rrc_SEQUENCE_SIZE_1_4_OF_CellGroupForSwitch_r16, + &ett_nr_rrc_CellGroupForSwitch_r16, &ett_nr_rrc_PDCCH_ConfigCommon, &ett_nr_rrc_SEQUENCE_SIZE_1_4_OF_SearchSpace, &ett_nr_rrc_T_firstPDCCH_MonitoringOccasionOfPO_01, @@ -104769,12 +110925,12 @@ proto_register_nr_rrc(void) { &ett_nr_rrc_T_primaryPath, &ett_nr_rrc_T_discardTimerExt_r16, &ett_nr_rrc_T_moreThanTwoRLC_DRB_r16, - &ett_nr_rrc_T_duplicationState, + &ett_nr_rrc_T_duplicationState_r16, &ett_nr_rrc_T_ethernetHeaderCompression_r16, &ett_nr_rrc_EthernetHeaderCompression_r16, - &ett_nr_rrc_T_ehc_Common, - &ett_nr_rrc_T_ehc_Downlink, - &ett_nr_rrc_T_ehc_Uplink, + &ett_nr_rrc_T_ehc_Common_r16, + &ett_nr_rrc_T_ehc_Downlink_r16, + &ett_nr_rrc_T_ehc_Uplink_r16, &ett_nr_rrc_PDSCH_Config, &ett_nr_rrc_T_dmrs_DownlinkForPDSCH_MappingTypeA, &ett_nr_rrc_T_dmrs_DownlinkForPDSCH_MappingTypeB, @@ -104793,10 +110949,10 @@ proto_register_nr_rrc(void) { &ett_nr_rrc_T_p_ZP_CSI_RS_ResourceSet, &ett_nr_rrc_T_maxMIMO_Layers_r16, &ett_nr_rrc_T_minimumSchedulingOffsetK0_r16, - &ett_nr_rrc_T_dmrs_DownlinkForPDSCH_MappingTypeA_ForDCI_Format1_2_r16, - &ett_nr_rrc_T_dmrs_DownlinkForPDSCH_MappingTypeB_ForDCI_Format1_2_r16, - &ett_nr_rrc_T_pdsch_TimeDomainAllocationListForDCI_Format1_2_r16, - &ett_nr_rrc_T_prb_BundlingTypeForDCI_Format1_2_r16, + &ett_nr_rrc_T_dmrs_DownlinkForPDSCH_MappingTypeA_DCI_1_2_r16, + &ett_nr_rrc_T_dmrs_DownlinkForPDSCH_MappingTypeB_DCI_1_2_r16, + &ett_nr_rrc_T_pdsch_TimeDomainAllocationListDCI_1_2_r16, + &ett_nr_rrc_T_prb_BundlingTypeDCI_1_2_r16, &ett_nr_rrc_T_staticBundling_r16, &ett_nr_rrc_T_dynamicBundling_r16, &ett_nr_rrc_T_pdsch_TimeDomainAllocationList_r16, @@ -104815,6 +110971,8 @@ proto_register_nr_rrc(void) { &ett_nr_rrc_PDSCH_TimeDomainResourceAllocationList_r16, &ett_nr_rrc_PDSCH_TimeDomainResourceAllocation_r16, &ett_nr_rrc_PHR_Config, + &ett_nr_rrc_T_mpe_Reporting_FR2_r16, + &ett_nr_rrc_MPE_Config_FR2_r16, &ett_nr_rrc_PhysicalCellGroupConfig, &ett_nr_rrc_T_cs_RNTI, &ett_nr_rrc_T_pdcch_BlindDetection, @@ -104859,9 +111017,9 @@ proto_register_nr_rrc(void) { &ett_nr_rrc_SEQUENCE_SIZE_1_maxNrofSpatialRelationInfos_OF_PUCCH_SpatialRelationInfoId, &ett_nr_rrc_SEQUENCE_SIZE_1_maxNrofPUCCH_Resources_OF_PUCCH_ResourceExt_r16, &ett_nr_rrc_T_dl_DataToUL_ACK_r16, - &ett_nr_rrc_T_ul_AccessConfigListForDCI_Format_1_1_r16, + &ett_nr_rrc_T_ul_AccessConfigListDCI_1_1_r16, &ett_nr_rrc_T_subslotLengthForPUCCH_r16, - &ett_nr_rrc_T_dl_DataToUL_ACK_ForDCI_Format1_2_r16, + &ett_nr_rrc_T_dl_DataToUL_ACK_DCI_1_2_r16, &ett_nr_rrc_SEQUENCE_SIZE_1_maxNrofSpatialRelationInfosDiff_r16_OF_PUCCH_SpatialRelationInfo, &ett_nr_rrc_SEQUENCE_SIZE_1_maxNrofSpatialRelationInfosDiff_r16_OF_PUCCH_SpatialRelationInfoId, &ett_nr_rrc_SEQUENCE_SIZE_1_maxNrofSpatialRelationInfos_r16_OF_PUCCH_SpatialRelationInfoExt_r16, @@ -104888,8 +111046,8 @@ proto_register_nr_rrc(void) { &ett_nr_rrc_PUCCH_ResourceGroup_r16, &ett_nr_rrc_SEQUENCE_SIZE_1_maxNrofPUCCH_ResourcesPerGroup_r16_OF_PUCCH_ResourceId, &ett_nr_rrc_DL_DataToUL_ACK_r16, - &ett_nr_rrc_DL_DataToUL_ACK_ForDCI_Format1_2_r16, - &ett_nr_rrc_UL_AccessConfigListForDCI_Format1_1_r16, + &ett_nr_rrc_DL_DataToUL_ACK_DCI_1_2_r16, + &ett_nr_rrc_UL_AccessConfigListDCI_1_1_r16, &ett_nr_rrc_PUCCH_ConfigCommon, &ett_nr_rrc_PUCCH_ConfigurationList_r16, &ett_nr_rrc_PUCCH_PowerControl, @@ -104914,29 +111072,29 @@ proto_register_nr_rrc(void) { &ett_nr_rrc_T_pusch_TimeDomainAllocationList, &ett_nr_rrc_T_uci_OnPUSCH_01, &ett_nr_rrc_T_minimumSchedulingOffsetK2_r16, - &ett_nr_rrc_T_ul_AccessConfigListForDCI_Format0_1_r16, - &ett_nr_rrc_T_dmrs_UplinkForPUSCH_MappingTypeA_ForDCI_Format0_2_r16, - &ett_nr_rrc_T_dmrs_UplinkForPUSCH_MappingTypeB_ForDCI_Format0_2_r16, - &ett_nr_rrc_T_frequencyHoppingForDCI_Format0_2_r16, - &ett_nr_rrc_T_frequencyHoppingOffsetListsForDCI_Format0_2_r16, - &ett_nr_rrc_T_uci_OnPUSCH_ListForDCI_Format0_2_r16, - &ett_nr_rrc_T_pusch_TimeDomainAllocationListForDCI_Format0_2_r16, - &ett_nr_rrc_T_pusch_TimeDomainAllocationListForDCI_Format0_1_r16, - &ett_nr_rrc_T_uci_OnPUSCH_ListForDCI_Format0_1_r16, + &ett_nr_rrc_T_ul_AccessConfigListDCI_0_1_r16, + &ett_nr_rrc_T_dmrs_UplinkForPUSCH_MappingTypeA_DCI_0_2_r16, + &ett_nr_rrc_T_dmrs_UplinkForPUSCH_MappingTypeB_DCI_0_2_r16, + &ett_nr_rrc_T_frequencyHoppingDCI_0_2_r16, + &ett_nr_rrc_T_frequencyHoppingOffsetListsDCI_0_2_r16, + &ett_nr_rrc_T_uci_OnPUSCH_ListDCI_0_2_r16, + &ett_nr_rrc_T_pusch_TimeDomainAllocationListDCI_0_2_r16, + &ett_nr_rrc_T_pusch_TimeDomainAllocationListDCI_0_1_r16, + &ett_nr_rrc_T_uci_OnPUSCH_ListDCI_0_1_r16, &ett_nr_rrc_T_pusch_PowerControl_v1610, &ett_nr_rrc_T_pusch_TimeDomainAllocationListForMultiPUSCH_r16, &ett_nr_rrc_UCI_OnPUSCH, &ett_nr_rrc_T_betaOffsets, &ett_nr_rrc_SEQUENCE_SIZE_4_OF_BetaOffsets, &ett_nr_rrc_MinSchedulingOffsetK2_Values_r16, - &ett_nr_rrc_UCI_OnPUSCH_ForDCI_Format0_2_r16, - &ett_nr_rrc_T_betaOffsetsForDCI_Format0_2_r16, - &ett_nr_rrc_T_dynamicForDCI_Format0_2_r16, + &ett_nr_rrc_UCI_OnPUSCH_DCI_0_2_r16, + &ett_nr_rrc_T_betaOffsetsDCI_0_2_r16, + &ett_nr_rrc_T_dynamicDCI_0_2_r16, &ett_nr_rrc_SEQUENCE_SIZE_2_OF_BetaOffsets, - &ett_nr_rrc_FrequencyHoppingOffsetListsForDCI_Format0_2_r16, - &ett_nr_rrc_UCI_OnPUSCH_ListForDCI_Format0_2_r16, - &ett_nr_rrc_UCI_OnPUSCH_ListForDCI_Format0_1_r16, - &ett_nr_rrc_UL_AccessConfigListForDCI_Format0_1_r16, + &ett_nr_rrc_FrequencyHoppingOffsetListsDCI_0_2_r16, + &ett_nr_rrc_UCI_OnPUSCH_ListDCI_0_2_r16, + &ett_nr_rrc_UCI_OnPUSCH_ListDCI_0_1_r16, + &ett_nr_rrc_UL_AccessConfigListDCI_0_1_r16, &ett_nr_rrc_PUSCH_ConfigCommon, &ett_nr_rrc_PUSCH_PowerControl, &ett_nr_rrc_SEQUENCE_SIZE_1_maxNrofP0_PUSCH_AlphaSets_OF_P0_PUSCH_AlphaSet, @@ -104959,7 +111117,7 @@ proto_register_nr_rrc(void) { &ett_nr_rrc_SEQUENCE_SIZE_1_maxNrofP0_PUSCH_Set_r16_OF_P0_PUSCH_r16, &ett_nr_rrc_PUSCH_ServingCellConfig, &ett_nr_rrc_T_codeBlockGroupTransmission_01, - &ett_nr_rrc_T_maxMIMO_LayersForDCI_Format0_2_r16, + &ett_nr_rrc_T_maxMIMO_LayersDCI_0_2_r16, &ett_nr_rrc_PUSCH_CodeBlockGroupTransmission, &ett_nr_rrc_PUSCH_TimeDomainResourceAllocationList, &ett_nr_rrc_PUSCH_TimeDomainResourceAllocation, @@ -104979,7 +111137,7 @@ proto_register_nr_rrc(void) { &ett_nr_rrc_T_ssb_perRACH_OccasionAndCB_PreamblesPerSSB, &ett_nr_rrc_T_groupBconfigured, &ett_nr_rrc_T_prach_RootSequenceIndex, - &ett_nr_rrc_T_ra_PrioritizationForAccessIdentity, + &ett_nr_rrc_T_ra_PrioritizationForAccessIdentity_r16, &ett_nr_rrc_T_prach_RootSequenceIndex_r16, &ett_nr_rrc_RACH_ConfigCommonTwoStepRA_r16, &ett_nr_rrc_T_msgA_SSB_PerRACH_OccasionAndCB_PreamblesPerSSB_r16, @@ -105146,6 +111304,7 @@ proto_register_nr_rrc(void) { &ett_nr_rrc_T_dormantBWP_Config_r16, &ett_nr_rrc_T_ca_SlotOffset_r16, &ett_nr_rrc_T_channelAccessConfig_r16, + &ett_nr_rrc_SEQUENCE_SIZE_1_maxSCSs_OF_IntraCellGuardBandsPerSCS_r16, &ett_nr_rrc_T_lte_CRS_PatternList1_r16, &ett_nr_rrc_T_lte_CRS_PatternList2_r16, &ett_nr_rrc_UplinkConfig, @@ -105154,7 +111313,8 @@ proto_register_nr_rrc(void) { &ett_nr_rrc_T_carrierSwitching, &ett_nr_rrc_T_uplinkTxSwitching_r16, &ett_nr_rrc_ChannelAccessConfig_r16, - &ett_nr_rrc_IntraCellGuardBands_r16, + &ett_nr_rrc_IntraCellGuardBandsPerSCS_r16, + &ett_nr_rrc_SEQUENCE_SIZE_1_4_OF_GuardBand_r16, &ett_nr_rrc_GuardBand_r16, &ett_nr_rrc_DormantBWP_Config_r16, &ett_nr_rrc_T_withinActiveTimeConfig_r16, @@ -105360,13 +111520,8 @@ proto_register_nr_rrc(void) { &ett_nr_rrc_T_srs_TxSwitch, &ett_nr_rrc_BandParameters_v1610, &ett_nr_rrc_T_srs_TxSwitch_v1610, - &ett_nr_rrc_T_intraFreqDAPS_Parameters_r16, - &ett_nr_rrc_BandCombinationListSidelink_r16, - &ett_nr_rrc_SupportedBandCombinationListSidelink_r16, - &ett_nr_rrc_BandCombinationParametersSidelink_r16, &ett_nr_rrc_BandParametersSidelink_r16, - &ett_nr_rrc_SupportedBandCombinationListSidelinkEUTRA_r16, - &ett_nr_rrc_SupportedBandCombinationListSidelinkEUTRA_NR_r16, + &ett_nr_rrc_BandCombinationListSidelinkEUTRA_NR_r16, &ett_nr_rrc_BandCombinationParametersSidelinkEUTRA_NR_r16, &ett_nr_rrc_BandParametersSidelinkEUTRA_NR_r16, &ett_nr_rrc_T_eutra_02, @@ -105380,7 +111535,11 @@ proto_register_nr_rrc(void) { &ett_nr_rrc_CA_ParametersNR_v1550, &ett_nr_rrc_CA_ParametersNR_v1560, &ett_nr_rrc_CA_ParametersNR_v1610, - &ett_nr_rrc_T_daps_Parameters_r16, + &ett_nr_rrc_T_interFreqDAPS_r16, + &ett_nr_rrc_T_pdcch_MonitoringCA_r16, + &ett_nr_rrc_T_pdcch_BlindDetectionCA_Mixed_r16, + &ett_nr_rrc_T_pdcch_BlindDetectionMCG_UE_Mixed_r16, + &ett_nr_rrc_T_pdcch_BlindDetectionSCG_UE_Mixed_r16, &ett_nr_rrc_CA_ParametersNRDC, &ett_nr_rrc_CA_ParametersNRDC_v1610, &ett_nr_rrc_CarrierAggregationVariant, @@ -105397,6 +111556,66 @@ proto_register_nr_rrc(void) { &ett_nr_rrc_T_type1_MultiPanel_r16, &ett_nr_rrc_T_type2_r16, &ett_nr_rrc_T_type2_PortSelection_r16, + &ett_nr_rrc_CodebookParametersAddition_r16, + &ett_nr_rrc_T_etype2_r16, + &ett_nr_rrc_T_etype2R1_r16, + &ett_nr_rrc_T_supportedCSI_RS_ResourceListAdd_r16, + &ett_nr_rrc_T_etype2R2_r16, + &ett_nr_rrc_T_supportedCSI_RS_ResourceListAdd_r16_01, + &ett_nr_rrc_T_etype2_PS_r16, + &ett_nr_rrc_T_etype2R1_PortSelection_r16, + &ett_nr_rrc_T_supportedCSI_RS_ResourceListAdd_r16_02, + &ett_nr_rrc_T_etype2R2_PortSelection_r16, + &ett_nr_rrc_T_supportedCSI_RS_ResourceListAdd_r16_03, + &ett_nr_rrc_CodebookComboParametersAddition_r16, + &ett_nr_rrc_T_type1SP_Type2_null_r16, + &ett_nr_rrc_T_supportedCSI_RS_ResourceListAdd_r16_04, + &ett_nr_rrc_T_type1SP_Type2PS_null_r16, + &ett_nr_rrc_T_supportedCSI_RS_ResourceListAdd_r16_05, + &ett_nr_rrc_T_type1SP_eType2R1_null_r16, + &ett_nr_rrc_T_supportedCSI_RS_ResourceListAdd_r16_06, + &ett_nr_rrc_T_type1SP_eType2R2_null_r16, + &ett_nr_rrc_T_supportedCSI_RS_ResourceListAdd_r16_07, + &ett_nr_rrc_T_type1SP_eType2R1PS_null_r16, + &ett_nr_rrc_T_supportedCSI_RS_ResourceListAdd_r16_08, + &ett_nr_rrc_T_type1SP_eType2R2PS_null_r16, + &ett_nr_rrc_T_supportedCSI_RS_ResourceListAdd_r16_09, + &ett_nr_rrc_T_type1SP_Type2_Type2PS_r16, + &ett_nr_rrc_T_supportedCSI_RS_ResourceListAdd_r16_10, + &ett_nr_rrc_T_type1MP_Type2_null_r16, + &ett_nr_rrc_T_supportedCSI_RS_ResourceListAdd_r16_11, + &ett_nr_rrc_T_type1MP_Type2PS_null_r16, + &ett_nr_rrc_T_supportedCSI_RS_ResourceListAdd_r16_12, + &ett_nr_rrc_T_type1MP_eType2R1_null_r16, + &ett_nr_rrc_T_supportedCSI_RS_ResourceListAdd_r16_13, + &ett_nr_rrc_T_type1MP_eType2R2_null_r16, + &ett_nr_rrc_T_supportedCSI_RS_ResourceListAdd_r16_14, + &ett_nr_rrc_T_type1MP_eType2R1PS_null_r16, + &ett_nr_rrc_T_supportedCSI_RS_ResourceListAdd_r16_15, + &ett_nr_rrc_T_type1MP_eType2R2PS_null_r16, + &ett_nr_rrc_T_supportedCSI_RS_ResourceListAdd_r16_16, + &ett_nr_rrc_T_type1MP_Type2_Type2PS_r16, + &ett_nr_rrc_T_supportedCSI_RS_ResourceListAdd_r16_17, + &ett_nr_rrc_CodebookParametersAdditionPerBC_r16, + &ett_nr_rrc_T_etype2R1_r16_01, + &ett_nr_rrc_T_etype2R2_r16_01, + &ett_nr_rrc_T_etype2R1_PortSelection_r16_01, + &ett_nr_rrc_T_etype2R2_PortSelection_r16_01, + &ett_nr_rrc_CodebookComboParametersAdditionPerBC_r16, + &ett_nr_rrc_T_type1SP_Type2_null_r16_01, + &ett_nr_rrc_T_type1SP_Type2PS_null_r16_01, + &ett_nr_rrc_T_type1SP_eType2R1_null_r16_01, + &ett_nr_rrc_T_type1SP_eType2R2_null_r16_01, + &ett_nr_rrc_T_type1SP_eType2R1PS_null_r16_01, + &ett_nr_rrc_T_type1SP_eType2R2PS_null_r16_01, + &ett_nr_rrc_T_type1SP_Type2_Type2PS_r16_01, + &ett_nr_rrc_T_type1MP_Type2_null_r16_01, + &ett_nr_rrc_T_type1MP_Type2PS_null_r16_01, + &ett_nr_rrc_T_type1MP_eType2R1_null_r16_01, + &ett_nr_rrc_T_type1MP_eType2R2_null_r16_01, + &ett_nr_rrc_T_type1MP_eType2R1PS_null_r16_01, + &ett_nr_rrc_T_type1MP_eType2R2PS_null_r16_01, + &ett_nr_rrc_T_type1MP_Type2_Type2PS_r16_01, &ett_nr_rrc_CodebookVariantsList_r16, &ett_nr_rrc_SupportedCSI_RS_Resource, &ett_nr_rrc_FeatureSetCombination, @@ -105418,14 +111637,22 @@ proto_register_nr_rrc(void) { &ett_nr_rrc_T_pdsch_ProcessingType2_Limited, &ett_nr_rrc_FeatureSetDownlink_v15a0, &ett_nr_rrc_FeatureSetDownlink_v1610, - &ett_nr_rrc_T_cbgPDSCH_ProcessingType1_DifferentTB_PerSlot, - &ett_nr_rrc_T_cbgPDSCH_ProcessingType2_DifferentTB_PerSlot, + &ett_nr_rrc_T_cbgPDSCH_ProcessingType1_NumberOfTB_PerSlot, + &ett_nr_rrc_T_cbgPDSCH_ProcessingType2_NumberOfTB_PerSlot, + &ett_nr_rrc_T_intraFreqDAPS_r16, + &ett_nr_rrc_T_pdcch_Monitoring_r16, + &ett_nr_rrc_T_pdsch_ProcessingType1_r16, + &ett_nr_rrc_T_pdsch_ProcessingType2_r16, + &ett_nr_rrc_T_crossCarrierSchedulingProcessing_DiffSCS_r16, + &ett_nr_rrc_PDCCH_MonitoringOccasions_r16, &ett_nr_rrc_DummyA, &ett_nr_rrc_DummyB, &ett_nr_rrc_DummyC, &ett_nr_rrc_DummyD, &ett_nr_rrc_DummyE, &ett_nr_rrc_FeatureSetDownlinkPerCC, + &ett_nr_rrc_FeatureSetDownlinkPerCC_v1620, + &ett_nr_rrc_MultiDCI_MultiTRP_r16, &ett_nr_rrc_FeatureSets, &ett_nr_rrc_SEQUENCE_SIZE_1_maxDownlinkFeatureSets_OF_FeatureSetDownlink, &ett_nr_rrc_SEQUENCE_SIZE_1_maxPerCC_FeatureSets_OF_FeatureSetDownlinkPerCC, @@ -105437,6 +111664,7 @@ proto_register_nr_rrc(void) { &ett_nr_rrc_SEQUENCE_SIZE_1_maxDownlinkFeatureSets_OF_FeatureSetDownlink_v15a0, &ett_nr_rrc_SEQUENCE_SIZE_1_maxDownlinkFeatureSets_OF_FeatureSetDownlink_v1610, &ett_nr_rrc_SEQUENCE_SIZE_1_maxUplinkFeatureSets_OF_FeatureSetUplink_v1610, + &ett_nr_rrc_SEQUENCE_SIZE_1_maxPerCC_FeatureSets_OF_FeatureSetDownlinkPerCC_v1620, &ett_nr_rrc_FeatureSetUplink, &ett_nr_rrc_SEQUENCE_SIZE_1_maxNrofServingCells_OF_FeatureSetUplinkPerCC_Id, &ett_nr_rrc_T_pusch_ProcessingType1_DifferentTB_PerSlot, @@ -105446,6 +111674,11 @@ proto_register_nr_rrc(void) { &ett_nr_rrc_T_pusch_RepetitionTypeB_r16, &ett_nr_rrc_T_cbgPUSCH_ProcessingType1_DifferentTB_PerSlot, &ett_nr_rrc_T_cbgPUSCH_ProcessingType2_DifferentTB_PerSlot, + &ett_nr_rrc_T_intraFreqDAPS_UL_r16, + &ett_nr_rrc_T_multiPUCCH_r16, + &ett_nr_rrc_T_ul_IntraUE_Mux_r16, + &ett_nr_rrc_T_crossCarrierSchedulingProcessing_DiffSCS_r16_01, + &ett_nr_rrc_T_ul_FullPwrMode2_TPMIGroup_r16, &ett_nr_rrc_SRS_AllPosResources_r16, &ett_nr_rrc_SRS_PosResources_r16, &ett_nr_rrc_SRS_PosResourceAP_r16, @@ -105482,9 +111715,7 @@ proto_register_nr_rrc(void) { &ett_nr_rrc_MeasAndMobParametersCommon, &ett_nr_rrc_T_condHandoverParametersCommon_r16, &ett_nr_rrc_MeasAndMobParametersXDD_Diff, - &ett_nr_rrc_T_condHandoverParametersXDD_Diff_r16, &ett_nr_rrc_MeasAndMobParametersFRX_Diff, - &ett_nr_rrc_T_condHandoverParametersFRX_Diff_r16, &ett_nr_rrc_MeasAndMobParametersMRDC, &ett_nr_rrc_MeasAndMobParametersMRDC_v1560, &ett_nr_rrc_MeasAndMobParametersMRDC_v1610, @@ -105493,11 +111724,7 @@ proto_register_nr_rrc(void) { &ett_nr_rrc_T_condPSCellChangeParametersCommon_r16, &ett_nr_rrc_MeasAndMobParametersMRDC_XDD_Diff, &ett_nr_rrc_MeasAndMobParametersMRDC_XDD_Diff_v1560, - &ett_nr_rrc_MeasAndMobParametersMRDC_XDD_Diff_v1610, - &ett_nr_rrc_T_condPSCellChangeParametersXDD_Diff_r16, &ett_nr_rrc_MeasAndMobParametersMRDC_FRX_Diff, - &ett_nr_rrc_MeasAndMobParametersMRDC_FRX_Diff_v1610, - &ett_nr_rrc_T_condPSCellChangeParametersFRX_Diff_r16, &ett_nr_rrc_MIMO_ParametersPerBand, &ett_nr_rrc_T_tci_StatePDSCH, &ett_nr_rrc_T_maxNumberRxTxBeamSwitchDL, @@ -105506,6 +111733,13 @@ proto_register_nr_rrc(void) { &ett_nr_rrc_T_ptrs_DensityRecommendationSetDL, &ett_nr_rrc_T_ptrs_DensityRecommendationSetUL, &ett_nr_rrc_T_beamSwitchTiming, + &ett_nr_rrc_T_ssb_csirs_SINR_measurement_r16, + &ett_nr_rrc_T_multiDCI_multiTRP_Parameters_r16, + &ett_nr_rrc_T_outOfOrderOperationDL_r16, + &ett_nr_rrc_T_maxNumberActivatedTCI_States_r16, + &ett_nr_rrc_T_singleDCI_SDM_scheme_Parameters_r16, + &ett_nr_rrc_T_supportInter_slotTDM_r16, + &ett_nr_rrc_T_beamSwitchTiming_r16, &ett_nr_rrc_DummyG, &ett_nr_rrc_BeamManagementSSB_CSI_RS, &ett_nr_rrc_DummyH, @@ -105513,14 +111747,16 @@ proto_register_nr_rrc(void) { &ett_nr_rrc_CSI_RS_IM_ReceptionForFeedback, &ett_nr_rrc_CSI_RS_ProcFrameworkForSRS, &ett_nr_rrc_CSI_ReportFramework, + &ett_nr_rrc_CSI_ReportFrameworkExt_r16, &ett_nr_rrc_PTRS_DensityRecommendationDL, &ett_nr_rrc_PTRS_DensityRecommendationUL, &ett_nr_rrc_SpatialRelations, &ett_nr_rrc_DummyI, &ett_nr_rrc_MRDC_Parameters, - &ett_nr_rrc_T_maxUplinkDutyCycle_interBandENDC_TDD_PC2_r16, &ett_nr_rrc_MRDC_Parameters_v1580, &ett_nr_rrc_MRDC_Parameters_v1590, + &ett_nr_rrc_MRDC_Parameters_v1620, + &ett_nr_rrc_T_maxUplinkDutyCycle_interBandENDC_TDD_PC2_r16, &ett_nr_rrc_NRDC_Parameters, &ett_nr_rrc_T_dummy_06, &ett_nr_rrc_NRDC_Parameters_v1570, @@ -105533,10 +111769,15 @@ proto_register_nr_rrc(void) { &ett_nr_rrc_Phy_Parameters, &ett_nr_rrc_Phy_ParametersCommon, &ett_nr_rrc_T_crossSlotScheduling_r16, + &ett_nr_rrc_T_pusch_RepetitionTypeA_r16, + &ett_nr_rrc_T_maxTotalResourcesForAcrossFreqRanges_r16, + &ett_nr_rrc_T_harqACK_separateMultiDCI_MultiTRP_r16, + &ett_nr_rrc_T_bwp_SwitchingMultiCCs_r16, &ett_nr_rrc_Phy_ParametersXDD_Diff, &ett_nr_rrc_Phy_ParametersFRX_Diff, &ett_nr_rrc_T_mux_SR_HARQ_ACK_CSI_PUCCH_OncePerSlot, &ett_nr_rrc_T_pdcch_BlindDetectionNRDC, + &ett_nr_rrc_T_maxTotalResourcesForOneFreqRange_r16, &ett_nr_rrc_Phy_ParametersFR1, &ett_nr_rrc_Phy_ParametersFR2, &ett_nr_rrc_Phy_ParametersMRDC, @@ -105569,12 +111810,15 @@ proto_register_nr_rrc(void) { &ett_nr_rrc_T_channelBW_UL_IAB_r16, &ett_nr_rrc_T_fr1_100mhz_01, &ett_nr_rrc_T_fr2_200mhz_01, + &ett_nr_rrc_T_activeConfiguredGrant_r16, + &ett_nr_rrc_T_sps_r16, &ett_nr_rrc_RF_ParametersMRDC, &ett_nr_rrc_T_supportedBandCombinationListNEDC_Only_v15a0, &ett_nr_rrc_RLC_Parameters, &ett_nr_rrc_SDAP_Parameters, &ett_nr_rrc_SidelinkParameters_r16, &ett_nr_rrc_SidelinkParametersNR_r16, + &ett_nr_rrc_SEQUENCE_SIZE_1_maxBands_OF_BandSidelink_r16, &ett_nr_rrc_SidelinkParametersEUTRA_r16, &ett_nr_rrc_SEQUENCE_SIZE_1_maxBandsEUTRA_OF_BandSidelinkEUTRA_r16, &ett_nr_rrc_RLC_ParametersSidelink_r16, @@ -105584,6 +111828,17 @@ proto_register_nr_rrc(void) { &ett_nr_rrc_MAC_ParametersSidelinkXDD_Diff_r16, &ett_nr_rrc_BandSidelinkEUTRA_r16, &ett_nr_rrc_T_gnb_ScheduledMode3SidelinkEUTRA_r16, + &ett_nr_rrc_BandSidelink_r16, + &ett_nr_rrc_T_sl_Reception_r16, + &ett_nr_rrc_T_scs_CP_PatternRxSidelink_r16, + &ett_nr_rrc_T_fr1_r16, + &ett_nr_rrc_T_fr2_r16, + &ett_nr_rrc_T_sl_TransmissionMode1_r16, + &ett_nr_rrc_T_scs_CP_PatternTxSidelinkModeOne_r16, + &ett_nr_rrc_T_fr1_r16_01, + &ett_nr_rrc_T_fr2_r16_01, + &ett_nr_rrc_T_sync_Sidelink_r16, + &ett_nr_rrc_T_psfch_FormatZeroSidelink_r16, &ett_nr_rrc_SON_Parameters_r16, &ett_nr_rrc_SpatialRelationsSRS_Pos_r16, &ett_nr_rrc_SRS_SwitchingTimeNR, @@ -105624,7 +111879,7 @@ proto_register_nr_rrc(void) { &ett_nr_rrc_UE_NR_CapabilityAddFRX_Mode_v1540, &ett_nr_rrc_UE_NR_CapabilityAddFRX_Mode_v1610, &ett_nr_rrc_BAP_Parameters_r16, - &ett_nr_rrc_UnlicensedParametersPerBand_r16, + &ett_nr_rrc_SharedSpectrumChAccessParamsPerBand_r16, &ett_nr_rrc_AreaConfiguration_r16, &ett_nr_rrc_SEQUENCE_SIZE_1_maxFreq_OF_InterFreqTargetInfo_r16, &ett_nr_rrc_AreaConfig_r16, @@ -105678,14 +111933,14 @@ proto_register_nr_rrc(void) { &ett_nr_rrc_ReleasePreferenceConfig_r16, &ett_nr_rrc_Sensor_NameList_r16, &ett_nr_rrc_TraceReference_r16, - &ett_nr_rrc_UEMeasurementsAvailable_r16, + &ett_nr_rrc_UE_MeasurementsAvailable_r16, &ett_nr_rrc_VisitedCellInfoList_r16, &ett_nr_rrc_VisitedCellInfo_r16, &ett_nr_rrc_T_visitedCellId_r16, &ett_nr_rrc_T_nr_CellId_r16, - &ett_nr_rrc_T_pci_arfcn_r16_02, - &ett_nr_rrc_T_eutra_CellId_r16, &ett_nr_rrc_T_pci_arfcn_r16_03, + &ett_nr_rrc_T_eutra_CellId_r16, + &ett_nr_rrc_T_pci_arfcn_r16_04, &ett_nr_rrc_WLAN_NameList_r16, &ett_nr_rrc_SL_BWP_Config_r16, &ett_nr_rrc_SL_BWP_Generic_r16, @@ -105718,7 +111973,7 @@ proto_register_nr_rrc(void) { &ett_nr_rrc_SEQUENCE_SIZE_1_maxSL_LCID_r16_OF_SL_RLC_BearerConfig_r16, &ett_nr_rrc_T_sl_CSI_SchedulingRequestId_r16, &ett_nr_rrc_SL_ConfiguredGrantConfig_r16, - &ett_nr_rrc_T_rrc_ConfiguredSidelinkGrant, + &ett_nr_rrc_T_rrc_ConfiguredSidelinkGrant_r16, &ett_nr_rrc_SL_CG_MaxTransNumList_r16, &ett_nr_rrc_SL_CG_MaxTransNum_r16, &ett_nr_rrc_SL_PeriodCG_r16, @@ -105791,7 +112046,6 @@ proto_register_nr_rrc(void) { &ett_nr_rrc_SL_ScheduledConfig_r16, &ett_nr_rrc_T_sl_PSFCH_ToPUCCH_r16, &ett_nr_rrc_MAC_MainConfigSL_r16, - &ett_nr_rrc_SL_TimingConfig_r16, &ett_nr_rrc_SL_ConfiguredGrantConfigList_r16, &ett_nr_rrc_SEQUENCE_SIZE_1_maxNrofCG_SL_r16_OF_SL_ConfigIndexCG_r16, &ett_nr_rrc_SEQUENCE_SIZE_1_maxNrofCG_SL_r16_OF_SL_ConfiguredGrantConfig_r16, @@ -105836,7 +112090,7 @@ proto_register_nr_rrc(void) { &ett_nr_rrc_T_nonCriticalExtension_53, &ett_nr_rrc_SLRB_Config_r16, &ett_nr_rrc_SL_SDAP_ConfigPC5_r16, - &ett_nr_rrc_SEQUENCE_SIZE_1_maxNrofSL_QFIsPerDest_r16_OF_SL_PFI_r16, + &ett_nr_rrc_SEQUENCE_SIZE_1_maxNrofSL_QFIsPerDest_r16_OF_SL_PQFI_r16, &ett_nr_rrc_SL_PDCP_ConfigPC5_r16, &ett_nr_rrc_SL_RLC_ConfigPC5_r16, &ett_nr_rrc_T_sl_AM_RLC_r16_01, @@ -105864,14 +112118,20 @@ proto_register_nr_rrc(void) { &ett_nr_rrc_T_criticalExtensions_52, &ett_nr_rrc_T_criticalExtensionsFuture_52, &ett_nr_rrc_UECapabilityInformationSidelink_IEs_r16, + &ett_nr_rrc_SEQUENCE_SIZE_1_maxBands_OF_PC5_BandSidelink_r16, &ett_nr_rrc_T_nonCriticalExtension_57, &ett_nr_rrc_PDCP_ParametersSidelink_r16, &ett_nr_rrc_PC5_RLC_ParametersSidelink_r16, - &ett_nr_rrc_UE_CapabilityRequestFilterSidelink_r16, - &ett_nr_rrc_T_nonCriticalExtension_58, + &ett_nr_rrc_BandCombinationListSidelinkNR_r16, + &ett_nr_rrc_BandCombinationParametersSidelinkNR_r16, + &ett_nr_rrc_PC5_BandSidelink_r16, + &ett_nr_rrc_T_sl_Reception_r16_01, + &ett_nr_rrc_T_scs_CP_PatternRxSidelink_r16_01, + &ett_nr_rrc_T_fr1_r16_02, + &ett_nr_rrc_T_fr2_r16_02, /*--- End of included file: packet-nr-rrc-ettarr.c ---*/ -#line 685 "./asn1/nr-rrc/packet-nr-rrc-template.c" +#line 683 "./asn1/nr-rrc/packet-nr-rrc-template.c" &ett_nr_rrc_DedicatedNAS_Message, &ett_nr_rrc_targetRAT_MessageContainer, &ett_nr_rrc_nas_Container, @@ -105912,8 +112172,6 @@ proto_register_nr_rrc(void) { &ett_nr_rrc_velocityEstimate_r16, &ett_nr_rrc_sensor_MeasurementInformation_r16, &ett_nr_rrc_sensor_MotionInformation_r16, - &ett_nr_rrc_bandCombinationListEUTRA1_r16, - &ett_nr_rrc_bandCombinationListEUTRA2_r16, &ett_nr_rrc_bandParametersSidelinkEUTRA1_r16, &ett_nr_rrc_bandParametersSidelinkEUTRA2_r16, &ett_nr_rrc_sl_ParametersEUTRA1_r16, @@ -105959,7 +112217,7 @@ proto_register_nr_rrc(void) { /*--- End of included file: packet-nr-rrc-dis-reg.c ---*/ -#line 752 "./asn1/nr-rrc/packet-nr-rrc-template.c" +#line 748 "./asn1/nr-rrc/packet-nr-rrc-template.c" nr_rrc_etws_cmas_dcs_hash = wmem_map_new_autoreset(wmem_epan_scope(), wmem_file_scope(), g_direct_hash, g_direct_equal); |