diff options
| author | John Thacker <johnthacker@gmail.com> | 2022-06-15 23:21:35 -0400 |
|---|---|---|
| committer | A Wireshark GitLab Utility <gerald+gitlab-utility@wireshark.org> | 2022-06-16 03:51:59 +0000 |
| commit | 4d578542944dfc475a5fe1fd8e2696bced7bb4fe (patch) | |
| tree | efa920439f8536675d10a3ab65576f799af38fe8 | |
| parent | 1bd24bb95dc215a55fad0056e59a8494faef1493 (diff) | |
ethercat: Fix EEPROM Ctrl/Status bitmask fields
When the field width was corrected by commit
b240d5baa062a475ff0943b91205eb2aee2a0471, the masks got messed
up. There's 4 reserved bits that don't have fields and the bits
are in Little Endian order. Fix #18132.
| -rw-r--r-- | plugins/epan/ethercat/packet-ethercat-datagram.c | 17 |
1 files changed, 9 insertions, 8 deletions
diff --git a/plugins/epan/ethercat/packet-ethercat-datagram.c b/plugins/epan/ethercat/packet-ethercat-datagram.c index 083563c012..69af5fffc2 100644 --- a/plugins/epan/ethercat/packet-ethercat-datagram.c +++ b/plugins/epan/ethercat/packet-ethercat-datagram.c @@ -3024,19 +3024,20 @@ void proto_register_ecat(void) }, { &hf_ecat_reg_ctrlstat_wraccess, {"Write access", "ecat.reg.ctrlstat.wraccess", - FT_BOOLEAN, 16, TFS(&tfs_local_true_false), 0x1000, NULL, HFILL } + FT_BOOLEAN, 16, TFS(&tfs_local_true_false), 0x0001, NULL, HFILL } }, + /* Next 4 bits reserved */ { &hf_ecat_reg_ctrlstat_eepromemul, {"EEPROM emulation", "ecat.reg.ctrlstat.eepromemul", - FT_BOOLEAN, 16, TFS(&tfs_esc_reg_502_5), 0x2000, NULL, HFILL } + FT_BOOLEAN, 16, TFS(&tfs_esc_reg_502_5), 0x0020, NULL, HFILL } }, { &hf_ecat_reg_ctrlstat_8bacc, {"8 byte access", "ecat.reg.ctrlstat.8bacc", - FT_BOOLEAN, 16, TFS(&tfs_local_true_false), 0x4000, NULL, HFILL } + FT_BOOLEAN, 16, TFS(&tfs_local_true_false), 0x0040, NULL, HFILL } }, { &hf_ecat_reg_ctrlstat_2bacc, {"2 byte address", "ecat.reg.ctrlstat.2bacc", - FT_BOOLEAN, 16, TFS(&tfs_local_true_false), 0x8000, NULL, HFILL } + FT_BOOLEAN, 16, TFS(&tfs_local_true_false), 0x0080, NULL, HFILL } }, { &hf_ecat_reg_ctrlstat_rdacc, {"Read access", "ecat.reg.ctrlstat.rdacc", @@ -3056,19 +3057,19 @@ void proto_register_ecat(void) }, { &hf_ecat_reg_ctrlstat_lderr, {"Load error", "ecat.reg.ctrlstat.lderr", - FT_BOOLEAN, 16, TFS(&tfs_local_true_false), 0x0010, NULL, HFILL } + FT_BOOLEAN, 16, TFS(&tfs_local_true_false), 0x1000, NULL, HFILL } }, { &hf_ecat_reg_ctrlstat_cmderr, {"Cmd error", "ecat.reg.ctrlstat.cmderr", - FT_BOOLEAN, 16, TFS(&tfs_local_true_false), 0x0020, NULL, HFILL } + FT_BOOLEAN, 16, TFS(&tfs_local_true_false), 0x2000, NULL, HFILL } }, { &hf_ecat_reg_ctrlstat_wrerr, {"Write error", "ecat.reg.ctrlstat.wrerr", - FT_BOOLEAN, 16, TFS(&tfs_local_true_false), 0x0040, NULL, HFILL } + FT_BOOLEAN, 16, TFS(&tfs_local_true_false), 0x4000, NULL, HFILL } }, { &hf_ecat_reg_ctrlstat_busy, {"Busy", "ecat.reg.ctrlstat.busy", - FT_BOOLEAN, 16, TFS(&tfs_local_true_false), 0x0080, NULL, HFILL } + FT_BOOLEAN, 16, TFS(&tfs_local_true_false), 0x8000, NULL, HFILL } }, { &hf_ecat_reg_addrl, {"EEPROM Address Lo (0x504)", "ecat.reg.addrl", |