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When the uC firmware starts, assert the (high-active) _RESET GPIOs,
which will cause the transistors to drive the mPCIe slot !PERST
low.
There is of course a short instance of time between the uC reset
until it executes wwan_perst_init(). To avoid this, a hardware
pull-up would have to be re-worked onto the _RESET[1..4] signals
on the PCBA
Change-Id: I8742fefa4bf02e728e34d5d8cbc0fda771e78ffb
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Change-Id: Ic953148600d82285281abcb573a07e2e9b8082a7
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Let's move low-level handling of endpoint queue refill from the
individual apps into common/shared code.
Now the main simply has to call usb_process() for every interface,
and inbound messages will be dispatched to call-back functions from
there.
Change-Id: Ic6f9c6c1ffdbb0c9c3b284371ecc83b17e3be746
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This adds an unconditional endpoint reset procedure to every SET_FEATURE(UnHalt).
It doesn't really make sense that this is required, *particularly* as
we *MUST NOT* set bEndpoint->bank to 0 here.
Without this patch, I'm observing the following problem:
Every first OUT transfer after a SET_INTERFACE + UNHALT on a bulk endpoint
is lost. "lost" means that it completes successfully on the host, can
be seen completing successfully with an ACK on a USB bus analyzer,
but still doesn't show up in the firmware. No Endpoint Interrupt
is generated.
This can be reproduced by calling libusb_set_interface_alt_setting()
from the host and then submitting a single OUT transfer.
Change-Id: I18ed530e617baddf76e8f9829512443ce2a76e0d
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Before this patch, we used to st ci->vcc_active depending on the
instantaneous ADC reading of VCC. Is it > .5v, we claim VCC is active,
and if it's below, VCC is inactive.
With this patch we move to an edge triggered approach: Only change
ci->vcc_active if the previous reading was different from the current
reading.
FIXME: why?
Change-Id: I71b703162219484e43638f1f2f692e9dd554ef55
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The simtrace-tool isa command line tool which can be used to e.g.
manually request a modem reset.
Change-Id: I3a8896ac2b3caef7590b51118359e5caed820a40
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we shouldn't use a local copy of the device id list, which is already
outdated now that OCTSIMTEST support has been added to libosmo-st2
Change-Id: I2231006b94c33fe3b28ce37b0d54c67206751058
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This allows us to use different log levels, and permits the user to use
other log targets.
Change-Id: I08ef7cfa5d8734882746a11ccd5f059d757401ae
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Change-Id: I3c3744673ba53750cb66aa5023c8228edb006bfc
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Change-Id: Ie1483ccf8465df0d640d55e50421fda910dced4a
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Back in I8c9b0c3d862a967832134b24252577739182da62 we added support
for enabling the card_insert signal, but not for explicit disable
of it. Let's fix that.
Change-Id: I6f32bde60674119c9912e51059a53b5ee74d074a
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Change-Id: I41864bc2f64905a4f2ccb50769b1840e8a490c76
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The octsimtest board can control the card-insert contact of the OCTSIM
under test via an external I2C gpio multiplexer; let's add support for
that.
Change-Id: I8c9b0c3d862a967832134b24252577739182da62
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move it out of the general command dispatch switch statement
and into a separate function.
Change-Id: Ia40c3d9999be68248da0dcc69d298450ca6e4869
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* driver should not have hard-coded understanding about I/O directions
* board code should pass the I/O direction to driver
* board code should use the correct I/O directions (A0..7, B0: output)
Change-Id: Id4a8e012a33cee01bb489e612e17920760b9be59
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Change-Id: I4cdb250d2e1dbc5b8b0169f8b7c21e288b492e1d
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Change-Id: I776c9106bcd4ceb24a5d50ea05c6025dedb73822
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Change-Id: Ia38bbb85c2828ab7307ffe688e50d7cdf70d6d39
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octsimtest has a resistive voltage divider in front of the VCC ADC
in order to also detect 5V. We must make the thresholds board-specific
and adjust them for octsimtest.
Change-Id: I9e4adb4f349d2d838ea4100eb49271f3a0e7a2a5
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Change-Id: I815d39190e944d9512ffc8e5f581515d7be9834f
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Contrary to other hardware designs, octsimtest has a level-shifter in
the I/O line to support testing with 1.8, 3 and 5V. This level shifter
is bi-directional, but the direction needs to be explicitly specified
via the SIM_IO_DIR signal attached to PA26.
Change-Id: I44171363b5bd69d6049b12c86f8143be83557cb2
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* code for controlling the Card slot + frequencyt divider muxes
* put everything in place to build cardem application for it
Change-Id: I7e03e0c0f2999a1ce2dad966d98e22033fa58465
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The octsimtest board only supports cardem mode, not 'ccid'
nor 'sniffer'. Remove related GPIO pin #defines from board.h
Change-Id: I43e8631d945ba183a1e5b1e37dd4565adb377154
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This is a custom board for production testing of the sysmoOCTSIM,
an 8-slot smart card reader.
Change-Id: I65839be50ac896c76f34755fb2800f836f6cdae4
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Change-Id: Icc202e60445d9be1cdcd61176db5ed1704d583e7
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When the cardem detects a reset from the phone/modem, pass this on
to the actual card via the PC/SC reader. This is important to
reset the card state whenever requested by the stack/driver on the
phone/modem.
Change-Id: I7056476c5f81e8aa8f550afb86bf2380d1497ebb
Depends: libosmocore 20199da02d37a6d284915a27ec12641e79b8781c
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SIMtrace IRQ STATUS: flags=0x13, fi=9, di=6, wi=10 wtime=9600 (RESET VCC CLK )
is more understandable than
SIMtrace IRQ STATUS: flags=0x13, fi=9, di=6, wi=10 wtime=9600
Change-Id: I5bbfa1d99ebee4b297d894a5f444dbe743c7ab70
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This reverts commit baa62777c845c3466fae5d80729e6b2bd754eea8 which
deleted simtrace-cardem builds to prevent them from being published.
Change-Id: I63fd4bea2985fcc87f202d8b69a4f24661858185
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Now that it is supported, we should also build + publish the related
binaries.
Change-Id: I9231503b865adc863959d74d98e7f24f83c293e9
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likewise, enable HAVE_SNIFFER currently only if we build the sniffer
firmware.
It's been many years too long to finally get those all merged in one
firmware :(
Change-Id: Ib433f180746f75458a44f4988643465bd846b04b
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Before this patch, we would always use either a hard-coded default
ATR from the source code, or we would use one that the user specified
on the command line.
The more sane default is to pass-through the real ATR of the card.
Change-Id: I75bf618a6b0d983727de4c2f19b4b48ec3e12af8
Closes: OS#5107
Requires: libosmocore.git 22117a7164012d6d88fc202cd63df79c6068484d
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There's some code that wasnts to goto within the while loop, and there's
some other code that wants to goto after the while loop. Don't jump
from outside the while loop into the while loop.
Change-Id: Ic2a94ad034dd259f15712687443b569f0d18ff3f
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We should use service-aliases and not the primary host name, as
that makes migration between machines hard.
Change-Id: I34b18457268ae6f8ae3a053c5424210074a4d52e
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As we store the waiting time (WT) in 'etu', we must adjust the formula
from ISO 7816-3. The 'Fi' component in the formula only exists to
compute clock cycles from the etu, which we don't need here.
Without this patch, the waiting time would be way too large (by a factor
of 372 in the default case).
Change-Id: Ia21bc7303f9b38834b5b1753983ed2a99bfc7d95
Related: OS#1704
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The existing code started the timer once (and expired once) but didn't
properly handle re-starting of the timer. Neither did it handle
the 'half time expiration' case. If we want to call a function after
half the WT expiring, we must of course program the hardware for half
the timeout, and not the full timeout...
Change-Id: Ia999d97f835c27597fcd1cf7ac78bac0ab9c98c1
Related: OS#1704
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Instead of using the timer/counter peripheral to handle the waiting time
and corresponding timeout, the USART peripheral internal timeout
mechanism is used.
This is particularly important for the SIMtrace board since there
(contrary to other boards) the I/O signal is not wired to a TIO pin
of the timer/counter block, and hence Rx/Tx data cannot reset that
timer/counter.
As a result of this migration, cardem is now supported not only on
owhw + qmod, but also on the simtrace board.
The guts of this change have been lifted out of Change-Id
Ibcb2c8cace9137695adf5fb3de43566f7cfb93b5 by Kevin Redon, which was
unfortunately touching various different topics at the same time and
hence was split up. Some improvements are the introduction of the
ENABLE_TX_TIMER_ONLY mode, which avoids the USART interrupt handler
getting hammered with TXRDY between release of RST and start of the ATR.
Change-Id: Ibcb2c8cace9137695adf5fb3de43566f7cfb93b5
Related: OS#1704
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Those are already initialized at various transitions of the master
7816 FSM, but let's properly initialize them at start-up, too.
Change-Id: I81b2a8ef3284559164700d94717e4ccf008f53df
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* enter ISO_S_WAIT_RST when RST is asserted
* enter ISO_S_WAIT_ATR only when we RST is released while in state ISO_S_WAIT_RST
Change-Id: I620333aa8d45561a8028b948955a27f667b58406
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Fi/Di are not the index into the table, but the contents of the table
as resolved by Fi_index / Di_index. Let's clarify the terminology.
Change-Id: If364e08e7c9a3a9707e6d54b9267c6a7c088e415
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The ISO7816 spec terms are well-defined, let's not abuse them. We used
to consider "Fi" as the "index into the table of F values", while the
spec actually considers Fi as the initial value for F.
Let's make sure we use the terms quite clearly:
* Fi and Di are the initial values for F and D
* F*_index and D*_index are the indexes into the ISO7816-3 Tables
Furthermore, let's track Fi separately from F, as e.g. the waiting
time definition only considers Fi as indicated in the ATR, despite
an actually different F value might have been negotiated via PTS
meanwhile.
Change-Id: Ieb2425e8380a81b79df7b2bd072902994e9c3ee7
Related: OS##1704
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As we will soon introduce the distinction between Fi and F, we should
use uppercase letters, as lower-case 'f' is defined in ISO7816-3 as
the frequency, which is different from the upper-case 'F'.
Change-Id: Iaede621551520576e9b9af878fa46fbc88e59c2a
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the simtrace board uses a bus switch not used on qmod and owhw to
switch the SIM between physical and virtual
Change-Id: Ieaf2ed4761fc3e04f33f9aac5c04a768c9a6f71e
Related: OS#1704
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The comment didn't reflect the source. I checked all users and
the code consistently stores the waiting time in units of 'etu'.
Change-Id: I2bc4a7c19cee5fb487ad639ee48ecaea706f6172
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Disable stack protector for all boards/apps by default, not only
qmod-dfu. Use 'make STACK_PROTECTOR=1' to enable.
This was recommened by Eric:
"I'd argue that we do not want this in general, since it adds canaries
to all functions that deal with buffers, and therefore impacts the
overall timing in a non determinstic way depending on inlining and
optimizations, while contributing nothing in non debug builds."
Related: OS#5081
Change-Id: I30ad97f231ea5b401def650bc9adc7e9f2770df0
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Prevent build failure on debian 9, ubuntu 20.04, 20.10, where
bin/qmod-dfu-flash.elf does not fit the ROM.
Fixes: OS#5081
Change-Id: I9fffe4c323094679062428f41a4246b1c1b30ca2
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This reverts commit 4a29f64cbe12ca9fbddd66ae10b614388fef5e9b.
The code replicates to a large extent what is already present in iso7816_fidi.c
and I have serious doubts about the correctness of the computation in
its iso7816_3_calculate_wt() function.
Change-Id: I80dab4401d13306d573a6a35ce8729d2acc141e4
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This reverts commit 4a58c08d671adc928fea9dc12018c26818f24d4e.
The code replicates to a large extent what is already present in iso7816_fidi.c
and I have serious doubts about the correctness of the computation in
its iso7816_3_calculate_wt() function.
Change-Id: I3f26da4e9aa8d7b0f4b4b7992269cf365a643ec7
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* support Interrupt STATUS notifications
* use osmocom libusb abstraction
* use asynchronous URBs for interrupt + bulk
Change-Id: Ib04798572295f25477719124530b6584780c5b75
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this is just to better understand the flow
Change-Id: I045286836176da729cc8c863866d6f6aa3836592
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While this differs from tha naming in the schematics ({CLK,IO}_PHONE),
this matches the naming scheme used for USIM2 and the naming on other
boards.
Change-Id: I486b14260faec897e8c8698c4b7987bf36492497
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