set main clock for using UART at 921600 bps

UART baud rate is main clock (MCK) divided by CR*16.
The MCK values are chosen >= 48 MHz and <= 64 MHz to have a near
integer value CR for a baud rate of 921600 bps.
The end MCK frequency between simtrace and qmod differ slightly
but are close to 58 MHz.

Change-Id: Iaa4a97fc68494c93b9d128503515d88049de506c

5 files changed, 31 insertions, 25 deletions

diff --git a/firmware/libboard/common/include/board_common.h b/firmware/libboard/common/include/board_common.h
index 1b29680..db030ad 100644
--- a/firmware/libboard/common/include/board_common.h
+++ b/firmware/libboard/common/include/board_common.h
@@ -53,8 +53,6 @@
 /** Core definition */
 #define cortexm3
 
-#define BOARD_MCK     48000000
-
 #define PIO_LED_RED     PIO_PA17
 #define PIO_LED_GREEN   PIO_PA18
 
diff --git a/firmware/libboard/common/source/board_lowlevel.c b/firmware/libboard/common/source/board_lowlevel.c
index b82f6f3..2be6134 100644
--- a/firmware/libboard/common/source/board_lowlevel.c
+++ b/firmware/libboard/common/source/board_lowlevel.c
@@ -46,39 +46,39 @@
 #define BOARD_OSCOUNT   (CKGR_MOR_MOSCXTST(0x8))
 #define BOARD_MCKR      (PMC_MCKR_PRES_CLK | PMC_MCKR_CSS_PLLA_CLK)
 
-#if (BOARD_MCK == 48000000)
-#if (BOARD_MAINOSC == 18432000)
-/* Clock settings at 48MHz  for 18 MHz crystal */
-#define BOARD_PLLAR     (CKGR_PLLAR_STUCKTO1 \
-					   | CKGR_PLLAR_MULA(13-1) \
-					   | CKGR_PLLAR_PLLACOUNT(0x1) \
-					   | CKGR_PLLAR_DIVA(5))
-#elif (BOARD_MAINOSC == 12000000)
-/* QMod has 12 MHz clock, so multply by 8 (96 MHz) and divide by 2 */
+/** configure PLL to generate main clock based on main oscillator frequency */
+#if (BOARD_MAINOSC == 12000000) && (BOARD_MCK == 48000000)
 #define BOARD_PLLAR     (CKGR_PLLAR_STUCKTO1 \
 					   | CKGR_PLLAR_MULA(8-1) \
 					   | CKGR_PLLAR_PLLACOUNT(0x1) \
 					   | CKGR_PLLAR_DIVA(2))
-#else
-#error "Please define PLLA config for your MAINOSC frequency"
-#endif /* MAINOSC */
-#elif (BOARD_MCK == 64000000)
-#if (BOARD_MAINOSC == 18432000)
-/* Clock settings at 64MHz  for 18 MHz crystal: 64.512 MHz */
+#elif (BOARD_MAINOSC == 12000000) && (BOARD_MCK == 58000000)
 #define BOARD_PLLAR     (CKGR_PLLAR_STUCKTO1 \
-					   | CKGR_PLLAR_MULA(7-1) \
+					   | CKGR_PLLAR_MULA(29-1) \
 					   | CKGR_PLLAR_PLLACOUNT(0x1) \
-					   | CKGR_PLLAR_DIVA(2))
-#elif (BOARD_MAINOSC == 12000000)
-/* QMod has 12 MHz clock, so multply by 10 / div by 2: 60 MHz */
+					   | CKGR_PLLAR_DIVA(6))
+#elif (BOARD_MAINOSC == 12000000) && (BOARD_MCK == 60000000)
 #define BOARD_PLLAR     (CKGR_PLLAR_STUCKTO1 \
 					   | CKGR_PLLAR_MULA(10-1) \
 					   | CKGR_PLLAR_PLLACOUNT(0x1) \
 					   | CKGR_PLLAR_DIVA(2))
-#error "Please define PLLA config for your MAINOSC frequency"
-#endif /* MAINOSC */
+#elif (BOARD_MAINOSC == 18432000) && (BOARD_MCK == 47923200)
+#define BOARD_PLLAR     (CKGR_PLLAR_STUCKTO1 \
+					   | CKGR_PLLAR_MULA(13-1) \
+					   | CKGR_PLLAR_PLLACOUNT(0x1) \
+					   | CKGR_PLLAR_DIVA(5))
+#elif (BOARD_MAINOSC == 18432000) && (BOARD_MCK == 58982400)
+#define BOARD_PLLAR     (CKGR_PLLAR_STUCKTO1 \
+					   | CKGR_PLLAR_MULA(16-1) \
+					   | CKGR_PLLAR_PLLACOUNT(0x1) \
+					   | CKGR_PLLAR_DIVA(5))
+#elif (BOARD_MAINOSC == 18432000) && (BOARD_MCK == 64512000)
+#define BOARD_PLLAR     (CKGR_PLLAR_STUCKTO1 \
+					   | CKGR_PLLAR_MULA(7-1) \
+					   | CKGR_PLLAR_PLLACOUNT(0x1) \
+					   | CKGR_PLLAR_DIVA(2))
 #else
-	#error "No PLL settings for current BOARD_MCK."
+	#error "Please define PLLA config for your BOARD_MCK/MAINOSC frequency"
 #endif
 
 #if (BOARD_MAINOSC == 12000000)
diff --git a/firmware/libboard/owhw/include/board.h b/firmware/libboard/owhw/include/board.h
index be6bb17..401fb73 100644
--- a/firmware/libboard/owhw/include/board.h
+++ b/firmware/libboard/owhw/include/board.h
@@ -25,7 +25,10 @@
 /** Board definition */
 #define owhw
 
+/** oscillator used as main clock source (in Hz) */
 #define BOARD_MAINOSC 18432000
+/** desired main clock frequency (in Hz, based on BOARD_MAINOSC) */
+#define BOARD_MCK 58982400 // 18.432 * 16 / 5
 
 /* USIM 2 interface (USART) */
 #define PIN_USIM2_CLK		{PIO_PA2, PIOA, ID_PIOA, PIO_PERIPH_B, PIO_DEFAULT}
diff --git a/firmware/libboard/qmod/include/board.h b/firmware/libboard/qmod/include/board.h
index c23ad50..a738daa 100644
--- a/firmware/libboard/qmod/include/board.h
+++ b/firmware/libboard/qmod/include/board.h
@@ -28,7 +28,10 @@
 /** Board definition */
 #define qmod
 
+/** oscillator used as main clock source (in Hz) */
 #define BOARD_MAINOSC 12000000
+/** desired main clock frequency (in Hz, based on BOARD_MAINOSC) */
+#define BOARD_MCK 58000000 // 18.432 * 29 / 6
 
 /* USIM 2 interface (USART) */
 #define PIN_USIM2_CLK		{PIO_PA2, PIOA, ID_PIOA, PIO_PERIPH_B, PIO_DEFAULT}
diff --git a/firmware/libboard/simtrace/include/board.h b/firmware/libboard/simtrace/include/board.h
index 6751863..0c1e533 100644
--- a/firmware/libboard/simtrace/include/board.h
+++ b/firmware/libboard/simtrace/include/board.h
@@ -26,8 +26,10 @@
 /* Board definition */
 #define simtrace
 
-/* Board main oscillator frequency (in Hz) */
+/** oscillator used as main clock source (in Hz) */
 #define BOARD_MAINOSC 18432000
+/** desired main clock frequency (in Hz, based on BOARD_MAINOSC) */
+#define BOARD_MCK 58982400 // 18.432 * 16 / 5
 
 /** Pin configuration **/
 /* Button to force bootloader start (shorted to ground when pressed */