From 0c685d2827ad591484b3ef667834a81967b5fad7 Mon Sep 17 00:00:00 2001 From: Fabien Chouteau Date: Thu, 26 Jan 2012 18:03:15 +0100 Subject: GRLIB UART: Add RX channel This patch implements the RX channel of GRLIB UART with a FIFO to improve data rate. Signed-off-by: Fabien Chouteau Signed-off-by: Blue Swirl --- trace-events | 1 + 1 file changed, 1 insertion(+) (limited to 'trace-events') diff --git a/trace-events b/trace-events index 75f6e17ab..5d0574964 100644 --- a/trace-events +++ b/trace-events @@ -351,6 +351,7 @@ grlib_irqmp_writel_unknown(uint64_t addr, uint32_t value) "addr 0x%"PRIx64" valu # hw/grlib_apbuart.c grlib_apbuart_event(int event) "event:%d" grlib_apbuart_writel_unknown(uint64_t addr, uint32_t value) "addr 0x%"PRIx64" value 0x%x" +grlib_apbuart_readl_unknown(uint64_t addr) "addr 0x%"PRIx64"" # hw/leon3.c leon3_set_irq(int intno) "Set CPU IRQ %d" -- cgit v1.2.3