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2008-07-26Fix qemu_ld64 constraint listmalc1-1/+1
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4949 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-26Use proper offset for LR save slotmalc1-2/+2
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4948 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-26Reduce amount of space reserved for tb jumpmalc1-1/+1
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4947 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-26Fix and improve 64 bit immediate loadingmalc1-4/+7
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4946 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-26Fix EXTSW argumentsmalc1-1/+1
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4945 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-24Use proper value for TCG_TARGET_CALL_STACK_OFFSETmalc1-1/+1
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4941 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-24Emit and use adhoc function descriptor for code_gen_prologue on PPC64malc2-18/+10
Thus avoiding fragile inline assembly hackery to call into generated code. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4939 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-23Remove neg_i32 debugging leftovermalc1-2/+0
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4935 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-23Provide extNs_M instructionsmalc4-0/+40
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4934 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-23Remove stray "i" from mul_i64malc1-1/+1
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4933 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-23Preliminary PPC64/Linux host supportmalc3-0/+1550
ppc64.ld from Heikki Lindholm's patch http://marc.info/?l=qemu-devel&m=114086179024634&w=2 Issues: x86_64 tripple faults shortly after decompressing the kernel No immediate versions of most 64 bit operations More... git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4932 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-0764 bit signed comparison fix (Juergen Lock)bellard1-4/+4
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4855 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-07Fix 64 bit constant generationblueswir11-4/+6
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4854 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-03Fuse EQ and NE handling in tcg_out_brcond2malc1-7/+4
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4845 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-03Mask LL portion of B to 24 bits in tcg_out_b (Thanks to Thiemo Seufer)malc1-1/+1
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4841 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-29Suppress bogus compiler warnings.pbrook1-0/+3
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4803 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-23According to gcc-4.3.0/gcc/config/rs6000/crtsavres.asm R13 is volatilemalc1-1/+0
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4779 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-23Shuffle contents of tcg_target_reg_alloc_ordermalc1-18/+18
Move reserved/volatile registers down. Currently qemu_ld/stXX are marked with TCG_OPF_CALL_CLOBBER and since memory accesses are frequent and R3 through R12 are volatile moving this down results in less spills and tighter generated code. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4778 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-18Save LR into proper place on callers stack framemalc1-2/+2
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4745 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-12Reimplement brcond2 and refactor brcondmalc1-51/+52
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4738 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-11Allocate register pair for 64-bit registers on 32-bit host.ths1-2/+2
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4730 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-10Remove stray variablemalc1-1/+1
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4725 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-09Use rem/div[u]_i32 drop div[u]2_i32malc2-113/+26
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4722 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-09Emit trampolines manually in prologuemalc1-38/+80
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4715 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-09Fix test for signed div fast pathmalc1-1/+7
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4714 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-09Fix div[u]2.malc1-26/+65
Previous code assummed 32 by 32 bit divmod operation, and survived x86_64 test only by sheer luck. MIPS wasn't so forgiving. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4705 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-07PPC TCG Fixesmalc1-33/+17
* Fix typo in aliased div2 * "Optimize" aliased div2/divu2 * Fix two remaining branch retranslation problems (Kudos to Andrzej Zaborowski) * Rework goto_tb and set_jmp_target1 * Use correct size when flushing icache * Use correct register selection for ORI (Was harmless since in both cases srcreg was equal to dstreg) git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4691 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-07Allocate a register pair instead of a single register.ths1-1/+1
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4688 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-03Spelling fixes, by Stefan Weil.ths1-1/+1
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4655 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-30support of long calls for PPC (malc)bellard2-31/+68
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4629 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-26Fix signed/unsigned issues of immediate version of brcond (malc)bellard1-11/+48
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4588 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-25ppc TCG target (malc)bellard2-0/+1493
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4584 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-25jump simplificationbellard1-22/+1
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4583 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-25jump optimizationsbellard1-31/+9
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4582 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-25updatebellard2-86/+64
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4581 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-25suppressed unused macro handlingbellard4-109/+2
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4580 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-25added local temporariesbellard2-45/+103
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4576 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-25Implement byte swapping accessesblueswir11-36/+66
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4574 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-25Fix off-by-one unwinding error.pbrook1-1/+0
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4570 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-24Relax a constraint for qemu_ld64 on ARM host.balrog1-4/+13
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4567 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-24Fix a deadly typo, correct comments.balrog1-4/+6
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4566 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-24Fix ARM host TLB.pbrook1-61/+44
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4564 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-24Implement 64-bit constant loadsblueswir11-15/+27
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4561 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-24Use sethi and arith functions, fix commentblueswir11-23/+26
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4560 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-24Fix stack offsets and alignmentblueswir11-7/+4
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4559 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-24Define stack offsetsblueswir11-0/+5
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4554 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-24More TCGv type fixes.pbrook1-2/+9
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4553 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-24Fix ARM conditional branch bug.pbrook1-0/+18
Add tcg_gen_brcondi. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4552 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-23Comment non-obvious calculation. Don't clobber r3 in qemu_st64.balrog1-6/+33
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4548 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-23A branch insn must not overwrite the branch target before relocation.balrog1-3/+14
When a branch to label is translated it generates a reloc that is filled in when the label is translated. However, when handling an exception and searching for the pc we abort the translation early and we sometimes translate the branch but not the corresponding label and so no relocation is done. When the block is executed again the branch points to no-where. It seems tcg/sparc/ is going to suffer from the same issue. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4547 c046a42c-6fe2-441c-8c8c-71466251a162
generated by cgit v1.2.3 (git 2.25.1) at 2024-06-20 03:06:27 +0000