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2011-12-09tcg: Remove redundant declarations of TCG_TARGET_REG_BITSStefan Weil1-5/+0
TCG_TARGET_REG_BITS is declared in tcg.h for all TCG targets. Signed-off-by: Stefan Weil <sw@weilnetz.de> Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
2011-11-14tcg: Use TCGReg for standard tcg-target entry points.Richard Henderson1-6/+7
Including tcg_out_ld, tcg_out_st, tcg_out_mov, tcg_out_movi. Signed-off-by: Richard Henderson <rth@twiddle.net> Reviewed-by: Andreas Färber <afaerber@suse.de> Reviewed-by: Stefan Weil <sw@weilnetz.de> Signed-off-by: Alexander Graf <agraf@suse.de>
2011-11-14tcg: Standardize on TCGReg as the enum for hard registersRichard Henderson1-2/+2
Most targets did not name the enum; tci used TCGRegister. Signed-off-by: Richard Henderson <rth@twiddle.net> Reviewed-by: Andreas Färber <afaerber@suse.de> Reviewed-by: Stefan Weil <sw@weilnetz.de> Signed-off-by: Alexander Graf <agraf@suse.de>
2011-10-01tcg-i386: Introduce limited deposit supportJan Kiszka2-2/+31
x86 cannot provide an optimized generic deposit implementation. But at least for a few special cases, namely for writing bits 0..7, 8..15, and 0..15, versions using only a single instruction are feasible. Introducing such limited support improves emulating 16-bit x86 code on x86, but also rarer cases where 32-bit or 64-bit code accesses bytes or words. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-09-17tcg/i386: Only one call output register needed for 64 bit hostsStefan Weil1-1/+3
The second register is only needed for 32 bit hosts. Signed-off-by: Stefan Weil <weil@mail.berlios.de> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-08-21tcg: Always define all of the TCGOpcode enum members.Richard Henderson1-33/+35
By always defining these symbols, we can eliminate a lot of ifdefs. To allow this to be checked reliably, the semantics of the TCG_TARGET_HAS_* macros must be changed from def/undef to true/false. This allows even more ifdefs to be removed, converting them into C if statements. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-06-26TCG/x86: use stack for TCG tempsBlue Swirl1-10/+12
Use stack instead of temp_buf array in CPUState for TCG temps. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-06-26TCG/x86: use TCG_REG_CALL_STACK instead of TCG_REG_ESPBlue Swirl1-4/+4
Except for specific cases where the use of %esp changes the encoding of the instruction, it's cleaner to use TCG_REG_CALL_STACK instead of TCG_REG_ESP. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-06-26Delegate setup of TCG temporaries to targetsBlue Swirl1-0/+2
Delegate TCG temp_buf setup to targets, so that they can use a stack frame later instead. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-06-26cpu-exec.c: avoid AREG0 useBlue Swirl1-3/+5
Make functions take a parameter for CPUState instead of relying on global env. Pass CPUState pointer to TCG prologue, which moves it to AREG0. Thanks to Peter Maydell and Laurent Desnogues for the ARM prologue change. Revert the hacks to avoid AREG0 use on Sparc hosts. Move cpu_has_work() and cpu_pc_from_tb() from exec.h to cpu.h. Compile the file without HELPER_CFLAGS. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-06-10tcg-i386: fix andi r, r, 0xffAurelien Jarno1-1/+1
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-06-10tcg-i386: remove use of _Bool that slipped code reviewAurelien Jarno1-1/+1
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-06-10tcg-i386: Merge 64-bit generation.Richard Henderson2-330/+887
Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-06-09tcg: Make some tcg-target.c routines static.Richard Henderson1-2/+2
Both tcg_target_init and tcg_target_qemu_prologue are unused outside of tcg.c. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-06-09tcg: Add TYPE parameter to tcg_out_mov.Richard Henderson1-18/+18
Mirror tcg_out_movi in having a TYPE parameter. This allows x86_64 to perform the move at the proper width, which may elide a REX prefix. Introduce a TCG_TYPE_REG enumerator to represent the "native width" of the host register, and to distinguish the usage from "pointer data" as represented by the existing TCG_TYPE_PTR. Update all targets to match. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-06-03tcg-i386: fix a typoAurelien Jarno1-1/+1
Fix a typo introduced by c28b14c694d759f39fe3ae4f8d03b567da5b93f8. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-06-02tcg-i386: declare tcg_out_tlb_load() inlineAurelien Jarno1-3/+4
Declare tcg_out_tlb_load() inline so that we don't loose optimisations with commit 8516a04467cb7954cdc32e8b79b4b7df56dccb16. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-06-02tcg-i386: Remove some ifdefs in qemu_ld/st.Richard Henderson1-47/+38
Tidy some code by replacing ifdefs by C ifs. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-06-02tcg-i386: Split out tlb load function.Richard Henderson1-106/+97
Share some code between qemu_ld and qemu_st. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-06-02tcg-i386: Swap order of TLB hit and miss paths.Richard Henderson1-92/+80
Make fallthru be TLB hit and branch be TLB miss. Doing this both improves branch prediction and will allow further cleanup. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-06-02tcg-i386: Split out TLB Hit path from qemu_ld/st.Richard Henderson1-95/+102
Splitting out these functions will allow further cleanups. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-06-02tcg-i386: Tidy data16 prefixes.Richard Henderson1-10/+18
Include it in the opcode as an extension, as with P_EXT or the REX bits in the x86-64 port. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-05-21tcg-i386: Nuke trailing whitespace.Richard Henderson1-22/+22
Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-05-21tcg-i386: Use lea for three-operand add.Richard Henderson1-3/+20
The result is shorter than the mov+add that TCG would otherwise generate for us. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-05-21tcg-i386: Tidy lea.Richard Henderson1-31/+60
Implement full modrm+sib addressing mode processing. Use that in qemu_ld/st to output the LEA. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-05-21tcg-i386: Tidy xchg.Richard Henderson1-1/+3
Define and use OPC_XCHG_ax_r32. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-05-21tcg-i386: Tidy multiply.Richard Henderson1-3/+6
Define and use OPC_IMUL_GvEv{,Ib,Iz}. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-05-21tcg-i386: Tidy unary arithmetic.Richard Henderson1-13/+25
Define OPC_GRP3 and EXT3_FOO to match. Use them instead of bare constants. Define OPC_GRP5 and rename the existing EXT_BAR to EXT5_BAR to make it clear which extension should be used with which opcode. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-05-21tcg-i386: Tidy setcc.Richard Henderson1-2/+2
Define and use OPC_SETCC. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-05-21tcg-i386: Tidy ret.Richard Henderson1-1/+2
Define and use OPC_RET. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-05-21tcg-i386: Tidy calls.Richard Henderson1-22/+27
Define OPC_CALL_Jz, generated by tcg_out_calli; use the later throughout. Unify the calls within qemu_st; adjust the stack with a single pop if applicable. Define and use EXT_CALLN_Ev for indirect calls. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-05-21tcg-i386: Tidy push/pop.Richard Henderson1-18/+30
Move tcg_out_push/pop up in the file so that they can be used by qemu_ld/st. Define a tcg_out_pushi to be used as well. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-05-21tcg-i386: Tidy movi.Richard Henderson1-1/+2
Define and use OPC_MOVL_Iv. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-05-21tcg-i386: Tidy non-immediate arithmetic operations.Richard Henderson1-30/+48
Add more OPC values, and tgen_arithr. Use the later throughout. Note that normal reg/reg arithmetic now uses the Gv,Ev opcode form instead of the Ev,Gv opcode form used previously. Both forms disassemble properly, and so there's no visible change when diffing log files before and after the change. This change makes the operand ordering within the output routines more natural, and avoids the need to define an OPC_ARITH_EvGv since a read-modify-write with memory is not needed within TCG. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-05-21tcg-i386: Tidy immediate arithmetic operations.Richard Henderson1-16/+10
Define OPC_ARITH_EvI[bz]; use throughout. Use tcg_out_ext8u directly in setcond. Use tgen_arithi in qemu_ld/st. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-05-21tcg-i386: Tidy ext8s and ext16s operations.Richard Henderson1-11/+24
Define OPC_MOVSBL and OPC_MOVSWL. Factor opcode emission to separate functions. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-05-21tcg-i386: Tidy ext8u and ext16u operations.Richard Henderson1-26/+31
Define OPC_MOVZBL and OPC_MOVZWL. Factor opcode emission to separate functions. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-05-20tcg-i386: Tidy jumps.Richard Henderson1-25/+33
Define OPC_JCC*, OC_JMP*, and EXT_JMPN_Ev. Use them throughout. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-05-20tcg-i386: Eliminate extra move from qemu_ld64.Richard Henderson1-11/+9
If the address register overlaps one of the output registers simply issue the clobbering load last, rather than emitting an extra move of the address register. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-05-20tcg-i386: Tidy move operations.Richard Henderson1-27/+24
Define OPC_MOVB* and OPC_MOVL*; use them throughout. Use tcg_out_ld/st instead of bare tcg_out_modrm_offset when it makes sense. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-05-20tcg-i386: Tidy shift operations.Richard Henderson1-15/+20
Define OPC_SHIFT_{1,Ib,cl}. Factor opcode emission to a function. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-05-20tcg-i386: Tidy bswap operations.Richard Henderson1-26/+27
Define OPC_BSWAP. Factor opcode emission to separate functions. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-05-19tcg-i386: Tidy initialization of tcg_target_call_clobber_regs.Richard Henderson1-5/+6
Setting the registers one by one is easier to read, and gets optimized by the compiler just the same. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-05-19tcg-i386: Allocate call-saved registers first.Richard Henderson1-3/+3
Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-03-26tcg: Disambiguate qemu_ld32u with 32-bit and 64-bit outputs.Richard Henderson1-3/+3
Some targets (e.g. Alpha and MIPS64) need to keep 32-bit operands sign-extended in 64-bit registers (regardless of the "real" sign of the operand). For that, we need to be able to distinguish between a 32-bit load with a 32-bit result and a 32-bit load with a given extension to a 64-bit result. This distinction already exists for the ld* loads, but not the qemu_ld* loads. Reserve qemu_ld32u for 64-bit outputs and introduce qemu_ld32 for 32-bit outputs. Adjust all code generators to match. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-03-26tcg: Allow target-specific implementation of NOR.Richard Henderson1-0/+1
Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-03-26tcg: Allow target-specific implementation of NAND.Richard Henderson1-0/+1
Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-03-26tcg: Allow target-specific implementation of EQV.Richard Henderson1-0/+1
Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-03-26tcg: Use TCGCond where appropriate.Richard Henderson1-2/+2
Use the TCGCond enumeration type in the brcond and setcond related prototypes in tcg-op.h and each code generator. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-03-26tcg: Name the opcode enumeration.Richard Henderson1-1/+1
Give the enumeration formed from tcg-opc.h a name: TCGOpcode. Use that enumeration type instead of "int" whereever appropriate. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
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