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path: root/target-sparc/op_helper.c
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2011-06-26sparc: move do_interrupt to helper.cBlue Swirl1-240/+10
do_interrupt() was mixing CPUState pointer passed from caller and global env (AREG0). Fix by moving the function to helper.c. Introduce a helper for calling change_pstate() safely from outside of execution context. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-06-26sparc: fix coding style of the area to be movedBlue Swirl1-14/+17
Before the next patch, fix coding style of the areas affected. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-06-26cpu_loop_exit: avoid using AREG0Blue Swirl1-3/+3
Make cpu_loop_exit() take a parameter for CPUState instead of relying on global env. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-06-26Sparc32: dummy implementation of MXCC MMU breakpoint registersBlue Swirl1-2/+24
Add dummy registers for SuperSPARC MXCC MMU counter breakpoints, save and load all MXCC registers. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-05-22Delete unused tb_invalidate_page_rangeBlue Swirl1-6/+0
tb_invalidate_page_range() was intended to be used to invalidate an area of a TB which the guest explicitly flushes from i-cache. However, QEMU detects writes to code areas where TBs have been generated, so his has never been useful. Delete the function, adjust callers. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-04-20Remove unused function parameter from cpu_restore_stateStefan Weil1-1/+1
The previous patch removed the need for parameter puc. Is is now unused, so remove it. Cc: Aurelien Jarno <aurelien@aurel32.net> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Stefan Weil <weil@mail.berlios.de>
2011-02-01SPARC: Fix Leon3 cache controlFabien Chouteau1-4/+14
The "leon3_cache_control_int" (op_helper.c) function is called within leon3.c which leads to segfault error with the global "env". Now cache control is a CPU feature and everything is handled in op_helper.c. Signed-off-by: Fabien Chouteau <chouteau@adacore.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-01-24SPARC: Emulation of Leon3Fabien Chouteau1-2/+154
Leon3 is an open-source VHDL System-On-Chip, well known in space industry (more information on http://www.gaisler.com). Leon3 is made of multiple components available in the GrLib VHDL library. Three devices are implemented: uart, timers and IRQ manager. You can find code for these peripherals in the grlib_* files. Signed-off-by: Fabien Chouteau <chouteau@adacore.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-01-18sparc: fix NaN handlingBlue Swirl1-22/+34
Fix several bugs in NaN handling: * e in fcmpe* only changes qNaN handling * FCC is unchanged if an exception is raised * clear previous FTT before setting it Reported-by: Mateusz Loskot <mateusz@loskot.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-12-28target-sparc: fix udiv(cc) and sdiv(cc)Aurelien Jarno1-12/+42
Since commit 5a4bb580cdb10b066f9fd67658b31cac4a4ea5e5, Xorg crashes on a Debian Etch image. The commit itself is fine, but it triggers a bug due to wrong computation of flags for udiv(cc) and sdiv(cc). This patch only compute cc_src2 for the cc version of udiv/sdiv. It also moves the update of cc_dst and cc_op to the helper, as it is faster doing it here when there is already an helper. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-12-19Sparc: implement monitor command 'info tlb'Blue Swirl1-10/+10
Use existing dump_mmu() to implement monitor command 'info tlb'. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-06-02sparc64: fix udiv and sdiv insnsIgor V. Kovalenko1-2/+2
- truncate second operand to 32bit Signed-off-by: Igor V. Kovalenko <igor.v.kovalenko@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-06-02sparc64: improve ldf and stf insnsIgor V. Kovalenko1-0/+28
- implemented block load/store primary/secondary with user privilege Signed-off-by: Igor V. Kovalenko <igor.v.kovalenko@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-06-02sparc64: use symbolic name for MMU index v1Igor V. Kovalenko1-12/+16
- use symbolic name for MMU index v0->v1: - change debug traces to DPRINTF_MMU - fix debug trace function names Signed-off-by: Igor V. Kovalenko <igor.v.kovalenko@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-06-02sparc64: fix missing address masking v1Igor V. Kovalenko1-2/+48
- address masking for ldqf and stqf insns - address masking for lddf and stdf insns - address masking for translating ASI (Ultrasparc IIi) v0->v1: - move arch-specific code to helpers and drop more ifdefs at call sites using new helper asi_address_mask() - change user emulation to use asi_address_mask() Signed-off-by: Igor V. Kovalenko <igor.v.kovalenko@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-05-29sparc32 SuperSPARC MMU Breakpoint Action register (SS-20 OBP fix)Artyom Tarasenko1-0/+1
SuperSPARC MMU Breakpoint Action register is used by OBP at boot The patch allows booting Solaris and some other OS with SPARCStation-20 OBP. Signed-off-by: Artyom Tarasenko <atar4qemu@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-05-29sparc64: fix user emulator buildBlue Swirl1-0/+2
Accesses with _nucleus prefix are not available when building user emulators: CC sparc64-linux-user/op_helper.o cc1: warnings being treated as errors /src/qemu/target-sparc/op_helper.c: In function 'helper_ldda_asi': /src/qemu/target-sparc/op_helper.c:3063: error: implicit declaration of function 'ldq_nucleus' Avoid making such accesses. Fixes breakage by 54a3c0f032abf93d1cedc75456af75401ac10360. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-05-29sparc64: fix 128-bit atomic load from nucleus context v1Igor V. Kovalenko1-5/+5
- change 128-bit atomic loads to reference nucleus context v0->v1: dropped disassembler change Signed-off-by: Igor V. Kovalenko <igor.v.kovalenko@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-05-22sparc64: flush translations on mmu context changeIgor V. Kovalenko1-0/+6
- two pairs of softmmu indexes bind softmmu tlb to cpu tlb in fault handlers using value of DMMU primary and secondary context registers, so we need to flush softmmu translations when context registers are changed Signed-off-by: Igor V. Kovalenko <igor.v.kovalenko@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-05-22sparc64: fix pstate privilege bitsIgor V. Kovalenko1-14/+10
- refactor code to handle hpstate only if available for current cpu - conditionally set hypervisor bit in hpstate register - reorder softmmu indices so user accessable ones go first, translation context macros supervisor() and hypervisor() adjusted as well - disable sparcv8 registers for TARGET_SPARC64 - fix cpu_mmu_index to use sparcv9 bits only Signed-off-by: Igor V. Kovalenko <igor.v.kovalenko@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-05-20target-sparc: Inline some generation of carry for ADDX/SUBX.Richard Henderson1-1/+1
Computing carry is trivial for some inputs. By avoiding an external function call, we generate near-optimal code for the common cases of add+addx (double-word arithmetic) and cmp+addx (a setcc pattern). Signed-off-by: Richard Henderson <rth@twiddle.net> Acked-by: Artyom Tarasenko <atar4qemu@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-05-19target-sparc: Simplify ICC generation.Richard Henderson1-80/+140
Use int32 types instead of target_ulong when computing ICC. This simplifies the generated code for 32-bit host and 64-bit guest. Use the same simplified expressions for ICC as were already used for XCC in carry flag generation. Simplify the ADD carry generation to not consider a possible carry-in. Use the more complex carry computation for ADDX only. Use the same carry algorithm for the XCC result of ADDX. Similarly for SUB/SUBX. Use the ADD carry generation functions for TADD/TADDTV. Similarly for SUB and TSUB/TSUBTV. Tidy the code with respect to CODING_STYLE. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-05-19target-sparc: Fix compilation with --enable-debug.Richard Henderson1-1/+1
Return a target_ulong from compute_C_icc to match the width of the users. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-05-16sparc: move DT and QT defines to op_helper.cBlue Swirl1-0/+5
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-05-16sparc64: fix mmu demap operand typoIgor V. Kovalenko1-2/+2
- must use store address operand to demap, not store value Signed-off-by: Igor V. Kovalenko <igor.v.kovalenko@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-05-09sparc: Fix lazy flag calculation on interrupts, refactorBlue Swirl1-32/+240
Recalculate Sparc64 CPU flags on interrupts, otherwise some earlier flags could be stored to pstate. Refactor PSR/CCR/CWP handling: concentrate the actual functions to op_helper.c. Thanks to Igor Kovalenko for reporting. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-05-06sparc64: handle asi referencing nucleus and secondary MMU contextsIgor V. Kovalenko1-63/+172
- increase max supported MMU modes to 6 - handle nucleus context asi - handle secondary context asi - handle non-faulting loads from secondary context Signed-off-by: Igor V. Kovalenko <igor.v.kovalenko@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-05-06sparc64: implement global translation table entries v1Igor V. Kovalenko1-9/+44
- match global tte against any context - show global tte in MMU dump v0->v1: added default case to switch statement in demap_tlb - should fix gcc warning about uninitialized context variable Signed-off-by: Igor V. Kovalenko <igor.v.kovalenko@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-04-23target-sparc: Fix address masking in ldqf and stqf.Richard Henderson1-14/+11
Use address_mask on both addr and addr+8 in both these routines, rather than explicit masking with 0xffffffff. Reformulate address_mask to return a result, rather than masking a pass-by-reference argument. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-03-12Target specific usermode cleanupPaul Brook1-1/+14
Disable various target specific code that is only relevant to system emulation. Signed-off-by: Paul Brook <paul@codesourcery.com>
2010-01-23sparc32 fix np dereference in do_unassigned_accessArtyom Tarasenko1-1/+2
fix a potential null pointer dereference introduced in commit 576c2cdc767ab9e2dc038fa4c99f22e53287a3de Signed-off-by: Artyom Tarasenko <atar4qemu@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-01-15sparc32 do_unassigned_access overhaul v2Artyom Tarasenko1-12/+30
According to pages 9-31 - 9-34 of "SuperSPARC & MultiCache Controller User's Manual": 1. "A lower priority fault may not overwrite the MFSR status of a higher priority fault." 2. The MFAR is overwritten according to the policy defined for the MFSR 3. The overwrite bit is asserted if the fault status register (MFSR) has been written more than once by faults of the same class 4. SuperSPARC will never place instruction fault addresses in the MFAR. Implementation of points 1-3 allows booting Solaris 2.6 and 2.5.1. v2: CODING_STYLE fixes Signed-off-by: Artyom Tarasenko <atar4qemu@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-01-08sparc64: check for pending irq when pil, pstate or softint is changedIgor V. Kovalenko1-3/+38
Signed-off-by: Igor V. Kovalenko <igor.v.kovalenko@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-01-08sparc64: use helper_wrpil to check pending irq on writeIgor V. Kovalenko1-0/+14
Signed-off-by: Igor V. Kovalenko <igor.v.kovalenko@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-01-08sparc64: trace pstate and global register set changesIgor V. Kovalenko1-0/+20
Signed-off-by: Igor V. Kovalenko <igor.v.kovalenko@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-01-08sparc64: change_pstate should have 32bit argumentIgor V. Kovalenko1-3/+3
- pstate is 32bit variable, no need to pass 64bit value around Signed-off-by: Igor V. Kovalenko <igor.v.kovalenko@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-01-07Sparc32: clear exception_index with -1 valueBlue Swirl1-1/+1
See also 821b19fe923ac49a24cdb4af902584fdd019cee6. Spotted by Artyom Tarasenko and Igor Kovalenko. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-01-06sparc64: clear exception_index with -1 valueIgor V. Kovalenko1-1/+1
Signed-off-by: Igor V. Kovalenko <igor.v.kovalenko@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-01-03pass env to raise_exception if called outside of op_helper codeIgor V. Kovalenko1-2/+5
- this fixes stepping with gdb, where do_unassigned_access may be called from gdb handler, outside of generated code Signed-off-by: Igor V. Kovalenko <igor.v.kovalenko@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-01-03sparc64: switch to MMU global registers in more MMU related trapsIgor V. Kovalenko1-3/+3
- extended range of MMU related traps which use MMU global registers, as listed in Ultrasparc-IIi document - no visible changes, since emulation do not cause added traps Signed-off-by: Igor V. Kovalenko <igor.v.kovalenko@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-11-04Sparc: fix carry flag handling (Solaris bootblk fix)Artyom Tarasenko1-61/+30
The page 108 of the SPARC Version 8 Architecture Manual describes that addcc and addxcc shall compute carry flag the same way. The page 110 claims the same about subcc and subxcc instructions. This patch fixes carry computation in corner cases and removes redundant code. The most visible effect of the patch is enabling Solaris boot when using OBP. Signed-off-by: Artyom Tarasenko <atar4qemu@gmail.com> [blauwirbel@gmail.com: cleaned up formatting] Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-10-13sparc64: fix done instruction pcIgor V. Kovalenko1-1/+1
Fix done instruction to resume with pc=tnpc, npc=tnpc+4 Signed-off-by: Igor V. Kovalenko <igor.v.kovalenko@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-10-01Revert "Get rid of _t suffix"Anthony Liguori1-18/+18
In the very least, a change like this requires discussion on the list. The naming convention is goofy and it causes a massive merge problem. Something like this _must_ be presented on the list first so people can provide input and cope with it. This reverts commit 99a0949b720a0936da2052cb9a46db04ffc6db29. Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-10-01Get rid of _t suffixmalc1-18/+18
Some not so obvious bits, slirp and Xen were left alone for the time being. Signed-off-by: malc <av1474@comtv.ru>
2009-09-23sparc64-8bit-asiIgor V. Kovalenko1-0/+5
Sparc64 alternate space load/store helpers expect 8 bit ASI value, while wrasi implementation sign-extends ASI operand causing for example 0x80 to appear as 0xFFFFFF80. Resulting value falls out of switch in helpers and causes obscure load/store faults. - correct wrasi by masking lower 8 bits of xor result - use lower 8 bits of ASI register in helpers Signed-off-by: Igor V. Kovalenko <igor.v.kovalenko@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-08-04Sparc64: replace tsptr with helper routineIgor Kovalenko1-19/+28
tl and tsptr of members sparc64 cpu state must be changed simultaneously to keep trap state window in sync with current trap level. Currently translation of store to tl does not change tsptr, which leads to corrupt trap state on corresponding trap level. This patch removes tsptr from sparc64 cpu state and replaces all uses with call to helper routine. Changes v0->v1: - reimplemented helper routine with tcg generator - on cpu reset trap type and pstate are populated with power-on reset values, including tl=maxtl Signed-off-by: igor.v.kovalenko@gmail.com Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-07-27rename WORDS_BIGENDIAN to HOST_WORDS_BIGENDIANJuan Quintela1-1/+1
Signed-off-by: Juan Quintela <quintela@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-07-27sparc64 really implement itlb/dtlb automatic replacement writesIgor Kovalenko1-89/+70
- implement "used" bit in tlb translation entry - mark tlb entry used if qemu code/data translation succeeds - fold i/d mmu replacement writes code into replace_tlb_1bit_lru which adds 1bit lru replacement algorithm; previously code tried to replace first unlocked entry only - extract more bitmasks to named macros - add "immu" or "dmmu" type name to debugging output where appropriate Signed-off-by: igor.v.kovalenko@gmail.com -- Kind regards, Igor V. Kovalenko
2009-07-27sparc64 name mmu registers and general cleanupIgor Kovalenko1-69/+145
- add names to mmu registers, this helps understanding the code which uses/modifies them. - fold i/d mmu tlb entries tag and tte arrays into arrays of tlb entries - extract demap_tlb routine (code duplication) - extract replace_tlb routine (code duplication) - flush qemu tlb translations when replacing sparc64 mmu tlb entries I have no test case which demands flushing qemu translations, and this patch should have no other visible changes to runtime. Signed-off-by: igor.v.kovalenko@gmail.com -- Kind regards, Igor V. Kovalenko
2009-07-20Fix most warnings (errors with -Werror) when debugging is enabledBlue Swirl1-5/+9
I used the following command to enable debugging: perl -p -i -e 's/^\/\/#define DEBUG/#define DEBUG/g' * */* */*/* Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
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