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path: root/target-sh4/translate.c
AgeCommit message (Expand)AuthorFilesLines
2012-02-28target-sh4: Clean includesStefan Weil1-6/+0
2012-01-10target-sh4: ignore ocbp and ocbwb instructionsAurelien Jarno1-11/+3
2012-01-07target-sh4: Fix operands for fipr, ftrv instructionsStefan Weil1-3/+3
2011-08-20Use glib memory allocation and free functionsAnthony Liguori1-1/+1
2011-06-26Remove exec-all.h include directivesBlue Swirl1-1/+0
2011-04-20Remove unused function parameters from gen_pc_load and rename the functionStefan Weil1-2/+1
2011-04-10Fix conversions from pointer to tcg_target_longStefan Weil1-1/+1
2011-02-04target-sh4: fix negcAurelien Jarno1-2/+2
2011-01-16target-sh4: implement negc using TCGAurelien Jarno1-1/+15
2011-01-16target-sh4: use rotl/rotr when possibleAurelien Jarno1-5/+3
2011-01-14target-sh4: use setcond when possibleAurelien Jarno1-29/+27
2011-01-14target-sh4: log instructions start in TCG codeAurelien Jarno1-0/+4
2011-01-14target-sh4: simplify comparisons after a 'and' opAurelien Jarno1-3/+3
2011-01-14target-sh4: fix reset on r2dAurelien Jarno1-12/+8
2011-01-14target-sh4: optimize exceptionsAurelien Jarno1-5/+0
2011-01-14target-sh4: add ftrv instructionAurelien Jarno1-0/+11
2011-01-14target-sh4: add fipr instructionAurelien Jarno1-0/+12
2011-01-14target-sh4: implement flush-to-zeroAurelien Jarno1-0/+1
2011-01-14target-sh4: define FPSCR constantsAurelien Jarno1-2/+2
2011-01-14target-sh4: use default-NaN modeAurelien Jarno1-0/+1
2011-01-11target-sh4: fix fpu disabled/illegal exceptionAurelien Jarno1-10/+18
2010-10-30target-xxx: Use fprintf_function (format checking)Stefan Weil1-1/+1
2010-07-12target-sh4: Add support for ldc & stc with sgrAlexandre Courbot1-0/+2
2010-07-12target-sh4: Split the LDST macro into 2 sub-macrosAlexandre Courbot1-2/+6
2010-05-05target-sh4: Remove duplicate CPU log.Richard Henderson1-6/+0
2010-04-08remove TARGET_* defines from translate-all.cPaolo Bonzini1-0/+2
2010-02-09target-sh4: MMU: fix mem_idx computationAurelien Jarno1-1/+1
2010-02-08target-sh4: minor optimisationsAurelien Jarno1-26/+26
2009-09-12Fix sys-queue.h conflict for goodBlue Swirl1-2/+2
2009-07-16Update to a hopefully more future proof FSF addressBlue Swirl1-2/+1
2009-05-13Include assert.h from qemu-common.hPaul Brook1-1/+0
2009-04-24qemu: introduce qemu_init_vcpu (Marcelo Tosatti)aliguori1-0/+1
2009-04-05Add new command line option -singlestep for tcg single stepping.aurel321-3/+2
2009-04-01SH: Improve movca.l/ocbi emulation.edgar_igl1-4/+42
2009-03-02SH: Implement MOVCO.L and MOVLI.Laurel321-1/+34
2009-02-07SH7750/51: add register BCR3, BCR4, PCR, RTCOR, RTCNT, RTCSR, SDMR2, SDMR3 an...aurel321-0/+2
2009-02-05targets: remove error handling from qemu_malloc() callers (Avi Kivity)aliguori1-2/+0
2009-01-26Log reset events (Jan Kiszka)aliguori1-0/+5
2009-01-15global s/loglevel & X/qemu_loglevel_mask(X)/ (Eduardo Habkost)aliguori1-1/+1
2009-01-15Convert references to logfile/loglevel to use qemu_log*() macrosaliguori1-10/+7
2009-01-14sh4: Add FMAC instruction supportaurel321-0/+11
2009-01-04Update FSF address in GPL/LGPL boilerplateaurel321-1/+1
2009-01-01tcg_temp_local_new should take no parameteraurel321-6/+6
2008-12-22Use the ARRAY_SIZE() macro where appropriate.malc1-2/+2
2008-12-13target-sh4: make the initial value of SR easier to readaurel321-1/+1
2008-12-13target-sh4: don't disable FPU instructions in user modeaurel321-1/+1
2008-12-13target-sh4: disable debug codeaurel321-1/+3
2008-12-13target-sh4: add prefi, icbi, syncoaurel321-0/+20
2008-12-13target-sh4: add SH7785 as CPU optionaurel321-1/+7
2008-12-10target-sh4: check FD bit for FP instructionsaurel321-6/+23