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2010-01-19kill regs_to_env and env_to_regsPaolo Bonzini1-8/+0
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2010-01-14ppc-40x: Correct ESR for zone protection faults.Edgar E. Iglesias1-5/+18
Raise the zone protection fault in ESR for TLB faults caused by zone protection bits. Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2010-01-14ppc-40x: Correct decoding of zone protection bits.Edgar E. Iglesias1-1/+1
The 40x MMU has 15 zones in the ZPR register. Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2010-01-14ppc-40x: Correct check for Endian swapping TLB entries.Edgar E. Iglesias1-5/+7
Bailout on 40x TLB entries with endianess swapping only if the entry is valid. Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2010-01-14ppc-40x: Get TLB attributes from TLBLO.Edgar E. Iglesias1-1/+1
The ZSEL was incorrectly beeing decoded from TLBHI. Decode it from TLBLO instead. Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2009-12-21PPC: Make DCR uint32_tAlexander Graf3-9/+9
For what I know DCR is always 32 bits wide, so we should also use uint32_t to pass it along the stacks. This fixes a warning when compiling qemu-system-ppc64 with KVM enabled, making it compile without --disable-werror Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-12-21PPC64: Fix alternate timebaseAurelien Jarno2-2/+2
Fix the alternate time base the same way as the default timebase. SPR_ATBL should return a 64-bit value on 64 bit implementations. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-12-21PPC64: Fix timebaseAlexander Graf2-2/+2
On PPC we have a 64-bit time base. Usually (PPC32) this is accessed using two separate 32 bit SPR accesses to SPR_TBU and SPR_TBL. On PPC64 the SPR_TBL register acts as 64 bit though, so we get the full 64 bits as return value. If we only take the lower ones, fine. But Linux wants to see all 64 bits or it breaks. This patch makes PPC64 Linux work even after TB crossed the 32-bit boundary, which usually happened a few seconds after bootup. Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-12-19target-ppc: fix ppc32 kvm buildAlexander Graf1-0/+2
My segment sync patch broke compilation on PPC32, because it was trying to sync the SLB even though ppc32 CPUs don't have an SLB. So let's only sync it when we're on a PP64 one! Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-12-03target-ppc: Get MMU state on register syncAlexander Graf1-0/+30
While x86 only needs to sync cr0-4 to know all about its MMU state and enable qemu to resolve virtual to physical addresses, we need to sync all of the segment registers on PPC to know which mapping we're in. So let's grab the segment register contents to be able to use the "x" monitor command and also enable the gdbstub to resolve virtual addresses. Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-11-17kvm: Add arch reset handlerJan Kiszka1-0/+4
Will be required by succeeding changes. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-11-12kvm ppc: Remove unused labelHollis Blanchard1-1/+0
Signed-off-by: Hollis Blanchard <hollisb@us.ibm.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-11-07user: move CPU reset call to main.c for x86/PPC/SparcBlue Swirl1-3/+0
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-11-07PPC: rename cpu_ppc_reset to cpu_reset for consistencyBlue Swirl2-5/+2
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-11-07PPC: remove unneeded calls to device resetBlue Swirl1-0/+2
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-10-23target-ppc: move often used CPU fields at the top of the structureAurelien Jarno1-4/+4
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-10-18target-ppc: simpler definitions for microcontrollers based on e300Thomas Monjalon1-68/+44
No need to alias e300 core for each CPU package. Differences between microcontrollers have to be implemented in a higher layer than translate_init.c Signed-off-by: Thomas Monjalon <thomas@monjalon.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-10-18target-ppc: add declarations of microcontrollers based on e300Thomas Monjalon1-8/+40
Add CPU declarations of MPC8343, MPC8343E, MPC8347 and MPC8347E. Signed-off-by: Thomas Monjalon <thomas@monjalon.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-10-18target-ppc: better support of e300 CPU coreThomas Monjalon1-2/+8
Declare HID2 register. Use high BATs for e300 (8 instead of 4). Fix index of high BATs registers. Before the fix, IBAT4-7 were overwriting IBAT0-3. Signed-off-by: François Armand <francois.armand@os4i.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-10-01Revert "Get rid of _t suffix"Anthony Liguori6-233/+235
In the very least, a change like this requires discussion on the list. The naming convention is goofy and it causes a massive merge problem. Something like this _must_ be presented on the list first so people can provide input and cope with it. This reverts commit 99a0949b720a0936da2052cb9a46db04ffc6db29. Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-10-01Get rid of _t suffixmalc6-235/+233
Some not so obvious bits, slirp and Xen were left alone for the time being. Signed-off-by: malc <av1474@comtv.ru>
2009-09-28target-ppc: log instructions start in TCG codeAurelien Jarno1-0/+2
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-09-25static and inline should came before the type of the functionsJuan Quintela1-4/+4
Signed-off-by: Juan Quintela <quintela@redhat.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-09-18target-ppc: optimize slw/srw/sld/srdAurelien Jarno1-49/+49
Remove a temp local variable and a jump by computing a mask with shifts. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-09-12Fix sys-queue.h conflict for goodBlue Swirl1-2/+2
Problem: Our file sys-queue.h is a copy of the BSD file, but there are some additions and it's not entirely compatible. Because of that, there have been conflicts with system headers on BSD systems. Some hacks have been introduced in the commits 15cc9235840a22c289edbe064a9b3c19c5f49896, f40d753718c72693c5f520f0d9899f6e50395e94, 96555a96d724016e13190b28cffa3bc929ac60dc and 3990d09adf4463eca200ad964cc55643c33feb50 but the fixes were fragile. Solution: Avoid the conflict entirely by renaming the functions and the file. Revert the previous hacks. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-09-11Unexport ticks_per_sec variable. Create get_ticks_per_sec() functionJuan Quintela1-1/+1
Signed-off-by: Juan Quintela <quintela@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-08-27kvm: Simplify cpu_synchronize_state()Avi Kivity1-3/+3
cpu_synchronize_state() is a little unreadable since the 'modified' argument isn't self-explanatory. Simplify it by making it always synchronize the kernel state into qemu, and automatically flush the registers back to the kernel if they've been synchronized on this exit. Signed-off-by: Avi Kivity <avi@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-08-24cleanup cpu-exec.c, part 0/N: consolidate handle_cpu_signalNathan Froyd1-0/+1
handle_cpu_signal is very nearly copy-paste code for each target, with a few minor variations. This patch sets up appropriate defaults for a generic handle_cpu_signal and provides overrides for particular targets that did things differently. Fixing things like the persistent (XXX: use sigsetjmp) should now become somewhat easier. Previous comments on this patch suggest that the "activate soft MMU for this block" comments refer to defunct functionality. I have removed such blocks for the appropriate targets in this patch. Signed-off-by: Nathan Froyd <froydnj@codesourcery.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-08-16Replace REGX with PRIx64Blue Swirl3-5/+4
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-08-16Replace local ADDRX/PADDRX macros with TARGET_FMT_lx/plxBlue Swirl5-174/+173
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-08-16Replace always_inline with inlineBlue Swirl6-285/+278
We define inline as always_inline. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-08-03target-ppc: add exceptions for conditional storesNathan Froyd2-20/+56
Signed-off-by: Nathan Froyd <froydnj@codesourcery.com> Signed-off-by: malc <av1474@comtv.ru>
2009-08-03target-ppc: retain l{w,d}arx loaded valueNathan Froyd5-10/+17
We do this so we can check on the corresponding stc{w,d}x. whether the value has changed. It's a poor man's form of implementing atomic operations and is valid only for NPTL usermode Linux emulation. Signed-off-by: Nathan Froyd <froydnj@codesourcery.com> Signed-off-by: malc <av1474@comtv.ru>
2009-08-03target-ppc: add cpu_set_tlsNathan Froyd1-0/+11
Signed-off-by: Nathan Froyd <froydnj@codesourcery.com> Signed-off-by: malc <av1474@comtv.ru>
2009-08-03target-ppc: fix cpu_clone_regsNathan Froyd1-3/+1
We only need to make sure that the clone syscall looks like it succeeded, not clobber 60% of the register set. Signed-off-by: Nathan Froyd <froydnj@codesourcery.com> Signed-off-by: malc <av1474@comtv.ru>
2009-07-27rename WORDS_BIGENDIAN to HOST_WORDS_BIGENDIANJuan Quintela3-19/+19
Signed-off-by: Juan Quintela <quintela@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-07-27Rename HAVE_FDT to CONFIG_FDT and define it also in MakefileJuan Quintela1-1/+1
Signed-off-by: Juan Quintela <quintela@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-07-22Use correct input constantAlexander Graf1-1/+9
440 and desktop codes use different input constants for interrupt indication. Let's use the respective ones for KVM. Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-07-22Set PVR in sregsAlexander Graf1-1/+7
We need to tell the kernel about some initial CPU state we don't have yet, so let's use the "sregs" IOCTL for that and simply put the Processor Version Register in there. Now the kernel knows which guest CPU to virtualize. Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-07-20Fix most warnings (errors with -Werror) when debugging is enabledBlue Swirl1-10/+10
I used the following command to enable debugging: perl -p -i -e 's/^\/\/#define DEBUG/#define DEBUG/g' * */* */*/* Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-07-16Update to a hopefully more future proof FSF addressBlue Swirl7-14/+7
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-07-13target-ppc: enable PPC_MFTB for 44xBaojun Wang1-6/+6
According to PPC440 user manual, PPC 440 supports ``mftb'' even it's a preserved instruction: PPC440_UM2013.pdf, p.445, table A-3 when I compile a kernel (2.6.30, bamboo_defconfig/440EP & canyonlands/460EX), I can see ``mftb'' by using ppc-xxx-objdump vmlinux I have also checked the ppc 440x[456], 460S, 464, they also should support mftb. The following patch enable mftb for all ppc 440 variants, including: 440EP, 440GP, 440x4, 440x5 and 460 Signed-off-by: Baojun Wang <wangbj@gmail.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-07-13ppc tcg: fix wrong bit/mask of wrteeiBaojun Wang1-2/+2
Signed-off-by: Baojun Wang <wangbj@gmail.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-07-12target-ppc: fix evmergelo and evmergelohiNathan Froyd1-3/+11
For 32-bit PPC targets, we translated: evmergelo rX, rX, rY as: rX-lo = rY-lo rX-hi = rX-lo which is wrong, because we should be transferring rX-lo first. This problem is fixed by swapping the order in which we write the parts of rX. Similarly, we translated: evmergelohi rX, rX, rY as: rX-lo = rY-hi rX-hi = rX-lo In this case, we can't swap the assignment statements, because that would just cause problems for: evmergelohi rX, rY, rX Instead, we detect the first case and save rX-lo in a temporary variable: tmp = rX-lo rX-lo = rY-hi rX-hi = tmp These problems don't occur on PPC64 targets because we don't split the SPE registers into hi/lo parts for such targets. Signed-off-by: Nathan Froyd <froydnj@codesourcery.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-06-23target-ppc: permit linux-user to read PVRNathan Froyd1-1/+7
Access to the PVR SPR is normally forbidden from userspace apps. The Linux kernel, however, fixes up reads in the appropriate trap handler. To permit applications that read PVR to run on QEMU, then, we need to implement the same handling of PVR reads. Signed-off-by: Nathan Froyd <froydnj@codesourcery.com> Signed-off-by: malc <av1474@comtv.ru>
2009-06-20Apply TCGV_UNUSED on variables that GCC mistakenly thinks can be usedmalc1-0/+6
uninitialized
2009-06-17Replace ELF section hack with normal tableBlue Swirl2-898/+858
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-06-17Concentrate rest of table entries to topBlue Swirl1-107/+610
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-06-17Concentrate most table entries to topBlue Swirl1-422/+291
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-06-17Clean up GEN_HANDLER2Blue Swirl1-37/+110
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
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