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path: root/target-mips/translate.c
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2007-11-10added cpu_model parameter to cpu_init()bellard1-3/+10
2007-11-08Clean out the N32 macros from target-mips, and introduce MIPS ABI specificths1-27/+27
2007-11-08Formatting fix.ths1-1/+1
2007-10-28Implement missing MIPS supervisor mode bits.ths1-5/+7
2007-10-24Remove bogus instruction decode.ths1-1/+0
2007-10-23Use the standard ASE check for MIPS-3D and MT.ths1-92/+77
2007-10-23Switch bc1any* instructions off if no MIPS-3D is implemented.ths1-1/+9
2007-10-09Use always_inline in the MIPS support where applicable.ths1-17/+17
2007-10-09Fix [ls][wd][lr] instructions, by Aurelien Jarno.ths1-4/+4
2007-09-30Code provision for n32/n64 mips userland emulation. Not functional yet.ths1-27/+27
2007-09-26Wrap a few often used tests with unlikely(), by Aurelien Jarno.ths1-6/+6
2007-09-25Optimise instructions accessing CP0, by Aurelien Jarno.ths1-4/+16
2007-09-24Per-CPU instruction decoding implementation, by Aurelien Jarno.ths1-86/+171
2007-09-20Extend TB flags to 64 bits (Alexander Graf).j_mayer1-1/+1
2007-09-17find -type f | xargs sed -i 's/[\t ]*$//g' # Yes, again. Note the star in the...ths1-2/+2
2007-09-16find -type f | xargs sed -i 's/[\t ]$//g' # on most filesths1-6/+6
2007-09-11Fix tb->size mishandling, by Daniel Jacobowitz.ths1-5/+3
2007-09-06Partial support for 34K multithreading, not functional yet.ths1-236/+713
2007-08-26Disable 64-bit instructions on 32-bit CPU, by Aurelien Jarno.ths1-8/+8
2007-06-26Implement recip1/recip2/rsqrt1/rsqrt2.ths1-3/+3
2007-06-02Check for R2 instructions, and throw RI if we don't emulate R2.ths1-18/+50
2007-06-01Make sure hflags are updated for CP0_Status changes.ths1-8/+42
2007-05-31Simplify code.ths1-4/+4
2007-05-29Don't check the FPU state for each FPU instruction, use hflags toths1-84/+110
2007-05-28Handle PX/UX status flags correctly, by Aurelien Jarno.ths1-7/+26
2007-05-28MIPS64 addressing fixes, by Aurelien Jarno.ths1-9/+49
2007-05-23The 24k wants more watch and srsmap registers.ths1-247/+31
2007-05-23The previous patch to make breakpoints work was a performanceths1-22/+7
2007-05-20Catch more MIPS FPU cornercases, fix addr.ps and mulr.ps instructions.ths1-8/+8
2007-05-20Fix indexed FP load/store instructions.ths1-17/+28
2007-05-19More MIPS 64-bit FPU support.ths1-37/+179
2007-05-19Fix slti/sltiu for MIPS64, by Aurelien Jarno.ths1-2/+2
2007-05-19Fix ldl/ldr implementation, by Aurelien Jarno.ths1-0/+2
2007-05-18- Move FPU exception handling into helper functions, since they are big.ths1-101/+75
2007-05-18Work around the lack of proper handling for self-modifying code.ths1-2/+20
2007-05-13Fix mfc0 and dmtc0 instructions on MIPS64, by Aurelien Jarno.ths1-57/+57
2007-05-13Don't decode CP0 XContext on 32bit MIPS.ths1-4/+8
2007-05-13MIPS TLB style selection at runtime, by Herve Poussineau.ths1-9/+16
2007-05-11Implemented cabs FP instructions, and improve exception handling forths1-40/+83
2007-05-11Another bit of nicer debug output.ths1-1/+1
2007-05-11Implement FP madd/msub, wire up bc1any[24][ft].ths1-12/+85
2007-05-11Improved debug output for the MIPS opcode decoder.ths1-85/+77
2007-05-10Fix for the scd instruction, by Aurelien Jarno.ths1-0/+1
2007-05-09Fix MIPS64 address computation specialcase, by Aurelien Jarno.ths1-2/+2
2007-05-07MIPS 64-bit FPU support, plus some collateral bugfixes in theths1-243/+824
2007-04-25Next attempt to get the lui sign extension right.ths1-2/+1
2007-04-25Fix lui sign extension.ths1-1/+1
2007-04-17Choose number of TLBs at runtime, by Herve Poussineau.ths1-4/+0
2007-04-16Simplify branch likely handling.ths1-6/+8
2007-04-15Don't use T2 for INS, it conflicts with branch delay slot handling.ths1-4/+4