aboutsummaryrefslogtreecommitdiffstats
path: root/hw/ppc4xx_devs.c
AgeCommit message (Collapse)AuthorFilesLines
2008-12-15target-ppc: create a helper function to allow more flexible RAM allocation ↵aurel321-0/+42
for PPC 4xx The 4xx SDRAM controller supports a small number of banks, and each bank must be one of a small set of sizes. The number of banks and the supported sizes varies by SoC. This function uses the user-specified RAM size to fill in the "ram_bases" and "ram_sizes" arrays required by ppc4xx_sdram_init(). Signed-off-by: Hollis Blanchard <hollisb@us.ibm.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6063 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-15target-ppc: rename ppc405_sdram_init() to ppc4xx_sdram_init()aurel321-1/+1
The SDRAM controller is shared across almost all 405 and 440 embedded processors, with some slight differences such as the sizes supported for each memory bank. Rename only; no functional changes. Signed-off-by: Hollis Blanchard <hollisb@us.ibm.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6062 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-15target-ppc: move PPC4xx SDRAM controller emulation from ppc405_uc.c to ↵aurel321-0/+341
ppc4xx_devs.c The SDRAM controller is shared across almost all 405 and 440 embedded processors, with some slight differences such as the sizes supported for each memory bank. Code movement only; no functional changes. Signed-off-by: Hollis Blanchard <hollisb@us.ibm.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6061 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-01Change MMIO callbacks to use offsets, not absolute addresses.pbrook1-4/+4
Signed-off-by: Paul Brook <paul@codesourcery.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5849 c046a42c-6fe2-441c-8c8c-71466251a162
2008-10-04Use qemu-log.hblueswir11-3/+1
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5413 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-20Suppress gcc 4.x -Wpointer-sign (included in -Wall) warningsblueswir11-1/+1
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5275 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-30Move CPU save/load registration to common code.pbrook1-1/+0
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4808 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-04Remember the state of level-triggered interruptsaurel321-2/+7
(Hollis Blanchard) git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4330 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-04PPC UIC: Remove interrupt polarity codeaurel321-5/+1
(Hollis Blanchard) git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4329 c046a42c-6fe2-441c-8c8c-71466251a162
2008-04-28qemu ppc uic: Order IRQ bit number as described in the UIC documentation.aurel321-1/+1
(Hollis Blanchard) git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4273 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-24More PowerPC debug print fixes - hardware emulation pass.j_mayer1-19/+22
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3726 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-17Break up vl.h.pbrook1-1/+3
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3674 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-10added cpu_model parameter to cpu_init()bellard1-8/+5
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3562 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-07Share devices that might be useful for all PowerPC 40x & 440 implementationsj_mayer1-0/+534
(mostly CPU registration and UIC, for now). git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3340 c046a42c-6fe2-441c-8c8c-71466251a162
generated by cgit v1.2.3 (git 2.25.1) at 2024-06-23 03:05:23 +0000