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path: root/hw/piix_pci.c
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2012-02-15qom: Unify type registrationAndreas Färber1-2/+3
Replace device_init() with generalized type_init(). While at it, unify naming convention: type_init([$prefix_]register_types) Also, type_init() is a function, so add preceding blank line where necessary and don't put a semicolon after the closing brace. Signed-off-by: Andreas Färber <afaerber@suse.de> Cc: Anthony Liguori <anthony@codemonkey.ws> Cc: malc <av1474@comtv.ru> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-02-03qom: move properties from qdev to objectAnthony Liguori1-2/+2
This is mostly code movement although not entirely. This makes properties part of the Object base class which means that we can now start using Object in a meaningful way outside of qdev. Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-02-03qdev: register all types natively through QEMU Object ModelAnthony Liguori1-31/+39
This was done in a mostly automated fashion. I did it in three steps and then rebased it into a single step which avoids repeatedly touching every file in the tree. The first step was a sed-based addition of the parent type to the subclass registration functions. The second step was another sed-based removal of subclass registration functions while also adding virtual functions from the base class into a class_init function as appropriate. Finally, a python script was used to convert the DeviceInfo structures and qdev_register_subclass functions to TypeInfo structures, class_init functions, and type_register_static calls. We are almost fully converted to QOM after this commit. Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-01-27sysbus: apic: ioapic: convert to QEMU Object ModelAnthony Liguori1-6/+13
This converts three devices because apic and ioapic are subclasses of sysbus. Converting subclasses independently of their base class is prohibitively hard. Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-01-27pci: convert to QEMU Object ModelAnthony Liguori1-37/+58
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-01-27qdev: prepare source tree for code conversionAnthony Liguori1-42/+44
These are various small stylistic changes which help make things more consistent such that the automated conversion script can be simpler. It's not necessary to agree or disagree with these style changes because all of this code is going to be rewritten by the patch monkey script anyway. Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2011-12-20pc: give ISA bus to ISA methodsHervé Poussineau1-3/+5
Signed-off-by: Hervé Poussineau <hpoussin@reactos.org> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2011-12-20i440fx: remove piix3 fieldPaolo Bonzini1-3/+0
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2011-12-19Merge remote-tracking branch 'qemu-kvm/memory/mutators' into stagingAnthony Liguori1-14/+6
Conflicts: memory.h
2011-12-19Also create piix3 property when Xen is enabledJulian Pidancet1-2/+1
This recently added line in hw/pc_piix.c is causing a SEGV on a Xen setup because the piix3 property is never created: qdev_property_add_child(qdev_resolve_path("/i440fx/piix3", NULL), "rtc", (DeviceState *)rtc_state, NULL); Signed-off-by: Julian Pidancet <julian.pidancet@gmail.com> Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
2011-12-15rtc: make piix3 set the rtc as a child (v2)Anthony Liguori1-0/+3
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2011-12-05piix_pci: adapt smram mapping to use memory mutatorsAvi Kivity1-14/+6
Eliminates fake state ->smram_enabled. Signed-off-by: Avi Kivity <avi@redhat.com>
2011-09-25isa: Pass i/o address space to isa_bus_newRichard Henderson1-1/+1
Not used yet, but at least we're provided with the correct region. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Avi Kivity <avi@redhat.com>
2011-09-04piix_pci: wrap memory update in a transactionAvi Kivity1-0/+2
The code will remap all PAMs, even if just one is updated, resulting in reduced performance. Wrap in a transaction to detect that those other PAMs have not changed. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Avi Kivity <avi@redhat.com>
2011-09-04pci_host: convert conf index and data ports to memory APIAvi Kivity1-2/+9
Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Avi Kivity <avi@redhat.com>
2011-08-25Revert "Merge remote-tracking branch 'qemu-kvm/memory/batch' into staging"Anthony Liguori1-11/+2
This reverts commit 8ef9ea85a2cc1007eaefa53e6871f1f83bcef22d, reversing changes made to 444dc48298c480e42e15a8fe676be737d8a6b2a1. From Avi: Please revert the entire pull (git revert 8ef9ea85a2cc1) while I work this out - it isn't trivial. Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2011-08-25piix_pci: wrap memory update in a transactionAvi Kivity1-0/+2
The code will remap all PAMs, even if just one is updated, resulting in reduced performance. Wrap in a transaction to detect that those other PAMs have not changed. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Avi Kivity <avi@redhat.com>
2011-08-24pci_host: convert conf index and data ports to memory APIAvi Kivity1-2/+9
Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Avi Kivity <avi@redhat.com>
2011-08-22440fx: fix PAM, PCI holesAvi Kivity1-33/+81
The current implementation of PAM and the PCI holes is broken in several ways: - PCI BARs are not restricted to the PCI hole (a BAR may hide memory) - PCI devices do not respect PAM (if a PCI device maps a region while PAM maps the region to RAM, the request will be honored) This patch fixes things by introducing a pci address space, and using memory region aliases to represent PAM regions, SMRAM, and PCI holes. The memory hierarchy looks something like system_memory | +--- low memory alias (0-0xe0000000) | | | +-- ram@0 | +--- high memory alias (0x100000000-EOM) | | | +-- ram@0xe0000000 | +--- pci hole alias (end of low memory-0x100000000) | | | +-- pci@end-of-low-memory | | +--- pam[n] (0xc0000-0xc3fff etc) (when set to pci, priority 1) | | | +-- pci@0xc4000 etc | +--- smram (0xa0000-0xbffff) (when set to pci/vga, priority 1) | +-- pci@0xa0000 etc ram (simple ram region) pci | +--- BARn | +--- VGA 0xa0000-0xbffff | +--- ROMs Signed-off-by: Avi Kivity <avi@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2011-08-08pci: pass I/O address space to new PCI busAvi Kivity1-5/+9
This lets us register BARs in the I/O address space. Reviewed-by: Richard Henderson <rth@twiddle.net> Reviewed-by: Anthony Liguori <aliguori@us.ibm.com> Signed-off-by: Avi Kivity <avi@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2011-07-29pci: pass address space to pci bus when createdAvi Kivity1-4/+9
This is now done sloppily, via get_system_memory(). Eventually callers will be converted to stop using that. Reviewed-by: Anthony Liguori <aliguori@us.ibm.com> Signed-off-by: Avi Kivity <avi@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2011-07-17hw/piix_pci.c: Fix PIIX3-xen to initialize idsAnthony PERARD1-0/+3
Signed-off-by: Anthony PERARD <anthony.perard@citrix.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2011-06-22Merge remote-tracking branch 'mst/for_anthony' into stagingAnthony Liguori1-12/+7
Conflicts: hw/usb-uhci.c
2011-06-19xen: fix interrupt routingStefano Stabellini1-32/+34
Compared to the last version I only added a comment to the code. - remove i440FX-xen and i440fx_write_config_xen we don't need to intercept pci config writes to i440FX anymore; - introduce PIIX3-xen and piix3_write_config_xen we do need to intercept pci config write to the PCI-ISA bridge to update the PCI link routing; - set the number of PIIX3-xen interrupts line to 128; Signed-off-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com> Signed-off-by: Alexander Graf <agraf@suse.de>
2011-06-15Merge remote-tracking branch 'origin/master' into pciMichael S. Tsirkin1-4/+47
Conflicts: hw/virtio-pci.c
2011-06-12hw/piix_pci.c: convert to PCIDeviceInfo to initialize idsIsaku Yamahata1-12/+7
use PCIDeviceInfo to initialize ids. Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2011-05-22piix_pci: fix piix3_set_irq_pic()TeLeMan1-1/+1
If pic_irq is greater than 7, the irq level is always 0 on 32bits. Signed-off-by: TeLeMan <geleman@gmail.com> Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
2011-05-08piix_pci: Introduces Xen specific call for irq.Anthony PERARD1-3/+46
This patch introduces Xen specific call in piix_pci. The specific part for Xen is in write_config, set_irq and get_pirq. Signed-off-by: Anthony PERARD <anthony.perard@citrix.com> Signed-off-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com> Acked-by: Alexander Graf <agraf@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
2011-04-01piix_pci: load path clean upIsaku Yamahata1-8/+4
The previous patch didn't change the behavior when load, it resulted in ugly code. This patch cleans it up. With this patch, pic irq lines are manipulated when loaded. It is expected that it won't change the behaviour because the interrupts are level: at the moment e.g. pci devices already reassert interrupts on load. Test: - rung linux as guest and use flooding ping (ping -f) to host in order to trigger interrupts for e1000 emulated. - savevm/loadvm and see guest kept running after loadvm. To be honest, I'm not sure that ping -f caused enough interrupts because Linux e1000 driver supports NAPI. TODO: test more OSes, stress test with save/load, live-migration Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2011-04-01piix_pci: optimize set irq pathIsaku Yamahata1-17/+84
optimize irq routing in piix_pic.c which has been a TODO. So far piix3 tracks each pirq level and checks whether a given pic pins is asserted by seeing if each pirq is mapped into the pic pin. This is independent on irq routing, but data path is on slow path. Given that irq routing is rarely changed and asserting pic pins is on data path, the path that asserts pic pins should be optimized and chainging irq routing should be on slow path. The new behavior with this patch series is to use bitmap which is addressed by pirq and pic pins with a given irq routing. When pirq is asserted, the bitmap is set and see if the pic pins is asserted by checking the bitmaps. When irq routing is changed, rebuild the bitmap and re-assert pic pins. test: - create VM with 4 e1000 nics in different pci slots (i.e. fn=0 for each e1000) Thus those e1000's INTA are connected to each PIRQ[A-D]. - run linux as guest and saw each devices triggers interrupt by seeing /proc/interrupts. And then confirmed that each PIRQ[A-D] surely asserted interrupts. Because irq 10 and 11 are shared by 4 e1000's, it only one NIC is activated with ifconfig ethN up/down when counting interrupts. Cc: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2011-04-01piix_pci: eliminate PIIX3State::pci_irq_levelsIsaku Yamahata1-11/+27
PIIX3State::pci_irq_levels are redundant which is already tracked by PCIBus layer. So eliminate them. Cc: Juan Quintela <quintela@redhat.com> Cc: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2011-01-10piix: tag as not hotpluggable.Gerd Hoffmann1-0/+2
This patch tags all pci devices which belong to the piix3/4 chipsets as not hotpluggable (Host bridge, ISA bridge, IDE controller, ACPI bridge). Acked-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2010-12-11Introduce fw_name field to DeviceInfo structure.Gleb Natapov1-0/+1
Add "fw_name" to DeviceInfo to use in device path building. In contrast to "name" "fw_name" should refer to functionality device provides instead of particular device model like "name" does. Signed-off-by: Gleb Natapov <gleb@redhat.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-09-18Introduce range.hBlue Swirl1-0/+1
Extract range functions from pci.h. These will be used by later patches by non-PCI devices. Adjust current users. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-07-11pci: set PCI multi-function bit appropriately.Isaku Yamahata1-2/+0
Set PCI multi-function bit according to multifunction property. PCI address, devfn ,is exported to users as addr property, so users can populate pci function(PCIDevice in qemu) at arbitrary devfn. It means each function(PCIDevice) don't know whether pci device (PCIDevice[8]) is multi function or not. So this patch allows user to set multifunction bit via property and checks whether multifunction bit is set correctly. Cc: Juan Quintela <quintela@redhat.com> Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-07-11pci: set multifunction property for normal device.Isaku Yamahata1-1/+1
use pci_create_simple_multifunction() for normal device which sets multifunction bit. At the moment, only pc_piix.c and mips_malta.c uses multifunction devices with piix3/4 pci-isa bridge. And other boards don't populate those devices. Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-07-11pci: don't overwrite multi functio bit in pci header type.Isaku Yamahata1-1/+0
Don't overwrite pci header type. Otherwise, multi function bit which pci_init_header_type() sets appropriately is lost. Anyway PCI_HEADER_TYPE_NORMAL is zero, so it is unnecessary to zero which is already zero cleared. how to test: run qemu and issue info pci to see whether a device in question is normal device, not pci-to-pci bridge. This is handy because guest os isn't required. tested changes: The following files are covered by using following commands. sparc64-softmmu apb_pci.c, vga-pci.c, cmd646.c, ne2k_pci.c, sun4u.c ppc-softmmu grackle_pci.c, cmd646.c, ne2k_pci.c, vga-pci.c, macio.c ppc-softmmu -M mac99 unin_pci.c(uni-north, uni-north-agp) ppc64-softmmu pci-ohci, ne2k_pci, vga-pci, unin_pci.c(u3-agp) x86_64-softmmu acpi_piix4.c, ide/piix.c, piix_pci.c -vga vmware vmware_vga.c -watchdog i6300esb wdt_i6300esb.c -usb usb-uhci.c -sound ac97 ac97.c -nic model=rtl8139 rtl8139.c -nic model=pcnet pcnet.c -balloon virtio virtio-pci.c: untested changes: The following changes aren't tested. prep_pci.c: ppc-softmmu -M prep should cover, but core dumped. unin_pci.c(uni-north-pci): the caller is commented out. openpic.c: the caller is commented out in ppc_prep.c Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-05-28Fix overflow in i440fx_init()Avi Kivity1-1/+1
The ram_size parameter can be larger than an int, so it may be truncated. Fix by using the correct type. Signed-off-by: Avi Kivity <avi@redhat.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-05-15pc, i440fx: Make smm enable/disable function i440fx independent.Isaku Yamahata1-1/+4
make cpu_smm_update() generic to be independent on i440fx by registering a callback. Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp> Acked-by: Gerd Hoffmann <kraxel@redhat.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-05-03hw: better i440 emulationBernhard M. Wiedemann1-1/+6
updated version of an old patch http://xenon.stanford.edu/~eswierk/misc/qemu-linuxbios/qemu-piix-ram-size.patch that together with http://www.mail-archive.com/linuxbios@linuxbios.org/msg02390.html (which is already in coreboot trunk) allows coreboot to autodetect the amount of RAM within qemu/kvm from a register in i440 northbridge. The message on the old patch states: Unfortunately the current version of qemu does not set these registers, but I have patched qemu so that it emulates the i440 more faithfully in this regard. Signed-off-by: Bernhard M. Wiedemann <qemudevbmw@lsmod.de> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-12-23piix_pci: add link to i440fx data sheet.Isaku Yamahata1-0/+5
add link to i440fx data sheet. Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2009-12-23piix_pci: use range helper functionIsaku Yamahata1-3/+3
use range helper function in i440fx_write_config(). Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2009-12-23piix_pci: define symbolic value for PAM0, PAM6 and SMRAM.Isaku Yamahata1-5/+12
Define symbolic value in i440fx configuration space for 0x59, 0x5f and 0x7f and use them. Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2009-12-03savevm: Port to qdev.vmsd all devices that have qdevJuan Quintela1-2/+2
Signed-off-by: Juan Quintela <quintela@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-12-01pci: shorten pci_host_{conf, data}_register_xxx function a bit.Isaku Yamahata1-1/+1
pci_host_data_register_io_memory and its variants are too long a bit. So shorten them. Now they are pci_host_{conf, data}_register_{mmio, mmio_noswap, ioport}() Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2009-11-09pci_host: consolidate pci config address access.Isaku Yamahata1-14/+1
consolidate pci_config address access into pci_host.c Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-11-09pci_host.h: move functions in pci_host.h into .c file.Isaku Yamahata1-9/+2
split static functions in pci_host.h into pci_host.c and pci_host_template.h. Later a structures declared in pci_host.h, PCIHostState, will be used. However pci_host.h doesn't allow to include itself easily. This patches addresses it. pci_host.h includes functions which are instantiated in .c by including pci_host.h with typedefing pci_addr_t. pci_addr_t is per pci host bridge and is typedef'ed to uint32_t for ioio or target_phys_addr_t for mmio in .c file. That prevents from including pci_host.h to use PCIHostState because of requiring type, pci_addr_t. Its purpose to include is to instantiate io function for mmio or ioio depending on which pci host bridge requires ioio or mmio. To avoid including code, we always instantiate both version. Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-11-07v3: don't call reset functions on cpu initializationGlauber Costa1-1/+0
There is absolutely no need to call reset functions when initializing devices. Since we are already registering them, calling qemu_system_reset() should suffice. Actually, it is what happens when we reboot the machine, and using the same process instead of a special case semantics will even allow us to find bugs easier. Furthermore, the fact that we initialize things like the cpu quite early, leads to the need to introduce synchronization stuff like qemu_system_cond. This patch removes it entirely. All we need to do is call qemu_system_reset() only when we're already sure the system is up and running I tested it with qemu (with and without io-thread) and qemu-kvm, and it seems to be doing okay - although qemu-kvm uses a slightly different patch. [ v2: user mode still needs cpu_reset, so put it in ifdef. ] [ v3: leave qemu_system_cond for now. ] Signed-off-by: Glauber Costa <glommer@redhat.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-10-07New qdev_init_nofail()Markus Armbruster1-1/+1
Like qdev_init(), but terminate program via hw_error() instead of returning an error value. Use it instead of qdev_init() where terminating the program on failure is okay, either because it's during machine construction, or because we know that failure can't happen. Because relying in the latter is somewhat unclean, and the former is not always obvious, it would be nice to go back to qdev_init() in the not-so-obvious cases, only with proper error handling. I'm leaving that for another day, because it involves making sure that error values are properly checked by all callers. Patchworks-ID: 35168 Signed-off-by: Markus Armbruster <armbru@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-10-05piix_pci: kill PIIX3IrqStateGerd Hoffmann1-20/+17
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
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