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2012-01-27sysbus: apic: ioapic: convert to QEMU Object ModelAnthony Liguori1-5/+12
This converts three devices because apic and ioapic are subclasses of sysbus. Converting subclasses independently of their base class is prohibitively hard. Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-01-19ioapic: Factor out base class for KVM reuseJan Kiszka1-114/+16
Split up the IOAPIC analogously to APIC and i8259. KVM will share the IOAPICCommonState, the vmstate, reset logic and certain init parts with the user space model. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
2012-01-19ioapic: Drop post-load irr initializationJan Kiszka1-12/+0
As all devices undergo a reset prior to vmloa, and the reset value of irr is 0, we do not need to do this clearing for older vmstates explicitly. Dropping this redundant code will also make KVM integration a bit simpler. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
2011-11-28sysbus: rename sysbus_init_mmio_region() to sysbus_init_mmio()Avi Kivity1-1/+1
Signed-off-by: Avi Kivity <avi@redhat.com>
2011-11-24ioapic: Convert to memory APIJan Kiszka1-17/+11
This maintains the old imprecise access size handling. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Avi Kivity <avi@redhat.com>
2011-11-24ioapic: Reject non-dword accesses to IOWIN registerJan Kiszka1-0/+6
Aligns the model with the spec. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Avi Kivity <avi@redhat.com>
2011-08-22ioapic: Implement polarityJan Kiszka1-0/+3
If the polarity bit is set in the redirection table, the input level simply has to inverted as it is low active in this case. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2011-08-22target-i386: Remove unused polarity arguments from APIC APIJan Kiszka1-3/+1
Polarity of external interrupts needs to be handled in the IOAPIC. Passing it to the APIC is pointless. So remove all these arguments. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2011-04-27ioapic: Do not set irr for masked edge IRQsJan Kiszka1-2/+3
So far we set IRR for edge IRQs even if the pin is masked. If the guest later on unmasks and switches the pin to level-triggered mode, irr will remain set, causing an IRQ storm. The point is that setting IRR is not correct in this case according to the spec, and avoiding this resolves the issue. Reported-and-tested-by: Isaku Yamahata <yamahata@valinux.co.jp> Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-04-04Revert "ioapic: when switches to level trigger mode, interrupts raised ↵Aurelien Jarno1-1/+0
repeatedly." This reverts commit 9bcfc7daabb138b0fe3d64d74892942d482e5bbd.
2011-04-03ioapic: when switches to level trigger mode, interrupts raised repeatedly.Isaku Yamahata1-0/+1
- the trigger mode is edge at first - During initializatoin, the interrupt is raised as edge which is masked. The corresponding bit of irr is set. - Then the mode is switched to level and it's unmasked. - the bit of irr is set, so the interrupt is raised repeatedly by ioapic_service(). - OS considers that the irq line is broken and falls back to polling mode. This patch fixes the issues. After raising edige, clear the bit of irr. > Bringing up interface eth0: > Determining IP information for eth0...irq 18: nobody cared (try booting with the "irqpoll" option) > Pid: 4126, comm: ip Not tainted 2.6.38-rc7 #1 > Call Trace: > <IRQ> [<ffffffff8105b009>] ? __report_bad_irq+0x38/0x87 > [<ffffffff8105b177>] ? note_interrupt+0x11f/0x188 > [<ffffffff8105bacf>] ? handle_fasteoi_irq+0xa7/0xd1 > [<ffffffff810046ff>] ? handle_irq+0x83/0x8c > [<ffffffff81003eb9>] ? do_IRQ+0x48/0xaf > [<ffffffff81300513>] ? ret_from_intr+0x0/0xe > [<ffffffff81031ab8>] ? __do_softirq+0x4f/0x114 > [<ffffffff81002d6c>] ? call_softirq+0x1c/0x28 > [<ffffffff81004647>] ? do_softirq+0x33/0x68 > [<ffffffff810316fb>] ? irq_exit+0x36/0x38 > [<ffffffff81015f2c>] ? smp_apic_timer_interrupt+0x88/0x96 > [<ffffffff81002853>] ? apic_timer_interrupt+0x13/0x20 > <EOI> [<ffffffff810177ed>] ? __ioapic_set_affinity+0x68/0x7c > [<ffffffff813000f0>] ? _raw_spin_unlock_irqrestore+0x8/0xa > [<ffffffff8105a84f>] ? __setup_irq+0x224/0x2cb > [<ffffffff8120e3c5>] ? e1000_intr+0x0/0x103 > [<ffffffff8105a9c7>] ? request_threaded_irq+0xd1/0x114 > [<ffffffff8120e396>] ? e1000_request_irq+0x34/0x63 > [<ffffffff8121237d>] ? e1000_open+0x81/0x11f > [<ffffffff8129097c>] ? call_netdevice_notifiers+0x45/0x4a > [<ffffffff81290d8d>] ? __dev_open+0x97/0xc4 > [<ffffffff8128e9c5>] ? __dev_change_flags+0xb9/0x13d > [<ffffffff81290cc1>] ? dev_change_flags+0x1c/0x51 > [<ffffffff812d0542>] ? devinet_ioctl+0x26e/0x594 > [<ffffffff812d174c>] ? inet_ioctl+0x92/0xaa > [<ffffffff81281d75>] ? T.1003+0x13/0x32 > [<ffffffff81282152>] ? sock_ioctl+0x1f2/0x1ff > [<ffffffff810ae2d3>] ? do_vfs_ioctl+0x498/0x4e7 > [<ffffffff81281203>] ? sock_alloc_file+0xb3/0x115 > [<ffffffff8109f79f>] ? fd_install+0x31/0x5d > [<ffffffff810ae364>] ? sys_ioctl+0x42/0x65 > [<ffffffff81001f3b>] ? system_call_fastpath+0x16/0x1b > handlers: > [<ffffffff8120e3c5>] (e1000_intr+0x0/0x103) > Disabling IRQ #18 Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-02-04ioapic: Style & magics cleanupJan Kiszka1-70/+107
Fix a few style issues and convert magic numbers into prober symbolic constants, also fixing the wrong but unused IOAPIC_DM_SIPI value. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2011-02-04ioapic: Add support for qemu-kvm's vmstate v2Jan Kiszka1-1/+2
qemu-kvm carries the IOAPIC base address in its v2 vmstate. We only support the default base address so far, and saving even that in the device state was rejected. Add a padding field to be able to read qemu-kvm's old state, but increase our version to 3, indicating that we are not saving a valid address. This also gives downstream the chance to change to stop evaluating the base_address and move to v3 as well. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2011-02-04ioapic: Save/restore irrJan Kiszka1-1/+14
This is a guest modifiable state that must be saved/restored properly. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2011-02-04ioapic: Implement EOI handling for level-triggered IRQsJan Kiszka1-2/+41
Add the missing EOI broadcast from local APIC to the IOAPICs on completion of level-triggered IRQs. This ensures that a still asserted IRQ source properly re-triggers an APIC IRQ. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2010-12-11Add endianness as io mem parameterAlexander Graf1-1/+2
As stated before, devices can be little, big or native endian. The target endianness is not of their concern, so we need to push things down a level. This patch adds a parameter to cpu_register_io_memory that allows a device to choose its endianness. For now, all devices simply choose native endian, because that's the same behavior as before. Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-06-19ioapic: convert to qdevBlue Swirl1-15/+30
Convert to qdev. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-06-17ioapic: unexport ioapic_set_irqBlue Swirl1-1/+1
There's no need to use ioapic_set_irq() outside of ioapic.c, so make it static. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-05-31ioapic: improve debuggingBlue Swirl1-6/+10
Add a DPRINTF macro, use it also to see irq deliveries. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-03-21Move x86 specific PC declarations to a separate fileBlue Swirl1-0/+1
x86 definitions (especially CPUState uses) prevent many files from being compiled within libhw. Move x86 specific declarations (APIC stuff) to a separate file. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-10-01Revert "Get rid of _t suffix"Anthony Liguori1-2/+2
In the very least, a change like this requires discussion on the list. The naming convention is goofy and it causes a massive merge problem. Something like this _must_ be presented on the list first so people can provide input and cope with it. This reverts commit 99a0949b720a0936da2052cb9a46db04ffc6db29. Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-10-01Get rid of _t suffixmalc1-2/+2
Some not so obvious bits, slirp and Xen were left alone for the time being. Signed-off-by: malc <av1474@comtv.ru>
2009-09-11vmstate: port ioapic deviceJuan Quintela1-27/+12
Signed-off-by: Juan Quintela <quintela@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-08-25Make CPURead/WriteFunc structure 'const'Blue Swirl1-2/+2
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-08-24Route IOAPIC interrupts via ISA busAvi Kivity1-2/+4
Instead of calling the IOAPIC from the PIC, raise IOAPIC irqs via the ISA bus. As a side effect, IOAPIC lines 16-23 are enabled. Signed-off-by: Avi Kivity <avi@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-07-16Update to a hopefully more future proof FSF addressBlue Swirl1-2/+1
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-06-29Revert "Introduce reset notifier order"Jan Kiszka1-1/+1
This reverts commit 8217606e6edb49591b4a6fd5a0d1229cebe470a9 (and updates later added users of qemu_register_reset), we solved the problem it originally addressed less invasively. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-06-16Remove io_index argument from cpu_register_io_memory()Avi Kivity1-1/+1
The parameter is always zero except when registering the three internal io regions (ROM, unassigned, notdirty). Remove the parameter to reduce the API's power, thus facilitating future change. Signed-off-by: Avi Kivity <avi@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-05-22Introduce reset notifier orderJan Kiszka1-1/+1
Add the parameter 'order' to qemu_register_reset and sort callbacks on registration. On system reset, callbacks with lower order will be invoked before those with higher order. Update all existing users to the standard order 0. Note: At least for x86, the existing users seem to assume that handlers are called in their registration order. Therefore, the patch preserves this property. If someone feels bored, (s)he could try to identify this dependency and express it properly on callback registration. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-03-12From 67e94ae77f8de4d5d822917f1723cefa7ebfb64d Mon Sep 17 00:00:00 2001aliguori1-0/+261
From: Xiantao Zhang <xiantao.zhang@intel.com> Date: Tue, 3 Mar 2009 13:33:13 +0800 Subject: [PATCH] Split ioapic logic from the current apic. Add a new ioapic.c to hold ioapic's logic, and also make it work for ia64. Signed-off-by: Xiantao Zhang <xiantao.zhang@intel.com> --- Makefile.target | 2 +- hw/apic.c | 237 +++---------------------------------------------- hw/ioapic.c | 263 +++++++++++++++++++++++++++++++++++++++++++++++++++++++ hw/pc.h | 5 +- 4 files changed, 281 insertions(+), 226 deletions(-) create mode 100644 hw/ioapic.c git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6827 c046a42c-6fe2-441c-8c8c-71466251a162
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