path: root/hw/a9mpcore.c
AgeCommit message (Collapse)AuthorFilesLines
2012-02-15qom: Unify type registrationAndreas Färber1-2/+2
Replace device_init() with generalized type_init(). While at it, unify naming convention: type_init([$prefix_]register_types) Also, type_init() is a function, so add preceding blank line where necessary and don't put a semicolon after the closing brace. Signed-off-by: Andreas Färber <afaerber@suse.de> Cc: Anthony Liguori <anthony@codemonkey.ws> Cc: malc <av1474@comtv.ru> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-02-03qdev: register all types natively through QEMU Object ModelAnthony Liguori1-18/+22
This was done in a mostly automated fashion. I did it in three steps and then rebased it into a single step which avoids repeatedly touching every file in the tree. The first step was a sed-based addition of the parent type to the subclass registration functions. The second step was another sed-based removal of subclass registration functions while also adding virtual functions from the base class into a class_init function as appropriate. Finally, a python script was used to convert the DeviceInfo structures and qdev_register_subclass functions to TypeInfo structures, class_init functions, and type_register_static calls. We are almost fully converted to QOM after this commit. Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-01-27sysbus: apic: ioapic: convert to QEMU Object ModelAnthony Liguori1-7/+14
This converts three devices because apic and ioapic are subclasses of sysbus. Converting subclasses independently of their base class is prohibitively hard. Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-01-17arm: make the number of GIC interrupts configurableMark Langsdorf1-3/+10
Increase the maximum number of GIC interrupts for a9mp and a11mp to 1020, and create a configurable property for each defaulting to 96 and 64 (respectively) so that device modelers can set the value appropriately for their SoC. Other ARM processors also set their maximum number of used IRQs appropriately. Set the maximum theoretical number of GIC interrupts to 1020 and update the save/restore code to only use the appropriate number for each SoC. Signed-off-by: Mark Langsdorf <mark.langsdorf@calxeda.com> Reviewed-by: Andreas Färber <afaerber@suse.de> [Peter Maydell: fixed minor whitespace snafu] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-01-04arm: add missing scu registersRob Herring1-3/+33
Add power control register to a9mpcore Signed-off-by: Rob Herring <rob.herring@calxeda.com> Signed-off-by: Mark Langsdorf <mark.langsdorf@calxeda.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2011-12-12hw/a9mpcore.c: Implement A9MP peripherals rather than 11MPcore onesPeter Maydell1-10/+179
Implement the A9MP private peripheral region correctly, rather than piggybacking on the 11MPCore code; the two CPUs are not the same in this area. Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2011-07-23Correct spelling of licensedMatthew Fernandez1-1/+1
Correct typos of "licenced" to "licensed". Reviewed-by: Stefan Weil <weil@mail.berlios.de> Reviewed-by: Andreas F=E4rber <andreas.faerber@web.de> Signed-off-by: Matthew Fernandez <matthew.fernandez@gmail.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-11-19ARM PBX-A9 board supportPaul Brook1-0/+29
Implement ARM RealView PBX-A9 board support. Signed-off-by: Paul Brook <paul@codesourcery.com>