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2011-04-25softfloat: fix float*_scalnb() corner casesAurelien Jarno1-5/+42
float*_scalnb() were not taking into account all cases. This patch fixes some corner cases: - NaN values in input were not properly propagated and the invalid flag not correctly raised. Use propagateFloat*NaN() for that. - NaN or infinite values in input of floatx80_scalnb() were not correctly detected due to a typo. - The sum of exponent and n could overflow, leading to strange results. Additionally having int16 defined to int make that happening for a very small range of values. Fix that by saturating n to the maximum exponent range, and using an explicit wider type if needed. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-04-25softfloat: add floatx80_compare*() functionsAurelien Jarno1-0/+46
Add floatx80_compare() and floatx80_compare_quiet() functions to match the softfloat-native ones. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-04-17softfloat: improve description of comparison functionsAurelien Jarno1-37/+48
Make clear for all comparison functions which ones trigger an exception for all NaNs, and which one only for sNaNs. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-04-17softfloat: move float*_eq and float*_eq_quietAurelien Jarno1-51/+50
I am not a big fan of code moving, but having the signaling version in the middle of quiet versions and vice versa doesn't make the code easy to read. This patch is a simple code move, basically swapping locations of float*_eq and float*_eq_quiet. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-04-17softfloat: rename float*_eq_signaling() into float*_eq()Aurelien Jarno1-4/+4
float*_eq_signaling functions have a different semantics than other comparison functions. Fix that by renaming float*_quiet_signaling() into float*_eq(). Note that it is purely mechanical, and the behaviour should be unchanged. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-04-17softfloat: rename float*_eq() into float*_eq_quiet()Aurelien Jarno1-4/+4
float*_eq functions have a different semantics than other comparison functions. Fix that by first renaming float*_quiet() into float*_eq_quiet(). Note that it is purely mechanical, and the behaviour should be unchanged. That said it clearly highlight problems due to this different semantics, they are fixed later in this patch series. Cc: Alexander Graf <agraf@suse.de> Acked-by: Edgar E. Iglesias <edgar.iglesias@gmail.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-04-17softfloat: add float*_unordered_{,quiet}() functionsAurelien Jarno1-0/+167
Add float*_unordered() functions to softfloat, matching the softfloat-native ones. Also add float*_unordered_quiet() functions to match the others comparison functions. This allow target-i386/ops_sse.h to be compiled with softfloat. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-04-03softfloat: Add float*_min() and float*_max() functionsPeter Maydell1-0/+49
Add min and max operations to softfloat. This allows us to implement propagation of NaNs and handling of negative zero correctly (unlike the approach of having target helper routines return one of the operands based on the result of a comparison op). Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-03-21softfloat: Drop [s]bits{8, 16, 32, 64} types in favor of [u]int{8, 16, 32, 64}_tAndreas Färber1-292/+292
They are defined with the same semantics as the POSIX types, so prefer those for consistency. Suggested by Peter Maydell. Cc: Peter Maydell <peter.maydell@linaro.org> Cc: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Andreas Färber <andreas.faerber@web.de> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-03-21softfloat: Prepend QEMU-style header with derivation noticeAndreas Färber1-0/+5
The SoftFloat license requires "prominent notice that the work is derivative". Having added features like improved 16-bit support for arm already, add such a notice to the sources. softfloat-native.[ch] are not under the SoftFloat license and thus are not changed. Cc: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Andreas Färber <andreas.faerber@web.de> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-02-10softfloat: Fix compilation failures with USE_SOFTFLOAT_STRUCT_TYPESPeter Maydell1-15/+15
Make softfloat compile with USE_SOFTFLOAT_STRUCT_TYPES defined, by adding and using new macros const_float16(), const_float32() and const_float64() so you can use array initializers in an array of float16/float32/float64 whether the types are bare or wrapped in the structs. [aurelien@aurel32.net: do the same for float16] Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-02-10softfloat: Correctly handle NaNs in float16_to_float32()Peter Maydell1-3/+1
Correctly handle NaNs in float16_to_float32(), by defining and using a float16ToCommonNaN() function, as we do with the other formats. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-02-10softfloat: Fix single-to-half precision float conversionsPeter Maydell1-11/+17
Fix various bugs in the single-to-half-precision conversion code: * input NaNs not correctly converted in IEEE mode (fixed by defining and using a commonNaNToFloat16()) * wrong values returned when converting NaN/Inf into non-IEEE half precision value * wrong values returned for conversion of values which are on the boundary between denormal and zero for the half precision format * zeroes not correctly identified * excessively large results in non-IEEE mode should generate InvalidOp, not Overflow Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-02-10softfloat: Honour default_nan_mode for float-to-float conversionsChristophe Lyon1-12/+12
Honour the default_nan_mode flag when doing conversions between different floating point formats, as well as when returning a NaN from a two-operand floating point function. This corrects the behaviour of float<->double conversions on both ARM and SH4. Signed-off-by: Christophe Lyon <christophe.lyon@st.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-02-10softfloat: Add float16 type and float16 NaN handling functionsPeter Maydell1-8/+36
Add a float16 type to softfloat, rather than using bits16 directly. Also add the missing functions float16_is_quiet_nan(), float16_is_signaling_nan() and float16_maybe_silence_nan(), which are needed for the float16 conversion routines. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-06softfloat: Implement flushing input denormals to zeroPeter Maydell1-2/+102
Add support to softfloat for flushing input denormal float32 and float64 to zero. softfloat's existing 'flush_to_zero' flag only flushes denormals to zero on output. Some CPUs need input denormals to be flushed before processing as well. Implement this, using a new status flag to enable it and a new exception status bit to indicate when it has happened. Existing CPUs should be unaffected as there is no behaviour change unless the mode is enabled. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Acked-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-12-07softfloat: Add float/double to 16 bit integer conversion functionsPeter Maydell1-0/+136
The ARM architecture needs float/double to 16 bit integer conversions. (The 32 bit versions aren't sufficient because of the requirement to saturate at 16 bit MAXINT/MININT and to get the exception bits right.) Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Nathan Froyd <froydnj@codesourcery.com>
2010-07-13softfloat: add float32_exp2()Aurelien Jarno1-0/+79
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-03-07softfloat: remove dead assignments, spotted by clangBlue Swirl1-8/+4
Value stored to 'bSign' is never read. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-11-19ARM FP16 supportPaul Brook1-0/+138
Implement the ARM VFP half precision floating point extensions. Signed-off-by: Paul Brook <paul@codesourcery.com>
2009-02-05soft-float: add float32_log2() and float64_log2()aurel321-0/+93
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6518 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-19Implement flush-to-zero mode (denormal results are replaced with zero).pbrook1-3/+18
Signed-off-by: Paul Brook <paul@codesourcery.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6107 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-19Correctly normalize values and handle zero inputs to scalbn functions.pbrook1-8/+29
Signed-off-by: Paul Brook <paul@codesourcery.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6102 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-20Suppress gcc 4.x -Wpointer-sign (included in -Wall) warningsblueswir11-1/+1
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5275 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-25 128-bit float support for user modeblueswir11-0/+44
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3740 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-21 Fix more typos in softloat code (Eduardo Felipe)blueswir11-1/+1
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3716 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-21Fix typo in softfloat code.pbrook1-6/+6
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3714 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-18Add strict checking mode for softfp code.pbrook1-66/+109
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3688 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-11ARMv7 support.pbrook1-0/+75
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3572 c046a42c-6fe2-441c-8c8c-71466251a162
2007-03-20Ooops... Typo.j_mayer1-1/+1
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2520 c046a42c-6fe2-441c-8c8c-71466251a162
2007-03-20Add missing softfloat helpers.j_mayer1-0/+48
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2518 c046a42c-6fe2-441c-8c8c-71466251a162
2006-10-28avoid using char when it is not necessarybellard1-27/+27
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2204 c046a42c-6fe2-441c-8c8c-71466251a162
2006-10-22ColdFire target.pbrook1-0/+11
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2196 c046a42c-6fe2-441c-8c8c-71466251a162
2005-03-13added abs, chs and compare functionsbellard1-0/+135
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1338 c046a42c-6fe2-441c-8c8c-71466251a162
2005-03-13soft float supportbellard1-0/+5185
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1332 c046a42c-6fe2-441c-8c8c-71466251a162
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