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-rw-r--r--target-sh4/helper.c5
1 files changed, 0 insertions, 5 deletions
diff --git a/target-sh4/helper.c b/target-sh4/helper.c
index d2ff6691e..486be5d51 100644
--- a/target-sh4/helper.c
+++ b/target-sh4/helper.c
@@ -53,11 +53,6 @@ int cpu_sh4_handle_mmu_fault(CPUState * env, target_ulong address, int rw,
return 1;
}
-target_phys_addr_t cpu_get_phys_page_debug(CPUState * env, target_ulong addr)
-{
- return addr;
-}
-
int cpu_sh4_is_cached(CPUSH4State * env, target_ulong addr)
{
/* For user mode, only U0 area is cachable. */