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-rw-r--r--target-mips/translate.c11
1 files changed, 2 insertions, 9 deletions
diff --git a/target-mips/translate.c b/target-mips/translate.c
index dbc6d84dc..ab78c146b 100644
--- a/target-mips/translate.c
+++ b/target-mips/translate.c
@@ -902,16 +902,9 @@ static inline void gen_op_addr_add (DisasContext *ctx, TCGv t0, TCGv t1)
/* For compatibility with 32-bit code, data reference in user mode
with Status_UX = 0 should be casted to 32-bit and sign extended.
See the MIPS64 PRA manual, section 4.10. */
- if ((ctx->hflags & MIPS_HFLAG_KSU) == MIPS_HFLAG_UM) {
- int l1 = gen_new_label();
- TCGv r_tmp = tcg_temp_new(TCG_TYPE_I32);
-
- tcg_gen_ld_i32(r_tmp, cpu_env, offsetof(CPUState, CP0_Status));
- tcg_gen_andi_i32(r_tmp, r_tmp, (1 << CP0St_UX));
- tcg_gen_brcondi_i32(TCG_COND_NE, r_tmp, 0, l1);
+ if (((ctx->hflags & MIPS_HFLAG_KSU) == MIPS_HFLAG_UM) &&
+ !(ctx->hflags & MIPS_HFLAG_UX)) {
tcg_gen_ext32s_i64(t0, t0);
- gen_set_label(l1);
- tcg_temp_free(r_tmp);
}
#endif
}