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-rw-r--r--hw/arm_sysctl.c2
-rw-r--r--hw/arm_timer.c4
-rw-r--r--hw/gt64xxx.c2
-rw-r--r--hw/i8259.c2
-rw-r--r--hw/ide.c1
-rw-r--r--hw/mc146818rtc.c20
-rw-r--r--hw/mcf_fec.c2
-rw-r--r--hw/mips_malta.c4
-rw-r--r--hw/ne2000.c1
-rw-r--r--hw/nvram.h1
-rw-r--r--hw/omap.c18
-rw-r--r--hw/omap.h3
-rw-r--r--hw/omap_lcdc.c8
-rw-r--r--hw/parallel.c18
-rw-r--r--hw/pc.c8
-rw-r--r--hw/pci.c6
-rw-r--r--hw/pckbd.c6
-rw-r--r--hw/piix_pci.c2
-rw-r--r--hw/pl061.c2
-rw-r--r--hw/pl190.c2
-rw-r--r--hw/pxa2xx_lcd.c2
-rw-r--r--hw/pxa2xx_pcmcia.c1
-rw-r--r--hw/realview_gic.c2
-rw-r--r--hw/rtl8139.c11
-rw-r--r--hw/sd.c8
-rw-r--r--hw/sh_serial.c6
-rw-r--r--hw/sh_timer.c2
-rw-r--r--hw/smbus.c2
-rw-r--r--hw/stellaris.c2
-rw-r--r--hw/usb-ohci.c1
-rw-r--r--hw/wm8750.c6
31 files changed, 82 insertions, 73 deletions
diff --git a/hw/arm_sysctl.c b/hw/arm_sysctl.c
index e1d5a56c0..67ca154a3 100644
--- a/hw/arm_sysctl.c
+++ b/hw/arm_sysctl.c
@@ -8,7 +8,7 @@
*/
#include "hw.h"
-#include "arm-misc.h"
+#include "primecell.h"
#include "sysemu.h"
#define LOCK_VALUE 0xa05f
diff --git a/hw/arm_timer.c b/hw/arm_timer.c
index 417d53db8..540d3dea1 100644
--- a/hw/arm_timer.c
+++ b/hw/arm_timer.c
@@ -8,8 +8,8 @@
*/
#include "hw.h"
-#include "arm-misc.h"
#include "qemu-timer.h"
+#include "primecell.h"
/* Common timer implementation. */
@@ -43,7 +43,7 @@ static void arm_timer_update(arm_timer_state *s)
}
}
-uint32_t arm_timer_read(void *opaque, target_phys_addr_t offset)
+static uint32_t arm_timer_read(void *opaque, target_phys_addr_t offset)
{
arm_timer_state *s = (arm_timer_state *)opaque;
diff --git a/hw/gt64xxx.c b/hw/gt64xxx.c
index 07f046a92..46d6a762d 100644
--- a/hw/gt64xxx.c
+++ b/hw/gt64xxx.c
@@ -908,7 +908,7 @@ static void pci_gt64120_set_irq(qemu_irq *pic, int irq_num, int level)
}
-void gt64120_reset(void *opaque)
+static void gt64120_reset(void *opaque)
{
GT64120State *s = opaque;
diff --git a/hw/i8259.c b/hw/i8259.c
index 23e66a804..add63450f 100644
--- a/hw/i8259.c
+++ b/hw/i8259.c
@@ -178,7 +178,7 @@ void pic_update_irq(PicState2 *s)
int64_t irq_time[16];
#endif
-void i8259_set_irq(void *opaque, int irq, int level)
+static void i8259_set_irq(void *opaque, int irq, int level)
{
PicState2 *s = opaque;
diff --git a/hw/ide.c b/hw/ide.c
index 575605b95..bf2cc14f4 100644
--- a/hw/ide.c
+++ b/hw/ide.c
@@ -30,6 +30,7 @@
#include "block.h"
#include "qemu-timer.h"
#include "sysemu.h"
+#include "ppc_mac.h"
/* debug IDE devices */
//#define DEBUG_IDE
diff --git a/hw/mc146818rtc.c b/hw/mc146818rtc.c
index 8c8076b26..c1d595677 100644
--- a/hw/mc146818rtc.c
+++ b/hw/mc146818rtc.c
@@ -390,7 +390,7 @@ void rtc_set_date(RTCState *s, const struct tm *tm)
#define REG_IBM_CENTURY_BYTE 0x32
#define REG_IBM_PS2_CENTURY_BYTE 0x37
-void rtc_set_date_from_host(RTCState *s)
+static void rtc_set_date_from_host(RTCState *s)
{
time_t ti;
struct tm *tm;
@@ -498,22 +498,22 @@ RTCState *rtc_init(int base, qemu_irq irq)
}
/* Memory mapped interface */
-uint32_t cmos_mm_readb (void *opaque, target_phys_addr_t addr)
+static uint32_t cmos_mm_readb (void *opaque, target_phys_addr_t addr)
{
RTCState *s = opaque;
return cmos_ioport_read(s, (addr - s->base) >> s->it_shift) & 0xFF;
}
-void cmos_mm_writeb (void *opaque,
- target_phys_addr_t addr, uint32_t value)
+static void cmos_mm_writeb (void *opaque,
+ target_phys_addr_t addr, uint32_t value)
{
RTCState *s = opaque;
cmos_ioport_write(s, (addr - s->base) >> s->it_shift, value & 0xFF);
}
-uint32_t cmos_mm_readw (void *opaque, target_phys_addr_t addr)
+static uint32_t cmos_mm_readw (void *opaque, target_phys_addr_t addr)
{
RTCState *s = opaque;
uint32_t val;
@@ -525,8 +525,8 @@ uint32_t cmos_mm_readw (void *opaque, target_phys_addr_t addr)
return val;
}
-void cmos_mm_writew (void *opaque,
- target_phys_addr_t addr, uint32_t value)
+static void cmos_mm_writew (void *opaque,
+ target_phys_addr_t addr, uint32_t value)
{
RTCState *s = opaque;
#ifdef TARGET_WORDS_BIGENDIAN
@@ -535,7 +535,7 @@ void cmos_mm_writew (void *opaque,
cmos_ioport_write(s, (addr - s->base) >> s->it_shift, value & 0xFFFF);
}
-uint32_t cmos_mm_readl (void *opaque, target_phys_addr_t addr)
+static uint32_t cmos_mm_readl (void *opaque, target_phys_addr_t addr)
{
RTCState *s = opaque;
uint32_t val;
@@ -547,8 +547,8 @@ uint32_t cmos_mm_readl (void *opaque, target_phys_addr_t addr)
return val;
}
-void cmos_mm_writel (void *opaque,
- target_phys_addr_t addr, uint32_t value)
+static void cmos_mm_writel (void *opaque,
+ target_phys_addr_t addr, uint32_t value)
{
RTCState *s = opaque;
#ifdef TARGET_WORDS_BIGENDIAN
diff --git a/hw/mcf_fec.c b/hw/mcf_fec.c
index c5482c9e1..0049860da 100644
--- a/hw/mcf_fec.c
+++ b/hw/mcf_fec.c
@@ -251,7 +251,7 @@ static uint32_t mcf_fec_read(void *opaque, target_phys_addr_t addr)
}
}
-void mcf_fec_write(void *opaque, target_phys_addr_t addr, uint32_t value)
+static void mcf_fec_write(void *opaque, target_phys_addr_t addr, uint32_t value)
{
mcf_fec_state *s = (mcf_fec_state *)opaque;
switch (addr & 0x3ff) {
diff --git a/hw/mips_malta.c b/hw/mips_malta.c
index 9ce8232fd..f133da3e3 100644
--- a/hw/mips_malta.c
+++ b/hw/mips_malta.c
@@ -398,7 +398,7 @@ static CPUWriteMemoryFunc *malta_fpga_write[] = {
malta_fpga_writel
};
-void malta_fpga_reset(void *opaque)
+static void malta_fpga_reset(void *opaque)
{
MaltaFPGAState *s = opaque;
@@ -415,7 +415,7 @@ void malta_fpga_reset(void *opaque)
malta_fpga_update_display(s);
}
-MaltaFPGAState *malta_fpga_init(target_phys_addr_t base, CPUState *env)
+static MaltaFPGAState *malta_fpga_init(target_phys_addr_t base, CPUState *env)
{
MaltaFPGAState *s;
CharDriverState *uart_chr;
diff --git a/hw/ne2000.c b/hw/ne2000.c
index 92023eb71..e95f537c9 100644
--- a/hw/ne2000.c
+++ b/hw/ne2000.c
@@ -23,6 +23,7 @@
*/
#include "hw.h"
#include "pci.h"
+#include "pc.h"
#include "net.h"
/* debug NE2000 card */
diff --git a/hw/nvram.h b/hw/nvram.h
index 174704bf6..3ec548302 100644
--- a/hw/nvram.h
+++ b/hw/nvram.h
@@ -37,5 +37,6 @@ void m48t59_toggle_lock (void *private, int lock);
m48t59_t *m48t59_init (qemu_irq IRQ, target_phys_addr_t mem_base,
uint32_t io_base, uint16_t size,
int type);
+void m48t59_set_addr (void *opaque, uint32_t addr);
#endif /* !NVRAM_H */
diff --git a/hw/omap.c b/hw/omap.c
index 88055edd9..1e79831d8 100644
--- a/hw/omap.c
+++ b/hw/omap.c
@@ -3041,7 +3041,7 @@ static CPUWriteMemoryFunc *omap_mpuio_writefn[] = {
omap_badwidth_write16,
};
-void omap_mpuio_reset(struct omap_mpuio_s *s)
+static void omap_mpuio_reset(struct omap_mpuio_s *s)
{
s->inputs = 0;
s->outputs = 0;
@@ -3257,7 +3257,7 @@ static CPUWriteMemoryFunc *omap_gpio_writefn[] = {
omap_badwidth_write16,
};
-void omap_gpio_reset(struct omap_gpio_s *s)
+static void omap_gpio_reset(struct omap_gpio_s *s)
{
s->inputs = 0;
s->outputs = ~0;
@@ -3429,7 +3429,7 @@ static CPUWriteMemoryFunc *omap_uwire_writefn[] = {
omap_badwidth_write16,
};
-void omap_uwire_reset(struct omap_uwire_s *s)
+static void omap_uwire_reset(struct omap_uwire_s *s)
{
s->control = 0;
s->setup[0] = 0;
@@ -3470,7 +3470,7 @@ void omap_uwire_attach(struct omap_uwire_s *s,
}
/* Pseudonoise Pulse-Width Light Modulator */
-void omap_pwl_update(struct omap_mpu_state_s *s)
+static void omap_pwl_update(struct omap_mpu_state_s *s)
{
int output = (s->pwl.clk && s->pwl.enable) ? s->pwl.level : 0;
@@ -3528,7 +3528,7 @@ static CPUWriteMemoryFunc *omap_pwl_writefn[] = {
omap_badwidth_write8,
};
-void omap_pwl_reset(struct omap_mpu_state_s *s)
+static void omap_pwl_reset(struct omap_mpu_state_s *s)
{
s->pwl.output = 0;
s->pwl.level = 0;
@@ -3632,7 +3632,7 @@ static CPUWriteMemoryFunc *omap_pwt_writefn[] = {
omap_badwidth_write8,
};
-void omap_pwt_reset(struct omap_mpu_state_s *s)
+static void omap_pwt_reset(struct omap_mpu_state_s *s)
{
s->pwt.frc = 0;
s->pwt.vrc = 0;
@@ -4037,7 +4037,7 @@ static void omap_rtc_tick(void *opaque)
qemu_mod_timer(s->clk, s->tick);
}
-void omap_rtc_reset(struct omap_rtc_s *s)
+static void omap_rtc_reset(struct omap_rtc_s *s)
{
s->interrupts = 0;
s->comp_reg = 0;
@@ -4509,14 +4509,14 @@ struct omap_mcbsp_s *omap_mcbsp_init(target_phys_addr_t base,
return s;
}
-void omap_mcbsp_i2s_swallow(void *opaque, int line, int level)
+static void omap_mcbsp_i2s_swallow(void *opaque, int line, int level)
{
struct omap_mcbsp_s *s = (struct omap_mcbsp_s *) opaque;
omap_mcbsp_rx_start(s);
}
-void omap_mcbsp_i2s_start(void *opaque, int line, int level)
+static void omap_mcbsp_i2s_start(void *opaque, int line, int level)
{
struct omap_mcbsp_s *s = (struct omap_mcbsp_s *) opaque;
diff --git a/hw/omap.h b/hw/omap.h
index bf87fa46d..c31503094 100644
--- a/hw/omap.h
+++ b/hw/omap.h
@@ -662,6 +662,9 @@ struct omap_mpu_state_s {
# error TARGET_PHYS_ADDR_BITS undefined
# endif
+uint32_t omap_badwidth_read8(void *opaque, target_phys_addr_t addr);
+void omap_badwidth_write8(void *opaque, target_phys_addr_t addr,
+ uint32_t value);
uint32_t omap_badwidth_read16(void *opaque, target_phys_addr_t addr);
void omap_badwidth_write16(void *opaque, target_phys_addr_t addr,
uint32_t value);
diff --git a/hw/omap_lcdc.c b/hw/omap_lcdc.c
index c6565d1db..c79d244c1 100644
--- a/hw/omap_lcdc.c
+++ b/hw/omap_lcdc.c
@@ -114,7 +114,7 @@ static draw_line_func *draw_line_table2[33] = {
[32] = draw_line16_32,
};
-void omap_update_display(void *opaque)
+static void omap_update_display(void *opaque)
{
struct omap_lcd_panel_s *omap_lcd = (struct omap_lcd_panel_s *) opaque;
draw_line_func *draw_line;
@@ -289,7 +289,7 @@ static int ppm_save(const char *filename, uint8_t *data,
return 0;
}
-void omap_screen_dump(void *opaque, const char *filename) {
+static void omap_screen_dump(void *opaque, const char *filename) {
struct omap_lcd_panel_s *omap_lcd = opaque;
omap_update_display(opaque);
if (omap_lcd && omap_lcd->state->data)
@@ -298,12 +298,12 @@ void omap_screen_dump(void *opaque, const char *filename) {
omap_lcd->state->linesize);
}
-void omap_invalidate_display(void *opaque) {
+static void omap_invalidate_display(void *opaque) {
struct omap_lcd_panel_s *omap_lcd = opaque;
omap_lcd->invalidate = 1;
}
-void omap_lcd_update(struct omap_lcd_panel_s *s) {
+static void omap_lcd_update(struct omap_lcd_panel_s *s) {
if (!s->enable) {
s->dma->current_frame = -1;
s->sync_error = 0;
diff --git a/hw/parallel.c b/hw/parallel.c
index dfcd5c2c3..5d99e7655 100644
--- a/hw/parallel.c
+++ b/hw/parallel.c
@@ -458,45 +458,45 @@ ParallelState *parallel_init(int base, qemu_irq irq, CharDriverState *chr)
}
/* Memory mapped interface */
-uint32_t parallel_mm_readb (void *opaque, target_phys_addr_t addr)
+static uint32_t parallel_mm_readb (void *opaque, target_phys_addr_t addr)
{
ParallelState *s = opaque;
return parallel_ioport_read_sw(s, (addr - s->base) >> s->it_shift) & 0xFF;
}
-void parallel_mm_writeb (void *opaque,
- target_phys_addr_t addr, uint32_t value)
+static void parallel_mm_writeb (void *opaque,
+ target_phys_addr_t addr, uint32_t value)
{
ParallelState *s = opaque;
parallel_ioport_write_sw(s, (addr - s->base) >> s->it_shift, value & 0xFF);
}
-uint32_t parallel_mm_readw (void *opaque, target_phys_addr_t addr)
+static uint32_t parallel_mm_readw (void *opaque, target_phys_addr_t addr)
{
ParallelState *s = opaque;
return parallel_ioport_read_sw(s, (addr - s->base) >> s->it_shift) & 0xFFFF;
}
-void parallel_mm_writew (void *opaque,
- target_phys_addr_t addr, uint32_t value)
+static void parallel_mm_writew (void *opaque,
+ target_phys_addr_t addr, uint32_t value)
{
ParallelState *s = opaque;
parallel_ioport_write_sw(s, (addr - s->base) >> s->it_shift, value & 0xFFFF);
}
-uint32_t parallel_mm_readl (void *opaque, target_phys_addr_t addr)
+static uint32_t parallel_mm_readl (void *opaque, target_phys_addr_t addr)
{
ParallelState *s = opaque;
return parallel_ioport_read_sw(s, (addr - s->base) >> s->it_shift);
}
-void parallel_mm_writel (void *opaque,
- target_phys_addr_t addr, uint32_t value)
+static void parallel_mm_writel (void *opaque,
+ target_phys_addr_t addr, uint32_t value)
{
ParallelState *s = opaque;
diff --git a/hw/pc.c b/hw/pc.c
index 99bb90646..69eeadb68 100644
--- a/hw/pc.c
+++ b/hw/pc.c
@@ -317,7 +317,7 @@ static uint32_t ioport92_read(void *opaque, uint32_t addr)
/***********************************************************/
/* Bochs BIOS debug ports */
-void bochs_bios_write(void *opaque, uint32_t addr, uint32_t val)
+static void bochs_bios_write(void *opaque, uint32_t addr, uint32_t val)
{
static const char shutdown_str[8] = "Shutdown";
static int shutdown_index = 0;
@@ -361,7 +361,7 @@ void bochs_bios_write(void *opaque, uint32_t addr, uint32_t val)
}
}
-void bochs_bios_init(void)
+static void bochs_bios_init(void)
{
register_ioport_write(0x400, 1, 2, bochs_bios_write, NULL);
register_ioport_write(0x401, 1, 2, bochs_bios_write, NULL);
@@ -431,8 +431,8 @@ static void generate_bootsect(uint32_t gpr[8], uint16_t segs[6], uint16_t ip)
bdrv_set_boot_sector(bs_table[0], bootsect, sizeof(bootsect));
}
-int load_kernel(const char *filename, uint8_t *addr,
- uint8_t *real_addr)
+static int load_kernel(const char *filename, uint8_t *addr,
+ uint8_t *real_addr)
{
int fd, size;
int setup_sects;
diff --git a/hw/pci.c b/hw/pci.c
index c43be3e81..0b5e7bf34 100644
--- a/hw/pci.c
+++ b/hw/pci.c
@@ -65,7 +65,7 @@ PCIBus *pci_register_bus(pci_set_irq_fn set_irq, pci_map_irq_fn map_irq,
return bus;
}
-PCIBus *pci_register_secondary_bus(PCIDevice *dev, pci_map_irq_fn map_irq)
+static PCIBus *pci_register_secondary_bus(PCIDevice *dev, pci_map_irq_fn map_irq)
{
PCIBus *bus;
bus = qemu_mallocz(sizeof(PCIBus));
@@ -159,7 +159,7 @@ void pci_register_io_region(PCIDevice *pci_dev, int region_num,
*(uint32_t *)(pci_dev->config + addr) = cpu_to_le32(type);
}
-target_phys_addr_t pci_to_cpu_addr(target_phys_addr_t addr)
+static target_phys_addr_t pci_to_cpu_addr(target_phys_addr_t addr)
{
return addr + pci_mem_base;
}
@@ -606,7 +606,7 @@ typedef struct {
PCIBus *bus;
} PCIBridge;
-void pci_bridge_write_config(PCIDevice *d,
+static void pci_bridge_write_config(PCIDevice *d,
uint32_t address, uint32_t val, int len)
{
PCIBridge *s = (PCIBridge *)d;
diff --git a/hw/pckbd.c b/hw/pckbd.c
index 738ce61d6..266c7f9b1 100644
--- a/hw/pckbd.c
+++ b/hw/pckbd.c
@@ -290,7 +290,7 @@ static uint32_t kbd_read_data(void *opaque, uint32_t addr)
return ps2_read_data(s->kbd);
}
-void kbd_write_data(void *opaque, uint32_t addr, uint32_t val)
+static void kbd_write_data(void *opaque, uint32_t addr, uint32_t val)
{
KBDState *s = opaque;
@@ -385,7 +385,7 @@ void i8042_init(qemu_irq kbd_irq, qemu_irq mouse_irq, uint32_t io_base)
}
/* Memory mapped interface */
-uint32_t kbd_mm_readb (void *opaque, target_phys_addr_t addr)
+static uint32_t kbd_mm_readb (void *opaque, target_phys_addr_t addr)
{
KBDState *s = opaque;
@@ -399,7 +399,7 @@ uint32_t kbd_mm_readb (void *opaque, target_phys_addr_t addr)
}
}
-void kbd_mm_writeb (void *opaque, target_phys_addr_t addr, uint32_t value)
+static void kbd_mm_writeb (void *opaque, target_phys_addr_t addr, uint32_t value)
{
KBDState *s = opaque;
diff --git a/hw/piix_pci.c b/hw/piix_pci.c
index 75f412a91..37352c430 100644
--- a/hw/piix_pci.c
+++ b/hw/piix_pci.c
@@ -314,7 +314,7 @@ static int piix_load(QEMUFile* f, void *opaque, int version_id)
return pci_device_load(d, f);
}
-int piix_init(PCIBus *bus, int devfn)
+static int piix_init(PCIBus *bus, int devfn)
{
PCIDevice *d;
uint8_t *pci_conf;
diff --git a/hw/pl061.c b/hw/pl061.c
index 791427252..d9a6f50f8 100644
--- a/hw/pl061.c
+++ b/hw/pl061.c
@@ -209,7 +209,7 @@ static void pl061_reset(pl061_state *s)
s->cr = 0xff;
}
-void pl061_set_irq(void * opaque, int irq, int level)
+static void pl061_set_irq(void * opaque, int irq, int level)
{
pl061_state *s = (pl061_state *)opaque;
uint8_t mask;
diff --git a/hw/pl190.c b/hw/pl190.c
index abc28468e..fc3d08984 100644
--- a/hw/pl190.c
+++ b/hw/pl190.c
@@ -216,7 +216,7 @@ static CPUWriteMemoryFunc *pl190_writefn[] = {
pl190_write
};
-void pl190_reset(pl190_state *s)
+static void pl190_reset(pl190_state *s)
{
int i;
diff --git a/hw/pxa2xx_lcd.c b/hw/pxa2xx_lcd.c
index 56328e9f4..585543530 100644
--- a/hw/pxa2xx_lcd.c
+++ b/hw/pxa2xx_lcd.c
@@ -882,7 +882,7 @@ static void pxa2xx_screen_dump(void *opaque, const char *filename)
/* TODO */
}
-void pxa2xx_lcdc_orientation(void *opaque, int angle)
+static void pxa2xx_lcdc_orientation(void *opaque, int angle)
{
struct pxa2xx_lcdc_s *s = (struct pxa2xx_lcdc_s *) opaque;
diff --git a/hw/pxa2xx_pcmcia.c b/hw/pxa2xx_pcmcia.c
index f5d805a7c..1e96ee44b 100644
--- a/hw/pxa2xx_pcmcia.c
+++ b/hw/pxa2xx_pcmcia.c
@@ -9,6 +9,7 @@
#include "hw.h"
#include "pcmcia.h"
+#include "pxa.h"
struct pxa2xx_pcmcia_s {
struct pcmcia_socket_s slot;
diff --git a/hw/realview_gic.c b/hw/realview_gic.c
index 639db846b..b4ef2ccf3 100644
--- a/hw/realview_gic.c
+++ b/hw/realview_gic.c
@@ -8,7 +8,7 @@
*/
#include "hw.h"
-#include "arm-misc.h"
+#include "primecell.h"
#define GIC_NIRQ 96
#define NCPU 1
diff --git a/hw/rtl8139.c b/hw/rtl8139.c
index 868cbbae8..6e3c023b3 100644
--- a/hw/rtl8139.c
+++ b/hw/rtl8139.c
@@ -497,7 +497,7 @@ typedef struct RTL8139State {
} RTL8139State;
-void prom9346_decode_command(EEprom9346 *eeprom, uint8_t command)
+static void prom9346_decode_command(EEprom9346 *eeprom, uint8_t command)
{
DEBUG_PRINT(("RTL8139: eeprom command 0x%02x\n", command));
@@ -543,7 +543,7 @@ void prom9346_decode_command(EEprom9346 *eeprom, uint8_t command)
}
}
-void prom9346_shift_clock(EEprom9346 *eeprom)
+static void prom9346_shift_clock(EEprom9346 *eeprom)
{
int bit = eeprom->eedi?1:0;
@@ -635,7 +635,7 @@ void prom9346_shift_clock(EEprom9346 *eeprom)
}
}
-int prom9346_get_wire(RTL8139State *s)
+static int prom9346_get_wire(RTL8139State *s)
{
EEprom9346 *eeprom = &s->eeprom;
if (!eeprom->eecs)
@@ -644,7 +644,8 @@ int prom9346_get_wire(RTL8139State *s)
return eeprom->eedo;
}
-void prom9346_set_wire(RTL8139State *s, int eecs, int eesk, int eedi)
+/* FIXME: This should be merged into/replaced by eeprom93xx.c. */
+static void prom9346_set_wire(RTL8139State *s, int eecs, int eesk, int eedi)
{
EEprom9346 *eeprom = &s->eeprom;
uint8_t old_eecs = eeprom->eecs;
@@ -1448,7 +1449,7 @@ static uint32_t rtl8139_IntrMitigate_read(RTL8139State *s)
return ret;
}
-int rtl8139_config_writeable(RTL8139State *s)
+static int rtl8139_config_writeable(RTL8139State *s)
{
if (s->Cfg9346 & Cfg9346_Unlock)
{
diff --git a/hw/sd.c b/hw/sd.c
index 9dd86e357..8b481e6f0 100644
--- a/hw/sd.c
+++ b/hw/sd.c
@@ -308,8 +308,8 @@ static int sd_req_crc_validate(struct sd_request_s *req)
return sd_crc7(buffer, 5) != req->crc; /* TODO */
}
-void sd_response_r1_make(SDState *sd,
- uint8_t *response, uint32_t last_status)
+static void sd_response_r1_make(SDState *sd,
+ uint8_t *response, uint32_t last_status)
{
uint32_t mask = CARD_STATUS_B ^ ILLEGAL_COMMAND;
uint32_t status;
@@ -323,7 +323,7 @@ void sd_response_r1_make(SDState *sd,
response[3] = (status >> 0) & 0xff;
}
-void sd_response_r3_make(SDState *sd, uint8_t *response)
+static void sd_response_r3_make(SDState *sd, uint8_t *response)
{
response[0] = (sd->ocr >> 24) & 0xff;
response[1] = (sd->ocr >> 16) & 0xff;
@@ -331,7 +331,7 @@ void sd_response_r3_make(SDState *sd, uint8_t *response)
response[3] = (sd->ocr >> 0) & 0xff;
}
-void sd_response_r6_make(SDState *sd, uint8_t *response)
+static void sd_response_r6_make(SDState *sd, uint8_t *response)
{
uint16_t arg;
uint16_t status;
diff --git a/hw/sh_serial.c b/hw/sh_serial.c
index 1336780d1..324c2a8fb 100644
--- a/hw/sh_serial.c
+++ b/hw/sh_serial.c
@@ -252,14 +252,14 @@ static void sh_serial_event(void *opaque, int event)
sh_serial_receive_break(s);
}
-uint32_t sh_serial_read (void *opaque, target_phys_addr_t addr)
+static uint32_t sh_serial_read (void *opaque, target_phys_addr_t addr)
{
sh_serial_state *s = opaque;
return sh_serial_ioport_read(s, addr - s->base);
}
-void sh_serial_write (void *opaque,
- target_phys_addr_t addr, uint32_t value)
+static void sh_serial_write (void *opaque,
+ target_phys_addr_t addr, uint32_t value)
{
sh_serial_state *s = opaque;
sh_serial_ioport_write(s, addr - s->base, value);
diff --git a/hw/sh_timer.c b/hw/sh_timer.c
index 6be895300..2247929c2 100644
--- a/hw/sh_timer.c
+++ b/hw/sh_timer.c
@@ -52,7 +52,7 @@ static void sh_timer_update(sh_timer_state *s)
#endif
}
-uint32_t sh_timer_read(void *opaque, target_phys_addr_t offset)
+static uint32_t sh_timer_read(void *opaque, target_phys_addr_t offset)
{
sh_timer_state *s = (sh_timer_state *)opaque;
diff --git a/hw/smbus.c b/hw/smbus.c
index 81e887b2a..6eb841240 100644
--- a/hw/smbus.c
+++ b/hw/smbus.c
@@ -61,7 +61,7 @@ static void smbus_do_write(SMBusDevice *dev)
}
}
-void smbus_i2c_event(i2c_slave *s, enum i2c_event event)
+static void smbus_i2c_event(i2c_slave *s, enum i2c_event event)
{
SMBusDevice *dev = (SMBusDevice *)s;
switch (event) {
diff --git a/hw/stellaris.c b/hw/stellaris.c
index cc47b9dbc..0bd76ab22 100644
--- a/hw/stellaris.c
+++ b/hw/stellaris.c
@@ -521,7 +521,7 @@ static CPUWriteMemoryFunc *ssys_writefn[] = {
ssys_write
};
-void ssys_reset(void *opaque)
+static void ssys_reset(void *opaque)
{
ssys_state *s = (ssys_state *)opaque;
diff --git a/hw/usb-ohci.c b/hw/usb-ohci.c
index 255cba7c9..68995b070 100644
--- a/hw/usb-ohci.c
+++ b/hw/usb-ohci.c
@@ -31,6 +31,7 @@
#include "qemu-timer.h"
#include "usb.h"
#include "pci.h"
+#include "pxa.h"
//#define DEBUG_OHCI
/* Dump packet contents. */
diff --git a/hw/wm8750.c b/hw/wm8750.c
index 245d56fb0..8243ca54b 100644
--- a/hw/wm8750.c
+++ b/hw/wm8750.c
@@ -124,7 +124,7 @@ static const struct wm_rate_s wm_rate_table[] = {
{ 192, 88200, 128, 88200 }, /* SR: 11111 */
};
-void wm8750_set_format(struct wm8750_s *s)
+static void wm8750_set_format(struct wm8750_s *s)
{
int i;
audsettings_t in_fmt;
@@ -194,7 +194,7 @@ void wm8750_set_format(struct wm8750_s *s)
AUD_set_active_out(*s->out[0], 1);
}
-void inline wm8750_mask_update(struct wm8750_s *s)
+static void inline wm8750_mask_update(struct wm8750_s *s)
{
#define R_ONLY 0x0000ffff
#define L_ONLY 0xffff0000
@@ -596,7 +596,7 @@ i2c_slave *wm8750_init(i2c_bus *bus, AudioState *audio)
return &s->i2c;
}
-void wm8750_fini(i2c_slave *i2c)
+static void wm8750_fini(i2c_slave *i2c)
{
struct wm8750_s *s = (struct wm8750_s *) i2c;
wm8750_reset(&s->i2c);